Rob Clark [Thu, 2 Mar 2023 19:18:05 +0000 (11:18 -0800)]
freedreno/registers: Add c++ magic for register variants
For regs with multiple variants, generate a template'ized function to
pack the reg value. If the template param is known at compile time
(which is the expected usage) this will optimize to the same thing as
the "traditional" reg packing.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Thu, 2 Mar 2023 19:17:06 +0000 (11:17 -0800)]
freedreno/registers: Split out regpair builder helper
We are going to want to re-use this in the next commit.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Wed, 1 Mar 2023 23:17:57 +0000 (15:17 -0800)]
freedreno/registers: Track varset
Track varset and assert that variants refer to a valid varset enum
value. This adds a bit of extra sanity checking, but becomes more
useful in the next commit.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Wed, 3 Aug 2022 14:56:35 +0000 (07:56 -0700)]
freedreno/registers: Start adding stuff for a7xx
Start adding the bits needed for userspace.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Tue, 2 Aug 2022 22:51:53 +0000 (15:51 -0700)]
freedreno/decode: Start adding a7xx support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Tue, 2 Aug 2022 22:39:32 +0000 (15:39 -0700)]
freedreno/registers: Start adding a7xx pipe/control regs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sat, 23 Jul 2022 22:14:22 +0000 (15:14 -0700)]
freedreno/registers: Merge a6xx and a7xx regs
They have more similarities than differences, so merge them and use
"variant" attribute as needed to manage differences.
Note initially using "variant" conservatively when it comes to regs
known on a7xx but not a6xx. It could be that they exist also on later
versions of a6xx as well, for example. For ex, LPAC related regs/bits
likely existed on later a6xx (eg. a660 family) but BV stuff is not.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Tue, 2 Aug 2022 16:53:25 +0000 (09:53 -0700)]
freedreno/registers: Add prefix="variant"
To merge a7xx and a6xx regs, using variant property to manage the
differences, we'll want regs/etc to be named according to the first
generation it is use rather than the domain name. Add a new prefix
type to accomplish this. By default, if no variant property, things
will still be named based on domain (ie. REG_A6XX_...), and things
that have variant="A6XX" will also end up as they currently are
(since the chip enum matches domain name), but things that have
variant="A7XX" will end up as REG_A7XX_...
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Fri, 29 Jul 2022 18:44:16 +0000 (11:44 -0700)]
freedreno/registers: Fix designator order
C++ is picky about order matching for some reason.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sun, 17 Jul 2022 14:55:43 +0000 (07:55 -0700)]
freedreno/a6xx: Convert to c++
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sun, 5 Mar 2023 20:38:24 +0000 (12:38 -0800)]
freedreno/a6xx: Fix designator initializer order
Clang seems more relaxed about this, allowing C99 style initializers
without requiring ordering. But unfortunately g++ is more picky :-/
TODO this doesn't completely fix everything with g++, namely sparse
array initialization.. for ir3 driver-params, I think we can convert
these to structs. But there are still one or two others to deal with.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sun, 26 Feb 2023 17:59:33 +0000 (09:59 -0800)]
freedreno/a6xx: Add missing "inline"
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sun, 26 Feb 2023 17:57:24 +0000 (09:57 -0800)]
freedreno/a6xx: Rework texture_clear fallback
C++ is more picky about a goto jumping over variable initialization,
even if unused after the goto label (presumably because of destructors
that can be called after a variable goes out of scope). Since there is
only a single fallback path, get rid of the goto.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sun, 17 Jul 2022 18:04:54 +0000 (11:04 -0700)]
freedreno: c++-proofing
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sat, 25 Feb 2023 17:28:16 +0000 (09:28 -0800)]
freedreno: Un-inline buffer-mask enum
Also, fix obsolete comment.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Mon, 6 Mar 2023 16:02:14 +0000 (08:02 -0800)]
freedreno/ir3: Add missing driver params
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Mon, 6 Mar 2023 15:59:19 +0000 (07:59 -0800)]
freedreno/ir3+tu: Calculate subgroup size in ir3
TBD if the size changes for a7xx, but at least let's have it in one
place instead of duplicating in turnip and gallium.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sun, 17 Jul 2022 17:12:11 +0000 (10:12 -0700)]
freedreno/ir3: c++-proof the headers
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Fri, 5 Aug 2022 16:39:18 +0000 (09:39 -0700)]
freedreno/ir3: Don't use negative opc for meta instructions
Stricter compilers complain about this, ie:
error: left operand of shift expression ‘(-1 << 7)’ is negative [-fpermissive]
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sun, 17 Jul 2022 16:20:09 +0000 (09:20 -0700)]
freedreno/ir3: Un-inline enums
It seems to be a thing that c++ dislikes
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sun, 17 Jul 2022 15:12:41 +0000 (08:12 -0700)]
freedreno: Quiet c++ warning about designated initializers
And various other things that c++ is more strict about. Perhaps we
re-instate a few of the more reasonable warnings over time.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Wed, 3 Aug 2022 15:56:14 +0000 (08:56 -0700)]
freedreno/registers: Add regs for a690
New regs needed on kernel side.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Sat, 23 Jul 2022 21:13:21 +0000 (14:13 -0700)]
freedreno/registers: Schema validation for gen_header.py
Lets catch issues at build time, and not relying on someone remembering
to run the unit tests.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Rob Clark [Tue, 7 Mar 2023 21:26:58 +0000 (13:26 -0800)]
freedreno: Nerf strict-aliasing warning for all of gcc
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
Samuel Pitoiset [Wed, 8 Feb 2023 15:29:11 +0000 (16:29 +0100)]
radv: allow to cache optimized (LTO) pipelines with GPL
This should be working now, except PS epilogs that are still not
added to the cache.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21834>
Samuel Pitoiset [Wed, 8 Feb 2023 15:26:50 +0000 (16:26 +0100)]
radv: keep track of the retained NIR shaders sha1 for LTO pipelines
Otherwise the per pipeline cache key doesn't consider shaders at all
when they are imported from libs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21834>
Samuel Pitoiset [Fri, 10 Mar 2023 13:00:48 +0000 (14:00 +0100)]
radv: determine if a graphics pipeline needs a noop FS earlier
Also introduce a helper.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21834>
Samuel Pitoiset [Fri, 10 Mar 2023 13:02:01 +0000 (14:02 +0100)]
radv: fix the error code when the driver fails to create a PS epilog
It would have been returned VK_SUCCESS.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21834>
Daniel Schürmann [Sun, 12 Mar 2023 16:14:01 +0000 (17:14 +0100)]
radv/rt: place any-hit scratch vars after intersection scratch vars
If both, any-hit and intersection shader, use scratch vars,
it could happen that they end up in the same location and
overwrite each other.
Found by inspection.
Fixes:
c3d82a962217def9b9f7e1f4c5ce0a450b97e9c7 ('radv: Add pass to lower anyhit shader into an intersection shader.')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21863>
Jordan Justen [Tue, 26 Jan 2021 07:01:52 +0000 (23:01 -0800)]
intel/dev: Enable MTL PCI ids
Ref: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/drm/i915_pciids.h?h=v6.0-rc4#n736
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18481>
Mike Blumenkrantz [Thu, 26 Jan 2023 17:55:02 +0000 (12:55 -0500)]
radv: avoid a huge memset in radv_graphics_pipeline_compile()
this has a noticeable impact on pipeline creation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20947>
Samuel Pitoiset [Thu, 9 Mar 2023 16:28:28 +0000 (17:28 +0100)]
radv: zero-initialize radv_shader_info earlier for graphics pipeline
This should allow us to remove a big memset when compiling a
graphics pipeline. This is mostly for imported NIR stages which
don't go through radv_pipeline_stage_init().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20947>
Samuel Pitoiset [Thu, 9 Mar 2023 14:04:29 +0000 (15:04 +0100)]
radv: zero-initialize radv_shader_args right before declaring them
This should allow us to remove a big memset when compiling a
graphics pipeline. This is mostly for imported NIR stages which
don't go through radv_pipeline_stage_init().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20947>
Mike Blumenkrantz [Thu, 26 Jan 2023 17:33:40 +0000 (12:33 -0500)]
radv: delete radv_graphics_pipeline_compile() asserts
validation should catch these by now
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20947>
Vinson Lee [Sat, 4 Mar 2023 21:26:20 +0000 (13:26 -0800)]
pps: Fix build errors.
In file included from ../src/tool/pps/pps_device.cc:10:
../src/tool/pps/pps_device.h:23:11: error: ‘uint32_t’ does not name a type
23 | static uint32_t device_count();
| ^~~~~~~~
In file included from ../src/tool/pps/pps_counter.cc:10:
../src/tool/pps/pps_counter.h:22:4: error: ‘uint32_t’ does not name a type
22 | uint32_t id;
| ^~~~~~~~
Fixes:
1cc72b2aef8 ("pps: Gfx-pps v0.3.0")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8186
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21714>
Marek Olšák [Sat, 13 Aug 2022 05:42:34 +0000 (01:42 -0400)]
glthread: qualify the *cmd unmarshal parameter with restrict
This seems like a logical thing to do. Clearly the memory can't be
accessed with any other pointer.
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>
Marek Olšák [Thu, 11 Aug 2022 07:00:40 +0000 (03:00 -0400)]
mesa: put dispatch table initialization into one place
We have 3 new/changed functions with this commit:
1. _mesa_alloc_dispatch_tables creates all dispatch tables that are not
created on demand and sets them to nop. This operates on gl_dispatch,
so it's reusable (e.g. glthread will want to use it)
2. _mesa_free_dispatch_tables frees everything
3. _mesa_initialize_dispatch_tables initializes gl_dispatch for GL
(not glthread)
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>
Marek Olšák [Wed, 10 Aug 2022 04:27:22 +0000 (00:27 -0400)]
mesa: rename CurrentClientDispatch to GLApi
I like this more. The name self-documents itself. It's always equal
to the dispatch set in glapi.
GLAPI is a definition, so can't use that.
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>
Marek Olšák [Wed, 10 Aug 2022 03:10:24 +0000 (23:10 -0400)]
mesa: move ctx->Table -> ctx->Dispatch.Table except Client & MarshalExec
There is a new struct gl_dispatch, which I'd like to reuse in glthread.
This allows building code around gl_dispatch that can be shared between
mesa and glthread. This is only refactoring.
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>
Marek Olšák [Mon, 26 Dec 2022 17:03:11 +0000 (12:03 -0500)]
glapi: inline the meson list files_mapi_util
so that people can easily tell where these files are used by searching
for the file names in the meson files.
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>
Marek Olšák [Mon, 26 Dec 2022 17:00:54 +0000 (12:00 -0500)]
glapi: move files specific to shared-glapi into the shared-glapi subdirectory
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21777>
David Heidelberg [Sun, 12 Mar 2023 18:17:35 +0000 (19:17 +0100)]
ci/clover: disable the jobs
Prepare for Clover removal; don't waste resources on Clover anymore.
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21865>
Daniel Schürmann [Fri, 10 Mar 2023 19:59:36 +0000 (20:59 +0100)]
aco/spill: allow for disconnected CFG
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20853>
Daniel Schürmann [Thu, 19 Jan 2023 16:36:06 +0000 (17:36 +0100)]
aco/insert_exec_mask: allow for disconnected CFG
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20853>
Daniel Schürmann [Thu, 19 Jan 2023 16:20:57 +0000 (17:20 +0100)]
aco/dead_code_analysis: don't add artificial uses to p_startpgm
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20853>
Daniel Schürmann [Thu, 19 Jan 2023 16:14:51 +0000 (17:14 +0100)]
aco/value_numbering: clear hashmap between disconnected CFGs
There is no dominance-relationship between two disconnected CFGs,
thus no CSE is possible.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20853>
Daniel Schürmann [Thu, 19 Jan 2023 16:06:01 +0000 (17:06 +0100)]
aco/dominance: set immediate dominator for any BB without predecessors
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20853>
Daniel Stone [Sun, 12 Mar 2023 17:23:51 +0000 (17:23 +0000)]
CI: Disable mingw job
mingw just hangs somewhere in Meson, with a totally unclear cause, when
trying to run winepath:
Program winepath found: YES (/usr/bin/winepath)
Running command: /usr/bin/winepath -w /builds/mesa/mesa/_build/src/util/process_test.exe
[... hangs forever ...]
root 27 0.0 0.0 4044 3232 ? S 17:10 0:00 bash .gitlab-ci/meson/build.sh
root 35 0.0 0.0 2811920 55800 ? Sl 17:10 0:00 Xvfb :0 -screen 0 1024x768x16
root 40 0.1 0.0 45484 40740 ? S 17:10 0:00 /usr/bin/python3 /usr/local/bin/meson setup _build --native-file=native.file --wrap-mode=nofallback --force-fallback-for perfetto -D prefix=/builds/mesa/mesa/install -D libdir=lib -D buildtype=debug -D build-tests=true -D c_args=-Wno-error=format -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=sign-compare -Wno-error=narrowing -D cpp_args=-Wno-error=format -Wno-error=unused-function -Wno-error=unused-variable -Wno-error=unused-but-set-variable -Wno-error=sign-compare -Wno-error=narrowing -D enable-glcpp-tests=false -D libunwind=disabled -D gallium-opencl=icd -D gallium-rusticl=false -D opencl-spirv=true -D microsoft-clc=enabled -D static-libclc=all -D llvm=enabled -D gallium-va=enabled -D video-codecs=h264dec,h264enc,h265dec,h265enc,vc1dec -D gallium-drivers=swrast,d3d12,zink -D vulkan-drivers=swrast,amd,microsoft-experimental -D video-codecs=h264dec,h264enc,h265dec,h265enc,vc1dec -D werror=true -D min-windows-version=7 -D spirv-to-dxil=true -D gles1=enabled -D gles2=enabled -D osmesa=true -D cpp_rtti=true -D shared-glapi=enabled -D zlib=enabled --cross-file=.gitlab-ci/x86_64-w64-mingw32
root 1366 0.0 0.0 0 0 ? Z 17:10 0:00 [winepath.exe] <defunct>
root 1375 0.0 0.0 8544 7188 ? Ss 17:10 0:00 /usr/lib/wine/wineserver64 -p0
root 1381 0.0 0.0 2018764 11080 ? Ssl 17:10 0:00 C:\windows\system32\services.exe
root 1384 0.0 0.0 1821312 10044 ? Sl 17:10 0:00 C:\windows\system32\plugplay.exe
root 1386 0.0 0.0 1856096 23016 ? Sl 17:10 0:00 C:\windows\system32\explorer.exe /desktop
root 1393 0.0 0.0 1822712 11000 ? Sl 17:10 0:00 C:\windows\system32\winedevice.exe
root 1402 0.0 0.0 1778832 21456 ? S 17:10 0:00 winedbg --auto 26 80
root 1405 0.0 0.0 1891516 12192 ? Sl 17:11 0:00 C:\windows\system32\winedevice.exe
Disable it until we can figure it out.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21864>
Daniel Stone [Sun, 12 Mar 2023 17:01:56 +0000 (17:01 +0000)]
CI: Disable Windows runners
They are currently being rebuilt, with no firm ETA for their return.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21864>
Daniel Stone [Sun, 12 Mar 2023 17:01:44 +0000 (17:01 +0000)]
Revert "ci: Disable Collabora LAVA farm"
This reverts commit
c1aa876747a37d42b67ff1f53675890b05b40d1a.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21864>
Kai Wasserbäch [Sat, 11 Feb 2023 17:38:01 +0000 (18:38 +0100)]
fix: gallivm: fix LLVM #include of Host.h, moved to TargetParser
Upstream moved Host.h from Support to TargetParser in LLVM 17.
This shouldn't lead to a FTBFS, since there is a forwarding include left
behind. Sadly the added deprecation warning #pragma is invalid and thus
causes a build failure right away. But since we would have to follow the
move anyway in the future, just do it right away.
Reference: https://github.com/llvm/llvm-project/commit/
d768bf994f508d7eaf9541a568be3d71096febf5
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Closes: #8275
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21263>
Konstantin Seurer [Sat, 4 Mar 2023 16:18:25 +0000 (17:18 +0100)]
radv/rt: Properly handle pNext of pipeline library stages
Fixes
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.non_graphics.shader_module_info_rt_lib.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21707>
Konstantin Seurer [Sat, 4 Mar 2023 16:17:13 +0000 (17:17 +0100)]
vulkan: Add vk_shader_module_init
This will be used for allocating shader modules using ralloc by RADV.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21707>
Konstantin Seurer [Sat, 4 Mar 2023 15:51:40 +0000 (16:51 +0100)]
radv/rt: Use vk_pipeline_hash_shader_stage for RT stages
Fixes
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.non_graphics.shader_module_info_rt.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21707>
David Heidelberg [Fri, 10 Mar 2023 07:55:31 +0000 (08:55 +0100)]
ci/iris: update apl and glk expectations, after enabling Wayland support
After enabling the Wayland platform for x86_64,
multiple new tests were triggered, some of which timed out.
Also wayland-dEQP-EGL.functional.negative_api.create_pixmap_surface now pass.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21786>
David Heidelberg [Mon, 13 Feb 2023 19:43:21 +0000 (20:43 +0100)]
ci: build Wayland support for the amd64
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21786>
Alyssa Rosenzweig [Tue, 7 Mar 2023 16:38:36 +0000 (11:38 -0500)]
agx: Lower discard late
Fixes regression with Dolphin's ubershaders.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21855>
Mike Blumenkrantz [Wed, 8 Mar 2023 17:20:27 +0000 (12:20 -0500)]
zink: ignore renderdoc if ZINK_RENDERDOC isn't in use
this otherwise has some weird side effects
Fixes:
48a0478126f ("zink: add renderdoc handling")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21816>
Alyssa Rosenzweig [Fri, 10 Mar 2023 02:01:02 +0000 (21:01 -0500)]
ail: Restructure generated tests
Currently, the generated tests consist of some boilerplate, generated
test cases, and at the very end the actual test. This is bad for readability,
because the actual code is all the way at the bottom. It's also bad for
clang-format linting: even though the test cases are /* clang-format off */,
they still take an exceptionally long time to parse when linting. I suspect this
is a clang-format bug, but it's easy enough to workaround.
To solve these issues, restructure so that the test cases are in separate files
(containing the actual data), but the manually written test functions are
consolidated into a new family of generated layout tests. This is probably
cleaner.
Parallel clang-format linting is now 10x faster on the M1, which means it's
now practical to lint in my "publish branch" hook.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21854>
José Roberto de Souza [Tue, 9 Aug 2022 17:26:54 +0000 (10:26 -0700)]
anv: Integrate gem vm bind and unbind kmd backend functions
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21698>
José Roberto de Souza [Thu, 9 Feb 2023 16:57:11 +0000 (08:57 -0800)]
anv: Add gem VM bind and unbind to backend
Not using it yet, that will be done in the next patch.
Xe only supports submission using VM.
For i915 the backend functions are just a noop.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21698>
José Roberto de Souza [Thu, 9 Feb 2023 16:50:57 +0000 (08:50 -0800)]
anv: Implement gem close and mmap for Xe backend
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21698>
José Roberto de Souza [Thu, 9 Feb 2023 16:44:04 +0000 (08:44 -0800)]
anv: Implement Xe functions to create and destroy VM
Also using the vm_id to create gem buffers.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21698>
José Roberto de Souza [Thu, 9 Feb 2023 16:24:17 +0000 (08:24 -0800)]
anv: Implement gem_create for Xe backend
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21698>
Isabella Basso [Fri, 10 Mar 2023 20:20:10 +0000 (17:20 -0300)]
nir/algebraic: remove duplicate bool conversion lowerings
While [1] added some boolean conversion lowering patterns, those were
already dealt with on [2].
[1] -
b86305bb ("nir/algebraic: collapse conversion opcodes (many patterns)")
[2] -
d7e0d47b ("nir/algebraic: nir: Add a bunch of b2[if] optimizations")
Fixes:
b86305bb ("nir/algebraic: collapse conversion opcodes (many patterns)")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>
Isabella Basso [Fri, 10 Mar 2023 20:20:10 +0000 (17:20 -0300)]
nir/algebraic: make patterns for float conversion lowerings imprecise
As noted on [1], lowering patterns of the form
floatS -> floatB -> floatS ==> floatS
cannot require precision since this may cause flush denorming.
[1]
3f779013 ("nir: Add an algebraic optimization for float->double->float")
Fixes:
b86305bb ("nir/algebraic: collapse conversion opcodes (many patterns)")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>
Isabella Basso [Fri, 10 Mar 2023 20:20:09 +0000 (17:20 -0300)]
nir/algebraic: extend lowering patterns for conversions on smaller bit sizes
Conversions on smaller bit sizes should also be collapsed when composed.
This also adds more patterns on the
intS -> intB -> floatB ==> intS -> floatB
lowering so as to deal with any int size C > B instead of a fixed intB.
Closes: #7776
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>
Isabella Basso [Fri, 10 Mar 2023 20:20:09 +0000 (17:20 -0300)]
nir/algebraic: extend mediump patterns
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Suggested-by: Italo Nicola <italonicola@collabora.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>
Isabella Basso [Fri, 10 Mar 2023 20:20:07 +0000 (17:20 -0300)]
nir/algebraic: insert patterns inside optimizations list
Some patterns were outside the list of optimizations.
Fixes:
b86305bb ("nir/algebraic: collapse conversion opcodes (many patterns)")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>
Alyssa Rosenzweig [Tue, 7 Mar 2023 00:19:41 +0000 (19:19 -0500)]
nir/lower_point_size: Use shader_instructions_pass
Sleepy code deletion mood.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21750>
Alyssa Rosenzweig [Wed, 1 Mar 2023 19:29:17 +0000 (14:29 -0500)]
agx: Switch to scoped_barrier
Rather than ingesting separate control and memory barriers, ingest only the
combined and optimized scoped_barrier intrinsic. For barriers originating from
GLSL, this makes it easier to ensure correctness. For barriers originating from
SPIR-V, this is required for translation at all, as spirv_to_nir knows only
scoped barriers. So this gets us closer to Vulkan and OpenCL.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21752>
David Heidelberg [Sat, 4 Mar 2023 13:46:01 +0000 (14:46 +0100)]
ci/lava: every LAVA job doesn't want to run gles2 deqp, drop it
Very annoying when adding new job and not getting failure due to missing
`DEQP_VER: `
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>
David Heidelberg [Fri, 10 Mar 2023 14:10:44 +0000 (15:10 +0100)]
ci/panfrost: correct the job name, as it runs on gles2
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>
David Heidelberg [Sat, 4 Mar 2023 13:33:02 +0000 (14:33 +0100)]
ci/amd: move skqp and va jobs on raven from XOrg to the XWayland
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>
David Heidelberg [Tue, 17 Jan 2023 18:01:36 +0000 (19:01 +0100)]
ci: add and utilize dalboz devices
New 10 devices - asus-CM1400CXA-dalboz hosted on Collabora farm.
1x Move VA-API tests to the dalboz (more resources). One timeout dropped.
9x Run VKCTS on dalboz.
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>
Sil Vilerino [Fri, 10 Mar 2023 03:59:45 +0000 (22:59 -0500)]
d3d12: Fix video decode for interlaced streams with reference only textures required
Fixes:
d8206f628659d468c870430daa271d5bec6e860d ("d3d12: Add video decode implementation of pipe_video_codec")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21832>
Alyssa Rosenzweig [Sun, 26 Feb 2023 03:29:42 +0000 (22:29 -0500)]
agx: Use nir_lower_mem_access_bit_sizes
Lowers away 64-bit loads, which we'll create in the sysval lowering for
dynamically indexed UBOs/VBOs. The lowering generates pack_64_2x32 instructions,
so lower those too.
No shader-db changes.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21674>
Alyssa Rosenzweig [Fri, 3 Mar 2023 05:29:49 +0000 (00:29 -0500)]
agx: Implement extract_[ui]16
Instead of lowering to bitwise ops. Yet another way of subdividing in NIR.
Probably insignificant but makes it easy to check that the pass ordering from the
previous pass is right. It does let us get much better codegen for
unpacksnorm2x16, whatever that's worth.
No shader-db changes.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21674>
Alyssa Rosenzweig [Sun, 19 Feb 2023 04:33:12 +0000 (23:33 -0500)]
agx: Fix subdivision coalescing
As intended. We can't CSE with partial null destinations in the way, so we
shouldn't eliminate dead destinations until after CSE has run. But we should
still eliminate dead instructions to ensure CSE doesn't move things around
needlessly, hurting register pressure.
Noticed while debugging live range splitting.
No GLES3.0 shader-db changes.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21674>
Alyssa Rosenzweig [Fri, 3 Mar 2023 05:12:00 +0000 (00:12 -0500)]
agx: Make partial DCE optional
Our dead code elimination pass does two things:
1. delete instructions that are entirely unnecessary
2. delete unnecessary destinations of necessary instructions
To deal with pass ordering issues, we sometimes want to do #1 without #2.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21674>
Alyssa Rosenzweig [Mon, 27 Feb 2023 04:33:02 +0000 (23:33 -0500)]
agx: Don't set lower_pack_split
We should handle nir_op_unpack_32_2x16_split_* natively, since we can generate
better code with agx_subdivide (coalescing the ops away) than the bitshift
lowering.
That said, we do need some extra instructions for the floating point
conversions.
No shader-db changes (which makes sense because we're targetting the GLES3.0
shader-db, which doesn't have the packing GLSL functions).
The real motivation of this change isn't optimizing some GLSL pack functions,
though, it's avoiding a code regression from using NIR's memory bit size
lowering in a future MR. That lowering will turn things like "load i16vec4" into
"load i32vec2 + unpack_32_2x16", so we need to be able to coalesce that unpack.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21674>
Daniel Stone [Sat, 11 Mar 2023 11:59:31 +0000 (11:59 +0000)]
ci: Disable Collabora LAVA farm
Looks like a power or network issue.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21851>
Eric Engestrom [Sat, 11 Mar 2023 09:01:23 +0000 (09:01 +0000)]
ci: take valve farm offline
It seems to be experiencing networking issues
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21851>
Daniel Stone [Thu, 9 Mar 2023 19:07:36 +0000 (19:07 +0000)]
ci: Actually run Piglit on LAVA
At some point in a refactoring long ago, our 'Piglit' runs on arm64
started actually being dEQP-GLES2 runs. Oh dear.
Surprisingly, there are a number of expectation changes; added every
fail I saw from a long overnight stress test.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21851>
Alyssa Rosenzweig [Wed, 28 Dec 2022 20:57:01 +0000 (15:57 -0500)]
pan/mdg: Remove reference to removed macro
This will soon be more confusing than helpful.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>
Alyssa Rosenzweig [Wed, 28 Dec 2022 21:15:21 +0000 (16:15 -0500)]
panfrost: Remove MALI_POSITIVE macro
Now unused.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>
Alyssa Rosenzweig [Wed, 28 Dec 2022 21:14:49 +0000 (16:14 -0500)]
panfrost: Inline the last MALI_POSITIVE use
Big shrug on this one.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>
Alyssa Rosenzweig [Wed, 28 Dec 2022 21:03:04 +0000 (16:03 -0500)]
panfrost: Remove FBD tag enum from XML
This was a hack to avoid modelling the full data structure.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>
Alyssa Rosenzweig [Wed, 28 Dec 2022 21:14:14 +0000 (16:14 -0500)]
panfrost: Use framebuffer pointer XML
Rather than manipulating the raw pointers. This is cleaner.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>
Alyssa Rosenzweig [Wed, 28 Dec 2022 21:01:55 +0000 (16:01 -0500)]
panfrost: Add XML for framebuffer pointers
We shouldn't have to open-code these. They are real data structures, model them
as such in the architecture XML files.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>
Alyssa Rosenzweig [Wed, 28 Dec 2022 20:43:48 +0000 (15:43 -0500)]
panfrost: Handle fixed-point packing in GenXML
Minimum/maximum LOD and LOD bias are unsigned and signed fixed point formats
respectively. They are not unsigned integers. Introduce fixed-point types into
our GenXML and use them in the XML, rather than packing in sidebands. This makes
the XML more correct and fixes pretty-printing of texture and sampler
descriptors.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>
Alyssa Rosenzweig [Wed, 28 Dec 2022 20:53:41 +0000 (15:53 -0500)]
panfrost: Don't use DECODE_FIXED16 for sample position
Strictly this is a signed fixed-point, anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>
Alyssa Rosenzweig [Wed, 28 Dec 2022 20:26:45 +0000 (15:26 -0500)]
docs/panfrost: Move description of instancing
Connor Abbott wrote a nice explanation of how instance divisors work on Mali.
Let's add it to the driver docs instead of letting it languish in a forgotten
header file.
This is mostly pasted from the existing header in tree, with a few local changes
applied.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>
Alyssa Rosenzweig [Wed, 28 Dec 2022 20:28:50 +0000 (15:28 -0500)]
panfrost: Remove some unused definitions
Nowadays, formats are defined with GenXML, not the old panfrost-job.h, so most
of the format #defines in panfrost-job.h are unused. That said, a few are still
in use as a backdoor for compressed format queries to avoid a GenXML dependency.
That's not great but cleaning that up isn't the subject of this MR.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20445>
Felix DeGrood [Fri, 10 Mar 2023 16:34:02 +0000 (16:34 +0000)]
intel/perf: Hide extended metrics by default
XE architecture enables many more metrics, perhaps too many for
the average user. Reduce reported metrics to smaller subset,
known as non-extended metrics, by default. Can re-enable extended
metrics with env var INTEL_EXTENDED_METRICS=1
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21841>
Alyssa Rosenzweig [Fri, 3 Mar 2023 04:05:50 +0000 (23:05 -0500)]
asahi,agx: Implement buffer textures with gnarly NIR
Implement buffer textures in full generality. There are a few issues here:
* OpenGL requires buffer textures support a minimum size of 65536 elements,
however 1D textures in AGX are (at most) 8192 elements.
* OpenGL 4.0 (and OpenGL ES) require buffer textures to support the "RGB32"
texture formats. These are 3 packed channels of 32-bits each. In general,
non-power-of-two texel sizes are problematic. AGX does not support any such
formats and we rely on the GL frontend to lower to a padded format (RGBX) if
necessary. Such a lowering cannot work for buffer textures, however, so we
need to find a way to implement RGB32 buffer textures.
We solve these issues in the follow way:
* Use 2D texture descriptors for buffer textures, with a large fixed
power-of-two size along one axis. Then large texel indices may be accessed at
a small vec2 texel coordinate, and since the fixed dimension is a
power-of-two, that vector may be recovered by simply shifting and masking.
This effectively avoids size restriction. We do need to clamp texel indices to
the buffer size to avoid faulting on OOB reads, since we may read past the end
of the buffer (if the app binds a non-page-aligned offset into the buffer).
* Use a general purpose memory load for RGB32 buffer textures. Lower the texture
load instruction to a memory load from the buffer and some address arithmetic.
There's no format conversion needed for RGB32, other than maybe filling in a
format-appropriate alpha, so this is straightforward. Again, we need to clamp
the texel index for robustness with OOB reads.
Each of these solutions brings its own problem.
* Using 2D textures instead of 1D requires physically rounding up the buffer
size when packing the descriptor, so we can no longer implement textureSize()
by reading off the texture descriptor like normal.
* We don't know at compile-time whether a given texture load will read from an
RGB32 buffer texture or not, so we need to emit code for both. In Vulkan, we
can't key the shader to this property, either, since it's descriptor set state
and not pipeline state.
And each of these problems in turn brings its own solution:
* The texture descriptor is linear, so the "compression buffer address" field is
ignored by the hardware. We stash the real buffer size there so that
textureSize becomes a load from the texture descriptor like usual, without
requiring a sideband (which would complicate bindless textures).
* If we determine a texture descriptor contains RGB32 data, then it will never
be interpreted by the hardware and hence does not need to be a valid texture
descriptor. So, we extend the hardware's format enum to contain a
software-defined RGB32 format enum. Then, when lowering texture buffer loads,
we either read it as a typed RGB32 memory load or as a texture load depending
on the value of the format field in the texture descriptor.
All of this is accomplished with a big NIR pass generating a pile of strange
looking code. But it should be good enough in practice for this silly feature.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21672>
Alyssa Rosenzweig [Fri, 3 Mar 2023 04:02:05 +0000 (23:02 -0500)]
asahi, agx: Implement dummy samplers
In NIR, texelFetch (txf) does not use a sampler, but in AGX, it does -- even
though the contents of the sampler are semantically irrelevant. Rather than
requiring the state tracker to bind a sampler anyway (indicated for texture
buffers with PIPE_CAP_TEXTURE_BUFFER_SAMPLER), just add a dummy sampler
ourselves if txf is used and there are otherwise no samplers. This is helpful
because PIPE_CAP_TEXTURE_BUFFER_SAMPLER isn't honoured by Rusticl or seemingly
mesa/st's PBO code, and after implementing this dummy sampler workaround in
Panfrost for Rusticl, I realized this CAP is silly and shouldn't exist in the
first place. (And I regret pushing for its reinclusion.)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21672>
Guilherme Gallo [Thu, 9 Mar 2023 17:46:56 +0000 (14:46 -0300)]
ci/baremetal: Wrap artifact download curl with xtrace
Setting `set -x`can be useful to known via trace which URL baremetal
used to download artifacts.
Today its only printed the command with the environment variables.
Also, this commit fixes multiple `section_end` for the related Gitlab
sections.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21804>
Guilherme Gallo [Wed, 8 Mar 2023 16:34:00 +0000 (13:34 -0300)]
ci: Fix release build use for performance jobs
This commit ensures that we are using mesa release builds in performance
jobs.
To achieve that, some modifications were made on top of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21492.
- Append the `BUILDTYPE` variable into the S3 artifact name
(MINIO_ARTIFACT_NAME environment variable) to allow for better
artifact management.
- The ./artifacts directory has been added to the list of artifact
directories for build-common. This ensures that the debian-release and
debian-arm64-release jobs are the only ones necessary for running
performance jobs. These jobs only produce artifacts via
prepare-artifacts.sh when we are under performance workflow.
- Make lava-submit.sh behave similar to baremetal jobs regarding
MINIO_ARTIFACT_NAME variable. For example, users can now easily
differentiate between mesa-arm64.tar.zstd and
mesa-arm64-release.tar.zstd by looking inside the `Downloading
artifacts from s3` Gitlab section.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21804>
José Roberto de Souza [Tue, 14 Feb 2023 16:10:03 +0000 (08:10 -0800)]
iris: Move i915 submit_batch() to i915 backend
No changes in behavior intented here.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21700>