platform/kernel/u-boot.git
10 years agoinclude/usb/s3c_udc.h: Add <asm/sizes.h>
Tom Rini [Thu, 6 Feb 2014 19:26:05 +0000 (14:26 -0500)]
include/usb/s3c_udc.h: Add <asm/sizes.h>

With e0059ea switching to using SZ_1K, we need to #include <asm/sizes.h>
here for everyone to build still.

Signed-off-by: Tom Rini <trini@ti.com>
10 years agoMerge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Thu, 6 Feb 2014 16:20:23 +0000 (11:20 -0500)]
Merge branch 'fpga' of git://denx.de/git/u-boot-microblaze

10 years agofpga: zynqpl: Add support for zc7015 device
Michal Simek [Thu, 26 Sep 2013 14:39:03 +0000 (16:39 +0200)]
fpga: zynqpl: Add support for zc7015 device

Just extend tables with this new device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agofpga: zynq: Correct fpga load when buf is not aligned
Novasys Ingenierie [Wed, 27 Nov 2013 08:03:01 +0000 (09:03 +0100)]
fpga: zynq: Correct fpga load when buf is not aligned

When ARCH_DMA_MINALIGN is greater than header size of the bit file, and buf is
not aligned, new_buf address became greater then buf_start address and the
load_word loop corrupts bit file data.

A work around is to decrease new_buf of ARCH_DMA_MINALIGN, it might corrupt data
before buf but permits to load correctly.

Signed-off-by: Stany MARCEL <smarcel@novasys-ingenierie.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agousb: mv_udc: Rename to ci_udc
Marek Vasut [Thu, 6 Feb 2014 01:43:45 +0000 (02:43 +0100)]
usb: mv_udc: Rename to ci_udc

The mv_udc is not marvell-specific anymore. The mv_udc is used to drive
generic ChipIdea CI13xxx series OTG cores, so rename the driver to ci_udc
instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
10 years agousb:gadget:f_thor: cosmetic: Remove debug memset
Lukasz Majewski [Wed, 5 Feb 2014 09:10:46 +0000 (10:10 +0100)]
usb:gadget:f_thor: cosmetic: Remove debug memset

Apparently debug memset (with a 0x55 value) has been overlooked in the
f_thor code.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
10 years agousb:gadget:f_thor: Allocate request up to THOR_PACKET_SIZE not ep->maxpacket
Lukasz Majewski [Wed, 5 Feb 2014 09:10:45 +0000 (10:10 +0100)]
usb:gadget:f_thor: Allocate request up to THOR_PACKET_SIZE not ep->maxpacket

Now it is possible to allocate static request - which receives data from
the host (OUT transaction) to the size of THOR packet.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
10 years agousb:udc:samsung: Zero copy approach for data passed to Samsung's UDC driver
Lukasz Majewski [Wed, 5 Feb 2014 09:10:44 +0000 (10:10 +0100)]
usb:udc:samsung: Zero copy approach for data passed to Samsung's UDC driver

The Samsung's UDC driver is not anymore copying data from USB requests to
aligned internal buffers. Now it works directly in data allocated in the
upper layers like UMS, DFU, THOR.

This change is possible since those gadgets now must take care to allocate
buffers aligned to cache line (CONFIG_SYS_CACHELINE_SIZE).

This can be achieved by using DEFINE_CACHE_ALIGN_BUFFER() or
ALLOC_CACHE_ALIGN_BUFFER() macros. Those take care to allocate buffer
aligned to cache line in both starting address and its size.
Sometimes it is enough to just use memalign() with size being a
multiplication of cache line size.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurement:
Transmission speed: 27.04 MiB/s

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
10 years agousb:udc:samsung: Allow burst transfers for non EP0 endpints
Lukasz Majewski [Wed, 5 Feb 2014 09:10:43 +0000 (10:10 +0100)]
usb:udc:samsung: Allow burst transfers for non EP0 endpints

This patch removed obscure restriction on the HW setting of DMA transfers.
Before this change each transaction sent up to 512 bytes (with packet count
equal to 1) for non EP0 transfer.

Now it is possible to setup DMA transaction up to DMA_BUFFER_SIZE.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurement:
Transmission speed: 20.74 MiB/s

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
10 years agousb:udc:samsung: Remove redundant cache operation from Samsung UDC driver
Lukasz Majewski [Wed, 5 Feb 2014 09:10:42 +0000 (10:10 +0100)]
usb:udc:samsung: Remove redundant cache operation from Samsung UDC driver

A set of cache operations (both invalidation and flush) were redundant
in the S3C HS OTG Samsung driver:

1. s3c_udc_ep0_zlp - to transmit EP0's ZLP packets one don't need to flush
the cache (since it is the zero length transmission)

2. s3c_udc_pre_setup and s3c_ep0_complete_out - cache invalidation is not
needed when the buffer for OUT EP0 transmission is setup, since no data
has yet arrived.

Cache cleanups presented above don't contribute much to transmission speed
up, hence shall be regarded as cosmetic changes.

3. setdma_rx - here the s3c UDC driver's internal buffers were invalidated.
This call is not needed anymore since we reuse the buffers passed from
gadgets. This is a key contribution to transmission speed improvement.

Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`

Measurements:

Base values (without improvement):
Transmission speed: 9.51 MiB/s

After the change:
Transmission speed: 10.15 MiB/s

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
10 years agousb:gadget:ums: Replace malloc calls with memalign to fix cache buffer alignment
Lukasz Majewski [Wed, 5 Feb 2014 09:10:41 +0000 (10:10 +0100)]
usb:gadget:ums: Replace malloc calls with memalign to fix cache buffer alignment

Calls to malloc() have been replaced by memalign. It now provides proper
buffer alignment.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
10 years agoconfig: Fix line lengths in include/config_distro_defaults.h
Tom Rini [Wed, 5 Feb 2014 13:04:38 +0000 (08:04 -0500)]
config: Fix line lengths in include/config_distro_defaults.h

Signed-off-by: Tom Rini <trini@ti.com>
10 years agoconfig: add config_distro_defaults.h
Dennis Gilmore [Tue, 4 Feb 2014 11:25:47 +0000 (05:25 -0600)]
config: add config_distro_defaults.h

describe a set of default features that distros can rely on being available.
having this common definition means that distros can easily support systems
implementing them.

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
10 years agocmd_pxe.c add any option for filesystem with sysboot uses generic load
Dennis Gilmore [Tue, 4 Feb 2014 11:25:46 +0000 (05:25 -0600)]
cmd_pxe.c add any option for filesystem with sysboot uses generic load

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
10 years agoMerge branch 'serial' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Tue, 4 Feb 2014 16:48:48 +0000 (11:48 -0500)]
Merge branch 'serial' of git://denx.de/git/u-boot-microblaze

10 years agoMerge branch 'net' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Tue, 4 Feb 2014 16:48:39 +0000 (11:48 -0500)]
Merge branch 'net' of git://denx.de/git/u-boot-microblaze

10 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Tue, 4 Feb 2014 16:48:25 +0000 (11:48 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-microblaze

10 years agoMerge branch 'clk' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Tue, 4 Feb 2014 16:48:14 +0000 (11:48 -0500)]
Merge branch 'clk' of git://denx.de/git/u-boot-microblaze

10 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Tue, 4 Feb 2014 15:22:23 +0000 (10:22 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

10 years agopxe: implement fdtdir extlinux.conf tag
Stephen Warren [Tue, 28 Jan 2014 21:50:10 +0000 (14:50 -0700)]
pxe: implement fdtdir extlinux.conf tag

People who write (or scripts that auto-generate) extlinux.conf don't
want to know about HW-specific information such as FDT filenames. Create
a new extlinux.conf tag "fdtdir" that specifies only the directory where
FDT files are located, and defer all knowledge of the filename to U-Boot.
The algorithm implemented is:

==========
if $fdt_addr_r is set:
  if "fdt" tag was specified in extlinux.conf:
    load the FDT from the filename in the tag
  else if "fdtdir" tag was specified in extlinux.conf:
    if "fdtfile" is set in the environment:
      load the FDT from filename in "$fdtfile"
    else:
      load the FDT from some automatically generated filename

if no FDT file was loaded, and $fdtaddr is set:
  # This indicates an FDT packaged with firmware
  use the FDT at $fdtaddr
==========

A small part of an example /boot/extlinux.conf might be:

==========
LABEL primary
        LINUX zImage
        FDTDIR ./

LABEL failsafe
        LINUX bkp/zImage
        FDTDIR bkp/
==========

... with /boot/tegra20-seaboard.dtb or /boot/bkp/tegra20-seaboard.dtb
being loaded by the sysboot/pxe code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agopxe: support "devicetree" tag
Stephen Warren [Tue, 28 Jan 2014 21:50:09 +0000 (14:50 -0700)]
pxe: support "devicetree" tag

The specification for extlinux.conf[1] states that "fdt" is an alias for
"devicetree". To date, U-Boot only implements "fdt". Rectify that.

[1] http://freedesktop.org/wiki/Specifications/BootLoaderSpec/

Signed-off-by: Stephen Warren <swarren@nvidia.com>
10 years agoserial: uartlite: Reset RX/TX in init
Michal Simek [Tue, 21 Jan 2014 06:29:47 +0000 (07:29 +0100)]
serial: uartlite: Reset RX/TX in init

Just to be sure that there is no pending data.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agonet: axi_emac: Check if phy was correctly detected
Michal Simek [Thu, 21 Nov 2013 15:15:51 +0000 (16:15 +0100)]
net: axi_emac: Check if phy was correctly detected

As tsec and fm drivers checking phydev->link
ensure that u-boot don't try access device if link is not ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agomicroblaze: Add SPL support
Michal Simek [Tue, 21 Jan 2014 06:30:37 +0000 (07:30 +0100)]
microblaze: Add SPL support

Add support for U-BOOT SPL. NOR and RAM mode are supported.
There are 3 images in NOR flash. u-boot.img, dtb and kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agomicroblaze: Enable buffer write for NOR flashes
Michal Simek [Tue, 21 Jan 2014 06:26:58 +0000 (07:26 +0100)]
microblaze: Enable buffer write for NOR flashes

It speeds up writing a lot.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agomicroblaze: Report priviledged or stack protection exception
Michal Simek [Mon, 20 Jan 2014 20:17:07 +0000 (21:17 +0100)]
microblaze: Report priviledged or stack protection exception

Just list one more exception.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agomicroblaze: Show u-boot banner
Michal Simek [Mon, 20 Jan 2014 20:05:47 +0000 (21:05 +0100)]
microblaze: Show u-boot banner

It is nice to see u-boot version.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agocommon: Add new clk command
Michal Simek [Thu, 21 Nov 2013 21:39:02 +0000 (13:39 -0800)]
common: Add new clk command

Command provides just dump subcommand for showing clock
frequencies in a soc.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stefano Babic <sbabic@denx.de>
10 years agodriver/ifc:Change accessor function to take care of endianness
Prabhakar Kushwaha [Sat, 18 Jan 2014 06:58:30 +0000 (12:28 +0530)]
driver/ifc:Change accessor function to take care of endianness

IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.

So update acessor functions with common IFC acessor functions to take care
both type of endianness.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
10 years agokmp204x: initial support for PCIe FPGA configuration
Valentin Longchamp [Mon, 27 Jan 2014 10:49:12 +0000 (11:49 +0100)]
kmp204x: initial support for PCIe FPGA configuration

The PEXHC PCIe configuration mechanism ensures that the FPGA get
configured at power-up. Since all the PCIe devices should be configured
when the kernel start, u-boot has to take care that the FPGA gets
configured also in other reset scenarios, mostly because of possible
configuration change.

The used mechanism is taken from the km_kirkwood design and adapted to
the kmp204x case (slightly different HW and PCIe configuration).

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agokmp204x: enable support for SPANSION SPI NOR
Valentin Longchamp [Mon, 27 Jan 2014 10:49:11 +0000 (11:49 +0100)]
kmp204x: enable support for SPANSION SPI NOR

The new prototype and the final series was moved from Micron to Spansion
to have a better reset sequence that is easier to support.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoKM: add the KM_UBI_PART_BOOT_OPTS #define
Valentin Longchamp [Mon, 27 Jan 2014 10:49:10 +0000 (11:49 +0100)]
KM: add the KM_UBI_PART_BOOT_OPTS #define

This define can be used if the ubi boot partition (defined for all
Keymile boards with KM_UBI_PARTITION_NAME_BOOT #define to ubi0) needs
some additionnal boot options.

This is the case for the kmp204x boards since u-boot does not support
NAND Flash subpage accesses on this platform, an additionnal argument
that defines the VID offstet must be given to the kernel.

The UBI cmd line option now looks like this "ubi.mtd=ubi0,2048" on this
platform.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agokmp204x: update I2C field of RCW
Valentin Longchamp [Mon, 27 Jan 2014 10:49:09 +0000 (11:49 +0100)]
kmp204x: update I2C field of RCW

On the previous HW revision (now unsupported), there was a need for
external DMA signals and thus the I2C3/4 signals were used
DMA1_DONE/ACK/REQ.

These signals now are configured as GPIO[16:19].

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agokmp204x: add support for the kmcoge4 board
Valentin Longchamp [Mon, 27 Jan 2014 10:49:08 +0000 (11:49 +0100)]
kmp204x: add support for the kmcoge4 board

The kmcoge4 board is the product board derived from the kmlion1
prototype. The main difference between the 2 boards is that the kmcoge4
does not configure the Local Bus controller for LCS2.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: Minor change to boards.cfg to keep targets in order]
Signed-off-by: York Sun <yorksun@freescale.com>
10 years agokmp204x: implement workaround for A-006559
Valentin Longchamp [Mon, 27 Jan 2014 10:49:07 +0000 (11:49 +0100)]
kmp204x: implement workaround for A-006559

According to the errata, some bits of an undocumented register in the
DCSR must be set for every core in order to avoid a possible data or
instruction corruption.

This is required for the 2.0 revision of the P2041 that should be used
as soon as available in our design.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agokmp204x: I2C deblocking support
Rainer Boschung [Mon, 3 Feb 2014 07:45:40 +0000 (08:45 +0100)]
kmp204x: I2C deblocking support

This patch adds support for using some GPIOs that are connected to the
I2C bus to force the bus lines state and perform some bus deblocking
sequences.

The KM common deblocking algorithm from board/keymile/common/common.c is
used. The GPIO lines used for deblocking the I2C bus are some external
GPIOs provided by the QRIO CPLD:
  - SCL = GPIOA_20
  - SDA = GPIOA_21

The QRIO GPIOs act in an open-drain-like manner, for 0 the line is
driven low and for 1 the GPIO is set as input and the line gets
pulled-up.

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agokmp204x: introduce QRIO GPIO functions
Valentin Longchamp [Mon, 27 Jan 2014 10:49:05 +0000 (11:49 +0100)]
kmp204x: introduce QRIO GPIO functions

The QRIO GPIO functions can be of general interest. They are thus added
to a qrio.c and their prototype are available from kmp204x.h. The QRIO
prst function are also included in this file, as well as the functions
required for the I2C deblocking support (open-drain).

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: Remove extra blank line in board/keymile/kmp204x/qrio.c]
Signed-off-by: York Sun <yorksun@freescale.com>
10 years agokmp204x: support for QRIO1 bootcounter
Rainer Boschung [Mon, 27 Jan 2014 10:49:04 +0000 (11:49 +0100)]
kmp204x: support for QRIO1 bootcounter

Make use of the QRIO1 32bit register at 0x20 as bootcounter register
Check for BOOTCOUNT_MAGIC pattern when before bootcounter value is read

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: Minor change to commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/t104xrdb: Add basic ethernet support
Priyanka Jain [Thu, 30 Jan 2014 06:00:04 +0000 (11:30 +0530)]
powerpc/t104xrdb: Add basic ethernet support

This covers only non-L2 switch ethernet interfaces i.e.
RGMII and SGMII interface for both T1040RDB and T1042RDB_PI

T1040RDB is configured as serdes protocol 0x66 which can
support following interfaces
    2 RGMIIS on DTSEC4, DTSEC5
    1 SGMII on DTSEC3

T1042RDB_PI is configured as serdes protocol 0x06 which can
support following interfaces
    2 RGMIIS on DTSEC4, DTSEC5

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
[York Sun: Minor change in commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/usb: Enable dual phy for T1040
Nikhil Badola [Mon, 27 Jan 2014 09:51:58 +0000 (15:21 +0530)]
powerpc/usb: Enable dual phy for T1040

Define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE macro for enabling dual
phy in t1040

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/t104xrdb: Update T1042RDB.h in config folder
Prabhakar Kushwaha [Mon, 27 Jan 2014 09:11:55 +0000 (14:41 +0530)]
powerpc/t104xrdb: Update T1042RDB.h in config folder

Add usb2 node entry to hwconfig default

Remove DDR controller interleaving from hwconfig

Move SPI related macros out of "#ifdef CONFIG_SPIFLASH"

Add CONFIG_SYS_CSPR2_EXT to make CPLD accessible in u-boot

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: Fix commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/t104xrdb: Update T1040RDB.h in config folder
Priyanka Jain [Mon, 27 Jan 2014 08:37:11 +0000 (14:07 +0530)]
powerpc/t104xrdb: Update T1040RDB.h in config folder

Add usb2 node entry in "hwconfig string"

Remove controller interleaving from hwconfig string as T1040
has only one DDR conroller

SPI related macros which were earlier under #ifdef CONFIG_SPIFLASH
are move outside so that they are defined for all cases as these
macros are also used by other u-boot code

Add CONFIG_SYS_CSPR2_EXT to make CPLD accessible

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
[York Sun: Minor change to commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
10 years agoboards/t1040qds: Adds ethernet support for T1040
Prabhakar Kushwaha [Mon, 27 Jan 2014 10:25:20 +0000 (15:55 +0530)]
boards/t1040qds: Adds ethernet support for T1040

Enable entherent for T1040QDS. It enables FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5
    Define MDIO related configs
    Added eth.c file
    Update t1040.c to support RGMII and SGMII
    Update t1040qds.c to support ethernet
    Define the PHY address

Signed-off-by: Arpit Goel <B44344@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: remove dash from commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/mpc85xx: Update serdes protocols for T1040
Prabhakar Kushwaha [Fri, 24 Jan 2014 12:21:50 +0000 (17:51 +0530)]
powerpc/mpc85xx: Update serdes protocols for T1040

T1040 has only one SerDes block. so update the code accordingly.

Also, add support of SerDes Protocol 0x00, 0x06, 0x40, 0x69 0x85,
0xA7 and 0xAA

Signed-off-by: Arpit Goel <B44344@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/mpc85xx:Fix README to show correct flash memory map
Prabhakar Kushwaha [Sat, 25 Jan 2014 06:41:23 +0000 (12:11 +0530)]
powerpc/mpc85xx:Fix README to show correct flash memory map

Due to increased size of u-boot, FMAN ucode start address has been shifted
by 256KB causing a overlap with rootfs start address.

Update rootfs start address to reflect correct memory map.

Also fix minor typo in README

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agodriver/fsl_pci:Update print to display PCIe generation
Prabhakar Kushwaha [Sat, 25 Jan 2014 07:23:32 +0000 (12:53 +0530)]
driver/fsl_pci:Update print to display PCIe generation

Current print only display width of PCIe device. Add print to display
PCIe generation supported by the device.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/mpc85xx: Update LIODNs for T1040
poonam aggrwal [Thu, 23 Jan 2014 20:54:59 +0000 (02:24 +0530)]
powerpc/mpc85xx: Update LIODNs for T1040

Removed LIODNs for RMAN, RIO, 10G. T1040 has 10 QMAN portals so assigned
LIODNs accordingly.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoboard: nios2: Check if flash is configured before calling early_flash_cmd_reset()
Ezequiel Garcia [Tue, 28 Jan 2014 10:19:06 +0000 (07:19 -0300)]
board: nios2: Check if flash is configured before calling early_flash_cmd_reset()

If CONFIG_CFI_FLASH_MTD is not defined, then we shouldn't perform the
flash early reset.

This commit fixes the following build error:

  nios2-generic.c: In function `__early_flash_cmd_reset':
  nios2-generic.c:23: error: `AMD_CMD_RESET' undeclared (first use in this function)
  nios2-generic.c:23: error: (Each undeclared identifier is reported only once
  nios2-generic.c:23: error: for each function it appears in.)
  nios2-generic.c:24: error: `FLASH_CMD_RESET' undeclared (first use in this function)

which was introduced by:

  commit a113fb39df43546c704aa8eba55720da9a9dfedd
  Author: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
  Date:   Fri Dec 20 18:34:53 2013 -0300

  board: nios2: Add CONFIG_CFI_FLASH_MTD guard to flash.h header include

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
10 years agosandbox: Use system headers first for sandbox's os.c in a different way
Masahiro Yamada [Tue, 26 Nov 2013 07:13:59 +0000 (16:13 +0900)]
sandbox: Use system headers first for sandbox's os.c in a different way

Commit cbe5cdfcd changed config.mk and arch/sandbox/cpu/Makefile
to use -idirafter instead of -I and remove -nostdinc.

But
 * Sandbox-specific code dirties config.mk
 * os.c is compiled without such compiler flags as:
      -Wall -Wstrict-prototypes -Wno-format-security
      -fno-builtin -ffreestanding -fno-stack-protector
      -fstack-usage -Wno-format-nonliteral

This commit use -idirafter and remove the -nostdinc
differently and more simply.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agonds32: add support for leopard and orca board boot flow auto detect
rick [Fri, 24 Jan 2014 09:14:28 +0000 (17:14 +0800)]
nds32: add support for leopard and orca board boot flow auto detect

hardware difference between leopard and orca as below:

flash setting     leoaprd     orca
bank size         32MB        64MB
bus width         32-bits     16-bits

Signed-off-by: rick <rick@andestech.com>
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
10 years agoboards.cfg: Keep the entries sorted
Fabio Estevam [Sat, 25 Jan 2014 20:42:39 +0000 (18:42 -0200)]
boards.cfg: Keep the entries sorted

Run "tools/reformat.py -i -d '-' -s 8 <boards.cfg >boards0.cfg && mv boards0.cfg boards.cfg"
in order to keep the entries sorted.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
10 years agoboard_r - fixup functions table after relocation
Alexey Brodkin [Mon, 20 Jan 2014 10:30:39 +0000 (14:30 +0400)]
board_r - fixup functions table after relocation

This is only required for "PIC" relocation and doesn't apply to modern
"PIE" relocation which does data relocation as well as code.

"init_sequence_r" is just an array that consists of compile-time
adresses of init functions. Since this is basically an array of integers
(pointers to "void" to be more precise) it won't be modified during
relocation - it will be just copied to new location as it is.

As a consequence on execution after relocation "initcall_run_list" will
be jumping to pre-relocation addresses. As long as we don't overwrite
pre-relocation memory area init calls are executed correctly. But still
it is dangerous because after relocation we don't expect initially used
memory to stay untouched.

Cc: Tom Rini <trini@ti.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Thomas Langer <thomas.langer@lantiq.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
10 years agoarm: am43xx: Add USB spl boot support
Dan Murphy [Thu, 16 Jan 2014 17:23:31 +0000 (11:23 -0600)]
arm: am43xx: Add USB spl boot support

Add the USB host boot support for the am43xx evm
Add the macros to boot from a usb drive in uBoot

Signed-off-by: Dan Murphy <dmurphy@ti.com>
10 years agospl: common: Support for USB MSD FAT image loading
Dan Murphy [Thu, 16 Jan 2014 17:23:30 +0000 (11:23 -0600)]
spl: common: Support for USB MSD FAT image loading

Add SPL support to be able to detect a USB Mass Storage device
connected to a USB host.  Once a USB Mass storage device is detected
the SPL will load the u-boot.img from a FAT partition to target address.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
10 years agospl: common: Move FAT funcs to a common file
Dan Murphy [Thu, 16 Jan 2014 17:23:29 +0000 (11:23 -0600)]
spl: common: Move FAT funcs to a common file

Move the FAT functions to a common location for reuse.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
10 years agopowerpc: mpc5xxx: remove redundant CONFIG_MPC5xxx definition
Masahiro Yamada [Thu, 16 Jan 2014 02:03:07 +0000 (11:03 +0900)]
powerpc: mpc5xxx: remove redundant CONFIG_MPC5xxx definition

We do not have to define CONFIG_MPC5xxx in board config headers
(and start.S) because it is defined in arch/powerpc/cpu/mpc5xxx/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoboard: delete meaningless serial.h
Masahiro Yamada [Wed, 15 Jan 2014 09:00:25 +0000 (18:00 +0900)]
board: delete meaningless serial.h

Delete some serial.h files, whole code in which is surrounded by
  #if 0 ... #endif

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
10 years agosandbox: fix the return type of os_free() function
Masahiro Yamada [Wed, 15 Jan 2014 04:06:41 +0000 (13:06 +0900)]
sandbox: fix the return type of os_free() function

The function os_free() returns nothing.
Its return type should be "void" rather than "void *".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoARM: merge commonly-defined PLATFORM_RELFLAGS
Masahiro Yamada [Wed, 15 Jan 2014 02:00:45 +0000 (11:00 +0900)]
ARM: merge commonly-defined PLATFORM_RELFLAGS

Before this commit, all arch/arm/cpu/${CPU}/config.mk except ARMv8
had the same option:
$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))

This commit moves it into arch/arm/config.mk.

If the compiler does not support the option,
it is ignored by $(call cc-option,...).
So this commit gives no harm to ARMv8.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc86xx: move CONFIG_MPC86xx definition to CPU config.mk
Masahiro Yamada [Wed, 15 Jan 2014 01:14:21 +0000 (10:14 +0900)]
powerpc: mpc86xx: move CONFIG_MPC86xx definition to CPU config.mk

Define CONFIG_MPC86xx in arch/powerpc/cpu/mpc86xx/config.mk
because all target boards with mpc86xx cpu define it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mk
Masahiro Yamada [Wed, 15 Jan 2014 01:14:07 +0000 (10:14 +0900)]
powerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mk

Define CONFIG_MPC85xx in arch/powerpc/cpu/mpc85xx/config.mk
because all target boards with mpc85xx cpu define it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc824x: remove redundant CONFIG_MPC824X definition
Masahiro Yamada [Wed, 15 Jan 2014 01:13:49 +0000 (10:13 +0900)]
powerpc: mpc824x: remove redundant CONFIG_MPC824X definition

We do not have to define CONFIG_MPC824X in board config headers
because it is defined in arch/powerpc/cpu/mpc824x/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc5xx: remove redundant CONFIG_5xx definition
Masahiro Yamada [Wed, 15 Jan 2014 01:13:00 +0000 (10:13 +0900)]
powerpc: mpc5xx: remove redundant CONFIG_5xx definition

We do not have to define CONFIG_5xx in a source file
because it is defined in arch/powerpc/cpu/mpc5xx/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc512x: remove redundant CONFIG_MPC512X definition
Masahiro Yamada [Wed, 15 Jan 2014 01:11:28 +0000 (10:11 +0900)]
powerpc: mpc512x: remove redundant CONFIG_MPC512X definition

We do not have to define CONFIG_MPC512X in board config headers
because it is defined in arch/powerpc/cpu/mpc512x/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc8xx: remove redundant CONFIG_8xx definition
Masahiro Yamada [Tue, 14 Jan 2014 08:26:43 +0000 (17:26 +0900)]
powerpc: mpc8xx: remove redundant CONFIG_8xx definition

We do not have to define CONFIG_8xx in source files
because it is defined in arch/powerpc/cpu/mpc8xx/config.mk

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: mpc83xx: remove redundant CONFIG_MPC83xx definition
Masahiro Yamada [Tue, 14 Jan 2014 08:26:17 +0000 (17:26 +0900)]
powerpc: mpc83xx: remove redundant CONFIG_MPC83xx definition

We do not have to define CONFIG_MPC83xx in board config headers
because it is defined in arch/powerpc/cpu/mpc83xx/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agopowerpc: ppc4xx: remove redundant CONFIG_4xx definition
Masahiro Yamada [Tue, 14 Jan 2014 08:24:35 +0000 (17:24 +0900)]
powerpc: ppc4xx: remove redundant CONFIG_4xx definition

We do not have to define CONFIG_4xx in board config headers
because it is defined in arch/powerpc/cpu/ppc4xx/config.mk.

include/configs/JSE.h defines "CONFIG_4x", not "CONFIG_4xx".
I believe it is a typo because "CONFIG_4x" is not used at all
in other files.
So, I also deleted "CONFIG_4x" in include/configs/JSE.h.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoboard: tec-ng: Do not make directories in a board Makefile
Masahiro Yamada [Tue, 14 Jan 2014 01:55:02 +0000 (10:55 +0900)]
board: tec-ng: Do not make directories in a board Makefile

Commit e5c5301f refactored the build system not to make
directories in board makefiles.
But commit 8f380381 create directories again in
board/avionic-design/tec-ng/Makefile.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
10 years agodrivers: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:11:48 +0000 (20:11 +0900)]
drivers: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoinclude: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:11:27 +0000 (20:11 +0900)]
include: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoboard: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:11:02 +0000 (20:11 +0900)]
board: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
10 years agox86: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:10:46 +0000 (20:10 +0900)]
x86: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agopowerpc: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:10:33 +0000 (20:10 +0900)]
powerpc: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoblackfin: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:10:15 +0000 (20:10 +0900)]
blackfin: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoavr32: delete unused header files
Masahiro Yamada [Wed, 8 Jan 2014 11:09:13 +0000 (20:09 +0900)]
avr32: delete unused header files

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoavr32: move CONFIG_AVR32 definition to arch/avr32/config.mk
Masahiro Yamada [Mon, 6 Jan 2014 06:45:09 +0000 (15:45 +0900)]
avr32: move CONFIG_AVR32 definition to arch/avr32/config.mk

Like other architectures, CONFIG_AVR32 can be defined
in arch/avr32/config.mk rather than board header files.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
10 years agoRemove obsolete _LINUX_CONFIG_H macro
Masahiro Yamada [Mon, 6 Jan 2014 06:39:48 +0000 (15:39 +0900)]
Remove obsolete _LINUX_CONFIG_H macro

Commit 643aae1406c93ddc64fcf8c136b47cdffd9c8ccd
deleted include/linux/config.h but missed to
delete _LINUX_CONFIG_H macro.
It is no longer used at all.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agotools: move kermit files to tools/kermit directory
Masahiro Yamada [Tue, 24 Dec 2013 06:30:39 +0000 (15:30 +0900)]
tools: move kermit files to tools/kermit directory

The script files, define2mk.sed and make-asm-offsets
are used to create autoconf.mk and asm-offsets.h
while build.

Whereas README, dot.kermrc, flash_param, send_cmd, send_image
are files useful for kermit.

We should not put files which have the totally different purpose
into the same directory.

This commit creates a new directory, tools/kermit,
and move kermit files into it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
10 years agocosmetic: tools/scripts/README: insert only one space between words
Masahiro Yamada [Tue, 24 Dec 2013 05:59:19 +0000 (14:59 +0900)]
cosmetic: tools/scripts/README: insert only one space between words

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agolib: fix return codes when CONFIG_SYS_VSNPRINTF is enabled
Darwin Rambo [Thu, 19 Dec 2013 23:14:19 +0000 (15:14 -0800)]
lib: fix return codes when CONFIG_SYS_VSNPRINTF is enabled

When CONFIG_SYS_VSNPRINTF is enabled, it protects print operations
such as sprintf, snprintf, vsnprintf, etc., from buffer overflows.
But vsnprintf_internal includes the terminating NULL character in
the calculation of number of characters written. This affects sprintf
and snprintf return values. Fix this issue by setting pointer 'str'
back to the location of the '\0'.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
10 years agolib: time: add weak timer_init() function
Darwin Rambo [Thu, 19 Dec 2013 23:06:12 +0000 (15:06 -0800)]
lib: time: add weak timer_init() function

If timer_init() is made a weak stub function, then it allows us to
remove several empty timer_init functions for those boards that
already have a timer initialized when u-boot starts. Architectures
that use the timer framework may also remove the need for timer.c.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
10 years agoeSDHC: Calculate envaddr accroding to the address format
Haijun.Zhang [Fri, 10 Jan 2014 05:52:19 +0000 (13:52 +0800)]
eSDHC: Calculate envaddr accroding to the address format

On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the
32-bit source address specifies the memory address in block address
format. Block length is fixed to 512 bytes as per the SD High Capacity
specification. So we need to convert the block address format
to byte address format to calculate the envaddr.

If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoesdhc: Detecting 8 bit width before mmc initialization
Haijun.Zhang [Fri, 10 Jan 2014 05:52:18 +0000 (13:52 +0800)]
esdhc: Detecting 8 bit width before mmc initialization

The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoesdhc: Workaround for card can't be detected on T4240QDS
Haijun.Zhang [Fri, 10 Jan 2014 05:52:17 +0000 (13:52 +0800)]
esdhc: Workaround for card can't be detected on T4240QDS

Card detection pin is ineffective on T4240QDS Rev1.0.
There are two cards can be connected to board.
1. eMMC card is built-in board, can not be removed. so
   For eMMC card it is always there.
2. Card detecting pin is functional for SDHC card in Rev2.0.

This workaround force sdhc driver scan and initialize the card
regardless of whether the card is inserted or not in case Rev1.0.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/mpc85xx:Increase binary size for P, B & T series boards.
Prabhakar Kushwaha [Tue, 14 Jan 2014 06:04:26 +0000 (11:34 +0530)]
powerpc/mpc85xx:Increase binary size for P, B & T series boards.

u-boot binary size for Freescale mpc85xx platforms is 512KB.
This has been reached to upper limit for some of the platforms causig
linker error.

So, Increase the u-boot binary size to 768KB.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
10 years agonet/fm: revert commit 732dfe090d50af53bb682d0c8971784f8de1f90f
Shengzhou Liu [Mon, 13 Jan 2014 07:32:24 +0000 (15:32 +0800)]
net/fm: revert commit 732dfe090d50af53bb682d0c8971784f8de1f90f

This patch reverts patch 'add ft_fixup_xgec to support 3rd and 4th 10GEC'.
When dual-role MAC acts as 10G,it still uses fsl,fman-port-1g-rx/tx as before.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
10 years agopowerpc:Rename CONFIG_PBLRCW_CONFIG & CONFIG_SYS_FSL_PBL_PBI
Prabhakar Kushwaha [Mon, 13 Jan 2014 05:58:04 +0000 (11:28 +0530)]
powerpc:Rename CONFIG_PBLRCW_CONFIG & CONFIG_SYS_FSL_PBL_PBI

Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG.

Also add their details in README.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agot2080qds/ddr: update ddr parameters
Shengzhou Liu [Mon, 13 Jan 2014 05:01:06 +0000 (13:01 +0800)]
t2080qds/ddr: update ddr parameters

- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
  unrelated to DDR3/3L.

Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
Po Liu [Fri, 10 Jan 2014 02:10:59 +0000 (10:10 +0800)]
powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL

Using the TPL/SPL method to booting from 8k page NAND flash.
- Add 256kB size SRAM tlb for second step booting;
- Add spl.c for TPL image boot;
- Add spl_minimal.c for minimal SPL image;
- Add C29XPCIE_NAND configure;
- Modify C29XPCIE.h for nand config and enviroment;

Signed-off-by: Po Liu <Po.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc:mpc85xx: Add ifc nand boot support for TPL/SPL
Po Liu [Fri, 10 Jan 2014 02:10:58 +0000 (10:10 +0800)]
powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL

Using the TPL method for nand boot by sram was already
supported. Here add some code for mpc85xx ifc nand boot.

- For ifc, elbc, esdhc, espi, all need the SPL without
section .resetvec.
- Use a clear function name for nand spl boot.
- Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c
in spl/Makefile;

Signed-off-by: Po Liu <Po.Liu@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/mpc85xx: Revise workaround for DDR-A003
York Sun [Wed, 8 Jan 2014 21:00:42 +0000 (13:00 -0800)]
powerpc/mpc85xx: Revise workaround for DDR-A003

Existing workaround only handles one RDIMM on reference design. In case
of two RDIMMs being used, the workaround requires two separate writes to
DDR_SDRAM_MD_CNTL register.

This patch also restores two debug registers changed by the workaround.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Ben Collins <ben.c@servergy.com>
CC: James Yang <James.Yang@freescale.com>
10 years agopowerpc/mpc85xx: Fix a typo in workaround message for DDR erratum A003474
York Sun [Mon, 6 Jan 2014 20:12:33 +0000 (12:12 -0800)]
powerpc/mpc85xx: Fix a typo in workaround message for DDR erratum A003474

Unfortunately a typo presents "DDR-A003473" instead of "DDR-A003474".

Signed-off-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/85xx: update erratum a006379
Shengzhou Liu [Mon, 6 Jan 2014 05:23:21 +0000 (13:23 +0800)]
powerpc/85xx: update erratum a006379

Enable Erratum A006379 for T2080, T2081, T4160, B4420.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/t2080qds: some update for t2080qds
Shengzhou Liu [Fri, 3 Jan 2014 06:48:44 +0000 (14:48 +0800)]
powerpc/t2080qds: some update for t2080qds

- add more serdes protocols support.
- fix some serdes lanes route.
- fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d.
- correct boot location info for SD/SPI boot.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/83xx: Add support for get_svr() for 83xx devices
Ramneek Mehresh [Fri, 3 Jan 2014 06:41:55 +0000 (12:11 +0530)]
powerpc/83xx: Add support for get_svr() for 83xx devices

Defines get_svr() for 83xx devices

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc/t1040qds: Update DDR initialization related settings
Priyanka Jain [Fri, 3 Jan 2014 05:54:55 +0000 (11:24 +0530)]
powerpc/t1040qds: Update DDR initialization related settings

Update following DDR related settings for T1040QDS
-Correct number of chip selects to two as t1040qds supports
 two Chip selects.
-Update board_specific_parameters udimm structure with settings
 derived via calibration.
-Reduced I2C speed to 50KHz as DDR-SPD does not get reliably
 read at 400KHz.

Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 833MT/s, 1333MT/s and
1600MT/s.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agonet: gem: Check if phy was correctly detected
Michal Simek [Tue, 12 Nov 2013 13:25:29 +0000 (14:25 +0100)]
net: gem: Check if phy was correctly detected

As tsec and fm drivers checking phydev->link
ensure that u-boot don't try access device if link is not ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
10 years agoPrepare v2014.01 v2014.01
Tom Rini [Mon, 20 Jan 2014 22:52:59 +0000 (17:52 -0500)]
Prepare v2014.01

Signed-off-by: Tom Rini <trini@ti.com>
10 years agofdt_support.c: Correct linux,initrd-start/end setting
Tom Rini [Mon, 20 Jan 2014 22:45:33 +0000 (17:45 -0500)]
fdt_support.c: Correct linux,initrd-start/end setting

The change to add 64bit initrd support broke 32bit initrd support as it
always set 64bits worth of data into the properties, even on 32bit
systems.  The fix is to use addr_cell_len (which already says how much
data is in 'tmp') to set the property, rather than always setting 8.
Thanks to Stephen Warren for pointing out the fix here.

Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@ti.com>
10 years agoARM: bcm2835: fix mailbox timeout
Stephen Warren [Tue, 14 Jan 2014 02:50:12 +0000 (19:50 -0700)]
ARM: bcm2835: fix mailbox timeout

My original intention was to have a 100ms timeout. However, the timer
operations used return values in ms not us, so we ended up with a 100s
timeout instead. Fixing this exposes that some operations need longer
to operate than 100ms, so bump the timeout up to a whole second.

Reported-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>