asahi: Allow GenXML to be used in C++

C++ requires explicit casts from integers to enums. Fixes errors like
the following when trying to use Asahi GenXML from a GTest unit test.

src/asahi/lib/agx_pack.h:554:23: error: assigning to 'enum agx_channels' from incompatible type 'uint64_t' (aka 'unsigned long long')
   values->channels = __gen_unpack_uint(cl, 0, 6);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

agx: Round and clamp array indices

Conforming with the GLSL spec. Fixes:

dEQP-GLES3.functional.shaders.texture_functions.texture.sampler2darray_fixed_fragment

(and probably others)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

agx: Naturally align uniform pushes

Required to pack correctly, e.g if we push a 16-bit value then a 64-bit
value.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

agx: Add agx_size_align_16 helper

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

agx: Add typed move helper

Useful for u2u16 in lowering code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Add AGX_PUSH_ARRAY_SIZE_MINUS_1

Required to clamp array indices against the array sizes per the GLSL
spec. Metal also does this, implying it's required by the hardware for
correct operation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Implement texturing with non-zero start level

Unsure if this comes up anywhere.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Handle reloads of specific cube/mipfaces

The texture descriptor we construct for reloading needs to respect the
surface's texture/layer selection. Fix exactly the same bug as
b8c31ac06d3 ("lima: fix glCopyTexSubImage2D").

Fixes:

    dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgb
    dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgba
    dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.cube_rgb
    dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.cube_rgba

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Add agx_map_texture_{cpu,gpu} helpers

Streamline access to particular layer/levels. These patterns show up
across the driver and are easy to screw up, so add a helper.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Support 2D array and 3D textures

As far as I can tell, these *must* be tiled. Other than that, the
implementation is completely routine. Passes

dEQP-GLES3.functional.texture.format.unsized.*2d_array*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Track mipmap state explicitly

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Pass correct tile shift to tiling routines

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Handle page alignment of miptrees

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Align linear texture's strides to 64 bytes

Required to pack the stride, and should improve cache performance.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Align allocations to effective tile size

May be smaller than 64x64.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Rename bpp to blocksize

Will matter for block compressed formats.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Allow tiling of all bpps

Use the usual macro trick via Panfrost. Fixes textures with formats with
non-32-bit bpp, including:

dEQP-GLES2.functional.texture.specification.basic_teximage2d.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Dynamically configure tile size

We need to shrink the tile size when using small images (including
due to mipmapping) or when using large block sizes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Add some notes to XML about mipmapping

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Handle tiling of 2D arrays and 3D

Nothing special required, just need to respect the Z coordinate.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Add 2D Array and 3D texture dimensions

Add to XML and translate in the driver.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Respect mip level when rendering

Use hardware mip level field.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Identify Level field of render target descriptor

Hardware support for rendering into nonzero mip levels.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Don't redefine MIN2/MAX2

The tiling function was written before the Mesa driver...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

asahi: Streamline modifier selection

We can only use linear for 2D images, not even 2D arrays. Even for 2D
images, we only want to use linear if:

* We are required to use linear due to window system requirements.
* The texture is streaming.

Otherwise, we want to use tiled textures. (Or better, compressed, but we
don't support that yet.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>

nir: Check all sizes in nir_alu_instr_is_comparison

nir_alu_instr_is_comparison needs to consider all comparison opcodes regardless
of size. Otherwise, they will be missed by nir_opt_move/sink.

Without this change, lowering booleans to integers regresses register
pressure (and spills/fills) significantly in certain shaders on Panfrost,
like android/com.miHoYo.GenshinImpact/1420.shader_test.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15073>

pan/bi: Test avoiding FADD.v2f16 hazards in scheduler

There are many of them, and integration testing of the scheduler won't hit every
case. Add targeted unit tests for the various scheduling hazards of this funny
instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15072>

pan/bi: Test avoiding *FADD.v2f16 hazard in optimizer

This hazard exists but is obscure enough to be missed on our existing test
coverage (e.g the conformance tests). Add piles of unit tests for it.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15072>

pan/bi: Avoid *FADD.v2f16 hazard in scheduler

Obscure encoding restriction. Fixes crash (assertion fail when instruction
packing) in asphalt9/2659.shader_test on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15072>

pan/bi: Avoid *FADD.v2f16 hazard in optimizer

This is a very obscure encoding restriction in the Bifrost ISA. Unknown if any
real apps or tests hit this, but we still need to get it right sadly.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15072>

pan/va: Identify LEA_TEX_IMM table

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15069>

pan/va: Fix conservative branch handling

Mixed up lanes and conservative branch combine. Fix that.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15069>

pan/va: Make subgroup 4-bits

Future proofing.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15069>

pan/va: Fix some units

Remove the todos.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15069>

pan/va: Parse units from the XML

We need this information for cycle counting in Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15069>

panvk: Don't use UBOs for meta_clear

It must always be pushed, so constructing a uniform remap table is
useless.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14913>

pan/mdg: Remove todo we'll probably never get to

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14888>

pan/mdg: Assert that we don't see unknown jumps

I still don't understand why we don't see continues. But in case we do, scream
loudly so it can't be fixed.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14888>

pan/mdg: Delete dedicated fdot2 lowering

It's just lower_alu_to_scalar

total instructions in shared programs: 72542 -> 72528 (-0.02%)
instructions in affected programs: 673 -> 659 (-2.08%)
helped: 4
HURT: 1
helped stats (abs) min: 1.0 max: 11.0 x̄: 3.75 x̃: 1
helped stats (rel) min: 0.28% max: 6.79% x̄: 3.07% x̃: 2.60%
HURT stats (abs)   min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 3.03% max: 3.03% x̄: 3.03% x̃: 3.03%
95% mean confidence interval for instructions value: -8.65 3.05
95% mean confidence interval for instructions %-change: -6.32% 2.62%
Inconclusive result (value mean confidence interval includes 0).

total bundles in shared programs: 32051 -> 32036 (-0.05%)
bundles in affected programs: 207 -> 192 (-7.25%)
helped: 3
HURT: 0
helped stats (abs) min: 1.0 max: 10.0 x̄: 5.00 x̃: 4
helped stats (rel) min: 3.28% max: 13.89% x̄: 8.29% x̃: 7.69%

total quadwords in shared programs: 56496 -> 56487 (-0.02%)
quadwords in affected programs: 422 -> 413 (-2.13%)
helped: 2
HURT: 0

total registers in shared programs: 5106 -> 5104 (-0.04%)
registers in affected programs: 8 -> 6 (-25.00%)
helped: 1
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14888>

pan/mdg: Delete stray comment

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14888>

pan/mdg: Clarify some ISA unknowns

Nothing usefully new here, just trying to improve signal:noise ratio on the
disassembly.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14888>

pan/mdg: Handle 8/16-bit UBO loads

These will be seen by the compiler when we enable fp16 constant buffers.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14888>

pan/mdg: Model zero/sign extension for 8/16-bit loads

The destinations are packed as if 32-bit even for 8/16-bit loads, so the mask
needs to be constructed accordingly.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14888>

pan/mdg: Print optimized and scheduled shader

To help identify problems across the compiler, print more forms of the shader
with MIDGARD_MESA_DEBUG=shaders. Roughly matches the Bifrost compiler.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14888>

pan/mdg: Pull out skip_internal boolean

Aligns with Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14888>

v3dv/v3d: Fix copyright holder to Raspberry Pi Ltd

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15057>

anv: Lower bufferImageGranularity to 1 from 64

The Vulkan 1.3 spec says:

   "The implementation-dependent limit bufferImageGranularity specifies
    a page-like granularity at which linear and non-linear resources
    must be placed in adjacent memory locations to avoid aliasing.  Two
    resources which do not satisfy this granularity requirement are said
    to alias. bufferImageGranularity is specified in bytes, and must be
    a power of two.  Implementations which do not impose a granularity
    restriction may report a bufferImageGranularity value of one.

    Note: Despite its name, bufferImageGranularity is really a
    granularity between "linear" and "non-linear" resources."

We set this limit to 64 bytes (a cacheline) at the dawn of time, without
any real rationale attached.  There shouldn't be any restrictions here.
Our tile sizes are typically 4K, and tiled resource addresses are
aligned to the tile size, and the extent is also a multiple of the tile
sized.  So if a linear resource occurs before a tiled one, there will
naturally be some space due to the alignment of the tiled resource's
starting address.  If a linear resource occurs after a tiled one, the
tiled resource's ending address is already 4K aligned, which is already
guaranteeing that they won't share a cacheline.

So I think it should be fine to reduce this to 1.  The other Vulkan
driver for our hardware seems to advertise 1 here as well.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15066>

vc4/ci: make piglit test mandatory

Make piglit test jobs to run always, as piglit testsuite offers more
coverage for the VC4 driver.

On the other hand, make the EGL testing manually, as we don't have
enough devices to execute all the tests fast enough.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15045>

broadcom/compiler: document that spill_base is used for spills and scratch

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>

broadcom/compiler: drop spill_count and add spilling boolean

We added spill_count to handle uniform batch spills, which we no longer do.
What we want now is a way to know if we are spilling registers.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>

broadcom/compiler: do not rebuild the interference graph after each spill

Instead, we only recompute liveness and we add new nodes and
interferences to the graph manually (we also need to patch
register classes in some cases).

To assist in this process, we also add an ip counter to our
instructions that we also recompute after each spill, which we use
to identify registers that cross thrsw boundries introduced with
TMU spills and fills and adjust their register classes accordingly
(removing their capacity to use accumulators).

This significantly reduces the CPU cost of spills. Using
shaders/closed/gputest/piano/7.shader_test as reference:

Compile time up to the first successful compile strategy in main is
~24s and with this change it is ~11s. With this speed up, we can now
try all 2-thread compile strategies (including the fallback scheduler)
in only ~15s.

A full shader-db run results in:
Total CPU time (seconds): 9904.67 -> 9087.98 (-8.25%)

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>

broadcom/compiler: reset spill/fill counts after lowering thread count.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>

broadcom/compiler: fix end of TMU sequence check

We may be pipelining TMU writes and reads, in which case we can
see both TMUWT and LDTMU at the end of a TMU sequence, so we should
not assume that a TMUWT always terminates a sequence.

Also, we had a bug where we were using inst instead of scan_inst
to check if we find another TMUWT after the curent instruction.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>

broadcom/compiler: define max number of tmu spills for compile strategies

Instead of whether they are allowed to spill or not. This is more flexible.
Also, while we are not currently enabling spilling on any 4-thread strategies,
should we do that in the future, always prefer a 4-thread compile.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>

broadcom/compiler: choose compile strategy with lowest spilling

Until now we would only allow spilling as a last resort in the
last 2 strategies, however, it is possible that in some cases
earlier strategies may produce less spills if we allowed spilling
on them.

Likewise, the fallback scheduler can sometimes produce less spills
than 2 threads with optimizations disabled.

With this change, we start allowing all our 2-thread strategies to
spill, and instead of choosing the first strategy that is successful,
we choose the one that doesn't spill or the one with the least amount
of spilling.

It should be noted that this may incur in a significant increase
of compile times. We will address this in a follow-up patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15041>

panfrost,asahi,radv: Don't set internal=true manually

nir_builder_init_simple_shader does this automatically now.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14936>

nir: Set internal=true in nir_builder_init_simple_shader

Matches the expected use by callers. We do need to fix up a few callers which
use this call for external shaders.

v2: Fix up a radv call site (Rhys).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net> [v1]
Acked-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14936>

nir: Add missing dependency on nir_opcodes.py

Commit 38800b38 changed nir_opcodes.py, but that doesn't seem to have
triggered nir_opt_algebraic.py.  The change in 75ef5991 depends on
opt_algebraic lowering 16-bit versions of slt, but if opt_algebraic is
not rebuilt, this may not happen.  This resulted in some people seeing
assertion failures in, for example,
dEQP-VK.spirv_assembly.instruction.compute.float16.arithmetic_3.step,
due to the backend seeing nir_op_slt that it didn't know how to handle.

v2: Add nir_opcodes.py to nir_algebraic_py so that all the per-driver
algebraic passes pick up the dependency too.  Rename it to
nir_algebraic_depends.  Suggested by Emma.

Closes: #6047
Fixes: d1992255bb2 ("meson: Add build Intel "anv" vulkan driver")
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15050>

anv: add a custom AcquireNextImage2KHR func

So that we can plug our intel_measure framework.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14998>

anv/measure: Fix INTEL_MEASURE for ANV

INTEL_MEASURE broke while implementing the common sync and submit
framework. Re-adding missing INTEL_MEASURE entry point for
command buffer submit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14998>

venus: add VK_EXT_custom_border_color extension

Implements all the necessary code in the device initialization
and feature/property query functions.

Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15026>

venus: venus-protocol groundwork to VK_EXT_custom_border_color

These are the changes automatically generated from the venus-protocol
repository.

Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15026>

nir: fix lower_memcpy

memcpy is divided into chunks that are vec4 sized max. The problem
here happens with a structure of 24 bytes :

  struct {
    float3 a;
    float3 b;
  }

If you memcpy that struct, the lowering will emit 2 load/store, one of
sized 8, next one sized 16. But both end up located at offset 0, so we
effectively drop 2 floats.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a3177cca996145 ("nir: Add a lowering pass to lower memcpy")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15049>

zink: radv ci updates

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15060>

intel/dev: provide some default values for no_hw

v2: Move into return (Tapani)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15027>

virgl/ci: Setup virtio-vsock based IPC

The mechanism currently used to pass data from the dEQP child process
executed in a crosvm guest environment towards the deqp-runner wrapper
script that starts the crosvm instance is based on creating, writing
and reading regular files.

In addition to the main drawback of using the storage, this approach
is potentially unreliable because the data cannot be transferred in
real-time and there is no control on ending the transmission. It also
requires a forced sleep for syncing the content, while the minimum
amount of time necessary to wait cannot be easily and safely
determined.

Replace this with an IPC based on the virtio transport for virtual
sockets (virtio-vsock).

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14995>

ci: Enable kernel virtio transport for Virtual Sockets

Enable support for Virtual Sockets over virtio in kernel configuration
to optimize the data transfer between crosvm and host system.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14995>

ci: Add socat utility

Provide the 'socat' utility in 'debian/x86_test-gl' container to be used
later for improving the inter-process communication with crosvm guest
tasks based on the virtio transport for Virtual Sockets (virtio-vsock).

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14995>

ci: Ensure Mesa Shader Cache resides on tmpfs

Having the Mesa Shader Cache stored on a tmpfs mount point reduces the
tests execution duration by 2-3 %, while preventing several hundreds of
megabytes to be written on the storage media.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14995>

venus: add necessary format list for ahb image creation

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15017>

venus: pass necessary format list at ahb image format query

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15017>

venus: clean up android wsi and ahb image builder

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15017>

venus: deep copy format list info for deferred image creation

The img->deferred_info will out-live vn_CreateImage, so we need a deep
copy of the VkImageFormatListCreateInfo struct.

This change also avoids tracking VkImageFormatListCreateInfo struct with
a zero viewFormatCount.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15017>

lavapipe: reference gallium fences correctly.

Make sure to take references in all the correct places to get
right lifetimes for these objects and avoid leaks.

Fixes: 94a498280516 ("lavapipe: implement timeline semaphores")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15046>

ci: Add unit tests for lava_job_submitter

These tests will explore some scenarios involving LAVA delays to submit
the job to the device, some device delays outputting data to LAVA
logs, and sensitive data protection.

For example, the subtests from test_retriable_follow_job, "timed out
more times than retry attempts" and "very long silence" caught a bug
where a job retried until the limited attempts and the CI job still
succeeded. https://gitlab.freedesktop.org/mesa/mesa/-/jobs/18325174

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14876>

ci: Install pytest and freezegun plugin

lava_job_submitter.py unit tests are written in pytest and uses
freezegun in order to simulate timeouts in some tests scenarios. So,
this commit adds the packages `python3-pytest` and `python3-freezegun`
to fulfill this dependencies.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14876>

ci: Make LAVA jobs fail CI job when retry is exhausted

When the lava_job_submitter.py retry loop finishes normally (without
falling through break-loop) it means that the submitter has exceeded the
retry count limit. However, when it happens the script
finishes normally. This patch adds a treatment to this case, warning the
user what happened and forcing the job to fail.

Moreover, this commit will make retry configurations configurable by
CI job, as it can take the default value from the following variables:

- LAVA_DEVICE_HANGING_TIMEOUT_SEC
- LAVA_WAIT_FOR_DEVICE_POLLING_TIME_SEC
- LAVA_LOG_POLLING_TIME_SEC
- LAVA_NUMBER_OF_RETRIES_TIMEOUT_DETECTION

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14876>

anv: Don't assume depth/stencil attachments have depth

If a secondary command buffer is used and the client provides a
framebuffer and that framebuffer has a stencil-only attchment, we would
try to get the aux usage for the depth component of that attachment and
crash.  Check the aspects of the image before looking at aux usage.
This fixes at least the following SkQP tests on my Tigerlake:

 - vk_circular-clips
 - vk_filterfastbounds
 - vk_innershapes_bw
 - vk_lineclosepath
 - vk_multipicturedraw_rrectclip_simple
 - vk_pathinvfill
 - vk_quadclosepath
 - vk_rrect_clip_bw
 - vk_windowrectangles

Fixes: 0d8b9c529ce3 ("anv: Allow PMA optimization to be enabled in secondary command buffers")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15048>

panfrost: Fix Malloc Vertex definition

A few missing things and a few wrong things, nothing major.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>

panfrost: Flesh out compute jobs

Valhall has a new twist on Mali's task splitting voodoo, plus compute offset
support.

On Bifrost + Vulkan, compute offsets needed lowering on Bifrost (gl_GlobalID).
Valhall saves a few instructions here.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>

panfrost: Update Shader Environment descriptor

Disambiguate the name, add a missing field, shorten a field, remove a dated
comment.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>

panfrost: Add Valhall fields to tiler descriptor

Mostly to support layered rendering.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>

panfrost: Shuffle render target AFBC for Valhall

I'm not sure why this is different, although it adds support for new AFBC
modifiers.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>

panfrost: Add Valhall additions to the framebuffer

There are a few minor changes. Nothing fundamanetal.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15047>

intel/compiler: make CLUSTER_BROADCAST always deal with integers

This way we don't run afoul of regioning restrictions around floating
point types.

Cc: 22.0 <mesa-stable>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15039>

anv: only advertise 64b atomic floats if 64b floats are supported

Cc: 22.0 <mesa-stable>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15039>

radv: do not enable per-vertex VRS if the FS uses gl_FragCoord

It breaks postprocessing in some games like Ghostrunner, Deathloop,
Street Fighter V.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15042>

radv: allow to force per-vertex VRS in the tessellation stage

It's more useful than I thought.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15042>

llvmpipe: fix linear rast samples check.

The checks didn't work for the samples == 0 case, just fix it
to use the helper.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15040>

nir: Add some notes about const/uniform array access rules in GL.

I was doing some RE on freedreno and we had some questions about when the
hardware might need non-uniform or non-constant array access for various
descriptor types, so let's leave some notes for the next person.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13621>

nv30/40: Switch to using NIR-to-TGSI by default.

shader-db results (note that we expect many more loops unrolled, so instr
count is probably understating the win):

nv30:
total instructions in shared programs: 16535069 -> 14299105 (-13.52%)
instructions in affected programs: 16377286 -> 14141322 (-13.65%)
total gpr in shared programs: 81255 -> 67268 (-17.21%)
gpr in affected programs: 56714 -> 42727 (-24.66%)
LOST:   0
GAINED: 824

nv40:
total instructions in shared programs: 20907673 -> 18428749 (-11.86%)
instructions in affected programs: 20755510 -> 18276586 (-11.94%)
total gpr in shared programs: 104200 -> 82831 (-20.51%)
gpr in affected programs: 80278 -> 58909 (-26.62%)

14130

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14130>

radv: enable radv_disable_aniso_single_level for The Evil Within 1&2

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6033
Fixes: 5ce4017a2bf ("radv,aco: do not disable anisotropy filtering for non-mipmap images")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15011>

tegra: Use private reference count for resources

With the recent addition of the shortcuts aiming to avoid atomic
operations, the reference count on resources can become unbalanced
in the Tegra driver since they are wrapped and then proxied to the
Nouveau driver.

Fix this by keeping a private reference count.

Fixes: 7688b8ae9802 ("st/mesa: eliminate all atomic ops when setting vertex buffers")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>

tegra: Use private reference count for sampler views

With the recent addition of the shortcuts aiming to avoid atomic
operations, the reference count on sampler views can become unbalanced
in the Tegra driver since they are wrapped and then proxied to the
Nouveau driver.

Fix this by keeping a private reference count.

Fixes: ef5d42741327 ("st/mesa: add a mechanism to bypass atomics when binding sampler views")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Karol Herbst <kherbst@redhat.com>

aux/trace: fix dumping of pipe_texture_target

I had missed a int -> enum conversion in one recently added function and
it's probably nice to also dump the target value also in
trace_dump_resource_template() so let's do just that.

Signed-off-by: Matti Hamalainen <ccr@tnsp.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14980>

radv: Don't disturb dynamic primitive topology with mesh shading.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14653>

radv: Disable IB2 on compute queues.

The "IB2" indirect buffer command is not supported on compute queues
according to PAL, and it indeed causes GPU hangs when task shaders are
used together with vkCmdExecuteCommands.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15006>

radeonsi: use SI_PROFILE_CLAMP_DIV_BY_ZERO for viewperf

Only one shader from the Creo subtests needs this.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14931>

radeonsi: add SI_PROFILE_CLAMP_DIV_BY_ZERO

To enable divide by zero clamping per shader, instead of per app.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14931>

ci: Uprev virglrenderer and crosvm

Ensure that we are using a recent virglrenderer to catch potential regressions
early.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15023>