Beniamino Galvani [Thu, 30 Jan 2014 22:02:07 +0000 (23:02 +0100)]
hw/arm/allwinner-a10: initialize EMAC
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Beniamino Galvani [Thu, 30 Jan 2014 22:02:06 +0000 (23:02 +0100)]
hw/net: add support for Allwinner EMAC Fast Ethernet controller
This patch adds support for the Fast Ethernet MAC found on Allwinner
SoCs, together with a basic emulation of Realtek RTL8201CP PHY.
Since there is no public documentation of the Allwinner controller, the
implementation is based on Linux kernel driver.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Beniamino Galvani [Thu, 30 Jan 2014 22:02:05 +0000 (23:02 +0100)]
util/fifo8: clear fifo head upon reset
To improve the predictability of fifo8_pop_buf(), the fifo head is set
to the start of data buffer upon a reset so that the first call to the
function will be able to retrieve all data in the fifo.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Beniamino Galvani [Thu, 30 Jan 2014 22:02:04 +0000 (23:02 +0100)]
util/fifo8: implement push/pop of multiple bytes
The patch adds functions fifo8_push_all() and fifo8_pop_buf() which
can be used respectively to push the content of a memory buffer to the
fifo and to pop multiple bytes obtaining a pointer to the fifo backing
buffer.
In addition, it implements fifo8_num_free() and fifo8_num_used() which
allow to check if a multi-byte operation can be performed.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Claudio Fontana [Wed, 5 Feb 2014 17:27:28 +0000 (17:27 +0000)]
disas: Implement disassembly output for A64
Use libvixl to implement disassembly output in debug
logs for A64, for use with both AArch64 hosts and targets.
Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org>
[PMM:
* added support for target disassembly
* switched to custom QEMUDisassembler so the output format
matches what QEMU expects
* make sure we correctly fall back to "just print hex"
if we didn't build the AArch64 disassembler because of
lack of a C++ compiler
* rename from 'aarch64' to 'arm-a64' because this is a
disassembler for the A64 instruction set
* merge aarch64.c and aarch64-cxx.cc into one C++ file
* simplify the aarch64.c<->aarch64-cxx.cc interface]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 5 Feb 2014 17:27:28 +0000 (17:27 +0000)]
disas/libvixl: Fix upstream libvixl compilation issues
Fix various minor issues with upstream libvixl so that it will compile
successfully on the platforms QEMU cares about:
* remove unused GBytes constant (it clashes with the glib headers)
* fix suffixes on constants to use 'LL' for 64 bit constants so
we can compile on 32 bit hosts
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Wed, 5 Feb 2014 17:27:27 +0000 (17:27 +0000)]
disas: Add subset of libvixl sources for A64 disassembler
Add the subset of the libvixl sources that are needed for the
A64 disassembler support. These sources come from
https://github.com/armvixl/vixl commit
578645f14e122d2b
which is VIXL release 1.1.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Wed, 5 Feb 2014 17:27:27 +0000 (17:27 +0000)]
rules.mak: Link with C++ if we have a C++ compiler
If we have a C++ compiler available, link with it, because we might be
linking some C++ files in. This allows us to include C++ object files
in the QEMU binary proper.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Wed, 5 Feb 2014 17:27:27 +0000 (17:27 +0000)]
rules.mak: Support .cc as a C++ source file suffix
The A64 disassembler libvixl uses .cc as its suffix for
C++ source files, so add support for it (we already support
.cpp).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Christoffer Dall [Tue, 19 Nov 2013 03:26:33 +0000 (19:26 -0800)]
arm_gic: Add GICC_APRn state to the GICState
The GICC_APRn registers are not currently supported by the ARM GIC v2.0
emulation. This patch adds the missing state.
Note that we also change the number of APRs to use a define GIC_NR_APRS
based on the maximum number of preemption levels. This patch also adds
RAZ/WI accessors for the four registers on the emulated CPU interface.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Christoffer Dall [Fri, 20 Sep 2013 19:35:06 +0000 (20:35 +0100)]
vmstate: Add uint32 2D-array support
Add support for saving VMState of 2D arrays of uint32 values.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Christoffer Dall [Fri, 13 Sep 2013 05:18:20 +0000 (22:18 -0700)]
arm_gic: Support setting/getting binary point reg
Add a binary_point field to the gic emulation structure and support
setting/getting this register now when we have it. We don't actually
support interrupt grouping yet, oh well.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Christoffer Dall [Tue, 19 Nov 2013 04:32:00 +0000 (20:32 -0800)]
arm_gic: Keep track of SGI sources
Right now the arm gic emulation doesn't keep track of the source of an
SGI (which apparently Linux guests don't use, or they're fine with
assuming CPU 0 always).
Add the necessary matrix on the GICState structure and maintain the data
when setting and clearing the pending state of an IRQ and make the state
visible to the guest.
Note that we always choose to present the source as the lowest-numbered
CPU in case multiple cores have signalled the same SGI number to a core
on the system.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Christoffer Dall [Tue, 19 Nov 2013 04:32:00 +0000 (20:32 -0800)]
arm_gic: Fix GIC pending behavior
The existing implementation of the pending behavior in gic_set_irq,
gic_complete_irq, and the distributor pending set/clear registers does
not follow the semantics of the GICv2.0 specs, but may implement the
11MPCore support. Therefore, maintain the existing semantics for
11MPCore and v7M NVIC and change the behavior to be in accordance with
the GICv2.0 specs for "generic implementations" (s->revision == 1 ||
s->revision == 2).
Generic implementations distinguish between setting a level-triggered
interrupt pending through writes to the GICD_ISPENDR and when hardware
raises the interrupt line. Writing to the GICD_ICPENDR will not cause
the interrupt to become non-pending if the line is still active, and
conversely, if the line is deactivated but the interrupt is marked as
pending through a write to GICD_ISPENDR, the interrupt remains pending.
Handle this situation in the GIC_TEST_PENDING (which now becomes a
static inline named gic_test_pending) and let the 'pending' field
correspond only to the latched state of the D-flip flop in the GICv2.0
specs Figure 4-10.
The following changes are added:
gic_test_pending:
Make this a static inline and split out the 11MPCore from the generic
behavior. For the generic behavior, consider interrupts pending if:
((s->irq_state[irq].pending & (cm) != 0) ||
(!GIC_TEST_EDGE_TRIGGER(irq) && GIC_TEST_LEVEL(irq, cm))
gic_set_irq:
Split out the 11MPCore from the generic behavior. For the generic
behavior, always GIC_SET_LEVEL() on positive level, but only
GIC_SET_PENDING for edge-triggered interrupts and always simply
GIC_CLEAR_LEVEL() on negative level.
gic_complete_irq:
Only resample the line for line-triggered interrupts on an 11MPCore.
Generic implementations will sample the line directly in
gic_test_pending().
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Will Newton [Wed, 29 Jan 2014 10:31:51 +0000 (10:31 +0000)]
target-arm: Add support for AArch32 64bit VCVTB and VCVTT
Add support for the AArch32 floating-point half-precision to double-
precision conversion VCVTB and VCVTT instructions.
Signed-off-by: Will Newton <will.newton@linaro.org>
[PMM: fixed a minor missing-braces style issue]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 3 Feb 2014 23:31:52 +0000 (23:31 +0000)]
target-arm: A64: Add FNEG and FABS to the SIMD 2-reg-misc group
Add the SIMD FNEG and FABS instructions in the SIMD 2-reg-misc group.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Alex Bennée [Mon, 3 Feb 2014 23:31:52 +0000 (23:31 +0000)]
target-arm: A64: Add 2-reg-misc REV* instructions
Add the byte-reverse operations REV64, REV32 and REV16 from the
two-reg-misc group.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Mon, 3 Feb 2014 23:31:52 +0000 (23:31 +0000)]
target-arm: A64: Add narrowing 2-reg-misc instructions
Add the narrowing integer instructions in the 2-reg-misc class.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Mon, 3 Feb 2014 23:31:51 +0000 (23:31 +0000)]
target-arm: A64: Implement 2-reg-misc CNT, NOT and RBIT
Implement the 2-reg-misc CNT, NOT and RBIT instructions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Mon, 3 Feb 2014 23:31:51 +0000 (23:31 +0000)]
target-arm: A64: Implement 2-register misc compares, ABS, NEG
Implement the simple 2-register-misc operations we can share
with the scalar-two-register-misc code. (SUQADD, USQADD, SQABS,
SQNEG also fall into this category, but aren't implemented in
the scalar-2-register case yet either.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Sat, 8 Feb 2014 14:46:56 +0000 (14:46 +0000)]
target-arm: A64: Add skeleton decode for SIMD 2-reg misc group
Add a skeleton decode for the SIMD 2-reg misc group.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Sat, 8 Feb 2014 14:46:56 +0000 (14:46 +0000)]
target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg misc
Implement the simple 64 bit integer operations from the SIMD
scalar 2-register misc group (C3.6.12): the comparisons against
zero, plus ABS and NEG.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Sat, 8 Feb 2014 14:46:56 +0000 (14:46 +0000)]
target-arm: A64: Implement remaining integer scalar-3-same insns
Implement the remaining integer instructions in the scalar-three-reg-same
group: SQADD, UQADD, SQSUB, UQSUB, SQSHL, UQSHL, SQRSHL, UQRSHL,
SQDMULH, SQRDMULH.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Sat, 8 Feb 2014 14:46:56 +0000 (14:46 +0000)]
target-arm: A64: Implement scalar pairwise ops
Implement the instructions in the scalar pairwise group (C3.6.8).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Sat, 8 Feb 2014 14:46:55 +0000 (14:46 +0000)]
tcg: Add TCGV_UNUSED_PTR, TCGV_IS_UNUSED_PTR, TCGV_EQUAL_PTR
We have macros for marking TCGv values as unused, checking if they
are unused and comparing them to each other. However these only exist
for TCGv_i32 and TCGv_i64; add them for TCGv_ptr as well.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Sat, 8 Feb 2014 14:46:55 +0000 (14:46 +0000)]
target-arm: A64: Implement pairwise integer ops from 3-reg-same SIMD
Implement the pairwise integer operations in the 3-reg-same SIMD group:
ADDP, SMAXP, SMINP, UMAXP and UMINP.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Sat, 8 Feb 2014 14:46:55 +0000 (14:46 +0000)]
target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns
Implement the SIMD 3-reg-same instructions where the size == 3 case
is reserved: SHADD, UHADD, SRHADD, URHADD, SHSUB, UHSUB, SMAX,
UMAX, SMIN, UMIN, SABD, UABD, SABA, UABA, MLA, MLS, MUL, PMUL,
SQRDMULH, SQDMULH. (None of these have scalar-3-same versions.)
This completes the non-pairwise integer instructions in this category.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Sat, 8 Feb 2014 14:46:55 +0000 (14:46 +0000)]
target-arm: A64: Implement SIMD 3-reg-same shift and saturate insns
Implement the SIMD 3-reg-same instructions SQADD, UQADD,
SQSUB, UQSUB, SSHL, USHL, SQSHl, UQSHL, SRSHL, URSHL,
SQRSHL, UQRSHL; these are all simple calls to existing
Neon helpers. We also enable SSHL, USHL, SRSHL and URSHL
for the 3-reg-same-scalar category (but not the others
because they can have non-size-64 operands and the
scalar_3reg_same function doesn't support that yet.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Sat, 8 Feb 2014 13:12:50 +0000 (13:12 +0000)]
Merge remote-tracking branch 'remotes/juanquintela/tags/migration/
20140204-1' into staging
migration/next for
20140204
# gpg: Signature made Tue 04 Feb 2014 15:52:00 GMT using RSA key ID
5872D723
# gpg: Can't check signature: public key not found
* remotes/juanquintela/tags/migration/
20140204-1:
Don't abort on memory allocation error
Don't abort on out of memory when creating page cache
XBZRLE cache size should not be larger than guest memory size
migration:fix free XBZRLE decoded_buf wrong
Add check for cache size smaller than page size
Set xbzrle buffers to NULL after freeing them to avoid double free errors
exec: fix ram_list dirty map optimization
vmstate: Make VMSTATE_STRUCT_POINTER take type, not ptr-to-type
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 7 Feb 2014 16:42:13 +0000 (16:42 +0000)]
Merge remote-tracking branch 'remotes/kraxel/tags/pull-roms-1' into staging
Update seabios to 1.7.4
# gpg: Signature made Mon 03 Feb 2014 14:42:44 GMT using RSA key ID
D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
* remotes/kraxel/tags/pull-roms-1:
Update seabios binaries to 1.7.4
Update seabios submodule to 1.7.4
roms: remove explicit MAKEFLAGS from recursive make invocations
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 7 Feb 2014 16:03:13 +0000 (16:03 +0000)]
Merge remote-tracking branch 'remotes/stefanha/tags/qtest-for-peter' into staging
qtest resource cleanup patches
# gpg: Signature made Tue 04 Feb 2014 08:29:12 GMT using RSA key ID
81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/qtest-for-peter:
qtest: unlink UNIX domain sockets after connecting
qtest: unlink QEMU pid file after startup
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 6 Feb 2014 23:51:24 +0000 (23:51 +0000)]
Merge remote-tracking branch 'remotes/kvm/uq/master' into staging
* remotes/kvm/uq/master:
target-i386: Move KVM default-vendor hack to instance_init
target-i386: Don't change x86_def_t struct on cpu_x86_register()
target-i386: Eliminate CONFIG_KVM #ifdefs
kvm: add support for hyper-v timers
kvm: make hyperv vapic assist page migratable
kvm: make hyperv hypercall and guest os id MSRs migratable.
kvm: make availability of Hyper-V enlightenments dependent on KVM_CAP_HYPERV
KVM: fix coexistence of KVM and Hyper-V leaves
kvm: print suberror on all internal errors
target-i386: kvm_check_features_against_host(): Kill feature word array
target-i386: kvm_cpu_fill_host(): Fill feature words in a loop
target-i386: kvm_cpu_fill_host(): Set all feature words at end of function
target-i386: kvm_cpu_fill_host(): No need to check xlevel2
target-i386: kvm_cpu_fill_host(): No need to check CPU vendor
target-i386: kvm_cpu_fill_host(): No need to check level
target-i386: kvm_cpu_fill_host(): Kill unused code
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 6 Feb 2014 10:21:12 +0000 (10:21 +0000)]
Merge remote-tracking branch 'remotes/spice/tags/pull-spice-2' into staging
misc spice patches
# gpg: Signature made Mon 03 Feb 2014 15:05:29 GMT using RSA key ID
D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
* remotes/spice/tags/pull-spice-2:
spice: hook qemu_chr_fe_set_open() event to ports
Add the ability to vary Spice playback and record rates, to facilitate Opus support.
hw/display/qxl: fix signed to unsigned comparison
qxl: clear irq on reset
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 5 Feb 2014 16:37:26 +0000 (16:37 +0000)]
Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-2014-02-02' into staging
trivial patches for 2014-02-02
# gpg: Signature made Sun 02 Feb 2014 16:11:37 GMT using RSA key ID
74F0C838
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>"
# gpg: aka "Michael Tokarev <mjt@corpit.ru>"
# gpg: aka "Michael Tokarev <mjt@debian.org>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5
# Subkey fingerprint: E190 8639 3B10 B51B AC2C 8B73 5253 C5AD 74F0 C838
* remotes/mjt/tags/trivial-patches-2014-02-02:
tests/.gitignore: Ignore tests/check-qom-interface
hw/ppc: Remove unused defines
readline: Add missing GCC_FMT_ATTR
tcg/s390: Remove sigill_handler
i386: Add missing include file for QEMU_PACKED
osdep: drop unused #include "trace.h"
qemu 1.7.0 does not build on NetBSD
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 5 Feb 2014 16:29:01 +0000 (16:29 +0000)]
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
Block pull request
# gpg: Signature made Fri 31 Jan 2014 21:16:43 GMT using RSA key ID
81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/block-pull-request:
qemu-iotests: only run 071 on qcow2
dataplane: Comment fix
block/vhdx: Error checking fixes
qemu-iotests: Drop assert_no_active_commit in case 040
block/vmdk: add basic .bdrv_check support
block: remove qcow2 .bdrv_make_empty implementation
block: remove QED .bdrv_make_empty implementation
Describe flaws in qcow/qcow2 encryption in the docs
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 4 Feb 2014 18:46:33 +0000 (18:46 +0000)]
Merge remote-tracking branch 'remotes/borntraeger/tags/kvm-s390-
20140131' into staging
This patch set contains the sclp defines and events for cpu hotplug,
the initial sclp defines (without code yet) for standby memory (some
sort of memory hotplug) as well as a cleanup of the kvm register
synchronization.
# gpg: Signature made Fri 31 Jan 2014 08:54:29 GMT using RSA key ID
B5A61C7C
# gpg: Can't check signature: public key not found
* remotes/borntraeger/tags/kvm-s390-
20140131:
s390x/kvm: cleanup partial register handling
sclp-s390: Define new SCLP codes and structures
s390-sclp: SCLP Event integration
s390-sclp: SCLP CPU Info
s390-sclp: Define New SCLP Codes
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 4 Feb 2014 16:16:37 +0000 (16:16 +0000)]
Merge remote-tracking branch 'remotes/mcayland/qemu-openbios' into staging
* remotes/mcayland/qemu-openbios:
Update OpenBIOS images
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Orit Wasserman [Thu, 30 Jan 2014 18:08:38 +0000 (20:08 +0200)]
Don't abort on memory allocation error
It is better to fail migration in case of failure to
allocate new cache item
Signed-off-by: Orit Wasserman <owasserm@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Orit Wasserman [Thu, 30 Jan 2014 18:08:37 +0000 (20:08 +0200)]
Don't abort on out of memory when creating page cache
Signed-off-by: Orit Wasserman <owasserm@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Orit Wasserman [Thu, 30 Jan 2014 18:08:36 +0000 (20:08 +0200)]
XBZRLE cache size should not be larger than guest memory size
Signed-off-by: Orit Wasserman <owasserm@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Gonglei (Arei) [Thu, 30 Jan 2014 18:08:35 +0000 (20:08 +0200)]
migration:fix free XBZRLE decoded_buf wrong
When qemu do live migration with xbzrle, qemu malloc decoded_buf
at destination end but free it at source end. It will crash qemu
by double free error in some scenarios. Splitting the XBZRLE structure
for clear logic distinguishing src/dst side.
Signed-off-by: ChenLiang <chenliang88@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Orit Wasserman <owasserm@redhat.com>
Signed-off-by: GongLei <arei.gonglei@huawei.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Orit Wasserman [Thu, 30 Jan 2014 18:08:34 +0000 (20:08 +0200)]
Add check for cache size smaller than page size
Signed-off-by: Orit Wasserman <owasserm@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Orit Wasserman [Thu, 30 Jan 2014 18:08:33 +0000 (20:08 +0200)]
Set xbzrle buffers to NULL after freeing them to avoid double free errors
Signed-off-by: Orit Wasserman <owasserm@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Alexey Kardashevskiy [Thu, 30 Jan 2014 12:03:50 +0000 (23:03 +1100)]
exec: fix ram_list dirty map optimization
The
ae2810c4bb3b383176e8e1b33931b16c01483aab patch introduced
optimization for ram_list.dirty_memory update. However it can only
work correctly if hpratio is 1 as the @bitmap parameter stores 1 bits
per system page size (may vary, 4K or 64K on PPC64) and
ram_list.dirty_memory stores 1 bit per TARGET_PAGE_SIZE
(which is hardcoded to 4K).
This fixes hpratio!=1 case to fall back to the slow path.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Peter Maydell [Wed, 1 Jan 2014 21:56:57 +0000 (21:56 +0000)]
vmstate: Make VMSTATE_STRUCT_POINTER take type, not ptr-to-type
The VMSTATE_STRUCT_POINTER macros are a bit odd in that they
must be passed an argument "FooType *" rather than just taking
the FooType. They're only used in one place, so it's easy to
tidy this up. This also lets us use the macro to replace the
hand-rolled VMSTATE_PTIMER.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Juan Quintela <quintela@redhat.com>
Eduardo Habkost [Thu, 30 Jan 2014 19:48:55 +0000 (17:48 -0200)]
target-i386: Move KVM default-vendor hack to instance_init
As we will not have a cpu_x86_find_by_name() function anymore,
move the KVM default-vendor hack to instance_init.
Unfortunately we can't move that code to class_init because it depends
on KVM being initialized.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Thu, 30 Jan 2014 19:48:54 +0000 (17:48 -0200)]
target-i386: Don't change x86_def_t struct on cpu_x86_register()
As eventually the x86_def_t data is going to be provided by the CPU
class, it's better to not touch it, and handle the special cases on the
X86CPU object itself.
Current behavior of the code should stay exactly the same.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Thu, 30 Jan 2014 19:48:53 +0000 (17:48 -0200)]
target-i386: Eliminate CONFIG_KVM #ifdefs
The compiler is already able to eliminate the kvm_arch_get_supported_cpuid()
calls in kvm_cpu_fill_host() and filter_features_for_kvm(), so we can
eliminate the CONFIG_KVM #ifdefs there.
Also, kvm_cpu_fill_host() and host_cpuid() don't need to check
CONFIG_KVM, as they don't have any KVM-specific function calls.
Tested to build successfully with CONFIG_KVM disabled, using the
following CFLAGS combinations: "-DNDEBUG", "-DNDEBUG -O', "-DNDEBUG
-O0", "-DNDEBUG -O1", "-DNDEBUG -O2".
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Vadim Rozenfeld [Thu, 23 Jan 2014 13:40:49 +0000 (00:40 +1100)]
kvm: add support for hyper-v timers
http://msdn.microsoft.com/en-us/library/windows/hardware/
ff541625%28v=vs.85%29.aspx
This code is generic for activating reference time counter or virtual reference time stamp counter
Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com>
Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Vadim Rozenfeld [Thu, 23 Jan 2014 13:40:48 +0000 (00:40 +1100)]
kvm: make hyperv vapic assist page migratable
Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Vadim Rozenfeld [Thu, 23 Jan 2014 13:40:47 +0000 (00:40 +1100)]
kvm: make hyperv hypercall and guest os id MSRs migratable.
Signed-off-by: Vadim Rozenfeld <vrozenfe@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 23 Jan 2014 18:16:12 +0000 (19:16 +0100)]
kvm: make availability of Hyper-V enlightenments dependent on KVM_CAP_HYPERV
The MS docs specify HV_X64_MSR_HYPERCALL as a mandatory interface,
thus we must provide the MSRs even if the user only specified
features that, like relaxed timing, in principle don't require them.
And the MSRs are only there if the hypervisor has KVM_CAP_HYPERV.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 23 Jan 2014 18:27:24 +0000 (19:27 +0100)]
KVM: fix coexistence of KVM and Hyper-V leaves
kvm_arch_init_vcpu's initialization of the KVM leaves at 0x40000100
is broken, because KVM_CPUID_FEATURES is left at 0x40000001. Move
it to 0x40000101 if Hyper-V is enabled.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Radim Krčmář [Tue, 21 Jan 2014 17:11:31 +0000 (18:11 +0100)]
kvm: print suberror on all internal errors
KVM introduced internal error exit reason and suberror at the same time,
and later extended it with internal error data.
QEMU does not report suberror on hosts between these two events because
we check for the extension. (half a year in 2009, but it is misleading)
Fix by removing KVM_CAP_INTERNAL_ERROR_DATA condition on printf.
(partially improved by
bb44e0d12df70 and
ba4047cf848a3 in the past)
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Mon, 20 Jan 2014 16:41:14 +0000 (14:41 -0200)]
target-i386: kvm_check_features_against_host(): Kill feature word array
We don't need the ft[] array on kvm_check_features_against_host()
anymore, as we can simply use the feature_word_info[] array, that has
everything we need.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Mon, 20 Jan 2014 16:41:13 +0000 (14:41 -0200)]
target-i386: kvm_cpu_fill_host(): Fill feature words in a loop
Now that the kvm_cpu_fill_host() code is simplified, we can simply set
the feature word array using a simple loop.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Mon, 20 Jan 2014 16:41:12 +0000 (14:41 -0200)]
target-i386: kvm_cpu_fill_host(): Set all feature words at end of function
Reorder the code so all the code that sets x86_cpu_def->features is at
the end of the function.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Mon, 20 Jan 2014 16:41:11 +0000 (14:41 -0200)]
target-i386: kvm_cpu_fill_host(): No need to check xlevel2
There's no need to check CPU xlevel2 before calling
kvm_arch_get_supported_cpuid(s, 0xC0000001, 0, R_EDX), because:
* The kernel won't return any entry for 0xC0000000 if host CPU vendor
is not Centaur (See kvm_dev_ioctl_get_supported_cpuid() on the kernel
code)
* Similarly, the kernel won't return any entry for 0xC0000001 if
CPUID[0xC0000000].EAX is < 0xC0000001
* kvm_arch_get_supported_cpuid() will return 0 if no entry is returned
by the kernel for the requested leaf
For similar reasons, we can simply set x86_cpu_def->xlevel2 directly
instead of making it conditional, because it will be set to 0 CPU vendor
is not Centaur.
This will simplify the kvm_cpu_fill_host() code a little.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
[Remove unparseable comment. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Mon, 20 Jan 2014 16:41:10 +0000 (14:41 -0200)]
target-i386: kvm_cpu_fill_host(): No need to check CPU vendor
There's no need to check CPU vendor before calling
kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX), because:
* The kernel won't return any entry for 0xC0000000 if host CPU vendor
is not Centaur (See kvm_dev_ioctl_get_cpuid() on the kernel code);
* kvm_arch_get_supported_cpuid() will return 0 if no entry is returned
by the kernel for the requested leaf.
This will simplify the kvm_cpu_fill_host() code a little.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Mon, 20 Jan 2014 16:41:09 +0000 (14:41 -0200)]
target-i386: kvm_cpu_fill_host(): No need to check level
There's no need to check level (CPUID[0].EAX) before calling
kvm_arch_get_supported_cpuid(s, 0x7, 0, R_EBX), because:
* The kernel won't return any entry for CPUID 7 if CPUID[0].EAX is < 7
on the host (See kvm_dev_ioctl_get_cpuid() on the kernel code);
* kvm_arch_get_supported_cpuid() will return 0 if no entry is returned
by the kernel for the requested leaf.
This will simplify the kvm_cpu_fill_host() code a little.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Mon, 20 Jan 2014 16:41:08 +0000 (14:41 -0200)]
target-i386: kvm_cpu_fill_host(): Kill unused code
Those host_cpuid() calls are useless. They are leftovers from when the
old code using host_cpuid() was removed.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Stefan Hajnoczi [Thu, 21 Nov 2013 10:37:25 +0000 (11:37 +0100)]
qtest: unlink UNIX domain sockets after connecting
UNIX domain sockets are leaked when tests call abort(3) (indirectly via
glib assert functions).
Unlink the files immediately after the connection has been established
to avoid leaks.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Thu, 21 Nov 2013 10:33:17 +0000 (11:33 +0100)]
qtest: unlink QEMU pid file after startup
After starting the QEMU process and initializing the QMP connection, we
can read the pid file and unlink it.
Just stash away the pid instead of the pid filename. This way we can
avoid pid file leaks since running tests may abort(3) without cleanup.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Gerd Hoffmann [Mon, 3 Feb 2014 14:36:01 +0000 (15:36 +0100)]
Update seabios binaries to 1.7.4
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Mon, 3 Feb 2014 14:31:47 +0000 (15:31 +0100)]
Update seabios submodule to 1.7.4
Not that many changes as we already have a git snapshot pretty close
to final 1.7.4 in the tree. Most notably change is the vgabios change
which fixes the windows guest regression.
Full git shortlog:
Gerd Hoffmann (2):
run qemu_cfg_e820 only for CONFIG_QEMU=y
change boot order load log level
Kevin O'Connor (10):
Minor - move sgdt/lgdt macros from stacks.c to x86.h.
Separate out sec32init sections even when not doing code relocation.
floppy: Fix incorrect LBA to CHS translation.
floppy: Fix accesses to DOR register.
vgabios: Avoid memory references via %esp register in vgabios.
Small improvements to irqentry_extrastack assembler.
floppy: Encode command and flags into single value in floppy pio code.
On disk format request, verify cylinders and pass to driver.
floppy: Implement cylinder seeking when accessing a different cylinder.
coreboot: Make sure to print the SeaBIOS version in cbmem debug output.
Kyösti Mälkki (1):
Fix CBMEM console overflow
Bruce Rogers [Fri, 13 Dec 2013 17:13:50 +0000 (10:13 -0700)]
roms: remove explicit MAKEFLAGS from recursive make invocations
When using $(MAKE) within a makefile, we shouldn't be explicitly
including $(MAKEFLAGS) on the command-line. It causes problems
when that makefile is recursively invoked. When the roms/Makefile
is invoked as in make -C roms bios a spurious 'w' appears on the
sub-make invocation, due to the erroneous $(MAKEFLAGS) inclusion.
Signed-off-by: Bruce Rogers <brogers@suse.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Stefan Weil [Sat, 1 Feb 2014 08:41:09 +0000 (09:41 +0100)]
linux-user: Fix trampoline code for CRIS
__put_user can write bytes, words (2 bytes) or longwords (4 bytes).
Here obviously words should have been written, but bytes were written,
so values like 0x9c5f were truncated to 0x5f.
Fix this by changing retcode from uint8_t to to uint16_t in
target_signal_frame and also in the unused rt_signal_frame.
This problem was reported by static code analysis (smatch).
Cc: qemu-stable@nongnu.org
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Acked-by: Riku Voipio <riku.voipio@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Tue, 21 Jan 2014 13:49:44 +0000 (23:49 +1000)]
cris: Remove the CRIS PIC glue
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Tue, 21 Jan 2014 12:45:54 +0000 (22:45 +1000)]
axis-dev88: Connect the PIC upstream IRQs directly to the CPU
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Tue, 21 Jan 2014 12:44:23 +0000 (22:44 +1000)]
cris: Add interrupt signals to the CPU device
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 18 Jan 2014 04:07:48 +0000 (04:07 +0000)]
cris: Abort when a v10 takes interrupts while in a delayslot
This is an internal error as the CRISv10 should mask interrupts
while executing delay slots. Bail out sooner rather than later.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Edgar E. Iglesias [Sat, 18 Jan 2014 03:42:23 +0000 (03:42 +0000)]
cris: Add "any" as alias for "crisv32" in user emulation
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Marc-André Lureau [Fri, 10 Jan 2014 23:20:24 +0000 (00:20 +0100)]
spice: hook qemu_chr_fe_set_open() event to ports
This wires up a spice port event on virtio-ports open/close, so the
client is notified when the other end is ready.
Signed-off-by: Marc-André Lureau <marcandre.lureau@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Jeremy White [Thu, 2 Jan 2014 15:25:56 +0000 (09:25 -0600)]
Add the ability to vary Spice playback and record rates, to facilitate Opus support.
Signed-off-by: Jeremy White <jwhite@codeweavers.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Alon Levy [Mon, 20 Jan 2014 16:57:12 +0000 (18:57 +0200)]
hw/display/qxl: fix signed to unsigned comparison
Several small signedness / overflow corrections to qxl_create_guest_primary:
1. use 64 bit unsigned for size to avoid overflow possible from two 32
bit multiplicants.
2. correct sign for requested_height
3. add a more verbose error message when setting guest bug state (which
causes a complete guess blackout until reset, so it helps if it is
verbose).
Signed-off-by: Alon Levy <alevy@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Alon Levy [Mon, 20 Jan 2014 10:44:19 +0000 (12:44 +0200)]
qxl: clear irq on reset
Without this we occasionally trigger an assert at
hw/pci/pci.c:pcibus_reset that asserts the irq_count is zero on reset.
This has become a problem with the new drm driver for linux, since doing
a reboot from console causes a race between console updates that set the
irq and the reset assertion that the irq is clear.
Signed-off-by: Alon Levy <alevy@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Peter Maydell [Sat, 1 Feb 2014 23:32:23 +0000 (23:32 +0000)]
Merge remote-tracking branch 'qmp-unstable/queue/qmp' into staging
* qmp-unstable/queue/qmp:
monitor: Cleanup mon->outbuf on write error
virtio_rng: replace custom backend API with UserCreatable.complete() callback
add optional 2nd stage initialization to -object/object-add commands
vl.c: -object: don't ignore duplicate 'id'
object_add: consolidate error handling
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Sat, 1 Feb 2014 23:06:11 +0000 (23:06 +0000)]
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-
20140131' into staging
target-arm queue:
* implementation of first part of the A64 Neon instruction set
* v8 AArch32 rounding and 16<->64 fp conversion instructions
* fix MIDR value on Zynq boards
* some minor bugfixes/code cleanups
# gpg: Signature made Fri 31 Jan 2014 15:06:34 GMT using RSA key ID
14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* pmaydell/tags/pull-target-arm-
20140131: (34 commits)
arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes
arm_gic: Introduce define for GIC_NR_SGIS
target-arm: A64: Add SIMD shift by immediate
target-arm: A64: Add simple SIMD 3-same floating point ops
target-arm: A64: Add integer ops from SIMD 3-same group
target-arm: A64: Add logic ops from SIMD 3 same group
target-arm: A64: Add top level decode for SIMD 3-same group
target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops
target-arm: A64: Add SIMD three-different ABDL instructions
target-arm: A64: Add SIMD three-different multiply accumulate insns
target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTM
target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTM
target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ
target-arm: Add set_neon_rmode helper
target-arm: Add support for AArch32 SIMD VRINTX
target-arm: Add support for AArch32 FP VRINTX
target-arm: Add support for AArch32 FP VRINTZ
target-arm: Add support for AArch32 FP VRINTR
target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM
target-arm: Move arm_rmode_to_sf to a shared location.
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Sat, 1 Feb 2014 21:07:59 +0000 (21:07 +0000)]
Merge remote-tracking branch 'remotes/awilliam/tags/vfio-pci-for-qemu-
20140128.0' into staging
vfio-pci updates include:
- Destroy MemoryRegions on device teardown
- Print warnings around PCI option ROM failures
- Skip bogus mappings from 64bit BAR sizing
- Act on DMA mapping failures
- Fix alignment to avoid MSI-X table mapping
- Fix debug macro typo
# gpg: Signature made Tue 28 Jan 2014 15:27:47 GMT using RSA key ID
3BB08B22
# gpg: Can't check signature: public key not found
* remotes/awilliam/tags/vfio-pci-for-qemu-
20140128.0:
vfio: correct debug macro typo
vfio: fix mapping of MSIX bar
kvm: initialize qemu_host_page_size
vfio-pci: Fail initfn on DMA mapping errors
vfio: Filter out bogus mappings
vfio: Do not reattempt a failed rom read
vfio: warn if host device rom can't be read
vfio: Destroy memory regions
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Sat, 1 Feb 2014 20:43:07 +0000 (20:43 +0000)]
Merge remote-tracking branch 'remotes/sstabellini/xen-140130' into staging
* remotes/sstabellini/xen-140130:
address_space_translate: do not cross page boundaries
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Fam Zheng [Mon, 27 Jan 2014 08:26:21 +0000 (16:26 +0800)]
tests/.gitignore: Ignore tests/check-qom-interface
Signed-off-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Stefan Weil [Sun, 26 Jan 2014 14:02:29 +0000 (15:02 +0100)]
hw/ppc: Remove unused defines
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Stefan Weil [Sat, 25 Jan 2014 17:18:23 +0000 (18:18 +0100)]
readline: Add missing GCC_FMT_ATTR
This fixes a compiler warning with -Werror=missing-format-attribute
and allows improved compiler checks for variable argument lists.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Richard Henderson [Wed, 29 Jan 2014 21:08:30 +0000 (13:08 -0800)]
tcg/s390: Remove sigill_handler
Commit
c9baa30f42a87f61627391698f63fa4d1566d9d8 failed to
delete all of the relevant code, leading to Werrors about
unused symbols.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Stefan Weil [Fri, 31 Jan 2014 22:05:24 +0000 (23:05 +0100)]
i386: Add missing include file for QEMU_PACKED
Instead of packing BiosLinkerLoaderEntry, an unused global variable called
QEMU_PACKED was created (detected by smatch static code analysis).
Including qemu-common.h gets the right definition and also includes some
standard include files which now can be removed here.
Cc: qemu-stable@nongnu.org
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Stefan Hajnoczi [Thu, 23 Jan 2014 20:27:59 +0000 (14:27 -0600)]
osdep: drop unused #include "trace.h"
osdep.c does not use trace_*() so we can just drop the include.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Benoit Canet <benoit@irqsave.net>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Martin Husemann [Sat, 18 Jan 2014 13:47:23 +0000 (14:47 +0100)]
qemu 1.7.0 does not build on NetBSD
Do not rely on int8_t (and friends) not being preprocessor
symbols (or symbols expanding to themselves). On NetBSD (for example) the
glue(u, SDATA_TYPE) results in u__int8_t, which is undefined. There is no way
to stop cpp expanding inner macros, so just add the few lines explicitly and
get rid of the magic.
Signed-off-by: Martin Husemann <martin@NetBSD.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Stefan Hajnoczi [Wed, 29 Jan 2014 15:33:54 +0000 (16:33 +0100)]
qemu-iotests: only run 071 on qcow2
The 071 test is designed for IMGFMT=qcow2 because it uses the l2_load
blkdebug event. Its output filtering also assumes that IMGFMT is not
raw since 071.out contains "format=raw" but IMGFMT=raw would filter the
output to "format=IMGFMT".
Perhaps the test case can be rewritten to be more generic, but for now
let's document that it was only supposed to work with qcow2.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Benoit Canet <benoit@irqsave.net>
Markus Armbruster [Thu, 30 Jan 2014 15:34:12 +0000 (16:34 +0100)]
dataplane: Comment fix
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Markus Armbruster [Wed, 29 Jan 2014 17:05:08 +0000 (18:05 +0100)]
block/vhdx: Error checking fixes
Errors are inadvertently ignored in a few places. Has always been
broken. Spotted by Coverity.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Jeff Cody <jcody@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Fam Zheng [Wed, 29 Jan 2014 10:47:23 +0000 (18:47 +0800)]
qemu-iotests: Drop assert_no_active_commit in case 040
It is exactly assert_no_active_block_jobs in iotests.py
Signed-off-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Peter Lieven [Wed, 29 Jan 2014 08:34:16 +0000 (09:34 +0100)]
block/vmdk: add basic .bdrv_check support
this adds a basic vmdk corruption check. it should detect severe
table corruptions and file truncation.
Signed-off-by: Peter Lieven <pl@kamp.de>
Reviewed-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Jeff Cody [Mon, 27 Jan 2014 21:09:13 +0000 (16:09 -0500)]
block: remove qcow2 .bdrv_make_empty implementation
The QCOW2 .bdrv_make_empty implementation always returns 0 for success,
but does not actually do anything.
The proper way to not support an optional driver function stub is to
just not implement it, so let's remove the stub.
Signed-off-by: Jeff Cody <jcody@redhat.com>
Reviewed-by: Benoit Canet <benoit@irqsave.net>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Jeff Cody [Mon, 27 Jan 2014 21:09:12 +0000 (16:09 -0500)]
block: remove QED .bdrv_make_empty implementation
The QED .bdrv_make_empty() implementation does nothing but return
-ENOTSUP, which causes problems in bdrv_commit(). Since the function
stub exists for QED, it is called, which then always returns an error.
The proper way to not support an optional driver function stub is to
just not implement it, so let's remove the stub.
Signed-off-by: Jeff Cody <jcody@redhat.com>
Reviewed-by: Benoit Canet <benoit@irqsave.net>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Daniel P. Berrange [Wed, 22 Jan 2014 15:47:10 +0000 (15:47 +0000)]
Describe flaws in qcow/qcow2 encryption in the docs
The qemu-img.texi / qemu-doc.texi files currently describe the
qcow2/qcow2 encryption thus
"Encryption uses the AES format which is very secure (128 bit
keys). Use a long password (16 characters) to get maximum
protection."
While AES is indeed a strong encryption system, the way that
QCow/QCow2 use it results in a poor/weak encryption system.
Due to the use of predictable IVs, based on the sector number
extended to 128 bits, it is vulnerable to chosen plaintext
attacks which can reveal the existence of encrypted data.
The direct use of the user passphrase as the encryption key
also leads to an inability to change the passphrase of an
image. If passphrase is ever compromised the image data will
all be vulnerable, since it cannot be re-encrypted. The admin
has to clone the image files with a new passphrase and then
use a program like shred to secure erase all the old files.
Recommend against any use of QCow/QCow2 encryption, directing
users to dm-crypt / LUKS which can meet modern cryptography
best practices.
[Changed "Qcow" to "qcow" for consistency.
--Stefan]
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Christoffer Dall [Fri, 31 Jan 2014 14:47:38 +0000 (14:47 +0000)]
arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes
Fix two bugs that would allow changing the state of SGIs through the
ICPENDR and ISPENDRs.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Christoffer Dall [Fri, 31 Jan 2014 14:47:38 +0000 (14:47 +0000)]
arm_gic: Introduce define for GIC_NR_SGIS
Instead of hardcoding 16 various places in the code, use a define to
make it more clear what is going on.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alex Bennée [Fri, 31 Jan 2014 14:47:37 +0000 (14:47 +0000)]
target-arm: A64: Add SIMD shift by immediate
This implements a subset of the AdvSIMD shift operations (namely all the
none saturating or narrowing ones). The actual shift generation code
itself is common for both the scalar and vector cases but wrapped with
either vector element iteration or the fp reg access.
The rounding operations need to take special care to correctly reflect
the result of adding rounding bits on high bits as the intermediates do
not truncate.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 31 Jan 2014 14:47:37 +0000 (14:47 +0000)]
target-arm: A64: Add simple SIMD 3-same floating point ops
Implement a simple subset of the SIMD 3-same floating point
operations. This includes a common helper function used for both
scalar and vector ops; FABD is the only currently implemented
shared op.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Fri, 31 Jan 2014 14:47:37 +0000 (14:47 +0000)]
target-arm: A64: Add integer ops from SIMD 3-same group
Add some of the integer operations in the SIMD 3-same group:
specifically, the comparisons, addition and subtraction.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>