dzn: Use the nir hash as an input to the dxil hash

Instead of re-computing all the same bits we already computed,
just use the nir hash. Helps prevent missing a bit between the two.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22810>

dzn: Ensure sample-rate shading is factored into nir hash

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22810>

dzn: Hook up subgroup size to compute shader compilation

Previously this was only in the graphics path... where it does nothing,
since D3D only supports wave size control for compute. Whoops.

Fixes: db083070 ("dzn: Implement subgroup size control extension")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22810>

crocus: fix refcnt imbalance related to crocus_create_surface()

Indeed, the objects are not freed when the function returns NULL.

"psurf->texture = tex;" is redundant with
"pipe_resource_reference(&psurf->texture, tex);".

For instance, this issue is triggered with
"piglit/bin/ext_texture_array-compressed teximage pbo -fbo -auto"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: f3630548f1da ("crocus: initial gallium driver for Intel gfx 4-7")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22799>

virgl: check a debug option again at context creation

Android apps commonly use HWUI (a GLES-based UI framework provided by
the system), that generally performs eglInitialize() before the app can
do the same for its custom rendering needs.

If an app is going to set VIRGL_DEBUG to enable case-by-case driver
behaviors (e.g. experimental shader_sync option), it should be checked
again during context creation.

Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22744>

dzn: Fix UBO descriptors pointing to the end of the buffer

UBO descriptors can re-use the default descriptor when their upper
bound is 64KiB, not the end of the buffer.

Fixes dEQP-VK.memory.pipeline_barrier.host_write_uniform_buffer.1048576

Fixes: d34ac0a70b7 ("dzn: Re-design custom buffer descriptors")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22805>

Revert "zink: don't create separate shader dsls if there are no bindings"

This reverts commit 83a1b74240df3afcdb0e723c5bf6514b3321b411.

this is creating the pipeline layout, which is always required, not the dsl

Fixes: 83a1b74240d ("zink: don't create separate shader dsls if there are no bindings")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22801>

zink: only unset a generated tcs if the bound tcs is the generated one

this could otherwise unbind a non-generated tcs if the tes had at some
point generated a tcs

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22801>

radv/rt: Fix and improve VkPipelineCreationFeedback

Due to a copy-paste error, we asserted pipelineStageCreationFeedbackCount == 1
and wrote the stage feedback of the combined shader into the feedback of the first
stage. This is fixed.
Instead, we now write the precompilation feedback for each stage. This not ideal,
but definitely an improvement.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>

radv/rt: remove merged VkPipelineShaderStageCreateInfo

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>

radv/rt: refactor compute_rt_stack_size() to use radv_ray_tracing_stage information

instead of pStages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>

radv/rt: use precompiled stages to create RT shader

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>

radv/rt: retain parsed NIR shaders in radv_ray_tracing_lib_pipeline

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>

radv/rt: introduce struct radv_ray_tracing_stage

The purpose of this struct is to bundle per-stage information
for ray-tracing pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>

radv/rt: expose radv_parse_rt_stage()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>

radv/pipeline_cache: add NIR caching capabilities

This patch adds functions to radv_pipeline_cache in order to cache
serialized NIR shaders as opaque cache objects.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>

vulkan/pipeline_cache: expose vk_raw_data_cache_object

together with vk_raw_data_cache_object_ops and vk_raw_data_cache_object_create().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22100>

nvc0: do not randomly emit fences.

We track fences in a global list and have a per context "current" fence
which we randomly attach things to. If we take such a fence and emit it
without also creating a new fence for future tasks we can get out of sync
leading to random failures.

Some of our queries could trigger such cases and even though this issues
appears to be triggered by the MT rework, I'm convinced that this was only
made more visible by those fixes and we had this bug lurking for quite a
while.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7429
Fixes: df0a4d02f26 ("nvc0: make state handling race free")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22722>

ci: Uprev crosvm and virglrenderer

Update crosvm, virglrenderer and bindgen-cli to their latest version on time.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22712>

nir/lower_non_uniform_access: add get_ssbo_size handling

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22793>

rusticl/nir: finish blob after serializing

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22776>

clc: free kernel args in clc_free_kernels_info

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22776>

radv: add padding to radv_shader_binary_legacy

This fixes an alignment mismatch in radv_shader_serialize()

Fixes: 577d76f60f788c3a8d43b4b388bb5a04e4e64994 ('radv: add radv_shader_serialize() and radv_shader_deserialize() functions')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22735>

vulkan/pipeline_cache: use vk_pipeline_cache_insert_object() to replace raw data objects

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22735>

vulkan/pipeline_cache: replace raw data objects on cache insertion of real objects

It might happen that a raw data object (from pipeline cache creation)
was never looked up, and thus never deserialized, before it gets
inserted again into the cache. In this case, the deserialized object
got replaced by the raw data object.
Instead, replace the raw data object with the real object in the cache.

Fixes: 8b13ee75ba9f27ceac6b6180ca05d321caa13612 ('vulkan: Fall back to raw data objects when deserializing if ops == NULL')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22735>

etnaviv: Add util_blitter_save_so_targets(..) call

We do not support stream outputs yet so be better at faking it.
Fixes the following assertion when running deqp-gles3:
 u_blitter.c:635: blitter_check_saved_vertex_states: Assertion `!ctx->has_stream_out || ctx->base.saved_num_so_targets != ~0u' failed

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22754>

pvr: Correctly validate PBE accum format

Fixes: dEQP-VK.pipeline.monolithic.blend.format.e5b9g9r9_ufloat_pack32
  .states
  .color_sas_1mda_add_alpha_1msa_sas_rsub
    -color_1mda_cc_min_alpha_cc_cc_min
    -color_1mcc_1mca_rsub_alpha_1mca_1mda_min
    -color_sc_1mda_sub_alpha_sa_cc_min

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22795>

radv: fix bc optimization with POS_W_FLOAT_ENA(1)

0286CC_PERSP_CENTER_ENA is also set if:
- No barycentrics are used
- POS_W_FLOAT is enabled

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: a4b60295a79 ("aco,ac/llvm,radv,radeonsi: handle ps bc optimization in nir for radv")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8928
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22782>

pvr: Unmap mapped memory on free

From the Vulkan spec (§11.2.13. Freeing Device Memory):
  If a memory object is mapped at the time it is freed, it is implicitly
  unmapped.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22762>

pvr: Fix unaligned VDMCTRL_PDS_STATE1 data address

For indirect draw commands the data segment's address was being
calculated with an unaligned code size which could potentially
send an unaligned address to the hw causing problems.

Reported-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22746>

pvr: Fix image to buffer copies

The code to increment the destination buffer address was wrong. Instead of
incrementing an address on every iteration, the buffer slice size was added
as a static offset to all blits.

Seen in dEQP-VK.draw.renderpass.depth_clamp.d16_unorm, though issues remain.

Signed-off-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22747>

pvr: Fix vtxin special var allocation count

When pvr_graphics_pipeline_alloc_vertex_special_vars() was
allocating vtxin regs for special vars, it wasn't returning back
the updated amount of allocated regs so when the PDS was filling
them in, it would try to write out of bounds.

Signed-off-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22750>

pvr: Improve support for image clears

Depth/stencil surfaces are not PBE renderable, so a compatible format must
be used instead. The code to calculate this compatible format was not called
when configuring the PBE, and it was missing formats.

Also the code to calculate PBE swizzles was throwing an error in unhandled
cases, rather than using the pre-calculated defaults which was the correct
behaviour.

Fixes blits in dEQP-VK.draw.renderpass.depth_clamp.d32_sfloat

Signed-off-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22748>

nir: fix constant-folding of 64-bit fpow

We need to do full pow if 64-bit, and we can do fpow() otherwise. Not
the other way around.

Fixes: 9076c4e289d ("nir: update opcode definitions for different bit sizes")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22774>

radv: fix dynamic depth clamp enable support

The Vulkan spec says:

"If the depth clamping state is changed dynamically, and the pipeline
was not created with VK_DYNAMIC_STATE_DEPTH_CLIP_ENABLE_EXT enabled,
then depth clipping is enabled when depth clamping is disabled and
vice versa"

Fixes: e48c0fbd8f7 ("radv: add support for dynamic depth clamp enable")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22777>

microsoft/compiler: Unroll loops in opt passes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22786>

spirv2dxil: Mark SSBO reads for bindless as CAN_REORDER

This makes it so that they can be CSE'd, which helps prevent redundant
reads of the same data.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22786>

radv: respect VK_QUERY_RESULT_WAIT_BIT in GetQueryPoolResults

The flag was ignored for VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT and
VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22781>

Revert "ci: disable all a306/a530/a630 jobs"

This reverts commit af214c233b8612e9b063b268219a655f29d9aad6.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22780>

ci: Enable rusticl in the fedora-release job

v2:
* Drop superfluous -D rust_std=2021 (Eric Engestrom)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>

ci: Upgrade fedora-release job to Fedora 38

Need to add -Wno-error=dangling-reference -Wno-error=overloaded-virtual
for C++ for now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>

ci: Drop -Wno-error=array-bounds from fedora-release job

No warnings left.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>

clover/llvm: Use std::nullopt already with LLVM 16

llvm::None is already deprecated and defined as std::nullopt in LLVM 16.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>

clover/llvm: Use llvm::DataLayout::getABITypeAlign with LLVM >= 16

llvm::DataLayout::getABITypeAlignment is deprecated:

../src/gallium/frontends/clover/llvm/codegen/common.cpp: In function ‘std::vector<clover::binary::argument> {anonymous}::make_kernel_args(const llvm::Module&, const std::string&, const clang::CompilerInstance&)’:
../src/gallium/frontends/clover/llvm/codegen/common.cpp:211:62: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  211 |          const unsigned target_align = dl.getABITypeAlignment(arg_type);
      |                                        ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~
In file included from /usr/include/llvm/IR/Module.h:24,
                 from ../src/gallium/frontends/clover/llvm/codegen.hpp:35,
                 from ../src/gallium/frontends/clover/llvm/codegen/common.cpp:36:
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~
../src/gallium/frontends/clover/llvm/codegen/common.cpp:232:53: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  232 |                               dl.getABITypeAlignment(size_type),
      |                               ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~
../src/gallium/frontends/clover/llvm/codegen/common.cpp:240:53: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  240 |                               dl.getABITypeAlignment(size_type),
      |                               ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~
../src/gallium/frontends/clover/llvm/codegen/common.cpp:262:92: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  262 |                                     (pointee_type->isVoidTy()) ? 8 : dl.getABITypeAlignment(pointee_type),
      |                                                                      ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~
../src/gallium/frontends/clover/llvm/codegen/common.cpp:304:47: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  304 |                         dl.getABITypeAlignment(size_type),
      |                         ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~
../src/gallium/frontends/clover/llvm/codegen/common.cpp:310:47: warning: ‘uint64_t llvm::DataLayout::getABITypeAlignment(llvm::Type*) const’ is deprecated: use getABITypeAlign instead [-Wdeprecated-declarations]
  310 |                         dl.getABITypeAlignment(size_type),
      |                         ~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~
/usr/include/llvm/IR/DataLayout.h:527:12: note: declared here
  527 |   uint64_t getABITypeAlignment(Type *Ty) const;
      |            ^~~~~~~~~~~~~~~~~~~

v2:
* Use compat helper function (Karol Herbst)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>

svga: Make declaration of emit_input_declaration match definition

Pointed out by GCC 13:

../src/gallium/drivers/svga/svga_tgsi_vgpu10.c:3786:1: warning: conflicting types for ‘emit_input_declaration’ due to enum/integer mismatch; have ‘void(struct svga_shader_emitter_v10 *, VGPU10_OPCODE_TYPE,  VGPU10_OPERAND_TYPE,  VGPU10_OPERAND_INDEX_DIMENSION,  unsigned int,  unsigned int,  VGPU10_SYSTEM_NAME,  VGPU10_OPERAND_NUM_COMPONENTS,  VGPU10_OPERAND_4_COMPONENT_SELECTION_MODE,  unsigned int,  VGPU10_INTERPOLATION_MODE,  boolean,  SVGA3dDXSignatureSemanticName)’ {aka ‘void(struct svga_shader_emitter_v10 *, VGPU10_OPCODE_TYPE,  VGPU10_OPERAND_TYPE,  VGPU10_OPERAND_INDEX_DIMENSION,  unsigned int,  unsigned int,  VGPU10_SYSTEM_NAME,  VGPU10_OPERAND_NUM_COMPONENTS,  VGPU10_OPERAND_4_COMPONENT_SELECTION_MODE,  unsigned int,  VGPU10_INTERPOLATION_MODE,  unsigned char,  unsigned int)’} [-Wenum-int-mismatch]
 3786 | emit_input_declaration(struct svga_shader_emitter_v10 *emit,
      | ^~~~~~~~~~~~~~~~~~~~~~
../src/gallium/drivers/svga/svga_tgsi_vgpu10.c:516:1: note: previous declaration of ‘emit_input_declaration’ with type ‘void(struct svga_shader_emitter_v10 *, unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  boolean,  SVGA3dDXSignatureSemanticName)’ {aka ‘void(struct svga_shader_emitter_v10 *, unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned int,  unsigned char,  unsigned int)’}
  516 | emit_input_declaration(struct svga_shader_emitter_v10 *emit,
      | ^~~~~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>

svga: Make vmw_svga_winsys_buffer_map definition match declaration

Pointed out by GCC 13:

../src/gallium/winsys/svga/drm/vmw_buffer.c:355:1: warning: conflicting types for ‘vmw_svga_winsys_buffer_map’ due to enum/integer mismatch; have ‘void *(struct svga_winsys_screen *, struct svga_winsys_buffer *, enum pipe_map_flags)’ [-Wenum-int-mismatch]
  355 | vmw_svga_winsys_buffer_map(struct svga_winsys_screen *sws,
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../src/gallium/winsys/svga/drm/vmw_buffer.c:52:
../src/gallium/winsys/svga/drm/vmw_buffer.h:82:1: note: previous declaration of ‘vmw_svga_winsys_buffer_map’ with type ‘void *(struct svga_winsys_screen *, struct svga_winsys_buffer *, unsigned int)’
   82 | vmw_svga_winsys_buffer_map(struct svga_winsys_screen *sws,
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>

vulkan: Fix GetPhysicalDeviceSparseImageFormatProperties definitions

To match the declarations (and the corresponding definition in Vulkan
headers).

Pointed out by GCC 13, e.g.:

../src/intel/vulkan_hasvk/anv_formats.c:1589:6: error: conflicting types for 'anv_GetPhysicalDeviceSparseImageFormatProperties' due to enum/integer mismatch; have 'void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  uint32_t,  VkImageUsageFlags,  VkImageTiling,  uint32_t *, VkSparseImageFormatProperties *)' {aka 'void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  unsigned int,  unsigned int,  VkImageTiling,  unsigned int *, VkSparseImageFormatProperties *)'} [-Werror=enum-int-mismatch]
 1589 | void anv_GetPhysicalDeviceSparseImageFormatProperties(
      |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ../src/intel/vulkan_hasvk/anv_private.h:113,
                 from ../src/intel/vulkan_hasvk/anv_formats.c:24:
src/intel/vulkan_hasvk/anv_entrypoints.h:120:30: note: previous declaration of 'anv_GetPhysicalDeviceSparseImageFormatProperties' with type 'void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  VkSampleCountFlagBits,  VkImageUsageFlags,  VkImageTiling,  uint32_t *, VkSparseImageFormatProperties *)' {aka 'void(struct VkPhysicalDevice_T *, VkFormat,  VkImageType,  VkSampleCountFlagBits,  unsigned int,  VkImageTiling,  unsigned int *, VkSparseImageFormatProperties *)'}
  120 |   VKAPI_ATTR void VKAPI_CALL anv_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
      |                              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22718>

radv: enable RADV_THREAD_TRACE_CACHE_COUNTERS by default

It should work but if not enabled by default, I think most people
forget about it.

If you have any issues with it, you can disable by using
RADV_THREAD_TRACE_CACHE_COUNTERS=false and please report!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22763>

r600/sfn: assign window_space_position in shader state

This fixes a few tests out of the nin-tests test suite.

Fixes: 79ca456b4837 ("r600/sfn: rewrite NIR backend")

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22778>

r600+sfn: Assign ps_conservative_z and switch to NIR defines

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22778>

v3d: apply 1D texture miplevel alignment in arrays

1D texture miplevels are aligned to 64b, but this should include also
texture arrays.

Fixes
`spec@glsl-1.30@execution@texelfetchoffset@vs-texelfetch-usampler1darray`
and several other piglit tests.

CC: mesa-stable
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22775>

radv: Add asserts in radeon_emit{,_array}.

Also add an unsafe helper for some winsys stuff that can't really
use the reservation mechanism (e.g. chaining between cmdbuffers).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20152>

radv: Add stricter space checks.

The check for max_dw means that none of checks triggered reliably
when we had an issue. Use a stricter reserved dw measure to increase
the probability of catching issues.

Adds a radeon_check_space to some places after cs_create as they
previously relied on the min. cs size, but that would still trigger
the checks.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20152>

radv: Reserve space in the ACE pre/postambles.

Since we check reservations now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20152>

radv: Reserve space for indirect descriptor set address writes.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20152>

r300: remove simple duplicate ARL instructions

Removes duplicate ARL reads from the same source when the original ADDR
register is still live. This is the remaining low-hanging fruit from #7723
Should account for most of the potential improvements and is also
trivial as no source or destination rewrite is needed.

RV530:
total instructions in shared programs: 132447 -> 131488 (-0.72%)
instructions in affected programs: 33396 -> 32437 (-2.87%)
helped: 331
HURT: 0
total temps in shared programs: 17035 -> 17015 (-0.12%)
temps in affected programs: 361 -> 341 (-5.54%)
helped: 30
HURT: 10

RV370:
total instructions in shared programs: 83555 -> 82659 (-1.07%)
instructions in affected programs: 28310 -> 27414 (-3.16%)
helped: 312
HURT: 0
total temps in shared programs: 12418 -> 12426 (0.06%)
temps in affected programs: 302 -> 310 (2.65%)
helped: 21
HURT: 29

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22752>

mesa/main: make ffvertex output nir

There's little point in going from fixed-function to ARB progs just to
convert it to NIR in the end. So let's emit NIR code directly here
instead.

This all made sense back when we had DRI drivers that didn't use NIR at
all in the tree, but these days we unconditionally call prog_to_nir.

Since we're no longer generating something that resembles ARM asm
shaders, we also no longer pass is_arb_asm as true to NewProgram. But
we still require legacy math rules, so we set use_legacy_math_rules in
the shader_info instead. This should do the same thing, but
communicates exactly what we actually need rather than having a half-
truth about the source of the shader.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22520>

mesa/main: allow passing nir-shaders to st_program_string_notify

This will enable us to emit NIR directly for fixed-function vertex
shaders.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22520>

mesa/main: drop disasm-code from ffvertex_prog.c

We're about to rewrite this code to emit NIR directly, so let's drop
this needless logic.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22520>

mesa/main: clean up white-space in ffvertex_prog.c

We're about to change this file, so let's clean up the whitespace a bit
first.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22520>

ci/skqp: update to the Android CTS 12.1_r5 version

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22710>

ci/skqp: replace license with SPDX and extract the used branch

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22710>

meson: Don't use masm with VS backend

Fixes: 77826e83 ("util: Add a copy of BLAKE3 hash library.")
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22740>

Revert "zink: add `single_sample` to fs key"

This reverts commit 420f2c0878f0c38128854f2adbbeb1391e752cb8.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22753>

Revert "zink: add to multisample field to `zink_gfx_pipeline_state`"

This reverts commit 14d58926099fb735312705f0853785dcd1888c2e.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22753>

Revert "zink: don't render with multisampling when it is disabled"

This reverts commit a004825266fdcb43afd5e9fdf946ad9641f1e296.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22753>

Revert "zink/ci: remove xt_framebuffer_multisample-interpolation fail"

This reverts commit 177c92fe7ca3f171ab4fe41491935895134eff3f.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22753>

Revert "zink: set when pipeline dirty flag when multisample changes"

This reverts commit 5969541123dbfe1ac339284911a83af712fdcc25.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22753>

zink: add extendedDynamicState3DepthClipNegativeOneToOne to profile

Fixes: 3017d01c9de ("zink: check for extendedDynamicState3DepthClipNegativeOneToOne for ds3 support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22765>

zink: update amdpro fails

how is this driver still so broken

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22761>

llvmpipe: fix native vector width init

this otherwise causes infinite loops in subgroup tests
and kills ci

Fixes: 4a056807bc3 ("gallivm: break out native vector width calc for reuse")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22767>

gallivm: reorder some texture/image members.

This just aligns texture/image a bit more, shouldn't have much
affect, but might make things easier going forward.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>

gallium: consolidate jit image types between draw/llvmpipe

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>

gallivm: consolidate llvmpipe/draw sampler types.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>

gallivm: consolidate draw/lp texture type.

This just makes the type creation, struct and fields the same.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>

lp_jit: use pipe max for the lp_jit texture levels.

Align this with draw, so we the structs can be shared.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>

ci: disable all a306/a530/a630 jobs

these have been dead and timing out all day

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22768>

ci/dzn: add flaking test

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22766>

radeonsi/vcn: correct cropping for hevc case

reason:

corect cropping calculation error.

If no cropping from the external, then it will
need to calculate cropping size internally, the
padding size on left and top should be zero.

Cc: mesa-stable
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7171
Reviewed-by: Thong Thai <thong.thai@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22758>

ac/nir: fix 8-bit/10-bit PS exports clamping

This broke many tests on GFX6 (Pitcairn).

Fixes: c1821544562 ("ac/nir: add ac_nir_lower_ps")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22756>

ac,radv,radeonsi: rename thread_trace to sqtt everywhere

SQTT stands for SQ Thread Trace but it's shorter.
Note that environment variables aren't renamed because this might
break external applications.

This renames:
- ac_thread_trace_data to ac_sqtt (this is the main struct)
- ac_thread_trace_info to ac_sqtt_data_info
- ac_thread_trace_se to ac_sqtt_data_se
- ac_thread_trace to ac_sqtt_trace (this contains trace only)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>

ac/rgp: remove ac_thread_trace_data from ac_thread_trace

We only need the RGP objects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>

radv: do not abort when the SQTT buffer resize failed

This seems to much. While we are at it, update the error msg.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>

ac/sqtt: add ac_sqtt_get_trace() helper

It can be shared between RADV and RadeonSI. The only difference is
that RadeonSI can't auto-resize the SQTT BO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>

ac/sqtt: add ac_sqtt_se_is_disabled() helper

It can be shared between RADV and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>

pvr: Fixup format features

Fixes: dEQP-VK.api.info.format_features.*

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22749>

pvr: Remove false assumption from pvr_write_draw_indirect_vdm_stream()

Partially reverts: bd513059433a6bbda8ce0f95b85dcc76d48f959c
  pvr: Minor cleanup around pvr_emit_vdm_index_list()

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22751>

v3d: fix various minor issues in gen_pack_header.py

Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22742>

iris: Allow shared scanout buffer to be placed in smem as well

i915 and Xe kmd allows scanout to display of prime buffers placed
in smem.

Allowing shared and scanout bos to be placed in smem and lmem allows
the dma buf to work in some cases that only lmem is not enough.

Fixes: c10ff1970461 ("iris: Place scanout buffers only into lmem for discrete GPUs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8867
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8766
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22665>

r600/sfn: Tie in address load splitting

Add R600_NIR_DEBUG flag "noaddrsplit" to disable the behaviour and use the
old code path.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>

r600/sfn: prepare for emitting AR loads

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>

r600/sfn: factor out index loading for non-alu instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>

r600/sfn: Can't use an indirect array access as source to AR load

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>

r600/sfn: print failing block when scheduling fails

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>

r600/sfn: Add more tests and update to use address splits

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>

r600/sfn: scheduled instructions are always ready

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>

r600/sfn: Fix copy-prop with array access

We will have to check whether there is access to an array between the
instructions involved with the copy prop, so for now do not allow it.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>

r600/sfn: Override Array access handling in backend assembler

Since we do thi sin the scheduler, there is no need to do this in the
backend again.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>

r600/sfn: Add handling for R600 indirect access alias handling

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>

r600/sfn: Add chip family to shader class

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>