Rob Clark [Mon, 15 May 2017 20:42:15 +0000 (16:42 -0400)]
freedreno/ir3: fix crash with atomics
Atomics can have a result value. And sometimes it is even used.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 16 May 2017 14:29:44 +0000 (10:29 -0400)]
mesa/st: fix yuv EGLImage's
Don't reject YUV formats that the driver doesn't handle natively, since
mesa/st already knows how to lower this in shader.
Reported-by: Nicolas Dechesne <ndec@linaro.org>
Fixes: 83e9de2 ("st/mesa: EGLImageTarget* error handling")
Cc: 17.1 <mesa-stable@lists.freedesktop.org
Signed-off-by: Rob Clark <robdclark@gmail.com>
Tested-by: Nicolas Dechesne <ndec@linaro.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Rob Clark [Mon, 15 May 2017 17:31:44 +0000 (13:31 -0400)]
ttn: fix dest size for some texture instructions
Some, like lod, don't return 4 components.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Mon, 15 May 2017 17:24:34 +0000 (13:24 -0400)]
ttn: fix txd src sizes
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Mon, 15 May 2017 17:03:44 +0000 (13:03 -0400)]
ttn: fix txs dest size
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Mon, 15 May 2017 18:08:16 +0000 (14:08 -0400)]
freedreno/a5xx: remove unneeded assert
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 15 May 2017 16:36:24 +0000 (12:36 -0400)]
freedreno/a5xx: fallback to slow-clear for z32
We probably *could* do this with blit path, but I think it would involve
clobbering settings from batch->gmem (see emit_zs()).
Signed-off-by: Rob Clark <robdclark@gmail.com>
Philipp Zabel [Wed, 10 May 2017 16:01:08 +0000 (18:01 +0200)]
etnaviv: increment the resource seqno in resource_changed
Just increment the resource seqno instead of setting the texture
seqno to be lower by one than the resource seqno.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Lucas Stach [Wed, 10 May 2017 16:01:07 +0000 (18:01 +0200)]
etnaviv: clean up sampler view reference counting
Use the proper pipe_resource_reference function instead of
rolling our own.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Lucas Stach [Wed, 10 May 2017 16:01:06 +0000 (18:01 +0200)]
etnaviv: apply feature overrides in one central location
This way we can just test the feature bits and don't need to spread
the debug overrides to all locations touching a feature.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Lucas Stach [Wed, 10 May 2017 16:01:05 +0000 (18:01 +0200)]
etnaviv: allow R/B swapped surfaces to be cleared
Fixes:
7f62ffb68ad ("etnaviv: add support for rb swap")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Lucas Stach [Wed, 10 May 2017 16:01:04 +0000 (18:01 +0200)]
etnaviv: stop oversizing buffer resources
PIPE_BUFFER is a target enum, not a binding. This caused the driver to
up-align the height of buffer resources, leading to largely oversizing
those resources. This is especially bad, as the buffer resources used
by the upload manager are already 1MB in size. Height alignment meant
that those would result in 4 to 8MB big BOs.
Fixes:
c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Matt Turner [Tue, 16 May 2017 18:43:57 +0000 (11:43 -0700)]
i965: Fix test_eu_validate.cpp
Broken by commit
a7217e909ce6 ("i965: Pass pointer and end of assembly
to brw_validate_instructions").
Reported-by: Aaron Watry <awatry@gmail.com>
Jason Ekstrand [Fri, 17 Mar 2017 22:07:44 +0000 (15:07 -0700)]
anv: Implement VK_KHR_get_surface_capabilities2
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Jason Ekstrand [Fri, 17 Mar 2017 21:08:04 +0000 (14:08 -0700)]
vulkan/wsi/wayland: Add support for VK_KHR_get_surface_capabilities2
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Jason Ekstrand [Fri, 17 Mar 2017 21:04:57 +0000 (14:04 -0700)]
vulkan/wsi/x11: Add support for VK_KHR_get_surface_capabilities2
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Jason Ekstrand [Fri, 17 Mar 2017 20:50:24 +0000 (13:50 -0700)]
vulkan/wsi: Add get_capabilities2 and get_formats2d interface pointers
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Jason Ekstrand [Fri, 17 Mar 2017 21:02:43 +0000 (14:02 -0700)]
vulkan/wsi: Use vk_outarray for surface_get_formats
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Jason Ekstrand [Mon, 15 May 2017 14:58:43 +0000 (07:58 -0700)]
vulkan: Update registry and headers to 1.0.49
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Nicolai Hähnle [Mon, 15 May 2017 21:35:28 +0000 (23:35 +0200)]
radeonsi: extract TGSI memory/texture opcode handling into its own file
It's about time to get the growth of si_shader.c somewhat under control.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 15 May 2017 21:17:54 +0000 (23:17 +0200)]
radeonsi: make const_array externally accessible
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 15 May 2017 21:11:46 +0000 (23:11 +0200)]
radeonsi: make get_bounded_indirect_index externally accessible
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 15 May 2017 21:06:08 +0000 (23:06 +0200)]
radeonsi: make emit_waitcnt externally accessible
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 10 May 2017 16:45:40 +0000 (18:45 +0200)]
radeonsi: silence a Coverity warning
Coverity doesn't understand that we'll never pass non-NULL for vertex
shaders.
This is a bit lame, actually. A straightforward cross-procedural analysis
limited to this source file should be enough to prove that there's no
NULL-pointer dereference. Oh well.
CID: 1405999
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 15 May 2017 09:13:44 +0000 (11:13 +0200)]
radeonsi: rename tcs_tes_uses_prim_id for clarity
What we care about is whether PrimID is used while tessellation is
enabled; whether it's used in TCS/TES or further down the pipeline is
irrelevant.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 15 May 2017 09:10:13 +0000 (11:10 +0200)]
radeonsi: fix gl_PrimitiveIDIn in geometry shader when using tessellation
This builds on commit
0549ea15ec38 ("radeonsi: fix primitive ID in
fragment shader when using tessellation").
Fixes piglit
arb_tessellation_shader/execution/gs-primitiveid-instanced.shader_test
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 15 May 2017 09:10:31 +0000 (11:10 +0200)]
ac/debug: handle index field in SET_*_REG correctly
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Mon, 15 May 2017 10:55:06 +0000 (12:55 +0200)]
glsl: simplify link_assign_uniform_storage() a bit
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Mon, 15 May 2017 10:55:05 +0000 (12:55 +0200)]
mesa: unify _mesa_uniform() for image uniforms
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Mon, 15 May 2017 10:55:04 +0000 (12:55 +0200)]
mesa: fix indentation in _mesa_uniform()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Mon, 15 May 2017 10:55:03 +0000 (12:55 +0200)]
mesa: fix indentation in _mesa_associate_uniform_storage()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Timothy Arceri [Tue, 9 May 2017 02:50:56 +0000 (12:50 +1000)]
mesa: replace _mesa_problem() with unreachable() in pack.c
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Tue, 9 May 2017 02:46:48 +0000 (12:46 +1000)]
mesa: replace _mesa_problem() with unreachable() in mipmap.c
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Tue, 9 May 2017 02:38:44 +0000 (12:38 +1000)]
mesa: replace _mesa_problem() with unreachable() in _mesa_convert_colors()
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Tue, 9 May 2017 02:36:35 +0000 (12:36 +1000)]
mesa: replace _mesa_problem() with unreachable() in _mesa_light()
All drivers but the old nouveau dri driver return after this anyway.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Tue, 9 May 2017 02:27:41 +0000 (12:27 +1000)]
mesa: replace _mesa_problem() with assert() in hash table
There should be no way the OpenGL test suites don't hit the assert()
should we do something to cause this code path to be taken.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Sat, 13 May 2017 05:53:08 +0000 (15:53 +1000)]
mesa: don't crash in KHR_no_error uniform variants when location == -1
From Seciton 7.6 (UNIFORM VARIABLES) of the OpenGL 4.5 spec:
"If the value of location is -1, the Uniform* commands will
silently ignore the data passed in, and the current uniform values
will not be changed.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Matt Turner [Mon, 3 Apr 2017 18:10:37 +0000 (11:10 -0700)]
intel/aubinator_error_decode: Disassemble shader programs
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Matt Turner [Thu, 6 Apr 2017 20:43:38 +0000 (13:43 -0700)]
intel/aubinator_error_decode: Stop decoding after MI_BATCH_BUFFER_END
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Matt Turner [Mon, 1 May 2017 18:59:32 +0000 (11:59 -0700)]
intel/tools: Refactor gen_disasm_disassemble() to use annotations
Which will allow us to print validation errors found in shader assembly
in GPU hang error states.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Matt Turner [Sat, 8 Apr 2017 05:37:00 +0000 (22:37 -0700)]
intel/decoder: Fix indentation
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Matt Turner [Sat, 8 Apr 2017 22:39:59 +0000 (15:39 -0700)]
genxml: Remove brackets from kernel start pointer names
Newer Gens' names don't have the brackets. Having common names will make
some later patches simpler.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Matt Turner [Mon, 1 May 2017 18:43:07 +0000 (11:43 -0700)]
i965: Add a weak no-op nir_print_instr() symbol
intel_asm_annotation.c is part of libintel_compiler.la, which contains
code for disassembling and validating shaders that we want to call in
aubinator_error_decode.
dump_assembly() calls nir_print_instr() to print annotations, and
although dump_assembly() is not called by aubinator_error_decode (nor is
any function in intel_asm_annotation.c) it causes undefined references
to nir_print_instr().
To work around, provide a no-op weak symbol to resolve against.
Matt Turner [Sat, 29 Apr 2017 00:06:56 +0000 (17:06 -0700)]
i965: Allow brw_eu_validate to handle compact instructions
This will allow the validator to run on shader programs we find in the
GPU hang error state.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Matt Turner [Sat, 29 Apr 2017 00:05:44 +0000 (17:05 -0700)]
i965: Pass pointer and end of assembly to brw_validate_instructions
This will allow us to more easily run brw_validate_instructions() on
shader programs we find in GPU hang error states.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Matt Turner [Tue, 25 Apr 2017 17:00:19 +0000 (10:00 -0700)]
i965: Mark shader programs for capture in the error state.
When the GPU hangs, the kernel saves some state for us. Until now it has
not included the shader programs, which are very often the reason the
GPU hang occurred. With the programs saved in the error state, we should
be more capable of debugging hangs.
Thanks to Chris Wilson and Ben Widawsky who provided the kernel support
for this feature ("drm/i915: Copy user requested buffers into the error
state"), which will be in kernel v4.13.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Tapani Pälli [Fri, 12 May 2017 06:32:15 +0000 (09:32 +0300)]
egl: fix android logger compilation
1ce5853 broken compilation since LOG_ERROR is not defined and also
macro expansion won't work as planned (expands to 'ANDROID_egl2alog[level]')
v2: append 'ANDROID' to egl2alog table and use LOG_PRI
(suggested by Chih-Wei Huang)
Fixes: 1ce5853 ("egl: simplify the Android logger")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Fri, 12 May 2017 11:34:46 +0000 (12:34 +0100)]
i965: perf: fix pointer to integer cast
v2: Just use cast to uintptr_t (Chris)
Reported-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Lionel Landwerlin [Fri, 12 May 2017 09:49:46 +0000 (10:49 +0100)]
intel: gen-decoder: fix xml parser leak
In the unlikely case the parsing of genxml files fails, we were
leaking an xml parser object.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Marek Olšák [Thu, 2 Mar 2017 00:28:51 +0000 (01:28 +0100)]
radeonsi: enable threaded_context
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Thu, 11 May 2017 23:25:49 +0000 (01:25 +0200)]
gallium/u_threaded: drop and ignore all non-async debug callbacks
This is necessary to comply with OpenGL.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 10 Mar 2017 11:17:20 +0000 (12:17 +0100)]
gallium/radeon: add threaded context counter monitoring for HUD
"tc" will be initialized by the next commit.
v2: rename stuff according to v2 changes in u_threaded_context
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Sun, 12 Mar 2017 13:19:31 +0000 (14:19 +0100)]
radeonsi: implement replace_buffer_storage for the threaded context
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Sun, 12 Mar 2017 20:44:07 +0000 (21:44 +0100)]
gallium/radeon: subclass and handle threaded_query
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Tue, 2 May 2017 23:51:42 +0000 (01:51 +0200)]
gallium/radeon: subclass threaded_transfer
v2: use assert on rtransfer->b.staging
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Fri, 10 Mar 2017 14:48:24 +0000 (15:48 +0100)]
gallium/radeon: subclass threaded_resource
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Sun, 12 Mar 2017 13:17:25 +0000 (14:17 +0100)]
gallium/radeon: handle other map buffer flags from the threaded context
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Thu, 2 Mar 2017 00:27:53 +0000 (01:27 +0100)]
gallium/radeon: handle TC_TRANSFER_MAP_THREADED_UNSYNC
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Sun, 26 Feb 2017 17:48:28 +0000 (18:48 +0100)]
gallium/radeon: unwrap a context if we get a wrapped one
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Tue, 2 May 2017 23:23:54 +0000 (01:23 +0200)]
gallium/radeon: require both WRITE and FLUSH_EXPLICIT in buffer_flush_region
spotted randomly.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Thu, 2 Mar 2017 00:15:55 +0000 (01:15 +0100)]
gallium/util: add threaded_context as a pipe_context wrapper
v2: - rename num_calls -> num_call_slots (for tc_call)
- rename num_calls -> num_total_call_slots (for tc_batch)
- rename num_offloaded/direct_calls -> num_offloaded/direct_slots
- declare slot[0] instead of slot[1]
- remove no-op leftover code from tc_draw_vbo
- use tc_set_resource_reference to fill threaded_transfer
- fix map flags for sparse buffers
- cosmetic changes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Sat, 18 Feb 2017 22:01:14 +0000 (23:01 +0100)]
gallium/u_upload: add u_upload_clone
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Fri, 24 Mar 2017 00:57:40 +0000 (01:57 +0100)]
gallium: add flag PIPE_CONTEXT_PREFER_THREADED
State trackers can set this to tell the driver when u_threaded_context is
desirable.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Mon, 27 Feb 2017 21:26:10 +0000 (22:26 +0100)]
radeonsi/gfx9: add support for Raven
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 27 Feb 2017 21:25:43 +0000 (22:25 +0100)]
amd/addrlib: import Raven support
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Eric Anholt [Tue, 9 May 2017 18:24:21 +0000 (11:24 -0700)]
renderonly: Initialize fields of struct winsys_handle.
vc4 was rejecting renderonly's import, because the offset field was
nonzero.
Fixes:
848b49b288f ("gallium: add renderonly library")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Rob Clark [Sun, 14 May 2017 18:16:39 +0000 (14:16 -0400)]
Revert "freedreno: use bypass if only clears"
Causing issues with stk on a4xx.. still probably a good idea, but seems
some debugging is needed first.
This reverts commit
3ab072d3c8643c66d8e07e63df970b792728bac6.
Rob Clark [Sun, 14 May 2017 15:32:44 +0000 (11:32 -0400)]
freedreno: fix crash when flush() but no rendering
If we haven't created a batch, just bail in pipe->flush(), since there
is nothing to do.
Fixes crash in warsow, which creates a whole bunch of contexts used for
nothing but texture uploads.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 13 May 2017 18:43:45 +0000 (14:43 -0400)]
freedreno: fix indexbuffer upload
My fault for not having time to test Marek's patches while they were on
list.
Fixes:
330d0607 ("gallium: remove pipe_index_buffer and set_index_buffer")
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bas Nieuwenhuizen [Sat, 13 May 2017 16:05:36 +0000 (18:05 +0200)]
radv: Save descriptor set even if vertex buffers are not saved.
Totally independent.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes:
0e6d532d327 "radv/meta: add support for save/restore meta without vertex data."
Rob Clark [Fri, 12 May 2017 13:56:56 +0000 (09:56 -0400)]
freedreno/a5xx: hw binning support
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 11 May 2017 17:53:55 +0000 (13:53 -0400)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 12 May 2017 18:24:33 +0000 (14:24 -0400)]
freedreno: use bypass if only clears
Some things trigger batches that only contain a clear (like glmark2
startup). No point to use GMEM for this.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Pierre Moreau [Fri, 12 May 2017 09:01:32 +0000 (11:01 +0200)]
nv50/ir: Report wrong prog types using proper var
Coverity caught the use of the uninitialised variable `type`.
However, it was `info->type`, which is initialised, which was meant to
be used.
CID: 1406000
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Fixes:
b490ca9a387d ("nv50/ir: Fail if encountering unknown shader type")
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Fri, 12 May 2017 05:29:57 +0000 (15:29 +1000)]
mesa: fix KHR_no_error SSO support
Fixes:
00c5119a5e821 ("mesa: add KHR_no_error support for glUseProgramStages()")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Gomez [Fri, 12 May 2017 23:20:32 +0000 (02:20 +0300)]
docs: update calendar, add news item and link release notes for 17.0.6
Signed-off-by: Andres Gomez <agomez@igalia.com>
Andres Gomez [Fri, 12 May 2017 23:14:17 +0000 (02:14 +0300)]
docs: add sha256 checksums for 17.0.6
Signed-off-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit
6a680243fcef4509372941d5c4c50b82c3aaa8ed)
Andres Gomez [Fri, 12 May 2017 20:41:51 +0000 (23:41 +0300)]
docs: add release notes for 17.0.6
Signed-off-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit
08abf3a2a2ca8733fb75277d41f2196fe899f129)
Andres Gomez [Mon, 8 May 2017 17:57:35 +0000 (20:57 +0300)]
bin/get-fixes-pick-list.sh: bring back the warning
We warn again if there are more than one line with the "fixes:" tag.
The warning is silenced when the commit has already landed or each
fixes tag reference a commit that is in branch.
v2:
- Warn if any of the fixes tags has not landed (Emil)
v3:
- Remove unnecessary head command
- Clarify commit message (Emil)
- Skip already picked commits sooner (Emil)
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Andres Gomez [Sat, 6 May 2017 15:46:13 +0000 (18:46 +0300)]
docs: extend until the end of August
Completed the 17.1 cycle and added the beginning of the 17.2 one.
Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Andres Gomez [Sat, 6 May 2017 15:46:12 +0000 (18:46 +0300)]
docs: update "Release manager" column
Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Juan A. Suarez Romero <jasuarez@igalia.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Nicolai Hähnle [Wed, 26 Apr 2017 16:34:09 +0000 (18:34 +0200)]
glsl: include image qualifiers when printing IR
v2:
- fix copy&paste errors noted by Samuel
- rebase
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Tue, 2 May 2017 15:46:12 +0000 (17:46 +0200)]
radeonsi: get rid of secondary input/output word
By keeping track of fewer generics, everything can fit into 64 bits.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 10 May 2017 11:22:10 +0000 (13:22 +0200)]
radeonsi: reduce the number of generics for shader IO unique indices
This is a high as possible while still allowing to merge the bitfields
with the next commit.
For OpenGL, 32 would be sufficient. Nine apparently uses (much!) higher
indices than. Indices that are out of bound don't hurt for VS-PS
pipelines, except that the VS output kill optimization is not applied.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 10 May 2017 07:58:31 +0000 (09:58 +0200)]
radeonsi: at most 8 sets of texture coordinates are supported
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 10 May 2017 11:26:39 +0000 (13:26 +0200)]
radeonsi: skip generic out/in indices without a shader IO index
OpenGL uses at most 32 generic outputs/inputs in any stage, and they always
have a shader IO index and therefore fit into the outputs_written/
inputs_read/kill_outputs fields.
However, Nine uses semantic indices more liberally. We support that
in VS-PS pipelines, except that the optimization of killing outputs
must be skipped.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 10 May 2017 07:55:36 +0000 (09:55 +0200)]
radeonsi: use SI_MAX_IO_GENERIC instead of magic values
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Thu, 11 May 2017 15:43:19 +0000 (17:43 +0200)]
glsl: order indices for images inside a struct array
ARB_bindless_texture allows images to be declared inside
structures. This is similar to samplers.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Thu, 11 May 2017 15:43:18 +0000 (17:43 +0200)]
glsl: add parcel_out_uniform_storage::set_opaque_indices() helper
In order to sort indices for images inside a struct array we
need to do something similar to samplers.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Rafael Antognolli [Wed, 10 May 2017 00:12:12 +0000 (17:12 -0700)]
i965: Port 3DSTATE_VF_TOPOLOGY on gen8+ to genxml.
With this last state ported, we can get rid of gen8_draw_upload.c.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Rafael Antognolli [Wed, 10 May 2017 00:12:11 +0000 (17:12 -0700)]
i965: Port 3DSTATE_INDEX_BUFFER to genxml.
Also make the brw_get_index_type() function not shift its return, since that
is genxml's job now.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Rafael Antognolli [Wed, 10 May 2017 00:12:10 +0000 (17:12 -0700)]
i965: Port brw_cs_state tracked state to genxml.
Emit the respective commands using genxml code.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Rafael Antognolli [Wed, 10 May 2017 00:12:09 +0000 (17:12 -0700)]
genxml: Add alias for MOCS.
Use an alias for this field on 3DSTATE_INDEX_BUFFER on gen6+, so we can set
the same value as the defines.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Rafael Antognolli [Wed, 10 May 2017 00:12:08 +0000 (17:12 -0700)]
i965/genxml: Mostly style fixes for emit_vertices code.
Several issues were caught on review after the original patch landed.
This commit fixes them.
v2:
- Fix padding (Topi)
- Remove .DestinationElementOffset change from this patch (Topi)
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Glenn Kennard [Sun, 5 Mar 2017 17:26:48 +0000 (18:26 +0100)]
r600g: Add defines for per-shader engine settings
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Glenn Kennard [Sun, 5 Mar 2017 17:26:47 +0000 (18:26 +0100)]
r600g: Add instruction encoding defines for MEM_RD
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Glenn Kennard [Sun, 5 Mar 2017 17:26:46 +0000 (18:26 +0100)]
r600g: Add scratch ring register defines
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Kenneth Graunke [Wed, 10 May 2017 19:01:41 +0000 (12:01 -0700)]
i965: Drop brw_context::viewport_transform_enable.
This was used by the meta fast clear code. Now that we've switched
back to BLORP, it's always true.
We might want it back when we add a RECTLIST extension to GL, but
that's someday in the future...
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Kenneth Graunke [Wed, 10 May 2017 19:41:39 +0000 (12:41 -0700)]
i965: Port Gen4-5 VS_STATE to genxml.
It's actually not that much code.
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Kenneth Graunke [Wed, 10 May 2017 19:41:38 +0000 (12:41 -0700)]
i965: Change GEN_GEN < 7 to GEN_GEN == 6 in 3DSTATE_VS code.
This whole code is surrounded in #if GEN_GEN >= 6, and this code only
applies on Sandybridge. So, use GEN_GEN == 6 to reduce the delta in
the next patch, when we add Gen4-5 support.
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>