radv/video: fix hevc scaling lists.

These need some zscan conversion, that I've taken from vaapi.

v2: move to common code for it_ptr updates, add defines

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>

radv/video: fix hevc st rps programming

These needs to be programmed to fix some video glitches.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>

radv/video: rework h265 reference frame bindings.

This reworks the ref frame bindings and allows dropping the tier_2 workaround.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>

radv/video: don't supply an 8-bit format for a 10-bit dpb.

The firmware can write an 8-bit output buffer, but still needs
a 10-bit dpb allocation.

This also puts the 8-bit format after the 10-bit format though
apps should be smart enough to pick the correct one.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>

radv/video: convert session memory requirements to outarray.

These are just standard outarray so use the common code.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>

radv/video: convert video format properties to an outarray

These are just standard outarray so use the common code.

Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23476>

radv: fix non-square compressed image copy on gfx9

There is a typo in fixup_gfx9_cs_copy.

Fixed dEQP-VK.api.copy_and_blit.*.image_to_buffer.2d_images.mip_copies_bc*_64x192_* in deqp 1.3.6.0.

Fixes: 35f053ba8cd ("radv: Fix corrupted mipmap copies on GFX9+")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23483>

rusticl/event: flush queues from dependencies

We have to flush all event dependencies inside clWaitForEvents and
clFinish implicitly otherwise applications might wait forever.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9052
Fixes: ebfffa1daec ("rusticl/event: wrong but non crashing impl of clWaitForEvents")
Cc: mesa-stable
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23110>

rusticl: bump rust req to 1.60

We need this rustc bugfix:
https://github.com/rust-lang/rust/commit/6466f89fc5df36b4c841fca9d10e27c50dd744b5

Cc: mesa-stable
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23110>

doc/rusticl: add Rust Update Policy

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23110>

u_format: Use memcpy to avoid unaligned accesses

These functions are used by gl[Get]TexImage, which imposes no
alignment restructions on the void *pixels parameter.

This fixes an unaligned access in GTK's "gtk:gdk / memorytexture" unit
test on SPARC, which causes the test to fail.

Fixes: 45ae4434b5b ("util: Use bitshift arithmetic to unpack pixels.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23482>

Revert "gallium/u_threaded: buffer sharedness tracking"

This reverts commit 8f159a8576efbb7bb3755d215a54b87c4c99a0d2.

This commit is correct but it exposes an existing bug: DISCARD_RANGE doesn't
work well with shared buffers.
So for now revert this commit as it's causing hangs on some APUs (see
https://gitlab.freedesktop.org/drm/amd/-/issues/2447) and flickering in
Metro Last Light Redux.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9108
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23492>

anv: allow binding tables allocations on compute only queues

COMPUTE_WALKER is using binding tables.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: eb2b309328 ("anv: defer binding table block allocation to when necessary")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23506>

draw: repack some members of context.

this just fills a hole in

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>

draw: add a max stage define and use it in a few places

This should decrease the size of some memory allocations.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>

draw: refactor resources to use arrays instead of explicit structs.

This should simplify the code and make it easier to refactor later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>

gallium/tgsi/draw/softpipe: remodel shader const/buffer bindings.

This remodels things around a buffer object.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>

draw/tess: drop unused tgsi bits.

tess isn't supported by tgsi

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>

draw: rename jit to vs_jit in lots of places.

we should have done this when geom shaders got added,
do it now, will make it easier to consolidate some code in macros

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23487>

gallivm/nir: fix shuffleup tests.

So the shuffleup tests did a shuffle up with const 5,
we'd use invocation id (0..8) shuffle it down by 5,
get (-5..3), then call llvmshufflevector with that
which is totally illegal.

There might be a nicer way to fix this, but I can't see
it straight away, just bail on the fast path.

Fixes:
dEQP-VK.subgroups.shuffle.compute.subgroupshuffleup*

Cc: mesa-stable
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23484>

lavapipe: NV_device_generated_commands

this adds sufficient handling to pass the vkd3d-proton tests as well
as running cts on zink, which is gonna have to be enough since there's
no vkcts

it works by dynamically generating a vk_cmd_queue list of commands just
like the regular cmd queue would generate, with the minor change that
the final link has a nulled next pointer to correctly handle buffer copies,
where the last link would otherwise have a next pointer pointing to the
original cmd list

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23394>

lavapipe: handle index buffers with offsets for indirect draws

gallium has no mechanism for setting an offset to the index buffer,
so this requires a new buffer to be created+bound dynamically at
the specified offset in order to read the correct data

cc: mesa-stable

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23394>

lavapipe: add a zeroed buffer that can be bound in place of an index buffer

technically this is illegal in vulkan semantics, but some extensions have
their own definition of "illegal" when it comes to binding index buffers

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23394>

lavapipe: add a mapping for BDA

when passing around BDA, it's important to be able to link the pointer
back to the pipe_resource since BDA doesn't have an explicit lifetime

this mapping enables cmds to receive a BDA pointer and then map it back
to a pipe_resource in order to avoid gymnastics with dynamically creating
pipe_resource objects which may or may not be able to be freed

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23394>

lavapipe: pass list to cmdbuf exec, not cmdbuf

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23394>

radv/rt: remove now dead code

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: use priorities to select the next shader

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/debug: dump ray tracing shaders in case of a hang

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: separate shader compilation

With this patch, we compile separately
 - general shaders (raygen, miss, callable)
 - closest-hit shaders
 - traversal shader (incl. all intersection / any-hit shaders)

Each shader uses the following scheme:

  if (shader_pc == shader_va) {
     <shader code>
  }
  next = select_next_shader(shader_va)
  jump next

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

aco: adjust RT prolog for shader functions [disables RT]

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: adjust lower_rt_instructions() for shader functions [disables RT]

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: set up RT shader args for separate compilation

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv: Disable capture/replay handles

They don't work with separate compilation. Fixing this involves some
refactoring work, which will come in future MRs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: create compile_rt_prolog() function

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: don't write cache hit feedback per stage.

Too much boilerplate for no benefit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: reference library shaders during radv_rt_fill_stage_info()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: add and use specialized cache search/insert functions

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: pass radv_ray_tracing_pipeline to RT shader creation

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: replace pCreateInfo with VkPipelineCreateFlags in rt_variables

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: change RT main shader to MESA_SHADER_INTERSECTION

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: implement radv_rt_nir_to_asm()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: implement radv_nir_lower_rt_abi to lower RT shaders for separate compilation

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/shader_info: add RT stages to radv_get_user_data_0()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: extend radv_pipeline_group_handle with shader VAs

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: adjust shared_size when lowering hit_attribs

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

aco: implement select_program_rt()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

aco: implement nir_intrinsic_load_resume_shader_address_amd

Similar to p_constaddr but targeting BBs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

nir: add nir_intrinsic_resume_shader_address_amd

This intrinsic returns a pointer to the end of the shader
and is intended for stitched binaries.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

nir,amd: add nir_intrinsic_store_[scalar|vector]_arg_amd to overwrite inputs

This intrinsic must only be used at top-level CF in order
to not break SSA properties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv: add remaining RT shader args for separate compilation

Also wrap RT args into struct {} rt for improved consistency
and remove some 'ray_' prefixes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

intel/genxml: Drop Tiled Resource Mode fields

Neither RENDER_SURFACE_STATE nor VDENC_SURFACE_CONTROL_BITS have a
Tiled Resource Mode field anymore.  The RENDER_SURFACE_STATE field
was also overlapping with the L1 Cache Control settings field.

This also drops the assignment of that field in isl, because we were
just explicitly setting it to NONE (0) which is already the default
value genxml packing will give us.  That saves us some ifdefs.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23449>

iris: Assert against FCV_CCS_E for blitter writes

The FCV feature is documented to occur on regular render writes. Blitter
writes don't fall under that category. So, if the destination resource
of a blitter write had the FCV aux usage, we would have a good reason to
change the aux usage of the access to plain CCS_E.

We don't actually need to write code to handle this. iris doesn't use
any compression on blitter writes. Make that obvious with an assert.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>

iris: Avoid FCV_CCS_E for shader image accesses

The FCV feature is documented to occur on regular render writes. Images
are written to with the DC data port however.

By using plain CCS_E for image writes, we can avoid the COMPRESSED_CLEAR
aux state in more cases. Doing this can avoid full resolves or partial
resolves for future accesses.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>

iris: Avoid extra CCS_E flushes for aux mode changes

We're going to start toggling between FCV_CCS_E and CCS_E. When
switching aux modes, flush_previous_aux_mode would typically perform
cache flushes for good reason. In the case of switching between CCS_E
with FCV on vs off, we haven't found aux mode flushing to matter. Treat
both CCS_E variants as equivalent to avoid extra cache flushing.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>

intel: Rename the GFX12_CCS_E aux-usage to FCV_CCS_E

Rename the isl_aux_usage enum to clarify that it is optional on gfx125.

The new name comes from the Alchemist docs, where the feature is
referred to as "Fast Clear Optimization (FCV)".

The rename was done with this command:

   git grep -l "GFX12_CCS_E" | xargs sed -ie "s/GFX12_CCS_E/FCV_CCS_E/g"

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>

iris: Drop a GFX12_CCS_E check in can_fast_clear_color

The 8 bpp restriction isn't specific to the automatic fast clear
behavior of GFX12_CCS_E. It is applicable to both GFX12_CCS_E and CCS_E.
Drop the aux usage check completely.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>

compiler/types: Make key in subroutine_name more effective

Use the string itself as a key for searching -- and the internal
allocated name as a key when storing.

Because record_key_hash doesn't consider the name field, which is
the only used field for a SUBROUTINE type, the hash key was always
the same for all types.  Using the name fixes this.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23277>

anv: convert Wa_14010455700 to use workaround mechanism

The original lineage for 14010455700 is 1808121037.  Use this defect
number to apply the workaround to relevant platforms with the new
workaround mechanism.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23380>

iris: convert Wa_14010455700 to use workaround mechanism

The original lineage for 14010455700 is 1808121037.  Use this defect
number to apply the workaround to relevant platforms with the new
workaround mechanism.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23380>

Update OpenGL headers

Token from commit 91cdaf381d77b6e700654ecd78cb88a95c1fde1a of
OpenGL-Registry.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23144>

amd: drop support for LLVM 14

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>

amd: drop support for LLVM 13

We can remove the LLVM 13 Wave32 discard workaround and
SI_PROFILE_IGNORE_LLVM13_DISCARD_BUG that disabled the workaround.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>

amd: drop support for LLVM 12

The demote emulation can be removed, and FS_CORRECT_DERIVS_AFTER_KILL
can be removed because it's always enabled on LLVM >= 13.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>

amd: drop support for LLVM 11

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>

ac/gpu_info: rearrange if checks for dcc config

rearrange the if checks so that there is less if checks
for newer gpus.

v2: fix block comment coding guideline (Marek Olšák)
    simplify gfx9 if condition (Marek Olšák)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>

ac/gpu_info: num_cu = 4 and gfx11 enable dcc with retile

With num_cu = 4 in gfx11 measured power for idle, video playback and observed
power savings, hence enable dcc with retile for gfx11 with num_cu >= 4.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>

etnaviv: nir: do not call nir_lower_idiv(..) unconditionally

GPUs without native integers lower idiv in lower_int_to_float and
there is no need to call nir_lower_idiv(..) for such GPUs.

Fixes nir crashes I am seeing with gc2000_gles2 CI job.

Fixes: f532202f2d5 ("etnaviv: use nir_lower_idiv(..) before opt loop")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23450>

v3d,v3dv: fix viewport offset for negative viewport center

If the viewport center is not positive we can't express it
through the fine coordinates, which are unsigned, and we
need to use the coarse coordinates too.

Fixes new crashes in Vulkan CTS 1.3.6.0:
dEQP-VK.draw.renderpass.offscreen_viewport.*negative*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>

broadcom/cle: fix up viewport offset packet definition for V3D 4.1+

These are split between fine and coarse coordinates. We have only been
using fine until now, so we kept the same naming convention we had
prior to V3D 4.1 for simplicity, but we will start using the coarse
coordinates soon too.

Also, the signedness was reversed: coarse coordinates are signed and
fine coordinates are unsigned.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>

v3dv: simplify scissor setup for negative viewport height

KHR_maintenance1 allows clients to specify a negative
height, but not a negative width, so assert on that and
simplify the computations for the horizontal dimension.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>

v3dv: remove bogus viewport code

This is incorrectly undoing the code right above it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>

zink: add a ci flake

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>

zink: enable EXT_shader_object globally with have_EXT_attachment_feedback_loop_dynamic_state

this leaves fbfetch as the lone case where it can't yet be used

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>

zink: use dynamic state for feedback loops when available

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>

zink: hook up VK_EXT_attachment_feedback_loop_dynamic_state

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>

pvr: Fix PDS temps allocation on fragment stage

Previously the USC temps count was incorrectly being used for the
PDS temps count.

It was causing:
  csbgen/pvr_packet_helpers.h:79:
    __pvr_uint: Assertion `v <= max' failed.

This fixes the assert being hit on:
  dEQP-VK.ubo.random.basic_arrays.2
  dEQP-VK.ubo.random.all_shared_buffer.3
  dEQP-VK.ubo.random.all_shared_buffer.48
  dEQP-VK.ubo.random.all_out_of_order_offsets.3

This does not fully fix the tests though.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23356>

pvr: Rename temps_count to pds_temps_count

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23356>

pvr: Fix draw indirect page faults due to missing index list buffer

Fixes:
  dEQP-VK.draw.renderpass.basic_draw.draw_indirect.*
  dEQP-VK.draw.renderpass.basic_draw.draw_indexed_indirect.*

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23491>

treewide: use uint64_t / (u)intptr_t in image address calculations

16K * 16K * 16bpp = 4G, which overflows int32, so layer_stride needs to
have 64 bits. More generally, any "byte_stride * height" computation
can overflow int32.

Use (u)intptr_t in some gallium and st/mesa places where we do CPU access.
Use uint64_t otherwise.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23389>

pvr: add block compressed formats blit support

Surface dimensions and rectangle mappings need to be adjusted for
block compressed formats.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23466>

mailmap: Add Lucas Fryzek to mailmap

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23499>

ci: uprev virglrenderer and crosvm

Update to their latest version on time

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23427>

ci: Bump base tag to rebuild piglit

This has been forgotten in latest piglit uprev

Fixes: d75973a1422d86799312d7aa60d0dce846fb3dba
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23427>

radv: advertise VK_KHR_fragment_shader_barycentric on GFX10.3+

It can't be supported on older hardware because it's impossible to
determine the provoking vertex ID without LOAD_PROVOKING_VTX which is
GFX10.3+ only.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6557
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: gather info about nir_intrinsic_load_sample_positions_amd

nir_intrinsic_load_barycentric_coord_at_sample is lowered before the
radv_shader_info pass and load_sample_positions_amd might be needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: add a NIR pass that lower fragment shader barycentric intrinsics

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: configure RSRC1.LOAD_PROVOKING_VTX for the fragment shader

This enables provoking vertex info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: set ROTATE_PC_PTR for custom interpolations

This seems needed for computing stable barycentric coordinates.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: handle per_vertex variables when gathering FS inputs

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: add support for nir_intrinsic_load_rasterization_primitive_amd

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

nir: add nir_intrinsic_load_rasterization_primitive_amd

For VK_KHR_fragment_shader_barycentric, AMD needs to know the primitive
topology in the fragment shader but with fast-link GPL this is unknown
at compile time and it needs to be passed dynamically.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: track if the rasterization primitive is known at compile time

For fast-linking with GPL, we might not know the pre-rasterization
stages at compile time (when only the FS is compiled) and we will need
to load the rasterization primitive through an user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: add support for nir_intrinsic_load_provoking_vtx_amd

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

nir: add nir_intrinsic_load_provoking_vtx_amd

Will be used to load provoking vertex info from the hardware to
determine the provoking vertex ID.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

.mailmap: add an alias for Clayton Craft

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Clayton Craft <clayton@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15260>

.mailmap: add an alias for Miguel Casas-Sanchez

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15260>

pvr: Don't overwrite PDS vertex input flags

Fixes:
  dEQP-VK.draw.renderpass.simple_draw.simple_draw_triangle_list
  dEQP-VK.draw.renderpass.simple_draw.simple_draw_triangle_strip
  dEQP-VK.draw.renderpass.indexed_draw.draw_indexed_triangle_list
  dEQP-VK.draw.renderpass.indexed_draw.draw_indexed_triangle_strip

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23458>

pvr: Allow S8_UINT to be used as a stencil attachment format

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23431>

pvr: Refactor pvr_unwind_rects()

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23430>

pvr: Correct calculations in pvr_unwind_rects()

Fixes: 6d3d1f884ceadf62e332e797e994b810a0e010b0
       pvr: Fix rect splitting logic in pvr_unwind_rects()

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23430>