Roman Lebedev [Sat, 20 Nov 2021 10:55:13 +0000 (13:55 +0300)]
[NFC][X86][Costmodel] Add AVX512DQ runlines to trunc.ll/extend.ll
Roman Lebedev [Sat, 20 Nov 2021 10:09:18 +0000 (13:09 +0300)]
[NFC][X86][MCA] Add forgotten test coverage for AVX512's VPMOVM2[BWDQ] / VPMOV[BWDQ]2M
Arnab Dutta [Sat, 20 Nov 2021 06:30:49 +0000 (12:00 +0530)]
[MLIR] Avoid creation of buggy affine maps while replacing dimension and symbol
Initially before appending the newly composed dimension and symbols
to the dimension and symbol list whose size is to be passed in
AffineMap::get(), the call to the AffineMap::get() was made, resulting
in wrong dimCount and symbolCount being passed as argument. We move the
call to the AffineMap::get() after the diimension and symbol list are
updated.
Differential Revision: https://reviews.llvm.org/D114237
Craig Topper [Sat, 20 Nov 2021 03:05:10 +0000 (19:05 -0800)]
[X86] Don't combine (x86cmp (trunc (movmsk (bitcast X))), 0) if the truncate discards unknown bits.
We have transform that tries turn a pmovmskb into movmskps/pd or
movmskps to movmskpd. This transform isn't valid if the truncate
discarded bits that might be set by the original movmsk.
We could fix this by inserting an AND after the new movmsk to discard
the equivalent of the truncated bits, but I've left that for later
patch.
Fixes PR52567.
Differential Revision: https://reviews.llvm.org/D114306
Craig Topper [Sat, 20 Nov 2021 02:52:17 +0000 (18:52 -0800)]
[X86] Add test case for pr52567. NFC
Lang Hames [Sat, 20 Nov 2021 05:12:23 +0000 (21:12 -0800)]
[ORC] Make JITDylib::AsynchronousSymbolQuerySet private.
This type does not need to be public
Kazu Hirata [Sat, 20 Nov 2021 05:12:12 +0000 (21:12 -0800)]
[llvm] Use range-based for loops (NFC)
RamNalamothu [Fri, 19 Nov 2021 20:23:38 +0000 (01:53 +0530)]
[AMDGPU] Do not generate ELF symbols for the local branch target labels
The compiler was generating symbols in the final code object for local
branch target labels. This bloats the code object, slows down the loader,
and is only used to simplify disassembly.
Use '--symbolize-operands' with llvm-objdump to improve readability of the
branch target operands in disassembly.
Fixes: SWDEV-312223
Reviewed By: scott.linder
Differential Revision: https://reviews.llvm.org/D114273
Lang Hames [Sat, 20 Nov 2021 04:51:44 +0000 (20:51 -0800)]
[ORC][JITLink] Move JITDylib name into JITLinkDylib base class.
This will enable better error messages and debug logs in JITLink.
ksyx [Sat, 13 Nov 2021 20:59:43 +0000 (15:59 -0500)]
[GVN][NFC] Remove redundant check
The if-check above deleted part guarantees that StoreOffset <= LoadOffset
and that StoreOffset + StoreSize >= LoadOffset + LoadSize, and given that
LoadOffset + LoadSize > LoadOffset when LoadSize > 0. Thus, this shows
StoreOffset + StoreSize > LoadOffset is guaranteed given LoadSize > 0,
while it could be meaningless to have a type with nonpositive size, so that
the check could be removed. The values are converted to signed types to
avoid unsigned operation with negative offsets.
Part of revision D100179
Reapply commit
c35e8185d8c170c20e28956e0c9f3c1be895fefb with fixing problem
reported by mstorsjo
Nathan Lanza [Wed, 11 Aug 2021 22:55:01 +0000 (18:55 -0400)]
[hmaptool] Port to python3
This is just a few trivial changes -- change the interpreter and fix a
few byte-vs-string issues.
Differential Revision: https://reviews.llvm.org/D107944
James Nagurne [Sat, 20 Nov 2021 00:21:23 +0000 (18:21 -0600)]
[NFC] Test commit, add whitespace to end-of-line
Sam McCall [Sat, 20 Nov 2021 00:10:30 +0000 (01:10 +0100)]
[clangd] Avoid possible crash: apply configuration after binding methods
The configuration may kick off indexing, which may involve sending LSP
messages.
The crash is fiddly to reproduce in a hermetic test (we need background
indexing on without disk storage, and to handle server->client messages
in LSPClient...)
Fixes https://github.com/clangd/clangd/issues/926
Ellis Hoag [Fri, 19 Nov 2021 23:44:48 +0000 (15:44 -0800)]
[InstrProf] Use i32 for GEP index from lowering llvm.instrprof.increment
The `llvm.instrprof.increment` intrinsic uses `i32` for the index. We should use this same type for the index into the GEP instructions.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D114268
Krzysztof Drewniak [Thu, 18 Nov 2021 22:37:53 +0000 (22:37 +0000)]
[MLIR][GPU] Link in device libraries during HSA compilation if needed
To perform some operations, such as sin() or printf(), code compiled
for AMD GPUs must be linked to a series of device libraries. This
commit adds support for linking in these libraries.
However, since these device libraries are delivered as LLVM bitcode,
raising the possibility of version incompatibilities, this commit only
links in libraries when the functions from those libraries are called
by the code being compiled.
This code also sets the math flags to their most conservative values,
as MLIR doesn't have a `-ffast-math` equivalent.
Depends on D114114
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D114117
Quinn Pham [Thu, 18 Nov 2021 21:52:39 +0000 (15:52 -0600)]
[NFC][llvm] Inclusive language: remove instance of master from Thumb2SizeReduction.cpp
[NFC] As part of using inclusive language within the llvm project, this patch
replaces master with main in `Thumb2SizeReduction.cpp`.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D114196
rdzhabarov [Fri, 19 Nov 2021 21:43:17 +0000 (21:43 +0000)]
[mlir] Bug fix. Stream must outlive the pass manager.
Bug fix. Stream must outlive the pass manager.
Reviewed By: Chia-hungDuan
Differential Revision: https://reviews.llvm.org/D114277
Wei Wang [Fri, 19 Nov 2021 21:14:41 +0000 (13:14 -0800)]
[Sema] fix nondeterminism in ASTContext::getDeducedTemplateSpecializationType
`DeducedTemplateSpecializationTypes` is a `llvm::FoldingSet<DeducedTemplateSpecializationType>` [1],
where `FoldingSetNodeID` is based on the values: {`TemplateName`, `QualType`, `IsDeducedAsDependent`},
those values are also used as `DeducedTemplateSpecializationType` constructor arguments.
A `FoldingSetNodeID` created by the static `DeducedTemplateSpecializationType::Profile` may not be equal
to`FoldingSetNodeID` created by a member `DeducedTemplateSpecializationType::Profile` of an instance
created with the same {`TemplateName`, `QualType`, `IsDeducedAsDependent`}, which makes
`DeducedTemplateSpecializationTypes` lookups nondeterministic.
Specifically, while `IsDeducedAsDependent` value is passes to the constructor, `IsDependent()` method on
the created instance may return a different value, because `IsDependent` is not saved as is:
```name=clang/include/clang/AST/Type.h
DeducedTemplateSpecializationType(TemplateName Template, QualType DeducedAsType, bool IsDeducedAsDependent)
: DeducedType(DeducedTemplateSpecialization, DeducedAsType,
toTypeDependence(Template.getDependence()) | // <~ also considers `TemplateName` parameter
(IsDeducedAsDependent ? TypeDependence::DependentInstantiation : TypeDependence::None)),
```
For example, if an instance A with key `FoldingSetNodeID {A, B, false}` is inserted. Then a key
`FoldingSetNodeID {A, B, true}` is probed:
If it happens to correspond to the same bucket in `FoldingSet` as the first key, and `A.Profile()` returns
`FoldingSetNodeID {A, B, true}`, then it's a hit.
If the bucket for the second key is different from the first key, instance A is not considered at all, and it's
a no hit, even if `A.Profile()` returns `FoldingSetNodeID {A, B, true}`.
Since `TemplateName`, `QualType` parameter values involve memory pointers, the lookup result depend on allocator,
and may differ from run to run. When this is used as part of modules compilation, it may result in "module out of date"
errors, if imported modules are built on different machines.
This makes `ASTContext::getDeducedTemplateSpecializationType` consider `Template.isDependent()` similar
`DeducedTemplateSpecializationType` constructor.
Tested on a very big codebase, by running modules compilations from directories with varied path length
(seem to affect allocator seed).
1. https://llvm.org/docs/ProgrammersManual.html#llvm-adt-foldingset-h
Patch by Wei Wang and Igor Sugak!
Reviewed By: bruno
Differential Revision: https://reviews.llvm.org/D112481
Sanjay Patel [Fri, 19 Nov 2021 17:48:27 +0000 (12:48 -0500)]
[InstCombine] add/adjust tests for mask of sext i1; NFC
These are sibling transforms, but the test coverage was
uneven and incomplete.
Stefan Pintilie [Mon, 15 Nov 2021 21:26:30 +0000 (15:26 -0600)]
[PowerPC][NFC] Add a series of codegen tests for vector reductions.
This patch only adds tests for PowerPC. The purpose of these tests
is to track what code is generated for various vector reductions.
Reviewed By: nemanjai, #powerpc
Differential Revision: https://reviews.llvm.org/D113801
Louis Dionne [Fri, 19 Nov 2021 21:01:39 +0000 (16:01 -0500)]
[libc++][NFC] Add missing include in test
Becca Royal-Gordon [Fri, 19 Nov 2021 20:10:15 +0000 (12:10 -0800)]
Allow __attribute__((swift_attr)) in attribute push pragmas
This change allows SwiftAttr to be used with #pragma clang attribute push
to add Swift attributes to large regions of header files.
We plan to use this to annotate headers with concurrency information.
Patch by: Becca Royal-Gordon
Differential Revision: https://reviews.llvm.org/D112773
Krzysztof Drewniak [Thu, 18 Nov 2021 21:42:42 +0000 (21:42 +0000)]
[MLIR][GPU] Make the path to ROCm a runtime option
Our current build assumes that the path to ROCm we find at build time
will be the path at which ROCm is located when the built code is
executed. This commit adds a --rocm-path option to SerializeToHsaco,
and removes the HIP dependency that the SerializeToHsaco previously had.
Depends on D114113
(though the dependency is to ensure the diffs apply cleanly and to capture the dependency on D114107)
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D114114
Stella Laurenzo [Fri, 19 Nov 2021 20:32:21 +0000 (20:32 +0000)]
NFC: Callout restriction on folding 0-result ops in documentation.
Differential Revision: https://reviews.llvm.org/D114271
David Blaikie [Fri, 19 Nov 2021 20:31:27 +0000 (12:31 -0800)]
DWARFVerifier: Simplify name lookups
No need to use the dynamic fallback query when the name type is known
statically at the call site.
Jon Chesterfield [Fri, 19 Nov 2021 20:18:23 +0000 (20:18 +0000)]
[openmp][amdgpu][nfc] Simplify implicit args handling
Removes a +x/-x pair on the only store/load of a variable
and deletes some nearby dead code. Also reduces the size of the implicit
struct to reflect the code currently emitted by clang.
Differential Revision: https://reviews.llvm.org/D114270
Arthur O'Dwyer [Thu, 18 Nov 2021 05:07:23 +0000 (00:07 -0500)]
[libc++] Test that our algorithms never copy a user-provided comparator.
This is not mandated by the standard, so it goes in libcxx/test/libcxx/.
It's certainly arguable that the algorithms changed here
(`is_heap`, `is_sorted`, `min`, `max`) are harmless and we should
just let them copy their comparators once. But at the same time,
it's nice to have all our algorithms be 100% consistent and never
copy a comparator, not even once.
Differential Revision: https://reviews.llvm.org/D114136
Zarko Todorovski [Fri, 19 Nov 2021 19:50:09 +0000 (14:50 -0500)]
[clang][NFC] Inclusive terms: replace some uses of sanity in clang
Rewording of comments to avoid using `sanity test, sanity check`.
Reviewed By: aaron.ballman, Quuxplusone
Differential Revision: https://reviews.llvm.org/D114025
Louis Dionne [Fri, 19 Nov 2021 14:52:28 +0000 (09:52 -0500)]
[libc++] Fix feature test macro for __cpp_lib_to_chars
We would have been defining it in <utility> instead of <charconv>. For
the time being, this doesn't change anything since we don't implement
the feature test macro anyways.
Also, as a fly-by, this removes obsolete feature test macro tests. There
was a brief time back in the days when we wrote feature test macro tests
manually. In particular, we had test files for __cpp_lib_to_chars and
__cpp_lib_memory_resource. Since we now have a principled way of generating
these tests with scripts, this commit removes the obsolete (and empty)
tests for these two feature test macros.
Differential Revision: https://reviews.llvm.org/D114243
Louis Dionne [Fri, 19 Nov 2021 14:50:05 +0000 (09:50 -0500)]
[libc++] Fix some tests that were broken in the single-threaded configuration
We never noticed it because our CI doesn't actually build against a C
library that doesn't have threading functionality, however building
against a truly thread-free platform surfaces these issues.
Differential Revision: https://reviews.llvm.org/D114242
Louis Dionne [Fri, 19 Nov 2021 14:55:45 +0000 (09:55 -0500)]
[libc++] Avoid potential truncation warnings in std::abs test
One some platforms, -Wimplicit-int-conversion is enabled by default,
which can lead to additional warnings being triggered in this test.
Since we're only trying to test errors related to calling abs(), the
assignment is superfluous.
As a fly-by fix, correct one instance of ::abs to std::abs and made
the test a .verify.cpp test instead.
Differential Revision: https://reviews.llvm.org/D114244
Krzysztof Drewniak [Thu, 18 Nov 2021 21:45:27 +0000 (21:45 +0000)]
[MLIR][GPU] Run generic LLVM optimizations when serializing (on AMD)
- Adds hooks that allow SerializeTo* passes to arbitrarily transform
the produced LLVM Module before it is passed to the code generation
passes.
- Uses these hooks within the SerializeToHsaco pass in order to run
LLVM optimizations and to set the optimization level on the
TargetMachine.
- Adds an optLevel parameter to SerializeToHsaco
Future work may include moving much of what's been added to
SerializeToHsaco to SerializeToBlob, but that would require
confirmation from the NVVM backend maintainers that it would be
appropriate to do so.
Depends on D114107
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D114113
Thomas Raoux [Fri, 19 Nov 2021 19:03:10 +0000 (11:03 -0800)]
[mlir][gpu] Extend shuffle op modes and add nvvm lowering
Add up, down and idx modes to gpu shuffle ops, also change the mode from
string to enum
Differential Revision: https://reviews.llvm.org/D114188
Jay Foad [Fri, 19 Nov 2021 13:48:23 +0000 (13:48 +0000)]
[AMDGPU] Add an implicit use of M0 to all V_MOV_B32_indirect_read/write
NFCI. Previously the implicit use was added to V_MOV_B32_indirect_read
when building the instruction. V_MOV_B32_indirect_write didn't have an
implicit use of M0 at all, but apparently it did not cause any problems.
Differential Revision: https://reviews.llvm.org/D114239
Fangrui Song [Fri, 19 Nov 2021 18:50:53 +0000 (10:50 -0800)]
[ELF] Support discarding .got.plt
Fix a null pointer dereference when .got.plt is discarded.
This also adds a test for discarding `.plt`.
Reviewed By: ikudrin
Differential Revision: https://reviews.llvm.org/D114180
Jon Chesterfield [Fri, 19 Nov 2021 18:40:24 +0000 (18:40 +0000)]
[openmp][amdgpu][nfc] Inline interop_hsa_get_kernel_info into only caller
Thomas Raoux [Fri, 19 Nov 2021 18:31:52 +0000 (10:31 -0800)]
[mlir][vector] NFC, move some vector patterns in a separate file
Move patterns related to dropping lead unit dim into their own file.
Differential Revision: https://reviews.llvm.org/D114265
Thomas Raoux [Fri, 19 Nov 2021 00:09:49 +0000 (16:09 -0800)]
[mlir][vector] Remove usage of shapecast to remove unit dim
Instead of using shape_cast op in the pattern removing leading unit
dimensions we use extract/broadcast ops. This is part of the effort to
restrict ShapeCastOp fuirther in the future and only allow them to
convert to or from 1D vector.
This also adds extra canonicalization to fill the gaps in simplifying
broadcast/extract ops.
Differential Revision: https://reviews.llvm.org/D114205
Mingming Liu [Fri, 19 Nov 2021 18:16:11 +0000 (18:16 +0000)]
[SROA] Add new test cases to cover existing SROA behavior that structs will be scalarized.
Add an IR in unit test directory, which demonstrate the scalarization for struct allocations.
This is added to pave the way for an SROA change to skip scalarization for some cases.
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D114128
Fabian Wolff [Fri, 19 Nov 2021 17:46:17 +0000 (17:46 +0000)]
[DSE] Improve handling of `strncpy` in Dead Store Elimination
Fixes PR#52062 and one of the remaining cases of PR#47644.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D114035
Balazs Benics [Fri, 19 Nov 2021 17:36:55 +0000 (18:36 +0100)]
[analyzer][NFC] MaybeUInt -> MaybeCount
I forgot to include this in D113594
Differential Revision: https://reviews.llvm.org/D113594
Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] Use enum for CallDescription flags
Yeah, let's prefer a slightly stronger type representing this.
Reviewed By: martong, xazax.hun
Differential Revision: https://reviews.llvm.org/D113595
Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] Consolidate the inner representation of CallDescriptions
`CallDescriptions` have a `RequiredArgs` and `RequiredParams` members,
but they are of different types, `unsigned` and `size_t` respectively.
In the patch I use only `unsigned` for both, that should be large enough
anyway.
I also introduce the `MaybeUInt` type alias for `Optional<unsigned>`.
Additionally, I also avoid the use of the //smart// less-than operator.
template <typename T>
constexpr bool operator<=(const Optional<T> &X, const T &Y);
Which would check if the optional **has** a value and compare the data
only after. I found it surprising, thus I think we are better off
without it.
Reviewed By: martong, xazax.hun
Differential Revision: https://reviews.llvm.org/D113594
Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] CallDescription should own the qualified name parts
Previously, CallDescription simply referred to the qualified name parts
by `const char*` pointers.
In the future we might want to dynamically load and populate
`CallDescriptionMaps`, hence we will need the `CallDescriptions` to
actually **own** their qualified name parts.
Reviewed By: martong, xazax.hun
Differential Revision: https://reviews.llvm.org/D113593
Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] Demonstrate the use of CallDescriptionSet
Reviewed By: martong, xazax.hun
Differential Revision: https://reviews.llvm.org/D113592
Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] Switch to using CallDescription::matches() instead of isCalled()
This patch replaces each use of the previous API with the new one.
In variadic cases, it will use the ADL `matchesAny(Call, CDs...)`
variadic function.
Also simplifies some code involving such operations.
Reviewed By: martong, xazax.hun
Differential Revision: https://reviews.llvm.org/D113591
Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] Introduce CallDescription::matches() in addition to isCalled()
This patch introduces `CallDescription::matches()` member function,
accepting a `CallEvent`.
Semantically, `Call.isCalled(CD)` is the same as `CD.matches(Call)`.
The patch also introduces the `matchesAny()` variadic free function template.
It accepts a `CallEvent` and at least one `CallDescription` to match
against.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D113590
Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] Introduce CallDescriptionSets
Sometimes we only want to decide if some function is called, and we
don't care which of the set.
This `CallDescriptionSet` will have the same behavior, except
instead of `lookup()` returning a pointer to the mapped value,
the `contains()` returns `bool`.
Internally, it uses the `CallDescriptionMap<bool>` for implementing the
behavior. It is preferred, to reuse the generic
`CallDescriptionMap::lookup()` logic, instead of duplicating it.
The generic version might be improved by implementing a hash lookup or
something along those lines.
Reviewed By: martong, Szelethus
Differential Revision: https://reviews.llvm.org/D113589
Florian Hahn [Fri, 19 Nov 2021 17:17:03 +0000 (17:17 +0000)]
[LV] Remove obsolete comment about creating a dummy block (NFC)
No dummy pre-entry block is created since
a6c4969f5f45. The comment is
stale now and can be removed.
Mentioned by @Ayal in D113182.
Krzysztof Drewniak [Thu, 18 Nov 2021 20:21:33 +0000 (20:21 +0000)]
[MLIR] Make the ROCM integration tests runnable
- Move the #define s to the GPU Transform library from GPU Ops so that
SerializeToHsaco is non-trivially compiled
- Add required includes to SerializeToHsaco
- Move MCSubtargetInfo creation to the correct point in the
compilation process
- Change mlir in ROCM tests to account for renamed/moved ops
Differential Revision: https://reviews.llvm.org/D114184
Adrian Prantl [Fri, 19 Nov 2021 17:05:38 +0000 (09:05 -0800)]
Skip tests when compiler with older versions of clang
Siva Chandra Reddy [Fri, 19 Nov 2021 07:32:58 +0000 (07:32 +0000)]
[libc][Obvious][NFC] A bunch of cosmetic cleanup.
* Added missing header guards.
* Fixed license header format in a few files.
* Renamed files to more suitable names.
Pavel Labath [Thu, 18 Nov 2021 12:56:36 +0000 (13:56 +0100)]
[lldb/test] Add ability to terminate connection from a gdb-client handler
We were using the client socket close as a way to terminate the handler
thread. But this kind of concurrent access to the same socket is not
safe. It also complicates running the handler without a dedicated thread
(next patch).
Instead, here I add an explicit way for a packet handler to request
termination. Waiting for lldb to terminate the connection would almost
be sufficient, but in the pty test we want to keep the pty open so we
can examine its state. Ability to disconnect at an arbitrary point may
be useful for testing other aspects of lldb functionality as well.
The way this works is that now each packet handler can optionally return
a list of responses (instead of just one). One of those responses (it
only makes sense for it to be the last one) can be a special
RESPONSE_DISCONNECT object, which triggers a disconnection (via a new
TerminateConnectionException).
As the mock server now cleans up the connection whenever it disconnects,
the pty test needs to explicitly dup(2) the descriptors in order to
inspect the post-disconnect state.
Differential Revision: https://reviews.llvm.org/D114156
Philip Reames [Fri, 19 Nov 2021 16:40:24 +0000 (08:40 -0800)]
[SCEV] Revert two speculative compile time optimizations which made no difference
Revert "[SCEV] Defer all work from
ea12c2cb as late as possible"
Revert "[SCEV] Defer loop property checks from
ea12c2cb as late as possible"
This reverts commit
734abbad79dbcbd0e880510fbab1ef0e701cfc7b and
1a5666acb281c7510504e726ba481d09ab5f5b95.
Both of these changes were speculative attempts to address a compile time regression. Neither worked, and both complicated the code in undesirable ways.
Philipp Tomsich [Fri, 19 Nov 2021 03:13:46 +0000 (19:13 -0800)]
[RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk
On RISC-V, icmp is not sunk (as the following snippet shows) which
generates the following suboptimal branch pattern:
```
core_list_find:
lh a2, 2(a1)
seqz a3, a0 <<
bltz a2, .LBB0_5
bnez a3, .LBB0_9 << should sink the seqz
[...]
j .LBB0_9
.LBB0_5:
bnez a3, .LBB0_9 << should sink the seqz
lh a1, 0(a1)
[...]
```
due to an icmp not being sunk.
The blocks after `codegenprepare` look as follows:
```
define dso_local %struct.list_head_s* @core_list_find(%struct.list_head_s* readonly %list, %struct.list_data_s* nocapture readonly %info) local_unnamed_addr #0 {
entry:
%idx = getelementptr inbounds %struct.list_data_s, %struct.list_data_s* %info, i64 0, i32 1
%0 = load i16, i16* %idx, align 2, !tbaa !4
%cmp = icmp sgt i16 %0, -1
%tobool.not37 = icmp eq %struct.list_head_s* %list, null
br i1 %cmp, label %while.cond.preheader, label %while.cond9.preheader
while.cond9.preheader: ; preds = %entry
br i1 %tobool.not37, label %return, label %land.rhs11.lr.ph
```
where the `%tobool.not37` is the result of the icmp that is not sunk.
Note that it is computed in the basic-block up until what becomes the
`bltz` instruction and the `bnez` is a basic-block of its own.
Compare this to what happens on AArch64 (where the icmp is correctly sunk):
```
define dso_local %struct.list_head_s* @core_list_find(%struct.list_head_s* readonly %list, %struct.list_data_s* nocapture readonly %info) local_unnamed_addr #0 {
entry:
%idx = getelementptr inbounds %struct.list_data_s, %struct.list_data_s* %info, i64 0, i32 1
%0 = load i16, i16* %idx, align 2, !tbaa !6
%cmp = icmp sgt i16 %0, -1
br i1 %cmp, label %while.cond.preheader, label %while.cond9.preheader
while.cond9.preheader: ; preds = %entry
%1 = icmp eq %struct.list_head_s* %list, null
br i1 %1, label %return, label %land.rhs11.lr.ph
```
This is caused by sinkCmpExpression() being skipped, if multiple
condition registers are supported.
Given that the check for multiple condition registers affect only
sinkCmpExpression() and shouldNormalizeToSelectSequence(), this change
adjusts the RISC-V target as follows:
* we no longer signal multiple condition registers (thus changing
the behaviour of sinkCmpExpression() back to sinking the icmp)
* we override shouldNormalizeToSelectSequence() to let always select
the preferred normalisation strategy for our backend
With both changes, the test results remain unchanged. Note that without
the target-specific override to shouldNormalizeToSelectSequence(), there
is worse code (more branches) generated for select-and.ll and select-or.ll.
The original test case changes as expected:
```
core_list_find:
lh a2, 2(a1)
bltz a2, .LBB0_5
beqz a0, .LBB0_9 <<
[...]
j .LBB0_9
.LBB0_5:
beqz a0, .LBB0_9 <<
lh a1, 0(a1)
[...]
```
Differential Revision: https://reviews.llvm.org/D98932
Craig Topper [Fri, 19 Nov 2021 06:15:09 +0000 (22:15 -0800)]
[RISCV] Pre-commit test for D98932. NFC
Victor Huang [Fri, 19 Nov 2021 16:10:19 +0000 (10:10 -0600)]
[PowerPC] Add a flag for conditional trap optimization
This patch adds a flag to enable/disable conditional trap optimization.
Optimization disabled by default.
Peer reviewed by: nemanjai
Fabian Wolff [Fri, 19 Nov 2021 16:01:36 +0000 (16:01 +0000)]
[DSE] Add additional strncpy tests.
Test for PR#52062 and one of the remaining cases of PR#47644.
Quinn Pham [Thu, 18 Nov 2021 21:10:49 +0000 (15:10 -0600)]
[NFC][llvm] Inclusive language: remove instance of master in IntrinsicsNVVM.td
[NFC] As part of using inclusive language within the llvm project, this patch
replaces master with main in `IntrinsicsNVVM.td`.
Reviewed By: steffenlarsen
Differential Revision: https://reviews.llvm.org/D114193
Mark de Wever [Fri, 19 Nov 2021 15:38:35 +0000 (16:38 +0100)]
[libc++][nfc] Move functions to a generic place.
This allows the floating-point formatter to use the same functions as
the integral formatter. This was tested in D114001.
Mark de Wever [Sat, 23 Oct 2021 16:28:31 +0000 (18:28 +0200)]
[libc++] Adds (to|from)_chars_result operator==.
Implements part of P1614 The Mothership has Landed.
Reviewed By: #libc, Quuxplusone, Mordante
Differential Revision: https://reviews.llvm.org/D112366
Ben Langmuir [Fri, 19 Nov 2021 00:47:16 +0000 (16:47 -0800)]
[ORC] Fix materialization of weak local symbols
We were adding all defined weak symbols to the materialization
responsibility, but local symbols will not be in the symbol table, so it
failed to materialize due to the "missing" symbol.
Local weak symbols come up in practice when using `ld -r` with a hidden
weak symbol.
rdar://
85574696
Matt Morehouse [Fri, 19 Nov 2021 14:12:51 +0000 (06:12 -0800)]
[X86] Selective relocation relaxation for +tagged-globals
For tagged-globals, we only need to disable relaxation for globals that
we actually tag. With this patch function pointer relocations, which
we do not instrument, can be relaxed.
This patch also makes tagged-globals work properly with LTO, as
-Wa,-mrelax-relocations=no doesn't work with LTO.
Reviewed By: pcc
Differential Revision: https://reviews.llvm.org/D113220
Alexey Bataev [Thu, 18 Nov 2021 21:02:43 +0000 (13:02 -0800)]
[SLP][NFC]Introduce TreeEntry::getVectorFactor member function, NFC.
Added TreeEntry::getVectorFactor to get the final vectotization factor
to simplify the code.
Differential Revision: https://reviews.llvm.org/D114190
Alexey Bataev [Fri, 19 Nov 2021 13:59:40 +0000 (05:59 -0800)]
[OpenMP] support depend clause for taskwait directive, by Deepak
Eachempati.
This patch adds clang (parsing, sema, serialization, codegen) support for the 'depend' clause on the 'taskwait' directive.
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D113540
Nico Weber [Thu, 18 Nov 2021 16:38:52 +0000 (11:38 -0500)]
[asm] Allow block address operands in `asm inteldialect`
This makes the following program build with -masm=intel:
int foo(int count) {
asm goto ("dec %0; jb %l[stop]" : "+r" (count) : : : stop);
return count;
stop:
return 0;
}
It's also is another step towards merging EmitGCCInlineAsmStr() and
EmitMSInlineAsmStr().
Differential Revision: https://reviews.llvm.org/D114167
Nico Weber [Thu, 18 Nov 2021 21:59:21 +0000 (16:59 -0500)]
[lld/mac] Crash even less on undefined symbols with --icf=all
Follow-up to https://reviews.llvm.org/D112643. Even after that change, we were
still asserting if two separate functions that are eligible for ICF (same size,
same data, same number of relocs, same reloc types, ...) referred to
Undefineds. This fixes that oversight.
Differential Revision: https://reviews.llvm.org/D114195
Nico Weber [Fri, 19 Nov 2021 03:50:42 +0000 (22:50 -0500)]
[asm] Remove explicit branch for modifier 'l'
No intended behavior change.
EmitGCCInlineAsmStr() used to explicitly check for modifier 'l'
after handling block address and machine basic block operands.
This prevented passing a MachineOperand with 'l' modifier to
PrintAsmMemoryOperand(). Conceptually that seems kind of nice,
but in practice the overrides of PrintAsmMemoryOperand() in all (*)
AsmPrinter subclasses already reject modifiers they don't know about,
and none of them don't know about 'l'. So removing this doesn't have
a behavior difference, is less code, and it makes EmitGCCInlineAsmStr()
and EmitMSInlineAsmStr() more similar, to prepare for merging them later.
(Why not _add_ the branch to EmitMSInlineAsmStr() instead? Because that
always works with X86AsmPrinter I think, and
X86AsmPrinter::PrintAsmMemoryOperand() very decisively rejects the 'l'
modifier, so it's hard to motivate adding that branch.)
*: The one exception was AVRAsmPrinter, which had an llvm_unreachable instead
of returning true. So this commit changes that, so that the AVR target keeps
emitting an error instead of crashing when passing a mem operand with a :l
modifier to it. All the other targets already don't crash on this.
Differential Revision: https://reviews.llvm.org/D114216
Zahira Ammarguellat [Wed, 17 Nov 2021 16:53:36 +0000 (11:53 -0500)]
The _Float16 type is supported on x86 systems with SSE2 enabled.
Operations are emulated by software emulation and “float” instructions.
This patch is allowing the support of _Float16 type without the use of
-max512fp16 flag. The final goal being, perform _Float16 emulation for
all arithmetic expressions.
Manuel Klimek [Fri, 19 Nov 2021 13:11:53 +0000 (14:11 +0100)]
Make clang-format fuzz through Lexing with asserts enabled.
Makes clang-format bail out if an in-memory source file with an
unsupported BOM is handed in instead of creating source locations that
are violating clang's assumptions.
In the future, we should add support to better transport error messages
like this through clang-format instead of printing to stderr and not
creating any changes.
Jay Foad [Fri, 19 Nov 2021 10:32:35 +0000 (10:32 +0000)]
[AMDGPU] Use new opcode for indexed vgpr reads
Introduce V_MOV_B32_indirect_read for indexed vgpr reads
(and rename the old V_MOV_B32_indirect to
V_MOV_B32_indirect_write) so they can be unambiguously
distinguished from regular V_MOV_B32_e32. Previously they
were distinguished by looking for extra implicit operands
but this is fragile because regular moves sometimes have
extra implicit operands too:
- either by accident, when instructions end up with
duplicate implicit operands (see e.g. D100939)
- or by design, when SIInstrInfo::copyPhysReg breaks a
multi-dword copy into individual subreg mov instructions
and adds implicit operands for the super-register.
The effect of this is that SIInstrInfo::isFoldableCopy can
be simplified and identifies more foldable copies. The test
diffs show that more immediate 0 values have been folded as
inline operands.
SIInstrInfo::isReallyTriviallyReMaterializable could
probably be simplified too but that is not part of this
patch.
Differential Revision: https://reviews.llvm.org/D114230
Roman Lebedev [Fri, 19 Nov 2021 12:55:31 +0000 (15:55 +0300)]
[X86][Costmodel] `getReplicationShuffleCost()`: promote 1 bit-wide elements to 8 bit when have AVX512BW+AVX512VBMI
If in addition to AVX512BW (that provides `{k}<->{i8,i16}` casts and i16 shuffles),
we have AVX512VBMI, which provides i8 shuffles, we are in an optimal situation.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D114071
Roman Lebedev [Fri, 19 Nov 2021 12:55:21 +0000 (15:55 +0300)]
[X86][Costmodel] `trunc v16i8 to v8i1` can appear after legalization, cost is same as for `trunc v8i8 to v8i1`
Note that there are many other missing costs, i'm *only* adding the ones that are queried
from `getReplicationShuffleCost()` for the existing (quite exhaustive) test coverage.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D114070
Roman Lebedev [Fri, 19 Nov 2021 12:55:07 +0000 (15:55 +0300)]
[X86][Costmodel] `getReplicationShuffleCost()`: promote 1 bit-wide elements to 16 bit when have AVX512BW
Here we get pretty lucky. AVX512F does not provide any instructions
to convert between a `k` vector mask and a vector,
but AVX512BW adds `{k}<->nX{i8,i16}`conversions,
and just as it happens, with AVX512BW we have a i16 shuffle.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D113915
Fraser Cormack [Fri, 19 Nov 2021 12:06:54 +0000 (12:06 +0000)]
[LangRef][VP] Correct operands' types in vp.select documentation
The types of llvm.vp.select's operands much match the return type.
Simon Pilgrim [Fri, 19 Nov 2021 11:48:49 +0000 (11:48 +0000)]
[X86] LowerRotate - recognise hidden ROTR patterns for better vXi8 codegen
Check for a hidden ISD::ROTR (rotl(sub(0,x))) - vXi8 lowering can handle both (its always beneficial for splats, but otherwise only if we have VPTERNLOG).
We currently hit infinite loops in TargetLowering::expandROT if we set ISD::ROTR to custom, which needs addressing before we extend this much further.
Andrew Ng [Wed, 17 Nov 2021 17:15:20 +0000 (17:15 +0000)]
[ELF] Ensure output section is not discarded in addStartEndSymbols()
Fixes https://bugs.llvm.org/show_bug.cgi?id=52534.
Differential Revision: https://reviews.llvm.org/D114179
Simon Pilgrim [Fri, 19 Nov 2021 10:37:54 +0000 (10:37 +0000)]
[DAG] MatchRotate - support rotate-by-constant of illegal types
Patch to fix some of the regressions in D77804.
By folding to rotate/funnel-shift by constant amounts for illegal types, we prevent SimplifyDemandedBits from destroying the patterns prematurely, allowing us to use the rotate/funnel-shift legalization that was added in D112443.
Differential Revision: https://reviews.llvm.org/D113192
Balazs Benics [Fri, 19 Nov 2021 10:59:46 +0000 (11:59 +0100)]
[analyzer][docs] Ellaborate the docs of cplusplus.StringChecker
Let's describe accurately what the users can expect from the checker in
a direct way.
Also, add an example warning message.
Reviewed By: martong, Szelethus
Differential Revision: https://reviews.llvm.org/D113401
Valentin Clement [Fri, 19 Nov 2021 10:33:57 +0000 (11:33 +0100)]
[fir] Add fir.no_reassoc conversion
Currently `fir.no_reassoc` is just removed in the conversion.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D114154
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Balazs Benics [Fri, 19 Nov 2021 10:31:01 +0000 (11:31 +0100)]
[ASTImporter][NFC] Dump decl name at assertion violation
Sometimes it would be useful to see which Decl kind caused some issue,
along with the name of the concrete instance of the Decl in the source
code.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D113668
Konstantin Schwarz [Thu, 18 Nov 2021 14:21:21 +0000 (15:21 +0100)]
[ELF] Expand LMA region if output section alignment introduces padding
When aligning the start address of an output section introduces a gap between the current dot pointer
and the new aligned address, we were already properly expanding the memory region, if available.
D74286 introduced a new behavior to also align the LMA address if an LMA region is specified.
However, this did not expand the corresponding LMA region.
Now, we also expand the LMA region if it is set.
This fixes PR52510.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D114166
Fabian Wolff [Fri, 19 Nov 2021 09:22:07 +0000 (22:22 +1300)]
[clang-tidy] Fix false positive in readability-identifier-naming check involving override attribute
Overriding methods should not get a readability-identifier-naming
warning because the issue can only be fixed in the base class; but the
current check for whether a method is overriding does not take the
override attribute into account.
Differential Revision: https://reviews.llvm.org/D113830
Diana Picus [Wed, 17 Nov 2021 10:29:42 +0000 (10:29 +0000)]
[flang] Fix printing of constc and parsing of #fir.real
Printing and parsing of constc didn't agree with each other. This patch
treats the parsing of constc as the final word and fixes the printing
accordingly.
More concretely, this patch prints the RealAttrs that make up the
ConstcOp directly instead of casting to mlir::FloatAttr (which blows
up). It also fixes parseFirRealAttr to invoke APFloat's method for
getting the size of a floating point type instead of computing it as
8 * kind (which blows up for BFloat, with kind == 3 and size == 16).
Kudos to Kiran Chandramohan <kiran.chandramohan@arm.com> for noticing
that we were missing tests for constc in fir-ops.fir.
Differential Revision: https://reviews.llvm.org/D114081
Matt Beardsley [Fri, 19 Nov 2021 09:19:05 +0000 (10:19 +0100)]
[clang-tidy] fix debug-only test failure
The clang-tidy/infrastructure/pr37091.cpp test inherits the top-level .clang-tidy configuration because it doesn't specify its own checks. It'd be a more stable test if it operates independently of the top-level .clang-tidy settings.
I've made the clang-tidy/infrastructure/pr37091.cpp test independent of the top-level .clang-tidy (picked an arbitrary check that I saw another clang-tidy/infrastructure test was also using: clang-tidy/infrastructure/temporaries.cpp)
Reviewed By: kbobyrev
Differential Revision: https://reviews.llvm.org/D114034
Valentin Clement [Fri, 19 Nov 2021 08:24:11 +0000 (09:24 +0100)]
[mlir] Expose region utils functions
As discussed in D109579, this patch exposes `runRegionDCE` and
`eraseUnreachableBlocks` so they can be used as separate utilities in
other passes.
Reviewed By: rriddle, mehdi_amini
Differential Revision: https://reviews.llvm.org/D114160
Yonghong Song [Fri, 19 Nov 2021 03:02:11 +0000 (19:02 -0800)]
BPF: Workaround InstCombine trunc+icmp => mask+icmp Optimization
Patch [1] added further InstCombine trunc+icmp => mask+icmp
optimization and this caused a couple of bpf selftest failure.
Previous llvm BPF backend patch [2] introduced llvm.bpf.compare
builtin to handle such situations.
This patch further added support ">" and ">=" icmp opcodes.
Tested with bpf selftests and all tests are passed including two
previously failed ones.
Note Patch [1] also added optimization if the to-be-compared
constant is negative-power-of-2 (-C) or not-of-power-of-2 (~C).
This patch didn't implement these two cases as typical bpf
program compares a scalar to a positive length or boundary value,
and this scalar later is used as a index into an array buffer
or packet buffer.
[1] https://reviews.llvm.org/D112634
[2] https://reviews.llvm.org/D112938
Differential Revision: https://reviews.llvm.org/D114215
Kent Ross [Fri, 19 Nov 2021 04:15:16 +0000 (20:15 -0800)]
[libc++][doc] Mark project for [cmp.concept] done
Mark [cmp.concept] implementation as completed in our documentation.
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D114203
Serguei Katkov [Tue, 5 Oct 2021 06:28:23 +0000 (13:28 +0700)]
[AARCH64] Teach AArch64FrameLowering::getFrameIndexReferencePreferSP really prefer SP.
Do more efforts to use sp if it is possible to lower a frame index.
Reviewers: reames, loicottet, ostannard, t.p.northover
Reviewed By: reames
Subscribers: arphaman, danilaml, hiraditya, kristof.beyls, llvm-commits, Matt, yrouban
Differential Revision: https://reviews.llvm.org/D111133
Vitaly Buka [Fri, 19 Nov 2021 03:37:39 +0000 (19:37 -0800)]
[NFC][sanitizer] Fix naming in StackStore
Vitaly Buka [Thu, 18 Nov 2021 22:11:54 +0000 (14:11 -0800)]
[NFC][sanitizer] constexpr StackStore::StackStore()
Vitaly Buka [Mon, 15 Nov 2021 23:18:53 +0000 (15:18 -0800)]
[NFC][sanitizer] Change StackStore API to use StackTrace
Vitaly Buka [Mon, 15 Nov 2021 21:31:45 +0000 (13:31 -0800)]
[NFC][sanitizer] Move inline implementation of StackStore into cpp
Vitaly Buka [Mon, 15 Nov 2021 06:53:29 +0000 (22:53 -0800)]
[NFC][sanitizer] Rename PersistentAllocator to StackStore
Vitaly Buka [Mon, 15 Nov 2021 06:47:13 +0000 (22:47 -0800)]
[nfc][dfsan] Remove obsolete comment
Vitaly Buka [Mon, 15 Nov 2021 06:37:52 +0000 (22:37 -0800)]
[NFC][sanitizer] Rename persistent_allocator to stack_store
Matheus Izvekov [Fri, 19 Nov 2021 00:17:40 +0000 (01:17 +0100)]
[clang] fix regression deducing pack expansion arguments introduced by D110216
This test case had been missing when the original code
was introduced by
2fcb863b2b278.
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Differential Revision: https://reviews.llvm.org/D114207
Senran Zhang [Thu, 18 Nov 2021 01:23:05 +0000 (09:23 +0800)]
[NFC][OpaquePtr][Evaluator] Remove call to PointerType::getElementType
There are still another 2 uses of PointerType::getElementType in
Evaluator when evaluating BitCast's on pointers. BitCast's on pointers
should be removed when opaque ptr is ready, so I just keep them as is.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D114131
Vitaly Buka [Mon, 15 Nov 2021 06:36:00 +0000 (22:36 -0800)]
[msan] Clang-format the test
Manoj Gupta [Tue, 19 Oct 2021 19:53:51 +0000 (12:53 -0700)]
libfuzzer: All building libfuzzer for ARM32
We need libfuzzer libraries on Arm32 so that we can fuzz
Arm32 binaries on Linux (Chrome OS). Android already
allows Arm32 for libfuzzer.
Reviewed By: morehouse
Differential Revision: https://reviews.llvm.org/D112091