LemonBoy [Sat, 1 May 2021 10:09:14 +0000 (12:09 +0200)]
[NFC][ARM] Regenerate arm64-atomic.ll test
Pre-requisite for D101163, the NOLSE-0O case shows registers being
spilled inside the rmw loop.
Nikita Popov [Sat, 1 May 2021 09:47:07 +0000 (11:47 +0200)]
[InstCombine] Add eq-of-parts tests using or (NFC)
or-ne is the conjugated pattern for and-eq.
Vitaly Buka [Sat, 1 May 2021 08:55:21 +0000 (01:55 -0700)]
[scudo][NFC] Fix clang-tidy warnings
Vitaly Buka [Thu, 29 Apr 2021 08:19:51 +0000 (01:19 -0700)]
[scudo] Use require_constant_initialization
Attribute guaranties safe static initialization of globals.
Reviewed By: hctim
Differential Revision: https://reviews.llvm.org/D101514
Martin Storsjö [Fri, 30 Apr 2021 10:57:37 +0000 (13:57 +0300)]
[libcxx] Reenable ranges for clang-cl
This reverts
a224bf8ec423b42eea251407e7a6cc8398a5edf4 and fixes the
underlying issue.
The underlying issue is simply that MSVC headers contains a define
like "#define __in", where __in is one macro in the MSVC Source
Code Annotation Language, defined in sal.h
Just use a different variable name than "__in"
__indirectly_readable_impl, and add "__in" to nasty_macros.h just
like the existing __out. (Also adding a couple more potentially
conflicting ones.)
Differential Revision: https://reviews.llvm.org/D101613
Nathan James [Sat, 1 May 2021 07:53:29 +0000 (08:53 +0100)]
[clang-tidy][NFC] Remove redudnant expr and qualType matchers from bugprone-sizeof-expression.
Martin Storsjö [Fri, 26 Feb 2021 14:34:29 +0000 (16:34 +0200)]
[libcxx] [test] Skip alloc counter checks for operations within the libc++ DLL
If libc++ is built as a DLL, calls to operator new within the DLL aren't
overridden if a user provides their own operator in calling code.
Therefore, the alloc counter doesn't pick up on allocations done within
std::string, so skip that check if running on windows. (Technically,
we could keep the checks if running on windows when not built as a DLL,
but trying to keep the conditionals simple.)
Differential Revision: https://reviews.llvm.org/D100219
Nathan Chancellor [Sat, 1 May 2021 03:23:21 +0000 (20:23 -0700)]
Revert "Re-reapply "[DebugInfo] Use variadic debug values to salvage BinOps and GEP instrs with non-const operands""
This reverts commit
791930d74087b8ae8901172861a0fd21a211e436, as per
https://llvm.org/docs/DeveloperPolicy.html#patch-reversion-policy.
I observed breakage with the Linux kernel, as reported at
https://reviews.llvm.org/D91722#2724321
Fixes exist at
https://reviews.llvm.org/D101523
https://reviews.llvm.org/D101540
but they have not landed so to unbreak the tree for the weekend, revert
this commit.
Commit
b11e4c990771 ("Revert "[DebugInfo] Drop DBG_VALUE_LISTs with an
excessive number of debug operands"") only reverted one follow-up fix,
not the original patch that broke the kernel.
e
Arthur O'Dwyer [Wed, 21 Apr 2021 02:08:00 +0000 (22:08 -0400)]
[libc++] [LIBCXX-DEBUG-FIXME] <span>, like <string_view>, has no use for debug iterators.
A span has no idea what container (if any) "owns" its iterators, nor
under what circumstances they might become invalidated.
However, continue to use `__wrap_iter<T*>` instead of raw `T*` outside
of debug mode, because we've been shipping `std::span` since Clang 7
and ldionne doesn't want to break ABI. (Namely, the mangling of functions
taking `span::iterator` as a parameter.) Permit using raw `T*` there,
but only under an ABI macro: `_LIBCPP_ABI_SPAN_POINTER_ITERATORS`.
Differential Revision: https://reviews.llvm.org/D101003
Aart Bik [Sat, 1 May 2021 01:07:28 +0000 (18:07 -0700)]
[mlir][sparse] sparse tensor type encoding migration (new home, new builders)
(1) migrates the encoding from TensorDialect into the new SparseTensorDialect
(2) replaces dictionary-based storage and builders with struct-like data
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D101669
Alex Lorenz [Sat, 1 May 2021 01:50:07 +0000 (18:50 -0700)]
[clang][driver][darwin] use the deployment target version as the SDK version
when passing -platform_version to the linker
The use of a valid SDK version is preferred over an empty SDK version
(0.0.0) as the system's runtime might expect the linked binary to contain
a valid SDK version in order for the binary to work correctly
rdar://
66795188
Nemanja Ivanovic [Sat, 1 May 2021 01:29:03 +0000 (20:29 -0500)]
[PowerPC] Add floating point overloads for vec_sldw
These are added for compatibility with XLC.
Nemanja Ivanovic [Sat, 1 May 2021 00:34:56 +0000 (19:34 -0500)]
[PowerPC] Add missing requirement to test case
Commit
70c433a184a54819835e54c62c3e6891e7069861 added this
test case that has -stop-before that mentions a pass that is
only added for non-release builds. Add the requirement for asserts.
Kevin Athey [Thu, 29 Apr 2021 16:58:19 +0000 (09:58 -0700)]
Correct tiny misspelling (readlef -> readelf).
Getting my feet wet here as a new committer.
Correct misspelling in check-depends.pl.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D101552
Fangrui Song [Sat, 1 May 2021 00:19:45 +0000 (17:19 -0700)]
[ELF] Simplify the condition adding .got header
Adopt my suggestion in https://reviews.llvm.org/D91426#2653926 ,
generalizing the ppc64 specific code.
GNU ld and glibc ld.so has a contract about the first few entries of .got .
There are somewhat complex conditions when the header is needed. This patch
switches to a simpler approach: add a header unconditionally if
_GLOBAL_OFFSET_TABLE_ is used or the number of entries is more than just the
header.
Nemanja Ivanovic [Fri, 30 Apr 2021 23:54:44 +0000 (18:54 -0500)]
[PowerPC] Provide fastmath sqrt and div functions in altivec.h
This adds the long overdue implementations of these functions
that have been part of the ABI document and are now part of
the "Power Vector Intrinsic Programming Reference" (PVIPR).
The approach is to add new builtins and to emit code with
the fast flag regardless of whether fastmath was specified
on the command line.
Differential revision: https://reviews.llvm.org/D101209
LLVM GN Syncbot [Sat, 1 May 2021 00:09:37 +0000 (00:09 +0000)]
[gn build] Port
02c5ba867987
Arthur O'Dwyer [Sat, 1 May 2021 00:07:00 +0000 (20:07 -0400)]
[libc++] s/begin.h/access.h/ in comments. NFCI.
Adrian Prantl [Fri, 30 Apr 2021 23:28:44 +0000 (16:28 -0700)]
Revert "[VP,Integer,#2] ExpandVectorPredication pass"
This reverts commit
43bc584dc05e24c6d44ece8e07d4bff585adaf6d.
The commit broke the -DLLVM_ENABLE_MODULES=1 builds.
http://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/31603/consoleFull#
2136199809a1ca8a51-895e-46c6-af87-
ce24fa4cd561
Nick Desaulniers [Fri, 30 Apr 2021 23:35:41 +0000 (16:35 -0700)]
Revert "[DebugInfo] Drop DBG_VALUE_LISTs with an excessive number of debug operands"
This reverts commit
b623df3c93983c4512aa54f2c706716bdf865a90, as per
https://llvm.org/docs/DeveloperPolicy.html#patch-reversion-policy.
Breakages observed downstream reported in:
https://reviews.llvm.org/D91722#2724321
Fixes exist in:
https://reviews.llvm.org/D101523
https://reviews.llvm.org/D101540
but haven't landed yet going into the weekend.
George Balatsouras [Thu, 29 Apr 2021 22:54:52 +0000 (15:54 -0700)]
[dfsan] Fix origin tracking for fast8
The problem is the following. With fast8, we broke an important
invariant when loading shadows. A wide shadow of 64 bits used to
correspond to 4 application bytes with fast16; so, generating a single
load was okay since those 4 application bytes would share a single
origin. Now, using fast8, a wide shadow of 64 bits corresponds to 8
application bytes that should be backed by 2 origins (but we kept
generating just one).
Let’s say our wide shadow is 64-bit and consists of the following:
0xABCDEFGH. To check if we need the second origin value, we could do
the following (on the 64-bit wide shadow) case:
- bitwise shift the wide shadow left by 32 bits (yielding 0xEFGH0000)
- push the result along with the first origin load to the shadow/origin vectors
- load the second 32-bit origin of the 64-bit wide shadow
- push the wide shadow along with the second origin to the shadow/origin vectors.
The combineOrigins would then select the second origin if the wide
shadow is of the form 0xABCDE0000. The tests illustrate how this
change affects the generated bitcode.
Reviewed By: stephan.yichao.zhao
Differential Revision: https://reviews.llvm.org/D101584
Jon Roelofs [Thu, 29 Apr 2021 15:40:41 +0000 (08:40 -0700)]
[EarlyIfConversion] Avoid producing selects with identical operands
This extends the early-ifcvt pass to avoid a few more cases where the resulting
select instructions would have matching operands. Additionally, we now use TII
to determine "sameness" of the operands so that as TII gets smarter, so too
will ifcvt.
The attached test case was bugpoint-reduced down from CINT2000/252.eon in the
test-suite. See: https://clang.godbolt.org/z/WvnrcrGEn
Differential Revision: https://reviews.llvm.org/D101508
Jon Roelofs [Fri, 30 Apr 2021 22:30:34 +0000 (15:30 -0700)]
[PowerPC] modernize test via update_llc_test_checks.py. NFC
Christopher Di Bella [Sun, 11 Apr 2021 19:04:52 +0000 (19:04 +0000)]
[libcxx][iterator][ranges] adds `input_iterator` and `input_range`
Implements parts of:
* P0896R4 The One Ranges Proposal`
Depends on D100269.
Differential Revision: https://reviews.llvm.org/D100271
Dávid Bolvanský [Fri, 30 Apr 2021 22:41:44 +0000 (00:41 +0200)]
[X86] Promote 16-bit CTTZ_ZERO_UNDEF to 32-bit variant
Related to PR50172.
Protects us against regressions after we will start doing cttz(zext(x)) -> zext(cttz(x)) transformation in the middle-end.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D101662
Arthur O'Dwyer [Tue, 20 Apr 2021 15:27:03 +0000 (11:27 -0400)]
[libc++] [test] Add a debug-mode CI.
To run llvm-lit manually from the command line:
./bin/llvm-lit -sv --param std=c++2b --param cxx_under_test=`pwd`/bin/clang \
--param debug_level=1 ../libcxx/test/
Tests that currently fail with `debug_level=1` are marked `LIBCXX-DEBUG-FIXME`,
but my intent is to deal with all of them and leave no such annotations in
the codebase within the next couple weeks. (I have patches for all of them
in my local checkout.)
Differential Revision: https://reviews.llvm.org/D100866
Arthur O'Dwyer [Fri, 30 Apr 2021 22:05:31 +0000 (18:05 -0400)]
[libc++] Remove the line of stdout output from this generator. NFCI.
This line was confusing some people: it's not supposed to indicate
any kind of problem with the script, and I can't see any way it could
even help with troubleshooting. So, just silence it.
Jon Roelofs [Fri, 30 Apr 2021 21:53:53 +0000 (14:53 -0700)]
Revert "[EarlyIfConversion] Avoid producing selects with identical operands"
This reverts commit
3d27b5d28aabf8516aa1fefc78a6878b89a992f0.
Broke one of the PPC tests, which I didn't see because I usually build with
only the x86/AARch64 targets enabled... oops.
https://lab.llvm.org/buildbot#builders/109/builds/13834
llvm/test/CodeGen/PowerPC/expand-foldable-isel.ll
Amara Emerson [Fri, 30 Apr 2021 00:04:20 +0000 (17:04 -0700)]
[AArch64][GlobalISel] Use a single MachineIRBuilder for most of isel. NFC.
This is a long overdue cleanup. Not every use is eliminated, I stuck to uses
that were directly being called from select(), and not the render functions.
Differential Revision: https://reviews.llvm.org/D101590
Jon Roelofs [Thu, 29 Apr 2021 15:40:41 +0000 (08:40 -0700)]
[EarlyIfConversion] Avoid producing selects with identical operands
This extends the early-ifcvt pass to avoid a few more cases where the resulting
select instructions would have matching operands. Additionally, we now use TII
to determine "sameness" of the operands so that as TII gets smarter, so too
will ifcvt.
The attached test case was bugpoint-reduced down from CINT2000/252.eon in the
test-suite. See: https://clang.godbolt.org/z/WvnrcrGEn
Differential Revision: https://reviews.llvm.org/D101508
Jez Ng [Fri, 30 Apr 2021 21:39:52 +0000 (17:39 -0400)]
[llvm-readobj] Recognize N_THUMB_DEF as a symbol flag
The right symbol flag mask is ~0x7, not ~0xf.
Also emit string names for the other flags (we were missing some).
Reviewed By: #lld-macho, gkm
Differential Revision: https://reviews.llvm.org/D101548
Gulfem Savrun Yeniceri [Fri, 30 Apr 2021 20:32:56 +0000 (20:32 +0000)]
[NewPM] Disable RelLookupTableConverter pass in LTO
Relative look table converter pass caused an issue when full lto
is enabled (reported in https://reviews.llvm.org/D94355).
This patch disables that pass from full lto pre-link phase optimization
pipeline until the issue is fixed.
Differential Revision: https://reviews.llvm.org/D101664
Jay Foad [Fri, 30 Apr 2021 13:53:47 +0000 (14:53 +0100)]
[AMDGPU] Remove set_gpr_idx instructions in conditional blocks
SIPreEmitPeephole did not try to remove redundant s_set_gpr_idx_*
instructions in blocks that end with a conditional branch instruction.
This seems like a simple oversight.
Differential Revision: https://reviews.llvm.org/D101629
Nikita Popov [Fri, 30 Apr 2021 21:05:41 +0000 (23:05 +0200)]
[ValueTracking] Slightly clean up programUndefinedIfUndefOrPoison() (NFC)
Use contains() to check set membership, and adjust an oddly
structured loop.
Nikita Popov [Fri, 30 Apr 2021 20:38:40 +0000 (22:38 +0200)]
[ValueTracking] Limit scan when checking poison UB (PR50155)
The current code can scan an unlimited number of instructions,
if the containing basic block is very large. The test case from
PR50155 contains a basic block with approximately 100k instructions.
To avoid this, limit the number of instructions we inspect. At
the same time, drop the limit on the number of basic blocks, as
this will be implicitly limited by the number of instructions as
well.
Dmitry Vyukov [Fri, 30 Apr 2021 20:47:43 +0000 (13:47 -0700)]
asan: fix a windows test
Before commit "sanitizer_common: introduce kInvalidTid/kMainTid"
asan invalid/unknown thread id was 0xffffff, so presumably we printed "T16777215".
Now it's -1, so we print T-1. Fix the test.
I think the new format is even better, "T-1" clearly looks like something special
rather than a random large number.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D101634
Justin Bogner [Fri, 30 Apr 2021 20:37:08 +0000 (13:37 -0700)]
Add support for llvm.assume intrinsic to the LoadStoreVectorizer pass
Patch by Viacheslav Nikolaev. Thanks!
Vitaly Buka [Fri, 30 Apr 2021 08:22:02 +0000 (01:22 -0700)]
[tsan] Remove special SyncClock::kInvalidTid
Followup for D101428.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D101604
Joel E. Denny [Fri, 30 Apr 2021 17:00:40 +0000 (13:00 -0400)]
[OpenMP] Fix second debug name from map clause
This patch fixes a bug from D89802. For example, without it, Clang
generates x as the debug map name for both x and y in the following
example:
```
#pragma omp target map(to: x, y)
x = y = 1;
```
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D101564
LLVM GN Syncbot [Fri, 30 Apr 2021 20:17:55 +0000 (20:17 +0000)]
[gn build] Port
2d28100bf2e4
Jez Ng [Fri, 30 Apr 2021 20:17:26 +0000 (16:17 -0400)]
[lld-macho] Parse & emit the N_ARM_THUMB_DEF symbol flag
Eventually we'll use this flag to properly handle bl/blx
opcodes.
Reviewed By: #lld-macho, gkm
Differential Revision: https://reviews.llvm.org/D101558
Jez Ng [Fri, 30 Apr 2021 20:17:25 +0000 (16:17 -0400)]
[lld-macho] Initial scaffolding for ARM32 support
This just parses the `-arch armv7` and emits the right header flags.
The rest will be slowly fleshed out in upcoming diffs.
Reviewed By: #lld-macho, gkm
Differential Revision: https://reviews.llvm.org/D101557
Louis Dionne [Fri, 30 Apr 2021 19:52:26 +0000 (15:52 -0400)]
[libc++] Fix constexpr-ness of std::tuple's constructor
Mentioned in https://reviews.llvm.org/D96523.
Daniil Fukalov [Thu, 29 Apr 2021 13:02:51 +0000 (16:02 +0300)]
[TTI] NFC: Change getTypeLegalizationCost to return InstructionCost.
This patch migrates the TTI cost interfaces to return an InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: sdesmalen, kparzysz
Differential Revision: https://reviews.llvm.org/D101533
Dávid Bolvanský [Fri, 30 Apr 2021 19:26:26 +0000 (21:26 +0200)]
[InstCombine] Added tests for PR50172, NFC
Guozhi Wei [Fri, 30 Apr 2021 19:10:36 +0000 (12:10 -0700)]
[MachineFunction] Make comment for TracksLiveness more clearer
As discussed in https://lists.llvm.org/pipermail/llvm-dev/2021-April/150225.html,
the current comments for TracksLiveness property and isKill flag are confusing.
This patch makes the comments more clearer.
Differential Revision: https://reviews.llvm.org/D101500
Arthur Eubanks [Fri, 30 Apr 2021 18:54:42 +0000 (11:54 -0700)]
[llvm-reduce] Don't unset dso_local on implicitly dso_local GVs
This introduces a flag that aborts if we ever reduce to IR that fails
the verifier.
Reviewed By: swamulism, arichardson
Differential Revision: https://reviews.llvm.org/D101279
Vitaly Buka [Fri, 30 Apr 2021 18:29:13 +0000 (11:29 -0700)]
[NFC][tsan] Fix cast after D101428
Arthur Eubanks [Fri, 30 Apr 2021 18:48:03 +0000 (11:48 -0700)]
[llvm-reduce] Add flag to only run specific passes
Reviewed By: fhahn, hans
Differential Revision: https://reviews.llvm.org/D101278
Arthur O'Dwyer [Fri, 30 Apr 2021 18:43:33 +0000 (14:43 -0400)]
[libc++] [test] Recommit the unsetting of LC_COLLATE in the builder script.
This re-reverts one piece of
1b885573327d0f6b36f24ad23d243642f658750b,
reapplying one piece of D101437 (but not the "service"-queue piece of it).
It turns out that the behavior of `grep [^ -~]`, or even `grep [A-Z]`,
depends on locale, specifically `LC_COLLATE`. So we want to make sure
we're not in any weird locale, no matter what machine we're running on.
Yes, "en_US.UTF-8" counts as weird!
https://stackoverflow.com/questions/
67320156/misbehavior-of-gnu-grep-when-grepping-for-ignores-spaces
https://stackoverflow.com/questions/6799872/how-to-make-grep-a-z-independent-of-locale
Konstantin Zhuravlyov [Fri, 30 Apr 2021 18:45:07 +0000 (14:45 -0400)]
Revert "AMDGPU/llvm-readobj: Add missing tests for note parsing/displaying"
This reverts commit
c9c4676a458b1ef99ffb67b43cfd87d6c27a448c.
Reason for revert: note-amd-valid-v3.s test fails if AMDGPU is not built.
Petr Hosek [Thu, 29 Apr 2021 17:11:39 +0000 (10:11 -0700)]
[libcxx] Use joined format for include flag on Windows
Without this, CMake deduplicates the /I flag breaking the build. See
https://cmake.org/cmake/help/v3.13/command/target_compile_options.html
for more details on why this is needed.
Differential Revision: https://reviews.llvm.org/D101550
Nick Desaulniers [Fri, 30 Apr 2021 18:26:30 +0000 (11:26 -0700)]
[llvm-objdump] add -v alias for --version
Used by the Linux kernel's CONFIG_X86_DECODER_SELFTEST.
Link: https://github.com/ClangBuiltLinux/linux/issues/1130
Reviewed By: MaskRay, jhenderson, rupprecht
Differential Revision: https://reviews.llvm.org/D101483
Nick Desaulniers [Fri, 30 Apr 2021 18:10:23 +0000 (11:10 -0700)]
[M68k] fix -Wdefaulted-function-deleted and -Woverloaded-virtual
Fixes the following warnings observerd when building the experimental
m68k backend (-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="M68k"):
../lib/Target/M68k/M68kMachineFunction.h:71:3: warning: explicitly
defaulted default constructor is implicitly deleted
[-Wdefaulted-function-deleted]
M68kMachineFunctionInfo() = default;
^
../lib/Target/M68k/M68kMachineFunction.h:24:20: note: default
constructor of 'M68kMachineFunctionInfo' is implicitly deleted because
field 'MF' of reference type 'llvm::MachineFunction &' would not be
initialized
MachineFunction &MF;
^
In file included from ../lib/Target/M68k/M68kISelLowering.cpp:18:
In file included from ../lib/Target/M68k/M68kSubtarget.h:17:
../lib/Target/M68k/M68kFrameLowering.h:60:8: warning:
'llvm::M68kFrameLowering::emitCalleeSavedFrameMoves' hides overloaded
virtual functions [-Woverloaded-virtual]
void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
^
../include/llvm/CodeGen/TargetFrameLowering.h:215:3: note: hidden
overloaded virtual function
'llvm::TargetFrameLowering::emitCalleeSavedFrameMoves' declared here:
different number of parameters (2 vs 3)
emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
^
../include/llvm/CodeGen/TargetFrameLowering.h:218:16: note: hidden
overloaded virtual function
'llvm::TargetFrameLowering::emitCalleeSavedFrameMoves' declared here:
different number of parameters (4 vs 3)
virtual void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
^
pr/50071
Reviewed By: myhsu
Differential Revision: https://reviews.llvm.org/D101588
Scott Linder [Fri, 30 Apr 2021 18:08:11 +0000 (18:08 +0000)]
[ADT] Add llvm::remove_cvref and llvm::remove_cvref_t
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D100669
Louis Dionne [Fri, 30 Apr 2021 18:07:08 +0000 (14:07 -0400)]
[libc++] Revert the change that runs clang-format and generated-output in the service queue
This reverts commit
6712534ebc6f84f0b178a19bf17b7b2bd852f6eb.
Differential Revision: https://reviews.llvm.org/D101437
Duncan P. N. Exon Smith [Thu, 29 Apr 2021 01:18:35 +0000 (18:18 -0700)]
Support: Stop using F_{None,Text,Append} compatibility synonyms, NFC
Stop using the compatibility spellings of `OF_{None,Text,Append}`
left behind by
1f67a3cba9b09636c56e2109d8a35ae96dc15782. A follow-up
will remove them.
Differential Revision: https://reviews.llvm.org/D101650
Ahmed Taei [Thu, 29 Apr 2021 21:05:23 +0000 (14:05 -0700)]
Add patterns to lower vector.multi_reduction into a sequence of vector.reduction
Three patterns are added to convert into vector.multi_reduction into a
sequence of vector.reduction as the following:
- Transpose the inputs so inner most dimensions are always reduction.
- Reduce rank of vector.multi_reduction into 2d with inner most
reduction dim (get the 2d canical form)
- 2D canonical form is converted into a sequence of vector.reduction.
There are two things we might worth in a follow up diff:
- An scf.for (maybe optionally) around vector.reduction instead of unrolling it.
- Breakdown the vector.reduction into a sequence of vector.reduction
(e.g tree-based reduction) instead of relying on how downstream dialects
handle it.
Note: this will requires passing target-vector-length
Differential Revision: https://reviews.llvm.org/D101570
Eli Friedman [Thu, 29 Apr 2021 21:35:34 +0000 (14:35 -0700)]
[AArch64] Fix lowering for fshl/fshr with SVE types.
These operations don't exist natively, so just let the
target-independent code expand to plain shifts.
The generated sequences could probably be optimized a bit more, but
they seem good enough for now.
Differential Revision: https://reviews.llvm.org/D101574
Michael Kruse [Fri, 30 Apr 2021 17:38:55 +0000 (12:38 -0500)]
[OpenMP][CMake] Use in-project clang as CUDA->IR compiler.
If available, use the clang that is already built in the same project as
CUDA compiler unless another executable is explicitly defined. This also
ensures the generated deviceRTL IR will be consistent with the version
of Clang.
This patch is required to reliably test OpenMP offloading in a buildbot
without either a two-stage build (e.g. with LLVM_ENABLE_RUNTIMES) or a
separately installed clang on the worker that will eventually become
outdated.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D101265
LLVM GN Syncbot [Fri, 30 Apr 2021 17:30:08 +0000 (17:30 +0000)]
[gn build] Port
c6f20d70a8c9
Scott Linder [Fri, 30 Apr 2021 17:15:49 +0000 (17:15 +0000)]
[ADT] Add STLForwardCompat.h and llvm::disjunction
Move some types in STLExtras.h which are named and behave identically to
STL types from future standards into a dedicated header. This keeps them
organized (they are not "extras" in the same sense as most types in
STLExtras.h are) and fixes circular dependencies in future patches.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D100668
Scott Linder [Fri, 30 Apr 2021 17:06:48 +0000 (17:06 +0000)]
[NFC] Refactor ExecuteAssembler in cc1as_main.cpp
Introduce an extra scope (another static function) to replace calls to
`unique_ptr::reset` with implicit destructors via RAII.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101542
LLVM GN Syncbot [Fri, 30 Apr 2021 17:00:36 +0000 (17:00 +0000)]
[gn build] Port
7c17731596e9
LLVM GN Syncbot [Fri, 30 Apr 2021 17:00:35 +0000 (17:00 +0000)]
[gn build] Port
5a3309f82576
Christopher Di Bella [Sun, 11 Apr 2021 17:40:30 +0000 (17:40 +0000)]
[libcxx][ranges] adds `ranges::range`, `ranges::common_range`, and range aliases
* `std::ranges::range`
* `std::ranges::sentinel_t`
* `std::ranges::range_difference_t`
* `std::ranges::range_value_t`
* `std::ranges::range_reference_t`
* `std::ranges::range_rvalue_reference_t`
* `std::ranges::common_range`
`range_size_t` depends on `sized_range` and will be added alongside it.
Implements parts of:
* P0896R4 The One Ranges Proposal`
Depends on D100255.
Differential Revision: https://reviews.llvm.org/D100269
Christopher Di Bella [Sun, 11 Apr 2021 05:08:32 +0000 (05:08 +0000)]
[libcxx][ranges] adds `range` access CPOs
* `std::ranges::begin`
* `std::ranges::cbegin`
* `std::ranges::end`
* `std::ranges::cend`
* `std::ranges::iterator` (required for `end`)
Implements parts of:
* P0896R4 The One Ranges Proposal`
Co-author: @zoecarver
Depends on D90999, D100160.
Differential Revision: https://reviews.llvm.org/D100255
Alexey Bataev [Wed, 28 Apr 2021 14:02:33 +0000 (07:02 -0700)]
[SLP]Fix the crash on cost calculation if non-compatible vectors shuffled.
If the extracts from the non-power-2 vectors are recognized as shuffles,
need some extra checks to not crash cost calculations if trying to gext
the ecost for subvector extracts. In this case need to check carefully
that we do not exit out of bounds of the original vector, otherwise the
TTI's cost model will crash on assert.
Differential Revision: https://reviews.llvm.org/D101477
Stelios Ioannou [Fri, 30 Apr 2021 15:19:48 +0000 (16:19 +0100)]
[AArch64] Adds a pre-indexed paired Load/Store optimization for LDR-STR.
This patch merges STR<S,D,Q,W,X>pre-STR<S,D,Q,W,X>ui and
LDR<S,D,Q,W,X>pre-LDR<S,D,Q,W,X>ui instruction pairs into a single
STP<S,D,Q,W,X>pre and LDP<S,D,Q,W,X>pre instruction, respectively.
For each pair, there is a MIR test that verifies this optimization.
Differential Revision: https://reviews.llvm.org/D99272
Change-Id: Ie97a20c8c716c08492fe229c22e14e3c98ef08b7
Nathan Sidwell [Thu, 29 Apr 2021 13:20:54 +0000 (06:20 -0700)]
[clang] Update comments on another libstdc++ HACK
Document relevant gcc versions and dates.
Differential Revision: https://reviews.llvm.org/D101530
Peter Steinfeld [Wed, 28 Apr 2021 19:57:50 +0000 (12:57 -0700)]
[flang] Allow KIND type parameters to be used as LEN parameters of components
When producing the runtime type information for a component of a derived type
that had a LEN type parameter, we were not allowing a KIND parameter of the
derived type. This was causing one of the NAG correctness tests to fail
(.../hibiya/d5.f90).
I added a test to our own test suite to check for this.
Also, I fixed a typo in .../module/__fortran_type_info.f90.
I allowed KIND type parameters to be used for the declarations of components
that use LEN parameters by constant folding the value of the LEN parameter. To
make the constant folding work, I had to put the semantics::DerivedTypeSpec of
the associated derived type into the folding context. To get this
semantics::DerivedTypeSpec, I changed the value of the semantics::Scope object
that was passed to DescribeComponent() to be the derived type scope rather than
the containing non-derived type scope.
This scope change, in turn, caused differences in the symbol table output that
is checked in typeinfo01.f90. Most of these differences were in the order that
the symbols appeared in the dump. But one of them changed one of the values
from "CHARACTER(2_8,1)" to "CHARACTER(1_8,1)". I'm not sure if these changes
are significant. Please verify that the results of this test are still valid.
Also, I wonder if there are other situations in this code where we should be
folding constants. For example, what if the field of a component has a
component whose type is a PDT with a LEN type parameter, and the component's
declaration depends on the KIND type parameter of the current PDT. Here's an
example:
type string(stringkind)
integer,kind :: stringkind
character(stringkind) :: value
end type string
type outer(kindparam)
integer,kind :: kindparam
type(string(kindparam)) :: field
end type outer
I don't understand the code or what it's trying to accomplish well enough to
figure out if such cases are correctly handled by my new code.
Differential Revision: https://reviews.llvm.org/D101482
Vince Bridgers [Fri, 30 Apr 2021 14:32:35 +0000 (09:32 -0500)]
[analyzer] Fix assertion in SVals.h
Fix assertion in SVals.h apparently caused by
https://reviews.llvm.org/D89055.
clang:clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h:596:
clang::ento::loc::MemRegionVal::MemRegionVal(const clang::ento::MemRegion *):
Assertion `r' failed.
Backtrace:
...
clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h:597:3
clang::QualType, clang::QualType)
clang/lib/StaticAnalyzer/Core/SValBuilder.cpp:773:18
clang::QualType, clang::QualType)
clang/lib/StaticAnalyzer/Core/SValBuilder.cpp:612:12
clang::QualType) clang/lib/StaticAnalyzer/Core/SValBuilder.cpp:587:12
namespace)::RegionBindingsRef const&, clang::ento::Loc, clang::QualType)
clang/lib/StaticAnalyzer/Core/RegionStore.cpp:1510:24
...
Reviewed By: ASDenysPetrov
Differential Revision: https://reviews.llvm.org/D101635
Bradley Smith [Fri, 23 Apr 2021 15:34:26 +0000 (16:34 +0100)]
[AArch64][SVE] Remove unused function missed from D101302
The functionality in SVEIntrinsicOpts::isReinterpretToSVBool was moved in
D101302, however the original now unused function was not removed (NFC).
Differential Revision: https://reviews.llvm.org/D101642
David Spickett [Fri, 30 Apr 2021 15:52:21 +0000 (16:52 +0100)]
[lldb] Change DumpDataExtractorTest function names to lldb style (NFC)
Tomas Matheson [Fri, 30 Apr 2021 15:53:14 +0000 (16:53 +0100)]
Revert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0"
This reverts commit
3338290c187b254ad071f4b9cbf2ddb2623cefc0.
Broke expensive checks on debian.
David Spickett [Fri, 30 Apr 2021 14:16:57 +0000 (15:16 +0100)]
[lldb] DumpDataExtractor tests for item byte size errors
Reviewed By: teemperor
Differential Revision: https://reviews.llvm.org/D101631
Tomas Matheson [Wed, 31 Mar 2021 16:45:45 +0000 (17:45 +0100)]
[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0
atomicrmw instructions are expanded by AtomicExpandPass before register allocation
into cmpxchg loops. Register allocation can insert spills between the exclusive loads
and stores, which invalidates the exclusive monitor and can lead to infinite loops.
To avoid this, reimplement atomicrmw operations as pseudo-instructions and expand them
after register allocation.
Floating point legalisation:
f16 ATOMIC_LOAD_FADD(*f16, f16) is legalised to
f32 ATOMIC_LOAD_FADD(*i16, f32) and then eventually
f32 ATOMIC_LOAD_FADD_16(*i16, f32)
Differential Revision: https://reviews.llvm.org/D101164
Paul C. Anagnostopoulos [Fri, 30 Apr 2021 13:19:08 +0000 (09:19 -0400)]
[TableGen] Fix two bugs in 'defm' when complex 'assert' is involved.
This patch fixes two bugs that arise when a 'defm' inherits from a multiclass
and also from a class with assertions.
Differential Revision: https://reviews.llvm.org/D101626
Konstantin Zhuravlyov [Fri, 30 Apr 2021 14:07:02 +0000 (10:07 -0400)]
AMDGPU/llvm-readobj: Add missing tests for note parsing/displaying
This is a follow up review/change for https://reviews.llvm.org/D95638
Add valid note tests for code object v2 notes:
- NT_AMD_HSA_CODE_OBJECT_VERSION (required yaml2obj update)
- NT_AMD_HSA_HSAIL (required yaml2obj update)
- NT_AMD_HSA_ISA_VERSION (required yaml2obj update)
- NT_AMD_HSA_METADATA
- NT_AMD_HSA_ISA_NAME
- NT_AMD_PAL_METADATA
Add valid note tests for code object v3 notes:
- NT_AMDGPU_METADATA
Add invalid note tests for code object v2 notes:
- NT_AMD_HSA_CODE_OBJECT_VERSION (required yaml2obj update)
- NT_AMD_HSA_HSAIL (required yaml2obj update)
- NT_AMD_HSA_ISA_VERSION (required yaml2obj update)
Add invalid note tests for code object v3 notes:
- NT_AMDGPU_METADATA
Differential Revision: https://reviews.llvm.org/D101304
David Spickett [Fri, 30 Apr 2021 10:35:54 +0000 (11:35 +0100)]
[lldb] More tests for DumpDataExtractor
* Using a base address or skipping it with LLDB_INVALID_ADDRESS
* Using a data offset, which does not effect the printed addresses
* Not providing an output stream
* Formatting a double sized HexFloat
* Formatting over multiple lines
Since address printing now has its own test,
I've removed the base address from all the format
type tests.
The multi line tests still use a base address to check that
it's incremented correctly for each new line.
Reviewed By: teemperor
Differential Revision: https://reviews.llvm.org/D101627
Jingu Kang [Tue, 23 Mar 2021 13:46:54 +0000 (13:46 +0000)]
[SimpleLoopUnswitch] Port partially invariant unswitch from LoopUnswitch to SimpleLoopUnswitch
Differential Revision: https://reviews.llvm.org/D99354
Amy Kwan [Wed, 28 Apr 2021 03:37:02 +0000 (22:37 -0500)]
[PowerPC] Add new infrastructure to select load/store instructions, update P8/P9 load/store patterns.
This patch introduces a new infrastructure that is used to select the load and
store instructions in the PPC backend.
The primary motivation is that the current implementation of selecting load/stores
is dependent on the ordering of patterns in TableGen. Given this limitation, we
are not able to easily and reliably generate the P10 prefixed load and stores
instructions (such as when the immediates that fit within 34-bits). This
refactoring is meant to provide us with more control over the patterns/different
forms to exploit, as well as eliminating dependency of pattern declaration in TableGen.
The idea of this refactoring is that it introduces a set of addressing modes that
correspond to different instruction formats of a particular load and store
instruction, along with a set of common flags that describes a load/store.
Whenever a load/store instruction is being selected, we analyze the instruction
and compute a set of flags for it. The computed flags are then used to
select the most optimal load/store addressing mode.
This patch is the first of a series of patches to be committed - it contains the
initial implementation of the refactored load/store selection infrastructure and
also updates P8/P9 patterns to adopt this infrastructure. The idea is that
incremental patches will add more implementation and support, and eventually
the old implementation will be removed.
Differential Revision: https://reviews.llvm.org/D93370
Sidharth Baveja [Fri, 30 Apr 2021 14:48:02 +0000 (14:48 +0000)]
[XCOFF][AIX] Add Global Variables Directly to TOC for 32 bit AIX
Summary:
This patch implements the backend implementation of adding global variables
directly to the table of contents (TOC), rather than adding the address of the
variable to the TOC.
Currently, this patch will look for the "toc-data" attribute on symbols in the
IR, and then add those symbols to the TOC.
ATM, this is implemented for 32 bit AIX.
Reviewers: sfertile
Differential Revision: https://reviews.llvm.org/D101178
Adam Czachorowski [Fri, 16 Apr 2021 18:07:46 +0000 (20:07 +0200)]
[clang] Fix assert() crash when checking undeduced arg alignment
There already was a check for undeduced and incomplete types, but it
failed to trigger when outer type (SubstTemplateTypeParm in test) looked
fine, but inner type was not.
Differential Revision: https://reviews.llvm.org/D100667
Jay Foad [Fri, 30 Apr 2021 13:50:46 +0000 (14:50 +0100)]
[AMDGPU] Add test for set_gpr_idx removal with conditional branches
Dmitry Vyukov [Wed, 28 Apr 2021 07:19:37 +0000 (09:19 +0200)]
sanitizer_common: introduce kInvalidTid/kMainTid
Currently we have a bit of a mess related to tids:
- sanitizers re-declare kInvalidTid multiple times
- some call it kUnknownTid
- implicit assumptions that main tid is 0
- asan/memprof claim their tids need to fit into 24 bits,
but this does not seem to be true anymore
- inconsistent use of u32/int to store tids
Introduce kInvalidTid/kMainTid in sanitizer_common
and use them consistently.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D101428
LLVM GN Syncbot [Fri, 30 Apr 2021 13:48:40 +0000 (13:48 +0000)]
[gn build] Port
43bc584dc05e
Simon Moll [Fri, 30 Apr 2021 13:46:59 +0000 (15:46 +0200)]
[VE] VP intrinsics are legal
Simon Moll [Fri, 30 Apr 2021 11:43:48 +0000 (13:43 +0200)]
[VP,Integer,#2] ExpandVectorPredication pass
This patch implements expansion of llvm.vp.* intrinsics
(https://llvm.org/docs/LangRef.html#vector-predication-intrinsics).
VP expansion is required for targets that do not implement VP code
generation. Since expansion is controllable with TTI, targets can switch
on the VP intrinsics they do support in their backend offering a smooth
transition strategy for VP code generation (VE, RISC-V V, ARM SVE,
AVX512, ..).
Reviewed By: rogfer01
Differential Revision: https://reviews.llvm.org/D78203
Jay Foad [Fri, 30 Apr 2021 13:17:14 +0000 (14:17 +0100)]
[AMDGPU] Add implicit negative check for the set_gpr_idx tests
The only effect of the optimization is to remove s_set_gpr_idx_*
instructions, and update_mir_test_checks.py always inserts CHECK: rather
than CHECK-NEXT: checks, so without this implicit negative check, the
tests would always pass even if the optimization did nothing.
Differential Revision: https://reviews.llvm.org/D101622
Anastasia Stulova [Fri, 30 Apr 2021 13:38:36 +0000 (14:38 +0100)]
[OpenCL] Prevent adding vendor extensions for all targets
Removed extension begin/end pragma as it has no effect and
it is added unconditionally for all targets.
Differential Revision: https://reviews.llvm.org/D92244
Nico Weber [Fri, 30 Apr 2021 13:22:46 +0000 (09:22 -0400)]
[lld/mac] Remove unused -L%t flags from tests
No behavior change.
Differential Revision: https://reviews.llvm.org/D101623
Pooja Yadav [Fri, 30 Apr 2021 13:32:02 +0000 (19:02 +0530)]
[docs]Added llvm/bindings section
Added information about language bindings provided by LLVM.
Reviewed By: xgupta, gandhi21299
Differential Revision: https://reviews.llvm.org/D101295
Nico Weber [Fri, 30 Apr 2021 13:30:46 +0000 (09:30 -0400)]
[lld/mac] Tweak two comments and fix style on one variable name
Cosmetic, no behavior change.
Andrea Di Biagio [Fri, 30 Apr 2021 12:53:33 +0000 (13:53 +0100)]
[MCA] Fix CarryOver check in the DispatchStage (PR50174).
Early exit from method DispatchStage::isAvailable() if the dispatch group is
already full. Not all instructions declare at least one uOP.
Fixes PR50174.
Florian Hahn [Fri, 30 Apr 2021 13:13:47 +0000 (14:13 +0100)]
[clang] Refactor mustprogress handling, add it to all loops in c++11+.
Currently Clang does not add mustprogress to inifinite loops with a
known constant condition, matching C11 behavior. The forward progress
guarantee in C++11 and later should allow us to add mustprogress to any
loop (http://eel.is/c++draft/intro.progress#1).
This allows us to simplify the code dealing with adding mustprogress a
bit.
Reviewed By: aaron.ballman, lebedev.ri
Differential Revision: https://reviews.llvm.org/D96418
Jay Foad [Fri, 30 Apr 2021 12:42:45 +0000 (13:42 +0100)]
[AMDGPU] Fix inconsistent ---/... in MIR tests and regenerate checks
In some cases the lack of --- or ... confused update_mir_test_checks.py
into not adding any checks for a function.
Arthur O'Dwyer [Thu, 29 Apr 2021 21:32:17 +0000 (17:32 -0400)]
[libc++] [test] Run the clang-format and generated-output checks on the "service" queue
As these jobs only run in a couple seconds, and block starting of
other jobs, they can run on the "service" queue which doesn't get
blocked by other long-running jobs.
Differential Revision: https://reviews.llvm.org/D101437
Arthur O'Dwyer [Thu, 29 Apr 2021 21:40:17 +0000 (17:40 -0400)]
[libc++] Minor cleanups in <iterator>. NFCI.
Tomas Matheson [Thu, 29 Apr 2021 13:46:11 +0000 (14:46 +0100)]
[ARM][MVE] vcreateq lane ordering for big endian
Use of bitcast resulted in lanes being swapped for vcreateq with big
endian. Fix this by using vreinterpret. No code change for little
endian. Adds IR lit test.
Differential Revision: https://reviews.llvm.org/D101606