Simon Glass [Mon, 27 Jan 2020 15:49:39 +0000 (08:49 -0700)]
dm: core: Use const device for the devfdt...() interface
These functions do not modify the device so should use a const pointer to
it. Update the code accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 27 Jan 2020 15:49:38 +0000 (08:49 -0700)]
dm: pci: Update a few more interfaces for const udevice *
Tidy up a few places where const * should be used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 27 Jan 2020 15:49:37 +0000 (08:49 -0700)]
dm: pci: Update the PCI read_config() method to const dev *
At present this method uses a non-const udevice pointer, but the call
should not modify the device. Use a const pointer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 27 Jan 2020 15:49:36 +0000 (08:49 -0700)]
dm: core: Use const where possible in device.h
Update this header file to use const devices where possible, to permit
callers to also use const.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 5 Feb 2020 12:19:52 +0000 (07:19 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Bug fixes on ls1012a, ls1021a, ls1028ardb platforms Integrate fspi for
ls1028a, add DM-I2C support, update secure boot header offset
Tom Rini [Wed, 5 Feb 2020 12:18:12 +0000 (07:18 -0500)]
Merge tag 'rpi-next-2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi
- DFU support file operations lager then the default max size
- add dfu support to dwc2 for bcm2835
- enable DFU for RPi4
- Fix RPi4 memory map to include the genet device
- add driver for the genet ethernet device
- enable network support in RPi4 config
Tom Rini [Tue, 4 Feb 2020 16:36:49 +0000 (11:36 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Various minor fixes for x86
- Switch to ACPI mode on Intel edison
- Support run-time configuration for NS16550 driver
- Update coreboot and slimbootloader serial drivers to use NS16550
run-time configuration
- ICH SPI driver fixes to hardware sequencing erase case
- Move ITSS from Apollo Lake to a more generic location
- Intel GPIO driver bug fixes
- Move to vs2017-win2016 platform build host for Azure pipelines
Tom Rini [Tue, 4 Feb 2020 13:16:01 +0000 (08:16 -0500)]
Merge tag 'ti-v2020.04-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- DFU boot support for J721e
- I2C support for J721e
- GPIO support for J721e
- Android boot image updates on AM57XX
- OMAP watchdog fixes
Heinrich Schuchardt [Sat, 25 Jan 2020 19:40:21 +0000 (20:40 +0100)]
board: ls1012ardb: do not use imply CONFIG_
Inside Kconfig we must not use the CONFIG_ prefix with the imply statement.
Fixes:
28e3c39e535b ("board: freescale: ls1012a2g5rdb: enable network
support on ls1012a2g5rdb")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Priyanka Singh [Wed, 22 Jan 2020 10:32:38 +0000 (10:32 +0000)]
armv8: ls2088a: Updates secure boot headers offset
Updates the secure boot headers offsets of Kernel and other
firmware images for SD and NOR boot sources used by
esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Priyanka Singh [Wed, 22 Jan 2020 10:32:34 +0000 (10:32 +0000)]
armv8: ls1088a: Updates secure boot headers offset
Updates the secure boot headers offsets of Kernel and other
firmware images for SD and QSPI boot sources used by
esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Priyanka Singh [Wed, 22 Jan 2020 10:31:22 +0000 (10:31 +0000)]
armv8: lx2160a: Updates secure boot headers offset
Updates the secure boot headers offsets of Kernel and other
firmware images for SD and XSPI boot sources used by
esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Priyanka Singh [Wed, 22 Jan 2020 10:29:52 +0000 (10:29 +0000)]
armv8: ls1012ardb: Updates secure boot headers offset
Updates the secure boot headers offsets of Kernel and other
firmware images used by esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Priyanka Singh [Wed, 22 Jan 2020 10:29:46 +0000 (10:29 +0000)]
armv8: ls1046a: Updates secure boot headers offset
Updates the secure boot headers offsets of Kernel and other
firmware images for SD and QSPI boot sources used by
esbc_validate command.
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Alison Wang [Tue, 21 Jan 2020 07:33:01 +0000 (07:33 +0000)]
configs: ls1021a: Reserve low memory for CMA
The default reserved memory for CMA is high memory. If LPAE is enabled,
highmem pages are non-remapped and can not be used with
dma_alloc_coherent. This patch will reserve low memory for CMA and fix
the issue on LS1021A.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Tue, 31 Dec 2019 07:33:44 +0000 (15:33 +0800)]
dm: arm: ls1021a: add i2c DM support
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1021A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Tue, 31 Dec 2019 07:33:41 +0000 (15:33 +0800)]
dm: arm64: ls1012a: add i2c DM support
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1012A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Tue, 31 Dec 2019 07:33:40 +0000 (15:33 +0800)]
Kconfigs: layerscape: use a convenient default value for SYS_MALLOC_F_LEN
The default value of CONFIG_SYS_MALLOC_F_LEN (0x400)
leaves U-Boot with not enough memory to load i2c driver
before relocate, causing it to hang.
Change the default value of CONFIG_SYS_MALLOC_F_LEN
for below SoCs,
- LS1012A
- LS1021A
- LS1043A
- LS1046A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Tue, 31 Dec 2019 07:33:39 +0000 (15:33 +0800)]
i2c: mxc_i2c: add DM_FLAG_PRE_RELOC flag
This adds DM_FLAG_PRE_RELOC flag to probe i2c driver
before relocation
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Tue, 31 Dec 2019 07:33:38 +0000 (15:33 +0800)]
armv8: fsl-layerscape: spl: fix build error when DM_I2C is enabled
Fix below SPL build error when DM_I2C is enabled,
- arch/arm/cpu/armv8/built-in.o: In function `board_init_f:
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74: undefined reference to `i2c_init_all'
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:(.text.board_init_f+0x30):
relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol
`i2c_init_all'
make[2]: *** [spl/u-boot-spl] Error 1
make[1]: *** [spl/u-boot-spl] Error 2
make: *** [sub-make] Error 2
arch/arm/cpu/armv8/fsl-layerscape/spl.c: In function 'board_init_f':
arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:2: warning: implicit
declaration of function 'i2c_init_all'; did you mean 'misc_init_r'?
[-Wimplicit-function-declaration]`
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Tue, 31 Dec 2019 07:33:37 +0000 (15:33 +0800)]
rtc: pcf8563: Add driver model support
Add support of driver model of pcf8563
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Kuldeep Singh [Wed, 6 Nov 2019 11:08:02 +0000 (16:38 +0530)]
configs: ls1028a: Enable FSPI support
Enable FSPI controller support. So, flash environment can now be used
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Kuldeep Singh [Wed, 6 Nov 2019 11:08:01 +0000 (16:38 +0530)]
arm: dts: lx2160a: Add FSPI node properties
Align flexspi node properties with linux device-tree properties
Tested on LX2160A-RDB
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Kuldeep Singh [Wed, 6 Nov 2019 11:08:00 +0000 (16:38 +0530)]
arm: dts: ls1028a: Add FSPI node properties
Align flexspi node properties with linux device-tree properties
Tested on LS1028A-RDB
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Meenakshi Aggarwal [Thu, 23 Jan 2020 12:25:10 +0000 (17:55 +0530)]
board: fsl: lx2160a: Add support to reset to eMMC
Add support of "qixis_reset emmc" command for lx2160a based platforms
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Tue, 17 Dec 2019 23:10:00 +0000 (00:10 +0100)]
arm: dts: ls1028a: fix interrupt properties
Sync the interrupt properties with the ones from Linux. Also use the
constants provided by the dt-bindings header. Please note, that there
are actual changes/fixes in the irq flags. U-Boot won't use the
interrupt properties anyway. It's just to be consistent with the Linux
device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Tue, 17 Dec 2019 23:09:59 +0000 (00:09 +0100)]
arm: ls1028a: use the new flexspi driver
Also align the fspi node with the kernel one.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Kuldeep Singh [Thu, 12 Dec 2019 09:16:04 +0000 (14:46 +0530)]
configs: ls1012ardb: Enable CONFIG_SYS_RELOC_GD_ENV_ADDR
Enable the config for ls1012ardb as the entry got missed earlier.
Fixes:
8d8ee47e03 ("env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol")
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Tom Rini [Mon, 27 Jan 2020 21:23:29 +0000 (16:23 -0500)]
azure: Move to vs2017-win2016 platform build host
Azure is moving to remove the vs2015-win2012r2 platform build host. The
two suggested new platforms to use are vs2017-win2016 and windows-2019.
For now, move up to vs2017-win2016.
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Mon, 3 Feb 2020 10:38:06 +0000 (11:38 +0100)]
gpio: intel_gpio: Fix register/bit offsets intel_gpio_get_value()
Fix the following in intel_gpio_get_value():
* The value of the register is contained in the variable 'reg', not in
'mode'. The variable 'mode' contains only the configuration whether
the gpio is currently an input or an output.
* The correct bitmasks for the input and output value are
PAD_CFG0_RX_STATE and PAD_CFG0_TX_STATE.
Use them instead of the currently used PAD_CFG0_RX_STATE_BIT and
PAD_CFG0_TX_STATE_BIT.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Mon, 3 Feb 2020 10:38:05 +0000 (11:38 +0100)]
gpio: intel_gpio: Clear tx state bit when setting output
Add missing 'PAD_CFG0_TX_STATE' to the clear mask for pcr_clrsetbits32().
Otherwise this bit cannot be cleared again after it has been set once.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Mon, 3 Feb 2020 10:38:04 +0000 (11:38 +0100)]
gpio: intel_gpio: Pass pinctrl device to pcr_clrsetbits32()
The function pcr_clrsetbits32() expects a device with a P2SB parent
device. In intel_gpio_direction_output() and intel_gpio_set_value()
the device 'dev' is passed to pcr_clrsetbits32(), which is a
gpio-controller with a device 'pinctrl' as parent. This does not match
the expectations of pcr_clrsetbits32(). But the 'pinctrl' device has a
P2SB as parent.
Pass the 'pinctrl' device instead of the 'dev' device to
pcr_clrsetbits32().
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Wed, 22 Jan 2020 15:01:47 +0000 (16:01 +0100)]
x86: itss: Remove apl-prefix
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
remove the apl-prefix of the implemented functions/structures/...
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Mon, 3 Feb 2020 13:06:45 +0000 (14:06 +0100)]
x86: itss: Add a Kconfig option to enable/disable ITSS driver
Add a Kconfig option to support enabling/disabling the inclusion of
the ITSS driver depending on the platform.
Atuomatically select the ITSS driver when building for Apollo Lake.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: squashed in http://patchwork.ozlabs.org/patch/1232761/]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Wed, 22 Jan 2020 15:01:46 +0000 (16:01 +0100)]
x86: Move itss.c from Apollo Lake to a more generic location
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
move it to a common location within arch/x86.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: conditionally build itss.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Marek Vasut [Fri, 24 Jan 2020 04:44:25 +0000 (05:44 +0100)]
watchdog: omap_wdt: Fix WDT coding style
Fix obvious coding style problems, no functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Suniel Mahesh <sunil.m@techveda.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Marek Vasut [Fri, 24 Jan 2020 04:44:24 +0000 (05:44 +0100)]
watchdog: omap_wdt: Fix WDT reloading
The watchdog timer value was never updated in the hardware by this
driver, so the watchdog triggered on some random stale value that
was left in the hardware. The TI SPRUH37C says, quote:
20.4.3.9 Modifying Timer Count/Load Values and Prescaler Setting
...
After a write access, the load register value and prescaler ratio
registers are updated immediately, but new values are considered
only after the next consecutive counter overflow or after a new
trigger command (the WDT_WTGR register).
This means at least one trigger must happen. The driver probably
depended on someone calling it's .reset() callback, however that
is not guaranteed e.g. if the WDT operates without servicing.
Add this missing trigger.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Suniel Mahesh <sunil.m@techveda.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Marek Vasut [Fri, 24 Jan 2020 04:44:23 +0000 (05:44 +0100)]
watchdog: omap_wdt: Fix WDT timeout configuration
The timeout parameter of omap3_wdt_start() is in miliseconds, while
GET_WLDR_VAL() expects parameter in seconds. Fix this so the WDT
driver is actually usable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Suniel Mahesh <sunil.m@techveda.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Tue, 28 Jan 2020 10:10:05 +0000 (15:40 +0530)]
configs: j721e_evm_a72: Add GPIO support
Enable CONFIG_DA8XX_GPIO to enable GPIO support.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Tue, 28 Jan 2020 10:10:04 +0000 (15:40 +0530)]
arm: dts: k3-j721e-main: Add Support for gpio0
Add the main_gpio0 node.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Tue, 28 Jan 2020 10:10:03 +0000 (15:40 +0530)]
gpio: da8xx_gpio: Add "ti,keystone-gpio" compatible
Add "ti,keystone-gpio" compatible so as be able to use Linux DT files as
is.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Tue, 28 Jan 2020 10:10:02 +0000 (15:40 +0530)]
gpio: da8xx_gpio: Fix compiler warning
Fix below compiler warning for 64bit builds
drivers/gpio/da8xx_gpio.c: In function ‘davinci_get_gpio_bank’:
drivers/gpio/da8xx_gpio.c:446:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
return (struct davinci_gpio *)addr;
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 17:52:16 +0000 (23:22 +0530)]
configs: j721e_evm_defconfig: Enable PCA953x IO expander
Enable PCA953x IO expander to control MMC/SD power lines.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 17:52:15 +0000 (23:22 +0530)]
arm: dts: k3-j721e-common-proc-board: Enable I2C expander for SPL
IO expanders are required to power cycle SD card. So enable the same
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 17:52:14 +0000 (23:22 +0530)]
arm: dts: k3-j721e-common-proc-board: Add I2C GPIO expander
Add I2C GPIO expander required to power cycle MMC/SD
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 17:52:13 +0000 (23:22 +0530)]
arm: dts: k3-j721e: Add I2C nodes
J721e SoC has 2 I2C instances in MCU domain and 7 I2C instances in main
domain. Add DT nodes for the same
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 17:49:00 +0000 (23:19 +0530)]
gpio: pca953x_gpio: Add support for 24 bit IO expander
J721e EVM has a TCA6424 IO expander that has 24 GPIOs. Add support for
the same
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 12:29:29 +0000 (17:59 +0530)]
configs: j721e_evm_r5/a72_defconfig: Enable DFU related configs
Enable DFU, Fastboot and USB mass storage gadget related configs
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 12:29:28 +0000 (17:59 +0530)]
configs: j721e_evm_r5/a72_defconfig: Enable USB Gadget related configs
Enable USB Gadget for R5 SPL, A72 SPL and A72 U-Boot to support DFU boot
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 12:29:27 +0000 (17:59 +0530)]
configs: j721e_evm_r5_defconfig: Increase early malloc size
Increase R5 SPL early malloc memory pool by ~7K to accommodate SPL USB
DFU boot requirements
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 12:29:26 +0000 (17:59 +0530)]
configs: j721e_evm: Add DFU related variables
Add configs to download varies stages of bootloader images to RAM during
DFU boot.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 12:29:25 +0000 (17:59 +0530)]
arm: dts: k3-j721e-common-proc-board: Enable USB0 in peripheral mode
Enable USB0 in peripheral mode so that it be used for DFU
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 12:29:24 +0000 (17:59 +0530)]
arm: mach-k3: sysfw-loader: Add support to download SYSFW via DFU
Add support to download SYSFW into internal RAM via DFU in DFU boot
mode. Prepare a DFU config entity entry dynamically using buffer address
allocated for SYSFW and start DFU gadget to get SYSFW.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh Raghavendra [Mon, 27 Jan 2020 12:29:23 +0000 (17:59 +0530)]
arm: mach-k3: j721e: Rename BOOT_DEVICE_USB to BOOT_DEVICE_DFU
J721e does not support USB Host MSC boot, but only supports DFU boot.
Since BOOT_DEVICE_USB is often used for host boot mode and
BOOT_DEVICE_DFU is used for DFU boot, rename BOOT_DEVICE_USB macro to
BOOT_DEVICE_DFU
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Mon, 27 Jan 2020 10:38:31 +0000 (16:08 +0530)]
configs: j721e_evm_a72: Fix redundant environment offset
The current environment offset overlaps with the sysfw area and whenever
environment is saved in the redundant slot, it overwrites sysfw.itb. Fix
the offset to prevent this.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:49 +0000 (17:53 +0200)]
arm: ti: boot: Use correct dtb and dtbo on Android boot
Read correct dtb blob from boot.img/recovery.img and apply correct dtbo
blobs from dtbo partition.
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:48 +0000 (17:53 +0200)]
env: ti: boot: Boot Android with dynamic partitions
Changes:
- use boot.img instead of boot_fit.img
- use .dtb from boot.img v2
- implement recovery boot
- always boot ramdisk from boot.img, we can't mount system as root
now, as system is a logical partition inside of super partition
- don't add "skip_initramfs" to cmdline anymore
- to boot into recovery, use boot image from recovery partition
- prepare partition table:
- A/B scheme
- use 'super' partition instead of 'system' and 'vendor'
- add dtbo partitions
- introduce metadata partition
Not implemented: reading and applying dtbo blobs from dtbo partition.
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:47 +0000 (17:53 +0200)]
env: ti: boot: Respect slot_suffix in AVB commands
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:46 +0000 (17:53 +0200)]
configs: am57xx_evm: Enable Android commands
Enable Android commands that will be needed for Android 10 boot flow
implementation, for all AM57x variants. Commands enabled:
1. 'abootimg':
- CONFIG_CMD_ABOOTIMG=y
2. 'ab_select':
- CONFIG_ANDROID_AB=y
- CONFIG_CMD_AB_SELECT=y
3. 'avb':
- CONFIG_LIBAVB=y
- CONFIG_AVB_VERIFY=y
- CONFIG_CMD_AVB=y
While at it, resync defconfig files with "make savedefconfig".
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:45 +0000 (17:53 +0200)]
test/py: android: Add test for abootimg
Unit test for 'abootimg' command. Right now it covers dtb/dtbo
functionality in Android Boot Image v2, which was added recently.
Running test:
$ ./test/py/test.py --bd sandbox --build -k test_abootimg
shows that 1/1 tests passes successfully.
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:44 +0000 (17:53 +0200)]
doc: android: Convert to Sphinx format
Convert Android documentation from regular txt format to Sphinx (RST).
Also add Android index.rst file and reference it in root index.rst, so
that Android documentation is visible.
Test:
$ make htmldocs
$ xdg-open doc/output/index.html
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:43 +0000 (17:53 +0200)]
doc: android: Add documentation for Android Boot Image
Describe Android Boot Image format, how its support is implemented in
U-Boot and associated commands usage.
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:42 +0000 (17:53 +0200)]
cmd: abootimg: Add abootimg command
This command can be used to extract fields and image payloads from
Android Boot Image. It can be used for example to implement boot flow
where dtb is taken from boot.img (as v2 incorporated dtb inside of
boot.img). Using this command, one can obtain needed dtb blob from
boot.img in scripting manner, and then apply needed dtbo's (from "dtbo"
partition) on top of that, providing then the resulting image to bootm
command in order to boot the Android.
Also right now this command has the sub-command to get an address and
size of recovery dtbo from recovery image (for non-A/B devices only,
see [1,2] for details).
It can be tested like this:
=> mmc dev 1
=> part start mmc 1 boot_a boot_start
=> part size mmc 1 boot_a boot_size
=> mmc read $loadaddr $boot_start $boot_size
=> abootimg get ver
=> abootimg dump dtb
[1] https://source.android.com/devices/bootloader/boot-image-header
[2] https://source.android.com/devices/architecture/dto/partitions
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:41 +0000 (17:53 +0200)]
image: android: Add routine to get dtbo params
Android Boot Image v1 adds "Recovery DTB" field in image header and
associate payload in boot image itself [1]. Payload should be in
Android DTB/DTBO format [2]. That "Recovery DTB" area should be only
populated for non-A/B devices, and only in recovery image.
Add function to get an address and size of that payload. That function
can be further used e.g. in 'abootimg' command to provide the user a way
to get the address of recovery dtbo from U-Boot shell, which can be
further parsed using 'adtimg' command.
[1] https://source.android.com/devices/bootloader/boot-image-header
[2] https://source.android.com/devices/architecture/dto/partitions
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Sam Protsenko [Fri, 24 Jan 2020 15:53:40 +0000 (17:53 +0200)]
image: android: Add functions for handling dtb field
Android Boot Image v2 adds "DTB" payload (and corresponding field in the
image header). Provide functions for its handling:
- android_image_get_dtb_by_index(): Obtain DTB blob from "DTB" part of
boot image, by blob's index
- android_image_print_dtb_contents(): Iterate over all DTB blobs in
"DTB" part of boot image and print those blobs info
"DTB" payload might be in one of the following formats:
1. concatenated DTB blobs
2. Android DTBO format
The latter requires "android-image-dt.c" functionality, so this commit
selects that file for building for CONFIG_ANDROID_BOOT_IMAGE option.
Right now this new functionality isn't used, but it can be used further.
As it's required to apply some specific dtbo blob(s) from "dtbo"
partition, we can't automate this process inside of "bootm" command. But
we can do next:
- come up with some new command like "abootimg" to extract dtb blob
from boot image (using functions from this patch)
- extract desired dtbo blobs from "dtbo" partition using "adtimg"
command
- merge dtbo blobs into dtb blob using "fdt apply" command
- pass resulting dtb blob into bootm command in order to boot the
Android kernel with Android ramdisk from boot image
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Wolfgang Wallner [Wed, 22 Jan 2020 15:01:45 +0000 (16:01 +0100)]
x86: Move itss.h from Apollo Lake to the generic x86 include directory
The code in this file is not specific to Apollo Lake. According to
coreboot sources (where this code comes from), it is common to at least:
* Apollo Lake
* Cannon Lake
* Ice Lake
* Skylake
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Wed, 22 Jan 2020 15:01:44 +0000 (16:01 +0100)]
x86: apl: Add the term "Interrupt Timer Subsystem" to ITSS files
ITSS stands for "Interrupt Timer Subsystem", so add that term to the
description of the relevant files.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wolfgang Wallner [Tue, 14 Jan 2020 13:05:48 +0000 (14:05 +0100)]
spi: ich: Drop while loop in hardware sequencing erase case
When ich_spi_exec_op_hwseq() is called to erase a 4k block
(opcode = SPINOR_OP_BE_4K), it expects to find a length value in
op->data.nbytes, but that value is always 0. As a result, the while loop
is never executed and no erase is carried out.
Fix this by dropping the loop code entirely, only keeping the relevant
parts of the loop body.
See http://patchwork.ozlabs.org/patch/1222779/ for more detailed
background information and discussion.
Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Thu, 9 Jan 2020 21:12:35 +0000 (23:12 +0200)]
x86: edison: Switch to ACPI mode
SFI is quite poor and useless resource provider. Moreover it makes hard
to develop and extend functionality in the Linux kernel.
Enable a necessary minimum to use ACPI on Intel Edison.
Linux kernel have been prepared for this change since v5.4, where the last
crucial driver, i.e. for Basin Cove PMIC, has been submitted.
Note, that stock image won't suffer by this change since it doesn't have
ACPI enabled on the kernel level.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Marek Vasut [Thu, 9 Jan 2020 21:12:34 +0000 (23:12 +0200)]
x86: edison: Enable command line editing
Enable command line editing, because it is extremely convenient.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Heinrich Schuchardt [Thu, 9 Jan 2020 19:33:32 +0000 (20:33 +0100)]
doc: Chromebook Coral: fix build warnings
Use valid restructured text to avoid warnings like
WARNING: Title underline too short.
WARNING: Block quote ends without a blank line; unexpected unindent.
when building with `make htmldocs`.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Masahiro Yamada [Wed, 8 Jan 2020 11:13:42 +0000 (20:13 +0900)]
x86: limit the fs segment to the pointer size
The fs segment is only used to get the global data pointer.
If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug.
To specify the byte-granule limit size, drop the G bit, so the
flag field is 0x8093 instead of 0xc093, and set the limit field
to sizeof(new_gd->arch.gd_addr) - 1.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed the comments about FS segement]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Masahiro Yamada [Wed, 8 Jan 2020 11:08:44 +0000 (20:08 +0900)]
x86: use invd instead of wbinvd in real mode start code
I do not know why the boot code immediately after the system reset
should write-back the cache content. I think the cache invalidation
should be enough.
I tested this commit with qemu-x86_defconfig, and it worked for me.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Park, Aiden [Wed, 18 Dec 2019 05:56:29 +0000 (05:56 +0000)]
doc: intel: Update serial driver changes in slimbootloader.rst
Now, Slim Bootloader uses NS16550_DYNAMIC to support serial port
configuration at runtime, so no more code change is required.
Therefore, remove unnecessary steps and fix minor typo.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Park, Aiden [Wed, 18 Dec 2019 05:56:23 +0000 (05:56 +0000)]
x86: serial: Use NS16550_DYNAMIC in Slim Bootloader
Slim Bootloader provides serial port info in its HOB to support
both IO or MMIO serial ports, but it's controlled by SYS_NS16550_MEM32
or SYS_NS16550_PORT_MAPPED in U-Boot.
To support both serial port configurations dynamically at runtime,
Slim Bootloader serial driver leverages NS16550_DYNAMIC.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove the obsolete comments for data->type]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Fri, 20 Dec 2019 00:58:21 +0000 (17:58 -0700)]
x86: Move coreboot over to use the coreboot UART
Use this UART to improve the compatibility of U-Boot when used as a
coreboot payload.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Fri, 20 Dec 2019 00:58:20 +0000 (17:58 -0700)]
x86: serial: Add a coreboot serial driver
Coreboot can provide information about the serial device in use on a
platform. Add a driver that uses this information to produce a working
UART.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Fri, 20 Dec 2019 00:58:19 +0000 (17:58 -0700)]
x86: Update coreboot serial table struct
Since mid 2016, coreboot has additional fields in the serial struct that
it passes down to U-Boot. Add these so we are in sync.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Fri, 20 Dec 2019 00:58:18 +0000 (17:58 -0700)]
serial: ns16550: Support run-time configuration
At present this driver uses an assortment of CONFIG options to control
how it accesses the hardware. This is painful for platforms that are
supposed to be controlled by a device tree or a previous-stage bootloader.
Add a new CONFIG option to enable fully dynamic configuration. This
controls register spacing, size, offset and endianness.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Tested-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: squashed in http://patchwork.ozlabs.org/patch/1232929/]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Sun, 2 Feb 2020 20:26:53 +0000 (15:26 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
- DFU and Cadence USB 3 fixes
Guillermo RodrÃguez [Mon, 16 Dec 2019 15:27:57 +0000 (16:27 +0100)]
dfu: Add option to skip empty pages when flashing UBI images to NAND
Add a new option to enable the DROP_FFS flag when flashing UBI images to
NAND in order to drop trailing all-0xff pages.
This is similar to the existing FASTBOOT_FLASH_NAND_TRIMFFS option.
Signed-off-by: Guillermo Rodriguez <guille.rodriguez@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Vignesh Raghavendra [Mon, 27 Jan 2020 12:25:54 +0000 (17:55 +0530)]
usb: cdns3: ep0: Invalidate cache before reading Setup Packet
Invalidate dcache line before accessing Setup Packet contents. Otherwise
driver will see stale content on non coherent architecture.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tom Rini [Sat, 1 Feb 2020 20:31:04 +0000 (15:31 -0500)]
Merge tag 'u-boot-rockchip-
20200130' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Support redundant boot for rk3399
- Support binman for rockchip platform
- Update ram driver and add ddr4 support for rk3328
Tom Rini [Fri, 31 Jan 2020 18:26:28 +0000 (13:26 -0500)]
Merge tag 'uniphier-v2020.04-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier
UniPhier SoC updates for v2020.04 (2nd)
Denali NAND driver changes:
- Set up more registers in denali-spl for SOCFPGA
- Make clocks optional
- Do not assert reset signals in the remove hook
- associate SPARE_AREA_SKIP_BYTES with DT compatible
- switch to UCLASS_MTD
UniPhier platform changes:
- fix a bug in dram_init()
- specify loadaddr for "source" command
Masahiro Yamada [Thu, 30 Jan 2020 13:20:38 +0000 (22:20 +0900)]
ARM: uniphier: use $loadaddr for source command
If the "source" command is not given the address, it uses
CONFIG_SYS_LOAD_ADDR, which is compile-time determined.
Using the "loadaddr" environment variable is handier because it is
relocated according to the memory base when CONFIG_POSITION_INDEPENDENT
is enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 30 Jan 2020 13:20:37 +0000 (22:20 +0900)]
ARM: uniphier: set gd->ram_base correctly
gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 30 Jan 2020 13:07:59 +0000 (22:07 +0900)]
mtd: rawnand: denali_dt: use UCLASS_MTD instead of UCLASS_MISC
UCLASS_MTD is a better fit for NAND drivers.
Make NAND_DENALI_DT depend on DM_MTD, which is needed to compile
drivers/mtd/mtd-uclass.c
Also, make ARCH_UNIPHIER select DM_MTD because all the defconfig
of this platform enables NAND_DENALI_DT.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Masahiro Yamada [Wed, 29 Jan 2020 15:55:57 +0000 (00:55 +0900)]
ARM: uniphier: remove adhoc reset deassertion for the NAND controller
Now that the reset controlling of the Denali NAND driver (denali_dt.c)
works for this platform, remove the adhoc reset deassert code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 29 Jan 2020 15:55:55 +0000 (00:55 +0900)]
mtd: rawnand: denali: set SPARE_AREA_SKIP_BYTES based on DT compatible
Currently, the denali NAND driver in U-Boot configures the
SPARE_AREA_SKIP_BYTES based on the CONFIG option.
Recently, Linux kernel merged a patch that associates the proper
value for this register with the DT compatible string.
Do likewise in U-Boot too.
The denali_spl.c still uses CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 29 Jan 2020 15:55:54 +0000 (00:55 +0900)]
mtd: rawnand: denali_dt: insert udelay() after reset deassert
When the reset signal is de-asserted, the HW-controlled bootstrap
starts running unless it is disabled in the SoC integration.
It issues some commands to detect a NAND chip, and sets up registers
automatically. Until this process finishes, software should avoid
any register access.
Without this delay function, some of UniPhier boards hangs up while
executing nand_scan_ident(). (denali_read_byte() is blocked)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Tue, 21 Jan 2020 19:03:11 +0000 (20:03 +0100)]
mtd: rawnand: denali: Do not reset the block before booting the kernel
The Denali NAND driver in mainline Linux currently cannot deassert the
reset. The upcoming Linux 5.6 will support the reset controlling, and
also set up SPARE_AREA_SKIP_BYTES correctly. So, the Denali driver in
the future kernel will work without relying on any bootloader or firmware.
However, we still need to take care of stable kernel versions for a while.
U-boot should not assert the reset of this controller.
Fixes:
ed784ac3822b ("mtd: rawnand: denali: add reset handling")
Signed-off-by: Marek Vasut <marex@denx.de>
[yamada.masahiro: reword the commit description]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 21 Jan 2020 19:03:10 +0000 (20:03 +0100)]
mtd: rawnand: denali_dt: make the core clock optional
The "nand_x" and "ecc" clocks are currently optional. Make the core
clock optional in the same way. This will allow platforms with no clock
driver support to use this driver.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Marek Vasut <marex@denx.de> # On SoCFPGA Arria V
Marek Vasut [Tue, 21 Jan 2020 19:03:09 +0000 (20:03 +0100)]
mtd: rawnand: denali-spl: Add missing hardware init on SoCFPGA
On Altera SoCFPGA, upon either cold-boot or power-on reset, the
Denali NAND IP is initialized by the BootROM ; upon warm-reset,
the Denali NAND IP is NOT initialized by BootROM. In fact, upon
warm-reset, the SoCFPGA BootROM checks whether the SPL image in
on-chip RAM is valid and if so, completely skips re-loading the
SPL from the boot media.
This does sometimes lead to problems where the software left
the boot media in inconsistent state before warm-reset, and
because the BootROM does not reset the boot media, the boot
media is left in this inconsistent state, often until another
component attempts to access the boot media and fails with an
difficult to debug failure. To mitigate this problem, the SPL
on Altera SoCFPGA always resets all the IPs on the SoC early
on boot.
This results in a couple of register values, pre-programmed by
the BootROM, to be lost during this reset. To restore correct
operation of the IP on SoCFPGA, these values must be programmed
back into the controller by the driver. Note that on other SoCs
which do not use the HW-controlled bootstrap, more registers
may have to be programmed.
This also aligns the SPL behavior with the full Denali NAND
driver, which sets these values in denali_hw_init().
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Fri, 31 Jan 2020 01:38:47 +0000 (20:38 -0500)]
Merge branch '2020-01-30-master-imports'
- Assorted minor fixes
- Revert
6dcb8ba4 from upstream libfdt to restore boot-time speed on
many platforms.
Peter Robinson [Thu, 30 Jan 2020 09:37:15 +0000 (09:37 +0000)]
Remove redundant YYLOC global declaration
Same as the upstream fix for building dtc with gcc 10.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Fabio Estevam [Wed, 29 Jan 2020 20:05:29 +0000 (17:05 -0300)]
Makefile: Fix the location of the migration file
Since commit
e1910d93b890 ("doc: driver-model: Convert MIGRATION.txt to
reST") MIGRATION.txt has been converted to migration.rst, so update
the Makefile references accordingly.
Fixes:
e1910d93b890 ("doc: driver-model: Convert MIGRATION.txt to reST")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Flavio Suligoi [Wed, 29 Jan 2020 08:56:05 +0000 (09:56 +0100)]
tools: buildman: fix typo
Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Flavio Suligoi [Wed, 29 Jan 2020 08:38:56 +0000 (09:38 +0100)]
net: fix typo
Signed-off-by: Flavio Suligoi <f.suligoi@asem.it>
Jorge Ramirez-Ortiz [Tue, 28 Jan 2020 22:16:21 +0000 (23:16 +0100)]
MAINTAINERS: board: hisi: poplar: update email
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Jorge Ramirez-Ortiz [Tue, 28 Jan 2020 22:16:20 +0000 (23:16 +0100)]
MAINTAINERS: board: qcom: db820c: update email
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>