Johannes Doerfert [Sun, 15 Jan 2023 19:28:03 +0000 (11:28 -0800)]
[OpenMP][JIT] Introduce more debugging configuration options
The JIT is a great debugging tool since we can modify the IR manually
before launching it in an existing test case. The new flasks allow to
skip optimizations, to use the exact given IR, as well as to provide a
finished object file. The latter is useful to try out different backend
options and to have complete freedom with pass pipelines.
Documentation is included. Minimal refactoring was performed to make the
second object fit in nicely.
Johannes Doerfert [Wed, 4 Jan 2023 19:33:44 +0000 (11:33 -0800)]
[OpenMP][JIT] Cleanup JIT interface, caching, and races
The JIT interface was somewhat irregular as it used multiple global
functions. It also did not cache the results of the JIT, hence multiple
GPU systems would perform the work multiple times. Finally, there might
have been races on the state if we have multi-threaded initialization of
different embedded images, or one image initialized on multiple devices.
This patch tries to rectify all of the above. The JITEngine is now a
part of the GenericPluginTy and tied to one target triple. To support
multiple "ComputeUnitKind"s (previously confusingly called Arch or
[M]CPU) and to avoid re-jitting for the same ComputeUnitKind, we keep a
map of JIT results per ComputeUnitKind. All interaction with the JIT
happens through the JITEngine directly, two functions are exposed. Both
use (shared) locks to avoid races and cache the result. All JIT-related
environment variables are now defined together.
Differential Revision: https://reviews.llvm.org/D141081
Johannes Doerfert [Wed, 28 Dec 2022 06:02:47 +0000 (22:02 -0800)]
[OpenMP][NFC] Introduce helper functions to hide casts and such
Differential Revision: https://reviews.llvm.org/D140719
Saagar Jha [Sun, 15 Jan 2023 19:09:27 +0000 (11:09 -0800)]
[lldb] Fix typos and update "GDB To LLDB Command Map" to be a bit more clear
I've gone through the GDB To LLDB Command Map and tried to improve it:
- Fix obvious typos (e.g. <cope> → <code>)
- Wrap code and program names in <code> tags
- Reword a couple parts where (IMHO) the phrasing could be a bit better
Differential revision: https://reviews.llvm.org/D28758
Roman Lebedev [Sun, 15 Jan 2023 17:20:44 +0000 (20:20 +0300)]
[DAGCombiner] `combineShuffleOfSplatVal()`: try to canonicalize to a splat shuffle
As noted in https://reviews.llvm.org/D141778#inline-1369900,
we fail to produce splat shuffles from certain sequences
of shuffles, that may have non-shuffles in the middle of seq.
There is a big pitfail to avoid here: just because `isSplatValue()`
says that all demanded elements are splat, we can't pick any random
one of them, because some of them could be undef! We must ignore those!
LLVM GN Syncbot [Sun, 15 Jan 2023 17:42:57 +0000 (17:42 +0000)]
[gn build] Port
94461822c75d
Matt Arsenault [Fri, 13 Jan 2023 21:15:52 +0000 (16:15 -0500)]
DAG: Avoid stack lowering if bitcast has an illegal vector result type
A bitcast of <10 x i32> to <5 x i64> was ending up on the
stack. Instead of doing that, handle the case where the new type
doesn't evenly divide but the elements do. Extract the individual
elements and pad with undef.
Avoids stack usage for bitcasts involving <5 x i64>. In some of these
cases, later optimizations actually eliminated the stack objects but
left behind the unused temporary stack object to final emission.
Fixes: SWDEV-377548
Hui Xie [Fri, 4 Nov 2022 11:53:38 +0000 (11:53 +0000)]
[libc++][ranges] implement `std::views::elements_view`
`subrange` is also a `tuple-like`. To avoid the add entire `subrange` dependencies to `tuple-like`, we need forward declaration of `subrange`. However, the class template constraints of `subrange` currently requires `__iterator/concepts.h`, which requires `<concepts>`. The problem is that currently `tuple-like` is used in several different places, including libc++ extension for pair constructors. we don't want to add `<concepts>` to pair and other stuff. So this change also created several small headers that `subrange`'s declaration needed inside `__iterator/concepts/`
Differential Revision: https://reviews.llvm.org/D136268
Chris Lattner [Sun, 15 Jan 2023 06:05:54 +0000 (22:05 -0800)]
[MLIR] Simplify predicate in Matchers.h, NFC
The ConstantLike trait already static_asserts that operations
implementing it have a single result and zero operands, so we
don't need to redundantly check in Matchers.h
The static assert is in `class ConstantLike` in OpDefinition.h
Differential Revision: https://reviews.llvm.org/D141783
Markus Böck [Sun, 15 Jan 2023 13:52:14 +0000 (14:52 +0100)]
[mlir][ods] Rework how transitive use of deprecated defs are handled
The code currently attempting to recursively find uses of a deprecated def has a few deficiences:
* It recurses into all def uses. This is problematic as it also causes any users of a def using a deprecated def, to be considered deprecated, causing a transitive chain of deprecated defs (see `H_ButNotTransitivelyInNonAnonymousDef` in test case for reproducer)
* It did not recurse into other kinds of fields, such as list and DAGs
This patch fixes the issue by reworking the code to properly recurse into inits and not to recurse into def uses unless they are anonymous defs. Since inits (including DAG, List and anonymous defs) are uniqued, the memoization is kept and remains profitable.
Differential Revision: https://reviews.llvm.org/D141794
Kazu Hirata [Sun, 15 Jan 2023 17:13:26 +0000 (09:13 -0800)]
[Support] clang-format partMSBpartMSB and partLSB (NFC)
Kazu Hirata [Sun, 15 Jan 2023 17:04:57 +0000 (09:04 -0800)]
Use the default parameters of countTrailingZeros and find{First,Last}Set (NFC)
This patch uses the default parameters of countTrailingZeros,
findFirstSet, and findLastSet, which are ZB_Width, ZB_Max, and ZB_Max,
respectively.
Matt Arsenault [Tue, 21 Jul 2020 23:10:01 +0000 (19:10 -0400)]
GlobalISel: Enable CSE for G_SEXT_INREG
Simon Pilgrim [Sun, 15 Jan 2023 15:43:19 +0000 (15:43 +0000)]
[X86] Move isShuffleMaskInputInPlace to allow additional uses in a future patch. NFCI.
A future patch needs isShuffleMaskInputInPlace defined earlier in the source file.
Matt Arsenault [Sun, 4 Dec 2022 04:24:01 +0000 (23:24 -0500)]
ValueTracking: Teach CannotBeOrderedLessThanZero about rounding intrinsics
These should obviously preserve the sign although the variety of these
always confuses me.
Roman Lebedev [Sun, 15 Jan 2023 14:22:55 +0000 (17:22 +0300)]
[NFC][X86] Ensure we don't manage to produce broadcast-from-mem in subvec splat-store tests
https://godbolt.org/z/jfx8jvPba
Roman Lebedev [Sun, 15 Jan 2023 13:49:50 +0000 (16:49 +0300)]
[NFC][X86] Add subvector splat-store tests
https://godbolt.org/z/oGn7KqrKs
Mark de Wever [Sat, 14 Jan 2023 15:46:15 +0000 (16:46 +0100)]
[NFC][libc++] Removes uneeded std:: prefixes.
Reviewed By: #libc, philnik
Differential Revision: https://reviews.llvm.org/D141766
Paul Walker [Wed, 4 Jan 2023 00:08:35 +0000 (00:08 +0000)]
[SVE][CGBuiltins] Remove need for instcombine from ACLE tests.
The SVE builtins tests rely on optimisations to remove clutter from
the resulting IR that is not relevant to the tests. However, with
the increasing number of target intrinsic combines the clang tests
are moving further away from verifying what is relevant to clang.
During early SVE (or rather scalable vector) bringup, we chose to
mitigate bugs by minimising our usage of LLVM IR instructions then
later implemented the combines to lower the calls to generic IR once
scalable vector support had matured. With the mitigations no longer
required and the combines mostly trivial I have moved the logic into
CGBuiltins, which allows the existing tests to remain unchanged once
they stop using instcombine.
The optimisations include:
* Using shifts in place of multiplies by power-of-two values.
* Don't emit getelementptrs when offset is zero.
* Use IR based vector splats rather than calls to dup_x.
* Use IR based vector selects rather than calls to sel.
* Use i64 based indices for insertelement.
The test changes are the result of "sed -i -e 's/instcombine,//'",
with the exception of acle_sve_dupq.c which required regeneration
due to its previous reliance on a zext->tunc->zext combine.
The following tests still rely on instcombine because they require
changes beyond CGBuiltin.cpp:
CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c
CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c
CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c
CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c
CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c
CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c
CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c
CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c
CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c
CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c
CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c
CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c
CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c
CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c
CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c
CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c
CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c
CodeGen/aarch64-sve-intrinsics/acle_sve_len.c
CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c
CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c
CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c
CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c
CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c
CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c
CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c
CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c
Tests within aarch64-sve2-intrinsics don't use opt but instead use
-O1 to cleanup their output. These tests remain unchanged and will
be visited by a later patch.
Depends on D140983
Differential Revision: https://reviews.llvm.org/D141056
Sergei Barannikov [Sun, 15 Jan 2023 07:31:07 +0000 (10:31 +0300)]
[CodeGen] Replace CCValAssign::Loc with std::variant (NFCI)
The motivation behind this change is as follows.
Targets with stack growing up (there are no such in-tree targets) pass
arguments at negative offsets relative to the stack pointer. This makes
it hard to use the generic value assigner because CCValAssign stores the
offset as an unsigned integer, which is then zero-extended when
converted to int64_t, e.g. when passing to `CreateFixedObject`. This
results in conversion of, for example, -4 into
4294967292, which is not
desired.
While it is possible to insert a cast to `int` before passing the result
of `getLocMemOffset` into `CreateFixedObject` in backend code, this is
error-prone, and some uses of `getLocMemOffset` are located in
places common to all backends (e.g. `CallLowering::handleAssignments`).
That said, I wanted to change the type of the memory offset from
`unsigned` to `int64_t` (this would be consistent with other places
where stack offsets are used). However, the `Loc` field which stores the
offset is shared between three different kinds of the location:
register, memory, and "pending". Storing a register number as `int64_t`
does not seem right (there are `Register` and `MCRegister` for this), so
I did the most straightforward change - replaced the `Loc` field with
std::variant.
The main change that changes the type of the memory offset from
`unsigned` to `int64_t` will be in a follow-up patch to simplify the
review.
Reviewed By: MaskRay, nikic
Differential Revision: https://reviews.llvm.org/D136043
Luo, Yuanke [Sun, 15 Jan 2023 04:19:36 +0000 (12:19 +0800)]
[X86] Add test case for folding select on vXi1
Kazu Hirata [Sun, 15 Jan 2023 05:10:14 +0000 (21:10 -0800)]
[libc] Use std::optional instead of llvm::Optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Kazu Hirata [Sun, 15 Jan 2023 04:56:10 +0000 (20:56 -0800)]
[cross-project-tests] Use std::optional instead of llvm::Optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Kazu Hirata [Sun, 15 Jan 2023 04:52:00 +0000 (20:52 -0800)]
[libc] Use std::optional instead of llvm::Optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Kazu Hirata [Sun, 15 Jan 2023 04:22:48 +0000 (20:22 -0800)]
[libc] Use std::optional instead of llvm::Optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Roman Lebedev [Sun, 15 Jan 2023 01:34:01 +0000 (04:34 +0300)]
[NFC][X86][Codegen] Extend tests for splat-storing the same scalar to memory
Looking at the changes, we might or might not care about the vector width
https://godbolt.org/z/7zfzThnYG
Roman Lebedev [Sun, 15 Jan 2023 00:49:16 +0000 (03:49 +0300)]
[NFC][X86][Codegen] Add tests for splat-storing the same scalar to memory
Kazu Hirata [Sun, 15 Jan 2023 00:37:11 +0000 (16:37 -0800)]
[flang] Do not include llvm/ADT/Optional.h (NFC)
Kazu Hirata [Sat, 14 Jan 2023 23:26:28 +0000 (15:26 -0800)]
[gtest] Use std::optional instead of llvm::Optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Keith Smiley [Fri, 13 Jan 2023 22:17:07 +0000 (14:17 -0800)]
[lld-macho] Improve invalid fat binary warning
This nearly mirrors ld64's error for this case:
ld: warning: ignoring file path/to/file, file is universal (armv7,arm64) but does not contain the x86_64 architecture: path/to/file
Differential Revision: https://reviews.llvm.org/D141729
Fangrui Song [Sat, 14 Jan 2023 23:20:53 +0000 (15:20 -0800)]
Remove deleted file from module map
Kazu Hirata [Sat, 14 Jan 2023 23:09:00 +0000 (15:09 -0800)]
[llvm] Include <optional> instead of "llvm/ADT/Optional.h" (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Kazu Hirata [Sat, 14 Jan 2023 22:06:18 +0000 (14:06 -0800)]
Remove redundant initialization of std::optional (NFC)
Kazu Hirata [Sat, 14 Jan 2023 21:53:40 +0000 (13:53 -0800)]
Use std::nullopt instead of None in comments (NFC)
Kazu Hirata [Sat, 14 Jan 2023 21:37:25 +0000 (13:37 -0800)]
[clang] Remove remaining uses of llvm::Optional (NFC)
This patch removes several "using" declarations and #include
"llvm/ADT/Optional.h".
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Simon Pilgrim [Sat, 14 Jan 2023 20:09:28 +0000 (20:09 +0000)]
[X86] Add absolute-difference vector tests
X86 doesn't have absdiff instructions, but we should be able to canonicalize to avoid unnecessary scalarization/extensions/selects
Simon Pilgrim [Sat, 14 Jan 2023 19:36:33 +0000 (19:36 +0000)]
[X86] Add absolute-difference scalar tests
X86 doesn't have absdiff instructions, but we should be able to canonicalize to avoid unnecessary extensions/selects
Tom Praschan [Fri, 30 Dec 2022 11:28:29 +0000 (12:28 +0100)]
[clangd] Hover: show CalleeArgInfo for literals and expressions
This is very useful when inlay hints are disabled.
Also, improve presentation of Hover when variable is passed by value to
a function with an unnamed parameter
Differential Revision: https://reviews.llvm.org/D140775
Andrew Savonichev [Wed, 11 Jan 2023 17:48:06 +0000 (20:48 +0300)]
[NVPTX] Drop memory references of LDG/LDU
This patch fixes machine verifier errors:
*** Bad machine code: Missing mayLoad flag ***
- function: foo1
- basic block: %bb.0 (0x5560fc64ef08)
- instruction: %4:float32regs =
INT_PTX_LDG_GLOBAL_f32areg64 killed %3:int64regs
:: (load (s32) from %ir.from1, addrspace 1)
mayLoad flag is missing because LDG and LDU instructions operate on
read-only memory, so we want to treat them as regular instructions and
exclude them from memory analysis.
Machine verifier checks for memoperands to determine whether an
instruction is a load, so dropping them during lowering fixes the
problem.
Differential Revision: https://reviews.llvm.org/D112466
Kazu Hirata [Sat, 14 Jan 2023 20:31:01 +0000 (12:31 -0800)]
[clang] Use std::optional instead of llvm::Optional (NFC)
This patch replaces (llvm::|)Optional< with std::optional<. I'll post
a separate patch to remove #include "llvm/ADT/Optional.h".
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Craig Topper [Sat, 14 Jan 2023 19:18:47 +0000 (11:18 -0800)]
[InstCombine] Optimize (icmp slt (1 << Y), 1) -> (icmp eq Y, BitWidth-1).
The code tried to do this for (icmp sle (1 << Y), 0), but that is
canonicalized to sgt before we get there.
Simplify the code by removing the unreachable SGE and SLE handling.
Also remove the (1 << Y) >=u
2147483648 and (1 << Y) <u
2147483648
handling since those are canonicalized to (1 << Y) <s 0 and
(1 << Y) >=s 0 before we get there.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D141753
Kazu Hirata [Sat, 14 Jan 2023 19:07:21 +0000 (11:07 -0800)]
[clang] Add #include <optional> (NFC)
This patch adds #include <optional> to those files containing
llvm::Optional<...> or Optional<...>.
I'll post a separate patch to actually replace llvm::Optional with
std::optional.
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Carlos Galvez [Sat, 14 Jan 2023 17:40:54 +0000 (17:40 +0000)]
[clang-tidy][NFC] Use C++17 nested namespaces in the clang-tidy folder
Fix applied by running:
run-clang-tidy.py -checks=-*,modernize-concat-nested-namespaces
Differential Revision: https://reviews.llvm.org/D141770
Simon Pilgrim [Sun, 1 Jan 2023 13:11:51 +0000 (13:11 +0000)]
[X86] Fix SLM uops/resources counts for XADD/XCHG reg-reg instructions
The RMW instructions still need addressing, probably with a new 'WriteXCHGRMW' scheduler class.
Based off llvm-exegesis captures, confirmed with Agner + uops.info
Kirill Stoimenov [Sat, 14 Jan 2023 18:23:39 +0000 (18:23 +0000)]
[HWASAN][Fuchsia] Fixed Fuchsia build.
Reviewed By: kstoimenov
Differential Revision: https://reviews.llvm.org/D141771
Roman Lebedev [Sat, 14 Jan 2023 16:35:42 +0000 (19:35 +0300)]
[NFC][Codegen][X86] Improve test coverage for wide shift legalization
James Le Cuirot [Sat, 7 Jan 2023 13:52:39 +0000 (13:52 +0000)]
[llvm] Don't require third-party components when cross-compiling
It is possible to build LLVM with just the "llvm" and "cmake" components
checked out. This requires disabling the `LLVM_INCLUDE_BENCHMARKS` and
`LLVM_INCLUDE_TESTS` options. These options are not passed through to
the native build when cross-compiling though, so the build will break if
the "third-party" component is missing. We don't need the benchmarks or
tests for the native build, so disable these unconditionally. This fixes
cross-compiling on Gentoo, where only the required components are
checked out.
Differential Revision: https://reviews.llvm.org/D141196
Markus Böck [Sat, 14 Jan 2023 16:41:15 +0000 (17:41 +0100)]
[mlir][tblgen] Fix undefined behaviour found by MSVC debug iterators
Incrementing past the end iterator of any container in C++ is immediate undefined behaviour.
This is guaranteed to occur in the loop condition due to the expression cur = earlyIncIt++, which when earlyIncIt is the end iterator (aka we just did the last iteration of the loop), will do an increment on the end iterator.
To fix this, the patch refactors the loop to a more conventional loop using iterators, with the only difference being that the increment happens through the erase operation, which conveniently returns an iterator to the element after the erased element. Thanks to that guarantee there is also no need to use std::list over std::vector.
I also opted to reduce the inner loop find_if, because I felt splitting the "search" and the effects of if it was successful made the code (subjectively) nicer, and also avoided having to add an extra "bool erased" to the outer loop body.
Differential Revision: https://reviews.llvm.org/D141758
Haojian Wu [Sat, 14 Jan 2023 16:46:39 +0000 (17:46 +0100)]
Fix a -Wgnu-designator warning, NFC.
Roman Lebedev [Sat, 14 Jan 2023 15:55:24 +0000 (18:55 +0300)]
[Codegen][LegalizeIntegerTypes] New legalization strategy for scalar shifts: shift through stack
https://reviews.llvm.org/D140493 is going to teach SROA how to promote allocas
that have variably-indexed loads. That does bring up questions of cost model,
since that requires creating wide shifts.
Indeed, our legalization for them is not optimal.
We either split it into parts, or lower it into a libcall.
But if the shift amount is by a multiple of CHAR_BIT,
we can also legalize it throught stack.
The basic idea is very simple:
1. Get a stack slot 2x the width of the shift type
2. store the value we are shifting into one half of the slot
3. pad the other half of the slot. for logical shifts, with zero, for arithmetic shift with signbit
4. index into the slot (starting from the base half into which we spilled, either upwards or downwards)
5. load
6. split loaded integer
This works for both little-endian and big-endian machines:
https://alive2.llvm.org/ce/z/YNVwd5
And better yet, if the original shift amount was not a multiple of CHAR_BIT,
we can just shift by that remainder afterwards: https://alive2.llvm.org/ce/z/pz5G-K
I think, if we are going perform shift->shift-by-parts expansion more than once,
we should instead go through stack, which is what this patch does.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140638
Simon Pilgrim [Sat, 14 Jan 2023 15:24:35 +0000 (15:24 +0000)]
[X86] vector-reduce-and-bool.ll - add 'is allones' test coverage
Tomas Matheson [Fri, 9 Dec 2022 11:36:06 +0000 (11:36 +0000)]
[AArch64] Reland "Improve TargetParser API"
Reworked after several other major changes to the TargetParser since
this was reverted. Combined with several other changes.
Inline calls for the following macros and delete AArch64TargetParser.def:
AARCH64_ARCH, AARCH64_CPU_NAME, AARCH64_CPU_ALIAS, AARCH64_ARCH_EXT_NAME
Squashed changes from D139278 and D139102.
Differential Revision: https://reviews.llvm.org/D138792
Simon Pilgrim [Sat, 14 Jan 2023 14:02:17 +0000 (14:02 +0000)]
[X86] Add SSE/AVX1/AVX2 + f16/f32 test coverage to splat(fpext) tests
As discussed on D141657
Mehdi Amini [Sat, 14 Jan 2023 04:52:46 +0000 (04:52 +0000)]
Apply clang-tidy fixes for performance-unnecessary-value-param in IntRangeOptimizations.cpp (NFC)
Kazu Hirata [Sat, 14 Jan 2023 09:34:49 +0000 (01:34 -0800)]
[mlir] Remove remaining uses of llvm::Optional (NFC)
This patch removes one "using" declaration and #include
"llvm/ADT/Optional.h". It keeps several "using" declarations in
headers for downstream users.
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Kazu Hirata [Sat, 14 Jan 2023 09:25:58 +0000 (01:25 -0800)]
[mlir] Use std::optional instead of llvm::Optional (NFC)
This patch replaces (llvm::|)Optional< with std::optional<. I'll post
a separate patch to remove #include "llvm/ADT/Optional.h".
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Craig Topper [Sat, 14 Jan 2023 08:37:18 +0000 (00:37 -0800)]
[InstCombine] Add test coverage for (icmp sgt/sle (1 << Y), 0). NFC"
We already optimize the sgt case to (icmp ne Y, BitWidth-1), but
we miss optimizing sle because it canonicalizes to (icmp slt (1 << X), 1)
first.
Craig Topper [Sat, 14 Jan 2023 08:37:01 +0000 (00:37 -0800)]
Revert "[InstCombine] Add test coverage for (icmp slt/sge (1 << Y), 0). NFC"
This reverts commit
e25f2287dd7d6854b0bbfb9878fecdbbad21038d.
I messed up the predicates in the description.
Craig Topper [Sat, 14 Jan 2023 08:31:14 +0000 (00:31 -0800)]
[InstCombine] Add test coverage for (icmp slt/sge (1 << Y), 0). NFC
We already optimize the slt case to (icmp eq Y, BitWidth-1), but
we miss optimizing sge because it canonicalizes to (icmp sgt (1 << X), 1)
first.
Craig Topper [Sat, 14 Jan 2023 06:57:36 +0000 (22:57 -0800)]
[CodeGen][Target] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
Use isPhysical/isVirtual methods.
Phoebe Wang [Sat, 14 Jan 2023 03:18:56 +0000 (11:18 +0800)]
[X86] Do not lower INSERT_VECTOR_ELT to vselect for vXf16 without BWI
We cannot handle i8/i16/f16 vselect without BWI.
Fixes #59980
Reviewed By: RKSimon, skan
Differential Revision: https://reviews.llvm.org/D141668
NAKAMURA Takumi [Sat, 14 Jan 2023 06:12:20 +0000 (15:12 +0900)]
JITLink/ELF_i386.cpp: Fix a warning in D141746. [-Wswitch]
Kirill Stoimenov [Sat, 14 Jan 2023 04:19:46 +0000 (20:19 -0800)]
[LSAN][Fuchsia] Added ForEachExtraThreadStackRange to support Fuchsia code.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D141724
Kazu Hirata [Sat, 14 Jan 2023 05:05:06 +0000 (21:05 -0800)]
[mlir] Add #include <optional> (NFC)
This patch adds #include <optional> to those files containing
llvm::Optional<...> or Optional<...>.
I'll post a separate patch to actually replace llvm::Optional with
std::optional.
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Kshitij Jain [Sat, 14 Jan 2023 01:31:43 +0000 (01:31 +0000)]
Fixes handling logic for i386/ELF GOTPC relocation
The i386/ELF JITLink backend was not correctly handling the GOTPC relocation
by skipping the in-built addend, which was manifesting itself in the form of
a segmentation fault in the `LF_external_to_absolute_conversion.s` test. This
CR has fixed that issue.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D141746
Jan Svoboda [Sat, 14 Jan 2023 02:38:09 +0000 (18:38 -0800)]
[clang] Report the on-disk paths for inputs to module compiles
Since D135636, PCM files contain the "as requested" path of input files. The machinery for generating dependency files reports those paths as they appeared in the PCM file, which may confuse consumers that are not aware of VFS overlays that might've been in place at compile-time.
This patch makes sure the "use-external-name" setting is being respected when generating dependency files in modular builds by piping the paths serialized in PCMs through `FileEntryRef::getName()` before putting them into dependency files.
rdar://
103459532
Reviewed By: benlangmuir
Differential Revision: https://reviews.llvm.org/D141644
Nikolas Klauser [Mon, 9 Jan 2023 21:27:06 +0000 (22:27 +0100)]
[libc++] Add [[clang::lifetimebound]] attribute to std::forward and friends
This allows clang to catch lifetime bugs through these functions.
As a drive-by, replace `_LIBCPP_INLINE_VISIBILITY` with `_LIBCPP_HIDE_FROM_ABI`.
Fixes #59900
Reviewed By: ldionne, #libc
Spies: rsmith, rnk, aaron.ballman, libcxx-commits
Differential Revision: https://reviews.llvm.org/D141321
Khem Raj [Sat, 14 Jan 2023 01:44:38 +0000 (17:44 -0800)]
[hwasan] Replace j __interceptor_sigsetjmp instead with tail for RISC-V
R_RISCV_JAL referencing a preemptible symbol is disallowed with ld.lld and binutils 2.40 (https://sourceware.org/PR28509)
riscv64-yoe-linux-ld: relocation R_RISCV_JAL against `__interceptor_sigsetjmp' which may bind externally can not be used when making a shared object; recompile with -fPIC
Reviewed By: kito-cheng, MaskRay
Differential Revision: https://reviews.llvm.org/D141656
Matt Arsenault [Sat, 7 Jan 2023 22:38:17 +0000 (17:38 -0500)]
DAG/GlobalISel: Fix broken/redundant setting of MODereferenceable
This was incorrectly setting dereferenceable on unaligned
operands. getLoadMemOperandFlags does the alignment dereferenceabilty
check without alignment, and then both paths went on to check
isDereferenceableAndAlignedPointer. Make getLoadMemOperandFlags check
isDereferenceableAndAlignedPointer, and remove the second call.
Matt Arsenault [Fri, 13 Jan 2023 19:50:07 +0000 (14:50 -0500)]
AArch64/GlobalISel: Regenerate test checks
Mehdi Amini [Sat, 14 Jan 2023 01:22:05 +0000 (01:22 +0000)]
Fix scf.while verifier crash (NFC)
Harden the verifier against invalid IR.
Mehdi Amini [Thu, 12 Jan 2023 22:09:42 +0000 (22:09 +0000)]
Refactor OperationName to use virtual tables for dispatch (NFC)
This streamlines the implementation and makes it so that the virtual tables are in the binary instead of dynamically assembled during initialization.
The dynamic allocation size of op registration is also smaller with this
change.
Differential Revision: https://reviews.llvm.org/D141492
NAKAMURA Takumi [Sun, 8 Jan 2023 11:39:09 +0000 (20:39 +0900)]
[Bazel] Use `LLVM_VERSION` from `llvm/CMakeLists.txt`
* Generate `//:vars.bzl` from `llvm/CMakeLists.txt`
`_extract_cmake_settings()` generates `//:vars.bzl` in `llvm_configure()`.
It would be easier to use external commands like sed(1) and python.
For portability, I think the parser should run on Starlark.
`@llvm-project//:vars.bzl` may be loaded from both WORKSPACE and BUILD.
At the moment, `vars.bzl` provides some values as string.
- CMAKE_CXX_STANDARD = "17"
- LLVM_VERSION_MAJOR = "16"
- LLVM_VERSION_MINOR = "0"
- LLVM_VERSION_PATCH = "0"
- LLVM_VERSION = "16.0.0"
- llvm_vars = (dict of these values)
`CMAKE_CXX_STANDARD` may be used to configure toolchain.
* Use `//vars.bzl` for each BUILD files
It would be smarter if the BUILD phase could generate `llvm-config.h`.
Since I am afraid of the discussion in D126581, I just remove
LLVM_VERSION stuff out of the static `llvm-config.h`.
* Eliminate Bazel stuff in 'bump-version.py'
Current version of `bump-version.py` tries to substitute CLANG_VERSION.
It is the reason why I modify bump-version in this change rather than
incoming patch.
Differential Revision: https://reviews.llvm.org/D136392
Youling Tang [Sat, 14 Jan 2023 01:23:15 +0000 (09:23 +0800)]
[lsan] Add lsan support for loongarch64
This patch enabled lsan for loongarch64 with 47-bit VMA layout.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D139686
Hui Li [Fri, 13 Jan 2023 02:26:05 +0000 (10:26 +0800)]
[LLDB][LoongArch] Add FP branch instructions for EmulateInstructionLoongArch
Add floating-point branch Instructions for EmulateInstructionLoongArch and
add relevant unit tests.
Without this patch:
```
$ ninja check-lldb-unit
[0/1] Running lldb unit test suite
Testing Time: 10.45s
Passed: 1044
```
With this patch:
```
$ ninja check-lldb-unit
[0/1] Running lldb unit test suite
Testing Time: 10.20s
Passed: 1048
```
Reviewed By: SixWeining, MaskRay, DavidSpickett
Differential Revision: https://reviews.llvm.org/D140759
Hui Li [Fri, 13 Jan 2023 02:26:05 +0000 (10:26 +0800)]
[LLDB][LoongArch] Delete the s9 register alias definition
In RegisterInfos_loongarch64.h, r22 is defined twice. Having an extra array
member causes problems reading and writing registers defined after r22. So,
for r22, keep the alias fp, delete the s9 alias.
The PC register is incorrectly accessed when the step command is executed.
The step command behavior is incorrect.
This test reflects this problem:
```
loongson@linux:~$ cat test.c
#include <stdio.h>
int func(int a) {
return a + 1;
}
int main(int argc, char const *argv[]) {
func(10);
return 0;
}
loongson@linux:~$ clang -g test.c -o test
```
Without this patch:
```
loongson@linux:~$ llvm-project/llvm/build/bin/lldb test
(lldb) target create "test"
Current executable set to '/home/loongson/test' (loongarch64).
(lldb) b main
Breakpoint 1: where = test`main + 40 at test.c:8:3, address = 0x0000000120000668
(lldb) r
Process 278049 launched: '/home/loongson/test' (loongarch64)
Process 278049 stopped
* thread #1, name = 'test', stop reason = breakpoint 1.1
frame #0: 0x0000000120000668 test`main(argc=1, argv=0x00007fffffff72a8) at test.c:8:3
5 }
6
7 int main(int argc, char const *argv[]) {
-> 8 func(10);
9 return 0;
10 }
11
(lldb) s
Process 278049 stopped
* thread #1, name = 'test', stop reason = step in
frame #0: 0x0000000120000670 test`main(argc=1, argv=0x00007fffffff72a8) at test.c:9:3
6
7 int main(int argc, char const *argv[]) {
8 func(10);
-> 9 return 0;
10 }
```
With this patch:
```
loongson@linux:~$ llvm-project/llvm/build/bin/lldb test
(lldb) target create "test"
Current executable set to '/home/loongson/test' (loongarch64).
(lldb) b main
Breakpoint 1: where = test`main + 40 at test.c:8:3, address = 0x0000000120000668
(lldb) r
Process 278632 launched: '/home/loongson/test' (loongarch64)
Process 278632 stopped
* thread #1, name = 'test', stop reason = breakpoint 1.1
frame #0: 0x0000000120000668 test`main(argc=1, argv=0x00007fffffff72a8) at test.c:8:3
5 }
6
7 int main(int argc, char const *argv[]) {
-> 8 func(10);
9 return 0;
10 }
11
(lldb) s
Process 278632 stopped
* thread #1, name = 'test', stop reason = step in
frame #0: 0x0000000120000624 test`func(a=10) at test.c:4:10
1 #include <stdio.h>
2
3 int func(int a) {
-> 4 return a + 1;
5 }
```
Reviewed By: SixWeining, DavidSpickett
Differential Revision: https://reviews.llvm.org/D140615
NAKAMURA Takumi [Sat, 14 Jan 2023 00:58:16 +0000 (09:58 +0900)]
MachineScheduler.cpp: Fixup D141707, suppress `MISchedDumpReservedCycles` conditionally.
It is used in `LLVM_ENABLE_DUMP` regardless of `NDEBUG`.
LLVM GN Syncbot [Sat, 14 Jan 2023 00:57:59 +0000 (00:57 +0000)]
[gn build] Port
5629d492df38
varconst [Sat, 14 Jan 2023 00:56:58 +0000 (16:56 -0800)]
Reapply "[libc++][ranges]Refactor `copy{,_backward}` and `move{,_backward}`"
This reverts commit
a6e1080b87db8fbe0e1afadd96af5a3c0bd5e279.
Fix the conditions when the `memmove` optimization can be applied and refactor them out into a reusable type trait, fix and significantly expand the tests.
Differential Revision: https://reviews.llvm.org/D139235
Fangrui Song [Sat, 14 Jan 2023 00:36:25 +0000 (16:36 -0800)]
[test] Deprecated llvm::TypeSize::getFixedSize => getFixedValue
Fangrui Song [Sat, 14 Jan 2023 00:28:44 +0000 (16:28 -0800)]
Fix some -Wconstant-conversion warnings for future Clang (D139114)
Lang Hames [Fri, 13 Jan 2023 07:17:46 +0000 (23:17 -0800)]
[ORC] Introduce deferred allocation-actions scheme for MachOPlatform bootstrap.
This patch modifies the MachOPlatform bootstrap process to record allocation
actions for ORC runtime platform support code in a "deferred actions" vector
rather than attaching it to the corresponding LinkGraphs up-front. The deferred
allocation-actions are run after all the platform support code has been loaded
by attaching them to a separate "bootstrap-complete" graph.
This change should allow the mach-o platform support code in the ORC runtime to
use advanced mach-o platform features (e.g. static inits, TLVs), provided that
the support code does not use these features at runtime before the bootstrap
process completes, or after the shutdown process starts. This is a nice
improvement in and of itself but is motivated by specific future plans: we
want to start recording unwind info in the mach-o platform state object*, and
the recording functions will have their own frame info that needs registering.
The deferred allocation-actions scheme allows for this.
* The plan is to add a new unwind-info-lookup path to libunwind to allow it to
call back to the ORC runtime to find unwind sections. This will simplify the
implementation of support for JIT'd compact-unwind info.
yijiagu [Fri, 13 Jan 2023 23:56:17 +0000 (15:56 -0800)]
[mlir][async] Allow to call async.execute inside async.func
This change added support of calling async execute inside async.func.
Ex.
```
async.func @async_func_call_func() -> !async.token {
%token = async.execute {
%c0 = arith.constant 0 : index
memref.store %arg0, %arg1[%c0] : memref<1xf32>
async.yield
}
async.await %token : !async.token
return
}
```
Reviewed By: ezhulenev
Differential Revision: https://reviews.llvm.org/D141730
Valery N Dmitriev [Fri, 13 Jan 2023 21:15:44 +0000 (13:15 -0800)]
[SLP] Remove unused check label from test - NFC
NAKAMURA Takumi [Fri, 13 Jan 2023 23:47:24 +0000 (08:47 +0900)]
Revert "[Clang][Sema] Enabled implicit conversion warning for CompoundAssignment operator."
This reverts commit
4c37671a7c946ac246b52fa44a6a649b89d6310b,
aka llvmorg-16-init-17246-g4c37671a7c94
This caused many warnings in the current llvm codebase.
Owen Pan [Fri, 13 Jan 2023 05:14:03 +0000 (21:14 -0800)]
[clang-format] Replace DeriveLineEnding and UseCRLF with LineEnding
Below is the mapping:
LineEnding DeriveLineEnding UseCRLF
LF false false
CRLF false true
DeriveLF true false
DeriveCRLF true true
Differential Revision: https://reviews.llvm.org/D141654
LLVM GN Syncbot [Fri, 13 Jan 2023 23:10:51 +0000 (23:10 +0000)]
[gn build] Port
fdc0bf6adcee
Paul Kirth [Fri, 13 Jan 2023 23:07:23 +0000 (23:07 +0000)]
Revert "[LoongArch][M68k] Add 'Stack Frame Layout Analysis' to pipeline tests. NFC"
I missed that a forward fix was out when reverting
0a652c540556a118bbd9386ed3ab7fd9e60a9754.
This reverts commit
488bea797e167e6bf5ddab5f7eea78031b575ba0.
Paul Kirth [Fri, 13 Jan 2023 22:59:36 +0000 (22:59 +0000)]
Revert "[codegen] Add StackFrameLayoutAnalysisPass"
This breaks on some AArch64 bots
This reverts commit
0a652c540556a118bbd9386ed3ab7fd9e60a9754.
Joseph Huber [Fri, 13 Jan 2023 22:53:11 +0000 (16:53 -0600)]
[OpenMP][Docs] Remove documentation on removed option
Summary:
Removes this `CLANG_OPENMP_NVPTX_DEFAULT_ARCH` documentation as it's now
been removed.
Joseph Huber [Fri, 13 Jan 2023 20:57:34 +0000 (14:57 -0600)]
[Clang] Remove `CLANG_OPENMP_NVPTX_DEFAULT_ARCH` CMake option.
The `CLANG_OPENMP_NVPTX_DEFAULT_ARCH` is a static build configuration to
set the default OpenMP value. This was replaced in D141708 with the use
of the `nvptx-arch` tool which lets us query this at runtime instead.
This makes the behaviour between AMD and NVIDIA be more consisten and
allows users to have a default architecture that does not rely on
whoever configured the LLVM build.
Depends on D141708
Reviewed By: tra, MaskRay
Differential Revision: https://reviews.llvm.org/D141723
Joseph Huber [Fri, 13 Jan 2023 18:36:09 +0000 (12:36 -0600)]
[OpenMP] Make `-fopenmp-target=` use the `nvptx-arch` tool
Previously, if the user did not provide an architecture when using
`-fopenmp-targets=nvptx64` we used the value from
`CLANG_OPENMP_DEFAULT_NVPTX_ARCH` which is defined at compile time. This
isn't ideal because it means that the default is set when the LLVM
compiler it built. Instead this patch uses the `nvptx-arch` tool to
query it at runtime. This matches the existing behaviour of the AMDGPU
toolchain with its `amdgpu-arch` tool.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D141708
Craig Topper [Fri, 13 Jan 2023 22:50:11 +0000 (14:50 -0800)]
[LoongArch][M68k] Add 'Stack Frame Layout Analysis' to pipeline tests. NFC
These targets were missed in D135488.
Craig Topper [Fri, 13 Jan 2023 22:38:08 +0000 (14:38 -0800)]
[CodeGen] Remove uses of Register::isPhysicalRegister/isVirtualRegister. NFC
Use isPhysical/isVirtual methods.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D141715
Vitaly Buka [Fri, 13 Jan 2023 22:29:51 +0000 (14:29 -0800)]
[NFC] Suppress warning after D139114
Sanjay Patel [Fri, 13 Jan 2023 20:55:40 +0000 (15:55 -0500)]
[InstCombine] fold pow(X,Y) / X -> pow(X, Y-1)
This is one of the patterns suggested in issue #34943.
Sanjay Patel [Fri, 13 Jan 2023 20:31:14 +0000 (15:31 -0500)]
[InstCombine] fold pow(X,Y) * X -> pow(X, Y+1) (with fast-math)
This is one of the patterns suggested in issue #34943.
Sanjay Patel [Fri, 13 Jan 2023 20:10:09 +0000 (15:10 -0500)]
[InstCombine] add more tests for pow reassociation; NFC
Michal Paszkowski [Fri, 13 Jan 2023 21:56:06 +0000 (22:56 +0100)]
[SPIR-V] Fix switch lowering with common compare register
Differential Revision: https://reviews.llvm.org/D141203
Christopher Bate [Fri, 13 Jan 2023 21:37:22 +0000 (14:37 -0700)]
[mlir][gpu] Fix another windows build issue
Fixes another Windows build failure (C4715) caused by
6ca1a09f03e8e940f306bea73efa935e4ee38173.