freedreno: Massage scissor state at bind time

All the generations want maxx/maxy to be inclusive rather than
exclusive, so shift the subtract-one nonsense to bind time rather
than emit time.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19236>

freedreno: support multiple viewports

Core plumbing to have multiple viewport support.  Each viewport has it's
own scissor state.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19236>

freedreno/a6xx: Support AMD_vertex_shader_layer

Another thing we already supported but didn't set the cap.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19236>

freedreno/a6xx: Fix buffer size clamping

Fixes spec@arb_texture_buffer_object@texture-buffer-size-clamp@* which
we start hitting after exposing glsl420

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19236>

freedreno/ir3: Drop unused view_zero/layer_zero lowering

Previous patch removed the only remaining user.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19236>

freedreno/a6xx: Move layer_zero handling to interp state

We can just bake this into the program state, rather than making it a
shader variant.  Turnip had already switched to this approach so it will
let us drop ir3 lowering for this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19236>

freedreno: Don't advertise TGSI support for GS/tess

tgsi_to_nir doesn't support these, and we long ago removed support for
consuming TGSI without tgsi_to_nir.  So don't claim to support this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19236>

Revert "mesa/st: ARB_vertex_attrib_64bit depend on glsl>=410"

Turns out this change was unnecessary

This reverts commit 533b87dff09a0434cd2c0c22718d117501e17915.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19236>

ac/nir/ngg: fix emitting streamout output by using packed location

In RadeonSI, they are packed but not in RADV, so don't rely on driver
locations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19343>

rusticl/kernel: fix more 32 bit problems

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19353>

radv: move nir_opt_idiv_const/nir_lower_idiv after NGG lowering

NGG streamout lowering creates some idiv instructions that need to be
lowered.

No fossil-db results because it's currently broken.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19364>

radv/llvm: fix dual source blending on GFX11

Untested but this should be similar to RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19367>

radv: fix VRS limit when attachmentFragmentShadingRate is disabled

Can be reproduced on GFX10.3 with RADV_DEBUG=nohiz.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19374>

zink: don't double-deref bindless texture arrays in shaders

these are already dereferenced

Fixes: b2fcb34e976 ("zink: rework sampler emission")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19377>

iris: Fix enablement of protected contexts

I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS needs to set otherwise
i915 will ignore the extensions.

Fixes: 57a1d13279c6 ("iris: enable protected contexts")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19373>

v3dv: split event implementation to a separate file

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19366>

v3dv: return out of host memory if we fail to create event pipelines

Fixes: ecb01d53fd ('v3dv: refactor events')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19366>

pvr: remove implicit sync support

This is the legacy way of doing synchronisation and is no longer necessary now
that the DMA_BUF_IOCTL_EXPORT_SYNC_FILE / DMA_BUF_IOCTL_IMPORT_SYNC_FILE ioctls
exist, which the wsi code is already making use of.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19293>

drirc: Apply fp64_workaround_enabled to DOOM Eternal

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6847
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>

drirc: Add fp64_workaround_enabled option

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>

anv: Add softtp64 workaround

Pass float64.glsl into nir_lower_doubles() resolves the problem on
ICL/TGL when the shader uses float64, but the device doesn't support
that type.

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>

anv/meson: Add float64_spv_h custom target

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>

glsl/meson: Add variable to export float64.glsl

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>

nir: Add assert in nir_lower_doubles

Cc: mesa-stable
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>

nir: Make lower_double_ops recognize SPIR-V mangling

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>

util: Add glsl2spirv.py script

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>

iris: Enable INTEL_MEASURE for compute dispatches on XeHP

Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19324>

etnaviv: blt: try to find exact format match first

For MSAA downsampling to work correctly, the BLT engine needs to know
the exact format of the blit source/target. The compatible formats are
fine as long as the BLT is only used as a tiler without doing any
conversion.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19349>

etnaviv: blt: scale operations by MSAA mode

Same as with the RS engine, BLT operations need to be scaled by
the MSAA size.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19349>

radv: fix suspending/resuming pipeline statistics queries with GDS

This probably doesn't fix anything in practice because GDS is only
used for the number of generated primitives by GS and meta operations
don't use GS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19348>

ac/nir/ngg: fix emitting streamout output by using packed location

In RadeonSI, they are packed but not in RADV, so don't rely on driver
locations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19365>

intel/compiler: don't allocate compaction arrays on the stack

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7569
Cc: mesa-stable
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19339>

v3dv: re-enable sync_fd import/export

Now that we implement GPU-side event functions in the GPU we
no longer have the issue that didn't allow us to expose
sync_fd.

Further more, new spec text has also made the problematic
behavior undefined, so the test that caused this issue,
dEQP-VK.api.external.semaphore.sync_fd.import_twice_temporary,
is incorrect and should be fixed.

It should be noted that we still keep sync_fd disabled in the
simulator, at least until the CTS tests are fixed, since the
synchronous execution model of the simulator means that in the
problematic scenario we can block the CPU on the execution
of the command buffer before we ever submit the signaling job,
still causing a deadlock.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19313>

v3dv: refactor events

This replaces our current implementation, which is 100% CPU based,
with an implementation that uses compute shaders for the GPU-side
event functions. The benefit of this solution is that we no longer
need to stall on the CPU when we need to handle GPU-side event
commands.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19313>

broadcom/compiler: handle vec2 load/store index

In vulkan, we load descriptors via vulkan resource index, which
returns a vec2, of which we want component 0 which holds the actual
index. Typically, this will be cleaned-up by the time we get to
emitting VIR so the index is a single scalar component, but there
are some cases where this might no be the case, so make sure we don't
assume it to be a scalar, like we do in other places.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19313>

llvmpipe: check rectangle vertices have equal W components

The attribute interpolation code does not handle perspective
correction.  But it's OK if the vertex W components are non-one as
long as they're equal.

This fixes about 30 CTS/dEQP tests.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19331>

intel/dev: Set display_ver = 13 on all ADL/RPL/DG2

display_ver doesn't seem to be used anywhere, but if that were to
change, we'd want this to be consistent.

Fixes: c746bf4c5c8 ("intel/dev: Add display_ver and set adl-p to 13")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19354>

zink: remove leftover work_dim lowering code

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19362>

rusticl/kernel: add work_dim lowering

No driver implements this in hardware, so let's implement it once in the
frontend.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19362>

rusticl/kernel: lower system values before gathering info

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19362>

rusticl/nir: add reads_sysval wrapper

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19362>

rusticl: add small bitset impl

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19362>

zink: always add MUTABLE with EXTENDED_USAGE for image creation

this otherwise makes little sense

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19018>

zink: don't force attachment usage for images when unsupported

this is illegal even with EXTENDED_USAGE, but it will also probably
explode later when trying to populate the image

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19018>

zink: fix weird formatting

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19018>

d3d12: Set PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19357>

d3d12: Don't multiply cube array sizes by 6

Gallium already does this for us.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19357>

d3d12: Don't put permanently-resident resources in the residency bo list

If the permanently-resident resources are never used, such as a swapchain
buffer in a purely offscreen renderer, it can cause the residency algorithm
to fail, when the permanently-resident resource is least-recently-used,
so we try to wait for it to be idle and evict it, but it never gets evicted.
This triggers an infinite loop.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19357>

zink: rip out unused kernel push constant

this was for supporting clover, but I don't care anymore

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: add handling for CL-style discrete shader samplers

this splits the bindings for sampler desc sets in CL like
* 32 samplers
* 128 samplerviews
* (compacted only) shader images

and then handles recombination during texop emission

it does NOT change the descriptor limits, which are still clamped to 32

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: add handling on the vk side for discrete sampler descriptors

just the descriptor layout/set management

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: always take the compact descriptor size path with kernel shaders

this guarantees compaction of the size arrays

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: emit explicit samplers in ntv based on sampler_mask

not actually used yet

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: add some spirv builder handling for sampled image ops

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: simplify image deref handling

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: add a nir pass for CL image typing and sampler tracking

cl images and samplers come through untyped, so they need to be typed
before they can be used

samplers are also not combined into the descriptor, so track a mask which
can be used later for emission

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: pass image type to image emission

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: rework sampler emission

this simplifies all the different sampler metadata tracking fields to be
more comprehensible

it also increases some array sizes in case future work increases them outside
the compiler areas

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: pass KERNEL shaders through successfully

basically just merging with COMPUTE cases

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

zink: match bitsizes in bo rewriting

technically this matters

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19327>

intel/fs: use fs implementation of dump_instructions

This specialized version prints out the liveness count as well as the
maximum liveness count. It was eye opening when seeing the max
liveness jump after lowering of packing instructions which should not
have changed the count.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18657>

intel/fs: reduce liveness of variables in lowering passes

When lowering a single instruction with a destination VGRF to 2 or
more, the VGRF is now considered partially written by each generated
instruction and that increases its liveness especially in loops. Thus
potentially increasing the number of spills/fills due to register
allocation.

Putting an UNDEF instruction in front of the lowered instructions
allows the IR to limit the liveness of the VGRF, reducing register
pressure.

This has a pretty dramatic effect on spills/fills for RT shaders. Here
the stats on Q2RTX shaders on DG2 (wipping out any spills/fills due to
register allocation) :

Instructions in all programs: 26150 -> 24955 (-4.6%)
SENDs in all programs: 1148 -> 1148 (+0.0%)
Loops in all programs: 4 -> 4 (+0.0%)
Cycles in all programs: 392179 -> 332787 (-15.1%)
Spills in all programs: 132 -> 116 (-12.1%)
Fills in all programs: 262 -> 154 (-41.2%)

Shader-db results on TGL :

total instructions in shared programs: 21158140 -> 21158377 (<.01%)
instructions in affected programs: 76629 -> 76866 (0.31%)
helped: 18
HURT: 20
helped stats (abs) min: 1 max: 60 x̄: 18.89 x̃: 12
helped stats (rel) min: 0.21% max: 3.61% x̄: 1.02% x̃: 0.77%
HURT stats (abs)   min: 1 max: 79 x̄: 28.85 x̃: 18
HURT stats (rel)   min: 0.04% max: 2.81% x̄: 1.13% x̃: 0.79%
95% mean confidence interval for instructions value: -4.82 17.30
95% mean confidence interval for instructions %-change: -0.34% 0.57%
Inconclusive result (value mean confidence interval includes 0).

total loops in shared programs: 5753 -> 5753 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0

total cycles in shared programs: 798856834 -> 798870688 (<.01%)
cycles in affected programs: 6208395 -> 6222249 (0.22%)
helped: 22
HURT: 17
helped stats (abs) min: 2 max: 8794 x̄: 1438.18 x̃: 782
helped stats (rel) min: 0.05% max: 2.28% x̄: 0.63% x̃: 0.44%
HURT stats (abs)   min: 2 max: 19178 x̄: 2676.12 x̃: 1358
HURT stats (rel)   min: 0.04% max: 23.49% x̄: 2.25% x̃: 0.71%
95% mean confidence interval for cycles value: -952.19 1662.65
95% mean confidence interval for cycles %-change: -0.64% 1.90%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 4078 -> 4066 (-0.29%)
spills in affected programs: 40 -> 28 (-30.00%)
helped: 2
HURT: 0

total fills in shared programs: 2856 -> 2832 (-0.84%)
fills in affected programs: 127 -> 103 (-18.90%)
helped: 2
HURT: 0

total sends in shared programs: 998554 -> 998554 (0.00%)
sends in affected programs: 0 -> 0
helped: 0
HURT: 0

LOST:   0
GAINED: 0

Total CPU time (seconds): 2346.06 -> 2304.80 (-1.76%)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18657>

intel/fs: make split_virtual_grfs deal with partial undefs

v2: fix up UNDEFs instructions (Curro)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18657>

intel/fs: require UNDEFs register offsets to be aligned to REG_SIZE

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18657>

turnip: Fix reservation for indirect compute's IR3_DP_SUBGROUP_ID_SHIFT.

Fixes an assert in GravityMark.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19203>

pan/mdg: Don't schedule across memory barrier

Fixes KHR-GLES31.core.shader_image_load_store.basic-glsl-misc-cs

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>

panfrost: Lower MAX_BLOCK_SIZE on Midgard

To match PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, having it be higher in any
dimension is nonsensical and can confuse apps. Fixes tests in
KHR-GLES31.core.texture_buffer.* on Mali-T860.

Fixes: 9b19104a30b ("pan/mdg: Lower PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK on Midgard")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>

panfrost: Avoid a XFB special case

This worked around an issue that doesn't apply to the Valhall XFB lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>

panfrost: Use compute-based XFB on Midgard

Now we're back to a single XFB implementation for all gens. Fixes:

   KHR-GLES31.core.draw_indirect.advanced-twoPasses-transformFeedback-arrays
   KHR-GLES31.core.draw_indirect.advanced-twoPasses-transformFeedback-elements

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>

pan/mdg: Fix 64-bit address arithmetic

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>

pan/bi: Clean up sysval handling a bit

Combine some cases.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>

panfrost: Don't allow VS side effects on midgard

So we can use the common XFB lowering, and try to reduce the differences between
Midgard and Bifrost (given that Bifrost is conformant and actively maintained,
and Midgard is neither, getting Midgard as close to Bifrost is in the best
interests of Midgard's long term prospects upstream). Piles of KHR-GLES31 tests
from Fail -> Skip.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>

panfrost: Zero polygon list for fragment-only

Even with hierarchical tiling. Otherwise if there's garbage leftover (due to BO
caching), a fragment-only batch can raise DATA_INVALID_FAULT. Fixes many tests
in KHR-GLES31.core.compute_shader.* on Mali-T860, including

   KHR-GLES31.core.compute_shader.build-separable

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>

nir/lower_idiv: Inline convert_instr_precise

Now that we only have one convert_instr path, this is simpler.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19303>

nir/lower_idiv: Remove imprecise_32bit_lowering

NIR has two implementations of lower_idiv, keyed on the
imprecise_32bit_lowering flag. This flag is misleading: the results when
setting this flag "imprecise", they're completely wrong for some values.
If a backend has a native implementation of umul_high, the correct path
isn't that much more expensive. If it doesn't, it's substantially slower
for highp integer divison... but in practice, non-constant highp integer
division is pretty rare.

After a painful migration of the tree, this code path has no more users.
Remove it so nobody else gets the bright idea of using it again.

Closes: #6555
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19303>

etnaviv: Use correct idiv lowering

imprecise_32bit_lowering produces wrong outputs for some inputs. Do not
use it, it is wrong. The correct lowering generates umul_high
instructions, which need to be lowered via lower_alu. That lowering in
turn produces uadd_carry instructions which also need lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19303>

hasvk: Fix build around intel_measure_state_changed() call

Fixes: 2bc82581ad22 ("anv: add support for mesh shading in INTEL_MEASURE")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19355>

rusticl: fix MemConstant invalid arg size check

As a memory object, the MemConstant check should be the same as
MemGlobal.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19352>

llvmpipe: asst. clean-ups in lp_state_fs.c

Move var decls to first use.  Add const qualifiers, comments, etc.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19330>

llvmpipe: fix comment typo

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19330>

llvmpipe: s/uint/enum pipe_prim_type/ in lp_setup_context.h

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19330>

anv: add mesh shading tracepoints

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>

intel/ds: add new category/stage for draw mesh events

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>

anv: add support for mesh shading in INTEL_MEASURE

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>

zink: add docs for zink_surface

zink_surface is an abstraction that is a superset of pipe_surface,
used for all types of images

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>

zink: add some breadcrumbs for VK_EXT_multisampled_render_to_single_sampled

at some point someone should hook this extension up to simplify/optimize
the existing msrtt handling

see also #7559

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>

zink: delete unused zink_surface member

I think this was used before imageless_framebuffer became a requirement?

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>

zink: use zink_resource_object::views to defer deferred storage view deletion

this is basically the same thing, so reuse the existing mechanism

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>

zink: simplify conditional for surface rebind no-ops

the question isn't whether the storage imageview has been created,
it's whether the surface is current for the memory binding

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>

zink: delete stale comment for zink_surface

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>

zink: simplify swapchain imageview handling

the zink_resource_object::views array already handles this, so don't
duplicate its functionality

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>

etnaviv: disable PE_COLOR_FORMAT_OVERWRITE with MSAA

This breaks MSAA, even when compression is not activated. The issue is
mostly theoretical, as we always enable color compression with MSAA, but
I ran into some GPU hangs when I disabled compression to run some tests.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>

etnaviv: set LOGIC_OP_UNK24 for MSAA rendering on SMALL_MSAA GPUs

Fixes MSAA corruptions on GC3000. 0x4 seems to be enough to fix the
misrendering, but blob seems to always emit 0x5.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>

etnaviv: properly size TS buffer for MSAA resources

On GPUs with the SMALL_MSAA feature, color tiles of the MSAA resource
are 256B, even if the GPU doesn't have the CACHE128B256BPERLINE feature.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>

etnaviv: rs: try to find exact format match first

For MSAA downsampling to work correctly, the RS engine needs to know
the exact format of the blit source/target. The compatible formats are
fine as long as the RS is only used as a tiler without doing any
conversion.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>

etnaviv: rs: fix MSAA alignment adjustment

The RS window alignment restrictions apply to the downsampled side of the
blit, so we must increase the blit size alignment by the MSAA scale to
avoid RS hangs. If a multi-pipe resolve is used (when the GPU doesn't have
the singlebuffer feature) then the Y alignment needs to be increased by
the number of pixel pipes.

The resource allocation has already been fixed to take this additional
alignment requirement into account.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>

etnaviv: increase alignment for MSAA resources

The RS window aligment restrictions apply to the downsampled size of a
MSAA resource, so in order to be able to do the downsample blit for all
possible sizes, we must make sure to increase the alignment of the
multisampled resource by the MSAA scale.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>

etnaviv: handle compressed texture formats in etna_layout_multiple

Instead of special casing compressed formats in the caller, handle
them properly when working out the resource alignment. For good measure
add an assert that the layout is linear, as expected.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>

etnaviv: compute linear resource Y alignment in etna_layout_multiple

Instead of adjusting the Y alignment in the callers, just do the
right (and consistent) thing in etna_layout_multiple.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>

etnaviv: assert valid layout in etna_layout_multiple

This function assigns proper values to the padding and halign parameters
for all valid layouts. Using unreachable() in the default path of the
switch statement asserts that we got a valid layout, so we can get rid of
some superfluous variable initializations and asserts in the call sites.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>