kernel/kernel-generic.git
14 years agoMIPS: BCM63xx: Convert timer locks to raw spinlocks.
Ralf Baechle [Sat, 27 Feb 2010 11:53:35 +0000 (12:53 +0100)]
MIPS: BCM63xx: Convert timer locks to raw spinlocks.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: PowerTV: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:34 +0000 (12:53 +0100)]
MIPS: PowerTV: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: David VomLehn <dvomlehn@cisco.com>
14 years agoMIPS: Malta: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:32 +0000 (12:53 +0100)]
MIPS: Malta: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: SB1480: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:32 +0000 (12:53 +0100)]
MIPS: SB1480: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: SB1250: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:32 +0000 (12:53 +0100)]
MIPS: SB1250: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: GT641xx: Convert IRQ controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:31 +0000 (12:53 +0100)]
MIPS: GT641xx: Convert IRQ controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Jazz: Convert irq controller lock to raw spinlock.
Ralf Baechle [Sat, 27 Feb 2010 11:53:31 +0000 (12:53 +0100)]
MIPS: Jazz: Convert irq controller lock to raw spinlock.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Make various locks static.
Ralf Baechle [Sat, 27 Feb 2010 11:53:30 +0000 (12:53 +0100)]
MIPS: Make various locks static.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: Octeon: Remove /proc/octeon_ethernet_stats
David Daney [Wed, 17 Feb 2010 01:25:33 +0000 (17:25 -0800)]
Staging: Octeon: Remove /proc/octeon_ethernet_stats

This file shouldn't be in /proc, so we remove it.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/970/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: Octeon: Reformat a bunch of comments.
David Daney [Wed, 17 Feb 2010 01:25:32 +0000 (17:25 -0800)]
Staging: Octeon: Reformat a bunch of comments.

Many of the comments didn't follow kerneldoc guidlines.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/971/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: Octeon: Free transmit SKBs in a timely manner
David Daney [Mon, 15 Feb 2010 23:06:47 +0000 (15:06 -0800)]
Staging: Octeon:  Free transmit SKBs in a timely manner

If we wait for the once-per-second cleanup to free transmit SKBs,
sockets with small transmit buffer sizes might spend most of their
time blocked waiting for the cleanup.

Normally we do a cleanup for each transmitted packet.  We add a
watchdog type timer so that we also schedule a timeout for 150uS after
a packet is transmitted.  The watchdog is reset for each transmitted
packet, so for high packet rates, it never expires.  At these high
rates, the cleanups are done for each packet so the extra watchdog
initiated cleanups are neither needed nor triggered.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/968/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This version has spelling and comment changes based on feedback from
Eric Dumazet.

14 years agoMIPS: Octeon: Do proper acknowledgment of CIU timer interrupts.
David Daney [Mon, 15 Feb 2010 20:13:18 +0000 (12:13 -0800)]
MIPS: Octeon: Do proper acknowledgment of CIU timer interrupts.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/967/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: Octeon: Run phy bus accesses on a workqueue.
David Daney [Mon, 15 Feb 2010 20:13:17 +0000 (12:13 -0800)]
Staging: Octeon:  Run phy bus accesses on a workqueue.

When directly accessing a phy, we must acquire the mdio bus lock.  To
do that we cannot be in interrupt context, so we need to move these
operations to a workqueue.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/965/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: octeon: remove unneeded includes
David Daney [Mon, 15 Feb 2010 20:13:16 +0000 (12:13 -0800)]
Staging: octeon: remove unneeded includes

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: netdev@vger.kernel.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/964/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Use generic ucontext.h
Yoichi Yuasa [Fri, 12 Feb 2010 12:35:04 +0000 (21:35 +0900)]
MIPS: Use generic ucontext.h

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/959/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Use generic serial.h
Yoichi Yuasa [Fri, 12 Feb 2010 12:33:56 +0000 (21:33 +0900)]
MIPS: Use generic serial.h

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/960/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Use generic parport.h
Yoichi Yuasa [Fri, 12 Feb 2010 12:29:14 +0000 (21:29 +0900)]
MIPS: Use generic parport.h

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/958/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Use generic current.h
Yoichi Yuasa [Fri, 12 Feb 2010 12:27:59 +0000 (21:27 +0900)]
MIPS: Use generic current.h

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/957/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Enable Read Inhibit/eXecute Inhibit for Octeon+ CPUs
David Daney [Wed, 10 Feb 2010 23:12:49 +0000 (15:12 -0800)]
MIPS: Enable Read Inhibit/eXecute Inhibit for Octeon+ CPUs

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/955/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Give Octeon+ CPUs their own cputype.
David Daney [Wed, 10 Feb 2010 23:12:48 +0000 (15:12 -0800)]
MIPS: Give Octeon+ CPUs their own cputype.

This allows us to treat them differently at runtime.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/951/
Patchwork: http://patchwork.linux-mips.org/patch/987/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Implement Read Inhibit/eXecute Inhibit
David Daney [Wed, 10 Feb 2010 23:12:47 +0000 (15:12 -0800)]
MIPS: Implement Read Inhibit/eXecute Inhibit

The SmartMIPS ASE specifies how Read Inhibit (RI) and eXecute Inhibit
(XI) bits in the page tables work.  The upper two bits of EntryLo{0,1}
are RI and XI when the feature is enabled in the PageGrain register.
SmartMIPS only covers 32-bit systems.  Cavium Octeon+ extends this to
64-bit systems by continuing to place the RI and XI bits in the top of
EntryLo even when EntryLo is 64-bits wide.

Because we need to carry the RI and XI bits in the PTE, the layout of
the PTE is changed.  There is a two instruction overhead in the TLB
refill hot path to get the EntryLo bits into the proper position.
Also the TLB load exception has to probe the TLB to check if RI or XI
caused the exception.

Also of note is that the layout of the PTE bits is done at compile and
runtime rather than statically.  In the 32-bit case this allows for
the same number of PFN bits as before the patch as the _PAGE_HUGE is
not supported in 32-bit kernels (we have _PAGE_NO_EXEC and
_PAGE_NO_READ instead of _PAGE_READ and _PAGE_HUGE).

The patch is tested on Cavium Octeon+, but should also work on 32-bit
systems with the Smart-MIPS ASE.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/952/
Patchwork: http://patchwork.linux-mips.org/patch/956/
Patchwork: http://patchwork.linux-mips.org/patch/962/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Add TLBR and ROTR to uasm.
David Daney [Wed, 10 Feb 2010 23:12:46 +0000 (15:12 -0800)]
MIPS: Add TLBR and ROTR to uasm.

The soon to follow Read Inhibit/eXecute Inhibit patch needs TLBR and
ROTR support in uasm.  We also add a UASM_i_ROTR macro.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/953/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Add accessor functions and bit definitions for c0_PageGrain
David Daney [Wed, 10 Feb 2010 23:12:45 +0000 (15:12 -0800)]
MIPS: Add accessor functions and bit definitions for c0_PageGrain

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/950/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Use 64-bit stores to c0_entrylo on 64-bit kernels.
David Daney [Wed, 10 Feb 2010 23:12:44 +0000 (15:12 -0800)]
MIPS: Use 64-bit stores to c0_entrylo on 64-bit kernels.

64-bit CPUs have 64-bit c0_entrylo{0,1} registers.  We should use the
64-bit dmtc0 instruction to set them.  This becomes important if we
want to set the RI and XI bits present in some processors.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/954/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Remove trailing space in messages
Frans Pop [Sat, 6 Feb 2010 17:47:13 +0000 (18:47 +0100)]
MIPS: Remove trailing space in messages

Signed-off-by: Frans Pop <elendil@planet.nl>
To: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/946/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Make the debugging of compressed kernel configurable
Wu Zhangjin [Sun, 31 Jan 2010 12:39:40 +0000 (20:39 +0800)]
MIPS: Make the debugging of compressed kernel configurable

This patch adds a new DEBUG_ZBOOT option to allow the users to enable it
to debug the compressed kernel support for a new board and this optoin
should be disabled to reduce the kernel image size and speed up the
kernel booting procedure when the compressed kernel support is stable.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/918/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Remove #if 0 r4k_update_mmu_cache_hwbug
David Daney [Wed, 3 Feb 2010 01:19:38 +0000 (17:19 -0800)]
MIPS: Remove #if 0 r4k_update_mmu_cache_hwbug

The function is #if 0ed out.  There are no other occurrences of its
name in the tree.  It is safe to remove.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/936/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: TXx9: Remove forced serial console setting
Yoichi Yuasa [Tue, 2 Feb 2010 09:40:04 +0000 (18:40 +0900)]
MIPS: TXx9: Remove forced serial console setting

It is not always used, even if it is available.

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/933/
Acked-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: AR7: Make ar7_register_devices much more durable
Alexander Clouter [Sun, 31 Jan 2010 19:39:57 +0000 (19:39 +0000)]
MIPS: AR7: Make ar7_register_devices much more durable

[Ralf: Fixed up the rejects and changed all the new printk(KERN_...); to
pr_xxx() as suggested by Wu.]

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/920/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: AR7: Fix USB slave mem range typo
Alexander Clouter [Sun, 31 Jan 2010 19:38:52 +0000 (19:38 +0000)]
MIPS: AR7: Fix USB slave mem range typo

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/919/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: AR7: Whitespace hacking
Alexander Clouter [Sun, 31 Jan 2010 19:38:19 +0000 (19:38 +0000)]
MIPS: AR7: Whitespace hacking

[Ralf: Fixed up reject and Wu's complaints about comment style.]

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/921/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: Use strlcat() for the command line arguments
Yoichi Yuasa [Mon, 1 Feb 2010 13:06:56 +0000 (22:06 +0900)]
MIPS: Alchemy: Use strlcat() for the command line arguments

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/928/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: Remove prom_getcmdline()
Yoichi Yuasa [Mon, 1 Feb 2010 13:05:57 +0000 (22:05 +0900)]
MIPS: Alchemy: Remove prom_getcmdline()

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/927/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: Remove forced command line setting
Yoichi Yuasa [Fri, 29 Jan 2010 08:49:52 +0000 (17:49 +0900)]
MIPS: Alchemy: Remove forced command line setting

It is not always used, even if it is available.

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/893/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Set __elf_platform for Octeon.
David Daney [Fri, 29 Jan 2010 00:52:13 +0000 (16:52 -0800)]
MIPS: Set __elf_platform for Octeon.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Allow the auxv's elf_platform entry to be set.
David Daney [Fri, 29 Jan 2010 00:52:12 +0000 (16:52 -0800)]
MIPS: Allow the auxv's elf_platform entry to be set.

The userspace runtime linker uses the elf_platform to find the libraries
optimized for the current CPU archecture variant.  First we need to allow it
to be set to something other than NULL.  Follow-on patches will set some
values for specific CPUs.

GLIBC already does the right thing.  The kernel just needs to supply good
data.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/891/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMMC: AU1xMMC: Allow platforms to disable host capabilities
Manuel Lauss [Wed, 14 Oct 2009 07:38:06 +0000 (09:38 +0200)]
MMC: AU1xMMC: Allow platforms to disable host capabilities

Although the hardware supports a 4/8bit SD interface and the driver
unconditionally advertises all hardware caps to the MMC core, not all
datalines may actually be wired up.  This patch introduces another
field to au1xmmc platform data allowing platforms to disable certain
advanced host controller features.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: linux-mmc@vger.kernel.org
CC: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/460/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Deal with larger physical offsets
Florian Fainelli [Thu, 28 Jan 2010 14:22:37 +0000 (15:22 +0100)]
MIPS: Deal with larger physical offsets

AR7 has a larger physical offset than other MIPS based systems and therefore
needs to setup its handlers beyond the usual KSEG0 range. When running the
kernel in mapped mode this modification is also required. Remove function
comment which is now incorrect.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Eugene Konev <ejka@imfi.kspu.ru>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/889/
Patchwork: http://patchwork.linux-mips.org/patch/932/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Annotate set_except_vector with __init
Florian Fainelli [Thu, 28 Jan 2010 14:21:42 +0000 (15:21 +0100)]
MIPS: Annotate set_except_vector with __init

All call sites of set_except_vector are already annotated with __init, so
annotate that one too.

Signed-off-by: Regards, Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/888/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h
Florian Fainelli [Thu, 28 Jan 2010 14:21:24 +0000 (15:21 +0100)]
MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h

Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/887/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: PNX8550: Remove unnecessary export prom_getcmdline()
Yoichi Yuasa [Thu, 28 Jan 2010 13:52:50 +0000 (22:52 +0900)]
MIPS: PNX8550: Remove unnecessary export prom_getcmdline()

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/886/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: PNX833x: Remove unused prom_getcmdline()
Yoichi Yuasa [Thu, 28 Jan 2010 13:51:50 +0000 (22:51 +0900)]
MIPS: PNX833x: Remove unused prom_getcmdline()

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/885/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Support 36-bit iomem on 32-bit Au1x00
pascal@pabr.org [Sun, 3 Jan 2010 12:39:12 +0000 (13:39 +0100)]
MIPS: Support 36-bit iomem on 32-bit Au1x00

I believe these changes are needed on Alchemy SoCs in order to
use iomem above 4G with the usual platform_device machinery:

- Set CONFIG_ARCH_PHYS_ADDR_T_64BIT to make resource_size_t 64-bit.
- Increase IOMEM_RESOURCE_END so that platforms can register resources.

To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/814/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: Cleanup the halt and poweroff action
Wu Zhangjin [Wed, 27 Jan 2010 14:39:46 +0000 (22:39 +0800)]
MIPS: Loongson: Cleanup the halt and poweroff action

In the old source code, I have let halt and poweroff do the same action,
but in reality, they have different meanings.

As the manpage of shutdown shows:

-r     Reboot after shutdown.
-H     Halt action is to halt or drop into boot monitor on systems that support it.
-P     Halt action is to turn off the power.

and in the real world, some machines(e.g. NAS) did not provide a power
button and the shutdown works as reset, so, we need to provide a
mechanism to let the users turn off the power safely without breaking
the system, such a mechanism is "halt", which only put the system into a
dead loop or a power-save mode and print some information to the screen
to tell the users to turn off the power safely.

$ shutdown -hH now /* loongson_halt, not turn off the power */
$ shutdown -hP now /* loongson_poweroff, work as poweroff */

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Tested-by: Liu Shiwei <liushiwei@gmail.com>
Cc: Liu Shiwei <liushiwei@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/883/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Simplify the weak annotation with __weak
Wu Zhangjin [Tue, 26 Jan 2010 15:02:34 +0000 (23:02 +0800)]
MIPS: Simplify the weak annotation with __weak

Found by

$ find arch/mips/ -name "*.c" | xargs -i grep -H weak {} | grep -v __weak

[Ralf: Made this bulletproof by including <linux/compiler.h>]

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/874/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: debug output for compressed kernels
Manuel Lauss [Wed, 13 Jan 2010 17:46:58 +0000 (18:46 +0100)]
MIPS: Alchemy: debug output for compressed kernels

Hook up the compressed debug output for all Alchemy systems supported
by current kernel codebase.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/879/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: AR7: Implement clock API
Florian Fainelli [Wed, 27 Jan 2010 08:10:06 +0000 (09:10 +0100)]
MIPS: AR7: Implement clock API

This patch makes the ar7 clock code implement the Linux clk API. Drivers
using the various clocks available in the SoC are updated accordingly.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
To: linux-mips@linux-mips.org
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: netdev@vger.kernel.org
Cc: David Miller <davem@davemloft.net>
Patchwork: http://patchwork.linux-mips.org/patch/881/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: AR7: Implement gpiolib
Florian Fainelli [Sun, 3 Jan 2010 20:16:51 +0000 (21:16 +0100)]
MIPS: AR7: Implement gpiolib

This patch implements gpiolib for the AR7 SoC.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/816/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: msp71xx: remove unused prom_getcmdline()
Yoichi Yuasa [Tue, 26 Jan 2010 09:02:58 +0000 (18:02 +0900)]
MIPS: msp71xx: remove unused prom_getcmdline()

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/868/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Cleanup the Makefile of compressed kernel support
Wu Zhangjin [Tue, 26 Jan 2010 09:04:02 +0000 (17:04 +0800)]
MIPS: Cleanup the Makefile of compressed kernel support

This patch removes a useless "\" (line break) and tunes the format of a
long line.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/869/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: AR7: replace prom_getcmdline() to arcs_cmdline[]
Yoichi Yuasa [Tue, 26 Jan 2010 09:08:34 +0000 (18:08 +0900)]
MIPS: AR7: replace prom_getcmdline() to arcs_cmdline[]

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/872/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: AR7: use strlcat() for the command line arguments
Yoichi Yuasa [Tue, 26 Jan 2010 09:07:02 +0000 (18:07 +0900)]
MIPS: AR7: use strlcat() for the command line arguments

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/871/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Nuke trailing blank lines
Ralf Baechle [Sat, 27 Feb 2010 11:53:14 +0000 (12:53 +0100)]
MIPS: Nuke trailing blank lines

Recent git versions now warn about those and they've always been a bit of
an annoyance.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Cleanup switches with cases that can be merged
Roel Kluin [Tue, 19 Jan 2010 23:59:27 +0000 (00:59 +0100)]
MIPS: Cleanup switches with cases that can be merged

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
To: linux-mips@linux-mips.org
To: Andrew Morton <akpm@linux-foundation.org>
To: LKML <linux-kernel@vger.kernel.org>
Patchwork: http://patchwork.linux-mips.org/patch/860/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Decode c0_config4 for large TLBs.
David Daney [Fri, 22 Jan 2010 22:41:15 +0000 (14:41 -0800)]
MIPS: Decode c0_config4 for large TLBs.

For processors that have more than 64 TLBs, we need to decode both
config1 and config4 to determine the total number TLBs.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/866/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Remove probe_tlb().
David Daney [Fri, 22 Jan 2010 22:41:14 +0000 (14:41 -0800)]
MIPS: Remove probe_tlb().

The function probe_tlb() only does anything for processors that are
not PRID_COMP_LEGACY.  This is precisely the set of processors for
which decode_configs() is called to do identical tlbsize probing
calculations.  Therefore probe_tlb() is completely redundant and may
be removed.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/865/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: add readl/write_be accessors
Florian Fainelli [Wed, 16 Dec 2009 10:29:06 +0000 (11:29 +0100)]
MIPS: add readl/write_be accessors

MIPS currently lacks the readl_be and writel_be accessors
which are required by BCM63xx for OHCI and EHCI support.
Let's define them globally for MIPS. This also fixes the
compilation of the bcm63xx defconfig against USB.

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Patchwork: http://patchwork.linux-mips.org/patch/793/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: Lemote-2F: update defconfig
Wu Zhangjin [Mon, 4 Jan 2010 09:16:52 +0000 (17:16 +0800)]
MIPS: Loongson: Lemote-2F: update defconfig

Changes:

  o Serial port related configuration
    Disable EARLY_PRINTK, CONFIG_SYS_SUPPORTS_ZBOOT_UART16550
    Enable the serial port support as module.
  o PM related support
    Enable CPUFreq as module, use the external timer(MFGPT) instead of
    r4k timer.
    Enable Suspend support
    Enable Run Time PM support
  o Enable SM7XX Video Driver
    Disable the buggy 2d acceleration
  o Enable CONFIG_OPROFILE as module
  o Use GZIP instead of LZMA, which need less decompression time
  o Enable more USB devices support
  o Enable initrd support(needed by gNewsense)
  o Enable more crypto support

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/830/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: Change the Email address of Wu Zhangjin
Wu Zhangjin [Mon, 4 Jan 2010 09:16:51 +0000 (17:16 +0800)]
MIPS: Loongson: Change the Email address of Wu Zhangjin

Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/829/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: Fixup mem.c indentation
Wu Zhangjin [Mon, 4 Jan 2010 09:16:50 +0000 (17:16 +0800)]
MIPS: Loongson: Fixup mem.c indentation

Replace whitespace by tabs.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/828/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: arch/mips/Makefile: Add missing whitespace
Wu Zhangjin [Mon, 4 Jan 2010 09:16:49 +0000 (17:16 +0800)]
MIPS: Loongson: arch/mips/Makefile: Add missing whitespace

This patch add missing whitespace after every "+=" in the loongson
related part of arch/mips/Makefile.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/827/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: Cleanup of the environment variables
Wu Zhangjin [Mon, 4 Jan 2010 09:16:48 +0000 (17:16 +0800)]
MIPS: Loongson: Cleanup of the environment variables

Changes:

o Move bus_clock into prom_init_env()
o Initialize the cpu_clock_freq to the default values for the
correspoding processor revisions if no such environment variable
passed by BIOS/Bootloader.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/826/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: Move prom_argc and prom_argv into prom_init_cmdline()
Wu Zhangjin [Mon, 4 Jan 2010 09:16:47 +0000 (17:16 +0800)]
MIPS: Loongson: Move prom_argc and prom_argv into prom_init_cmdline()

prom_argc and prom_argv are only used by prom_init_cmdline(), move them
into the function.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/825/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: Remove the serial port output of compressed kernel support
Wu Zhangjin [Mon, 4 Jan 2010 09:16:46 +0000 (17:16 +0800)]
MIPS: Loongson: Remove the serial port output of compressed kernel support

The compressed kernel support on loongson family machines is stable now,
so, remove the debug information via using SYS_SUPPORTS_ZBOOT instead of
SYS_SUPPORTS_ZBOOT_UART16550. This may reduce the image size and speedup
the booting.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/824/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: Convert loongson_halt() to use unreachable()
Wu Zhangjin [Mon, 4 Jan 2010 09:16:45 +0000 (17:16 +0800)]
MIPS: Loongson: Convert loongson_halt() to use unreachable()

Use the new unreachable() macro instead of while(1);

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/823/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: Lemote-2F: USB: Not Emulate Non-Posted Writes
Wu Zhangjin [Mon, 4 Jan 2010 09:16:44 +0000 (17:16 +0800)]
MIPS: Loongson: Lemote-2F: USB: Not Emulate Non-Posted Writes

Without this patch, when copying large amounts of data between the USB
storage devices and the hard disk, the USB device will disconnect
regularly.

Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Patchwork: http://patchwork.linux-mips.org/patch/822/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Loongson: Lemote-2F: Get the machine type from PMON_VER
Wu Zhangjin [Mon, 4 Jan 2010 09:16:43 +0000 (17:16 +0800)]
MIPS: Loongson: Lemote-2F: Get the machine type from PMON_VER

Lemote have used the PMON_VER strings to indicate the loongson-2f
machine series:

  PMON_VER=LM8089 Lemote 8.9'' netbook
           LM8101 Lemote 10.1'' netbook
  (The above two netbooks have the same kernel support)
         LM6XXX Lemote FuLoong(2F) box series
         LM9XXX Lemote LynLoong PC series

Before the machtype is supported by the PMON, we can get the machine
type from the PMON_VER for these machines, this will help the users a
lot.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/821/
Patchwork: http://patchwork.linux-mips.org/patch/908/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: Octeon Ethernet: Use constants from in.h
David Daney [Thu, 7 Jan 2010 19:05:06 +0000 (11:05 -0800)]
Staging: Octeon Ethernet: Use constants from in.h

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/837/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: Octeon Ethernet: Enable scatter-gather.
David Daney [Thu, 7 Jan 2010 19:05:05 +0000 (11:05 -0800)]
Staging: Octeon Ethernet: Enable scatter-gather.

Octeon ethernet hardware can handle NETIF_F_SG, so we enable it.

A gather list of up to six fragments will fit in the SKB's CB
structure, so no extra memory is required.  If a SKB has more than six
fragments, we must linearize it.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: Octeon Ethernet: Convert to NAPI.
David Daney [Thu, 7 Jan 2010 19:05:04 +0000 (11:05 -0800)]
Staging: Octeon Ethernet: Convert to NAPI.

Convert the driver to be a reasonably well behaved NAPI citizen.

There is one NAPI instance per CPU shared between all input ports.  As
receive backlog increases, NAPI is scheduled on additional CPUs.

Receive buffer refill code factored out so it can also be called from
the periodic timer.  This is needed to recover from temporary buffer
starvation conditions.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/839/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: Octeon Ethernet: Rewrite transmit code.
David Daney [Thu, 7 Jan 2010 19:05:03 +0000 (11:05 -0800)]
Staging: Octeon Ethernet: Rewrite transmit code.

Stop the queue if too many packets are queued.  Restart it from a high
resolution timer.

Rearrange and simplify locking and SKB freeing code

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/843/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: Octeon Ethernet: Fix memory allocation.
David Daney [Wed, 27 Jan 2010 21:22:53 +0000 (13:22 -0800)]
Staging: Octeon Ethernet: Fix memory allocation.

After aligning the blocks returned by kmalloc, we need to save the original
pointer so they can be correctly freed.

There are no guarantees about the alignment of SKB data, so we need to
handle worst case alignment.

Since right shifts over subtraction have no distributive property, we need
to fix the back pointer calculation.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/884/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoStaging: Octeon Ethernet: Remove unused code.
David Daney [Thu, 7 Jan 2010 19:05:01 +0000 (11:05 -0800)]
Staging: Octeon Ethernet: Remove unused code.

Remove unused code, reindent, and join some spilt strings.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/842/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Octeon: Fix EOI handling.
David Daney [Thu, 7 Jan 2010 19:05:00 +0000 (11:05 -0800)]
MIPS: Octeon: Fix EOI handling.

If an interrupt handler disables interrupts, the EOI function will
just reenable them.  This will put us in an endless loop when the
upcoming Ethernet driver patches are applied.

Only reenable the interrupt on EOI if it is not IRQ_DISABLED.  This
requires that the EOI function be separate from the ENABLE function.
We also rename the ACK functions to correspond with their function.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/840/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Octeon: Use optimized memory barrier primitives.
David Daney [Sat, 9 Jan 2010 01:17:44 +0000 (17:17 -0800)]
MIPS: Octeon: Use optimized memory barrier primitives.

In order to achieve correct synchronization semantics, the Octeon port
had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC.  This resulted in code
that looks like:

   sync
   ll ...
   .
   .
   .
   sc ...
   .
   .
   sync

The second SYNC was redundant, but harmless.

Octeon has a SYNCW instruction that acts as a write-memory-barrier
(due to an erratum in some parts two SYNCW are used).  It is much
faster than SYNC because it imposes ordering on the writes, but
doesn't otherwise stall the execution pipeline.  On Octeon, SYNC
stalls execution until all preceeding writes are committed to the
coherent memory system.

Using:

    syncw;syncw
    ll
    .
    .
    .
    sc
    .
    .

Has identical semantics to the first sequence, but is much faster.
The SYNCW orders the writes, and the SC will not complete successfully
until the write is committed to the coherent memory system.  So at the
end all preceeding writes have been committed.  Since Octeon does not
do speculative reads, this functions as a full barrier.

The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes
SYNCW for SYNC in write-memory-barriers.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/850/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: New macro smp_mb__before_llsc.
David Daney [Sat, 9 Jan 2010 01:17:43 +0000 (17:17 -0800)]
MIPS: New macro smp_mb__before_llsc.

Replace some instances of smp_llsc_mb() with a new macro
smp_mb__before_llsc().  It is used before ll/sc sequences that are
documented as needing write barrier semantics.

The default implementation of smp_mb__before_llsc() is just smp_llsc_mb(),
so there are no changes in semantics.

Also simplify definition of smp_mb(), smp_rmb(), and smp_wmb() to be just
barrier() in the non-SMP case.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/851/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Remove unused macros from barrier.h
David Daney [Thu, 7 Jan 2010 22:33:30 +0000 (14:33 -0800)]
MIPS: Remove unused macros from barrier.h

The smp_llsc_rmb() and smp_llsc_wmb() macros are not used in the tree,
remove them.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/848/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Octeon: Register some devices on the I2C bus.
David Daney [Thu, 7 Jan 2010 19:54:21 +0000 (11:54 -0800)]
MIPS: Octeon: Register some devices on the I2C bus.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: linux-i2c@vger.kernel.org
To: ben-linux@fluff.org
To: khali@linux-fr.org
Cc: Rade Bozic <rade.bozic.ext@nsn.com>
Patchwork: http://patchwork.linux-mips.org/patch/845/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: I2C: Add driver for Cavium OCTEON I2C ports.
Rade Bozic [Thu, 28 Jan 2010 20:47:07 +0000 (12:47 -0800)]
MIPS: I2C: Add driver for Cavium OCTEON I2C ports.

Signed-off-by: Rade Bozic <rade.bozic.ext@nsn.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: Michael Lawnick <michael.lawnick.ext@nsn.com>
To: linux-mips@linux-mips.org
To: linux-i2c@vger.kernel.org
To: ben-linux@fluff.org
To: khali@linux-fr.org
Cc: rade.bozic.ext@nsn.com
Cc: Michael Lawnick <michael.lawnick.ext@nsn.com>
Patchwork: http://patchwork.linux-mips.org/patch/890/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Octeon: Add I2C platform device.
David Daney [Thu, 7 Jan 2010 21:23:41 +0000 (13:23 -0800)]
MIPS: Octeon: Add I2C platform device.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: linux-i2c@vger.kernel.org
To: ben-linux@fluff.org
To: khali@linux-fr.org
Cc: Rade Bozic <rade.bozic.ext@nsn.com>
Patchwork: http://patchwork.linux-mips.org/patch/847/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Simplify param.h by using <asm-generic/param.h>
Robert P. J. Day [Thu, 31 Dec 2009 20:39:00 +0000 (15:39 -0500)]
MIPS: Simplify param.h by using <asm-generic/param.h>

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/810/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: get rid of common/reset.c
Manuel Lauss [Tue, 8 Dec 2009 18:18:13 +0000 (19:18 +0100)]
MIPS: Alchemy: get rid of common/reset.c

Implement reset / poweroff in the board code instead.  The peripheral reset
code is gone too since YAMON which all in-tree boards use does the same
work when it boots.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/783/
Patchwork: http://patchwork.linux-mips.org/patch/882/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Two-level pagetables for 64-bit kernels with 64KB pages.
David Daney [Fri, 4 Dec 2009 21:52:36 +0000 (13:52 -0800)]
MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.

For 64-bit kernels with 64KB pages and two level page tables, there are
42 bits worth of virtual address space This is larger than the 40 bits of
virtual address space obtained with the default 4KB Page size and three
levels, so there are no draw backs for using two level tables with this
configuration.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/761/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: irq: use runtime CPU type detection
Manuel Lauss [Mon, 23 Nov 2009 19:40:02 +0000 (20:40 +0100)]
MIPS: Alchemy: irq: use runtime CPU type detection

Use runtime CPU detection instead of relying on preprocessor symbols.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/701/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: Only build AU1000 INTC code for compatible cpus
Manuel Lauss [Mon, 23 Nov 2009 19:40:01 +0000 (20:40 +0100)]
MIPS: Alchemy: Only build AU1000 INTC code for compatible cpus

Use the GPIO config symbol to only build Au1000 interrupt code on chips with
compatible hw.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/670/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: use runtime cpu detection in GPIO code.
Manuel Lauss [Mon, 23 Nov 2009 19:40:00 +0000 (20:40 +0100)]
MIPS: Alchemy: use runtime cpu detection in GPIO code.

Remove the cpu subtype cpp macros in favor of runtime detection,
to improve compile coverage of the alchemy common code.
(Increases kernel size by 700 bytes).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/699/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoNET: au1000-eth: Convert to platform_driver model
Florian Fainelli [Tue, 10 Nov 2009 00:13:38 +0000 (01:13 +0100)]
NET: au1000-eth: Convert to platform_driver model

This patch converts the au1000-eth driver to become a full platform-driver
as it ought to be. We now pass PHY-speficic configurations through
platform_data but for compatibility the driver still assumes the default
settings (search for PHY1 on MAC0) when no platform_data is passed. Tested
on my MTX-1 board.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Acked-by: David S. Miller <davem@davemloft.net>
Patchwork: http://patchwork.linux-mips.org/patch/619/
Patchwork: http://patchwork.linux-mips.org/patch/963/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: Add au1000-eth platform device
Florian Fainelli [Tue, 10 Nov 2009 00:13:30 +0000 (01:13 +0100)]
MIPS: Alchemy: Add au1000-eth platform device

This patch makes the board code register the au1000-eth platform device. The
au1000-eth platform data can be overriden with the au1xxx_override_eth_cfg
function like it has to be done for the Bosporus board which uses a
different MAC/PHY setup.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: David Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/618/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: DB1200 defconfig update
Manuel Lauss [Mon, 2 Nov 2009 20:21:45 +0000 (21:21 +0100)]
MIPS: Alchemy: DB1200 defconfig update

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS/SOUND: Alchemy: DB1200 AC97+I2S audio support.
Manuel Lauss [Mon, 2 Nov 2009 20:21:44 +0000 (21:21 +0100)]
MIPS/SOUND: Alchemy: DB1200 AC97+I2S audio support.

Machine driver for DB1200 AC97 and I2S audio systems, intended as a proper
reference asoc machine for Alchemy-based systems.  AC97/I2S can be selected
at boot time by setting switch S6.7.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: alsa-devel@alsa-project.org
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: Extended DB1200 board support.
Manuel Lauss [Mon, 2 Nov 2009 20:21:43 +0000 (21:21 +0100)]
MIPS: Alchemy: Extended DB1200 board support.

Create own directory for DB1200 code and update it with new features.

- SPI support:
  - tmp121 temperature sensor
  - SPI flash on DB1200
- I2C support
  - NE1619 sensor
  - AT24 eeprom
- I2C/SPI can be selected at boot time via switch S6.8
- Carddetect IRQs for SD cards.
- gen_nand based NAND support.
- hexleds count sleep/wake transitions.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: physmap-flash for all devboards
Manuel Lauss [Mon, 19 Oct 2009 10:53:37 +0000 (12:53 +0200)]
MIPS: Alchemy: physmap-flash for all devboards

Replace the devboard NOR MTD mapping driver with physmap-flash support.
Also honor the "swapboot" switch settings wrt. to the layout of the
NOR partitions.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Acked-By: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Don't include <linux/smp_lock.h> unnecessarily.
Ralf Baechle [Sat, 27 Feb 2010 11:52:57 +0000 (12:52 +0100)]
MIPS: Don't include <linux/smp_lock.h> unnecessarily.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoSERIAL 8250: Fixes for Alchemy UARTs.
Manuel Lauss [Wed, 28 Oct 2009 20:37:28 +0000 (21:37 +0100)]
SERIAL 8250: Fixes for Alchemy UARTs.

Limit the amount of address space claimed for Alchemy serial ports to
0x1000.  On the Au1300, ports are only 0x1000 apart, and the registers
only extend to 0x110 at most on all supported alchemy models.

On the Au1300 the autodetect logic no longer works and this makes it
necessary to specify the port type through platform data.  Because of
this the MSR quirk needs to be moved outside the autoconfig() function
which will no longer be called when UPF_FIXED_TYPE is specified.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>,
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: UARTs are of type 16550A
Manuel Lauss [Wed, 28 Oct 2009 20:49:46 +0000 (21:49 +0100)]
MIPS: Alchemy: UARTs are of type 16550A

UART autodetection breaks on the Au1300 but the IP blocks are identical,
at least according to the datasheets.  Help the 8250 driver by passing
on uart type information via platform data.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: Turn on -Werror for devboards and xss1500
Florian Fainelli [Sun, 18 Oct 2009 14:04:41 +0000 (16:04 +0200)]
MIPS: Alchemy: Turn on -Werror for devboards and xss1500

Warnings being suppressed, we can now turn on -Werror for boards which did
not have it already (devboards and xss1500).

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: Fix warnings in DB1x00 / PB1000 / PB1550 board setup code
Florian Fainelli [Sun, 18 Oct 2009 14:04:09 +0000 (16:04 +0200)]
MIPS: Alchemy: Fix warnings in DB1x00 / PB1000 / PB1550 board setup code

This patch fixes warnings due to potentially unused
variables in board setup code or mixed variables
declaration and code (forbidden by ISO C90).

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: remove unused SYS area structure
Manuel Lauss [Thu, 15 Oct 2009 17:32:01 +0000 (19:32 +0200)]
MIPS: Alchemy: remove unused SYS area structure

Nothing in-tree uses it, so get rid of it.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: get rid of superfluous UART definitions
Manuel Lauss [Thu, 15 Oct 2009 17:07:34 +0000 (19:07 +0200)]
MIPS: Alchemy: get rid of superfluous UART definitions

Remove unused uart bit definitions and base macros.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
14 years agoMIPS: Alchemy: prom_putchar is board dependent
Manuel Lauss [Thu, 15 Oct 2009 16:49:27 +0000 (18:49 +0200)]
MIPS: Alchemy: prom_putchar is board dependent

This patch replaces the general alchemy prom_putchar() implementation
in favor of board-specific versions:  The UART where the output of
prom_putchar is directed to really depends on the board, the current
implementation hardcodes this on a per-SoC basis which is just wrong.

So a generic uart tx function is provided in the alchemy headers,
and the boards can provide their own prom_putchar with custom
destination uart, and all in-kernel alchemy boards support
early printk.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>