Courtney Goeltzenleuchter [Thu, 28 Aug 2014 23:31:04 +0000 (17:31 -0600)]
intel: remove unused elements
Courtney Goeltzenleuchter [Thu, 28 Aug 2014 23:27:47 +0000 (17:27 -0600)]
intel: track current cmd buffer shader info
Added intel_cmd_shader structs for each of the shader types
so that we know the offsets to each shader kernel.
Courtney Goeltzenleuchter [Thu, 28 Aug 2014 23:21:30 +0000 (17:21 -0600)]
intel: Move WA flags to pipeline.h
The pipeline now flags what workarounds needed to be emitted
just before and just after the pipeline state is transferred
to the command buffer BO.
Courtney Goeltzenleuchter [Thu, 28 Aug 2014 19:16:27 +0000 (13:16 -0600)]
intel: Use single PSO command buffer
Chia-I Wu [Thu, 28 Aug 2014 15:15:48 +0000 (23:15 +0800)]
intel: emit 3DSTATE_URB_*
The commands are stored in pipeline->cmd_urb_alloc at pipeline creation time,
and copied to intel_cmd when the pipeline is bound. Once our pipeline is more
complete, we will decide if we want multiple pipeline->cmd_*, or a single
pipeline->cmd.
Chia-I Wu [Thu, 28 Aug 2014 15:27:10 +0000 (23:27 +0800)]
intel: export GT in intel_gpu
Chia-I Wu [Thu, 28 Aug 2014 15:23:33 +0000 (23:23 +0800)]
intel: reject other GENS when INTEL_GEN_SPECIALIZED is defined
Chia-I Wu [Thu, 28 Aug 2014 07:42:36 +0000 (15:42 +0800)]
intel: remove some unused fields from intel_pipeline
Chia-I Wu [Thu, 28 Aug 2014 07:36:44 +0000 (15:36 +0800)]
intel: pCode is not a intel_shader
Chia-I Wu [Thu, 28 Aug 2014 07:00:16 +0000 (15:00 +0800)]
intel: refactor intelCreateGraphicsPipeline()
Break it down into
pipeline_shader()
builder_validate()
builder_build()
builder_init()
graphics_pipeline_create()
One big difference is that the chain of create info is broken and stored in
flat intel_pipeline_builder. It is impossible to do any real work with the
chain.
Chia-I Wu [Thu, 28 Aug 2014 06:37:39 +0000 (14:37 +0800)]
intel: remove dummy pipeline_get_info()
Chia-I Wu [Thu, 28 Aug 2014 04:18:43 +0000 (12:18 +0800)]
intel: add some intel_ir info
Just the beginning. More will be needed.
Chia-I Wu [Thu, 28 Aug 2014 04:27:21 +0000 (12:27 +0800)]
render_tests: set BIL generator magic as a hack
When the generator magic is 'w', the kernel does
void main() {
gl_FragColor = vec4(1.0, 0.0, 0.0, 1.0);
}
When the generator magic is 'v', the kernel does
void main() {
vec2 vertices[3] = {
vec2(-1.0, -1.0),
vec2( 1.0, -1.0),
vec2( 0.0, 1.0)
};
gl_Position = vec4(vertices[gl_VertexID % 3], 0.0, 1.0);
}
Chia-I Wu [Thu, 28 Aug 2014 03:36:48 +0000 (11:36 +0800)]
intel: clean up intel_shader
Refactor intelCreateShader() to call shader_create() and shader_parse_bil().
Add intel_ir, which just holds the kernel for now.
Chia-I Wu [Thu, 28 Aug 2014 03:56:29 +0000 (11:56 +0800)]
icd: rename and prefix shader_il.h
Rename shader_il.h to icd-bil.h, and make it more C compatible. Prefix
everything with icd_.
Chia-I Wu [Thu, 28 Aug 2014 02:43:04 +0000 (10:43 +0800)]
intel: fix and clean up shader cache
intel_cmd_bind is zeroed in cmd_reset(). cmd->bind.shaderCache.shaderList
needs to be freed in cmd_reset(), and cmd_clear_shader_cache() becomes
unnecessary.
cmd->bind.shaderCache.shaderList is an array of intel_cmd_shader, yet the
memory allocated is for an array of intel_shader. Fix it, and delay the
allocation to emit_shader(), which also takes care of XGL_ERROR_OUT_OF_MEMORY.
Rename shaderList to shaderArray and size to count for clarify.
Do not unconstify things because intel_cmd_shader failed to consitify pointers
in it.
Chia-I Wu [Thu, 28 Aug 2014 02:12:34 +0000 (10:12 +0800)]
intel: need only one WA flag so far
We need GEN6_WA_POST_SYNC_FLUSH because we emit the workaround in multiple
places, while we only want the flush to show up in the batch buffer once. It
is different from the other two workarounds.
Courtney Goeltzenleuchter [Wed, 27 Aug 2014 20:04:53 +0000 (14:04 -0600)]
intel: Add command buffer shader cache
The command buffer shader cache accumulates all the shader kernels
for a particular command buffer. It also checks that it includes a
shader only once.
Courtney Goeltzenleuchter [Wed, 27 Aug 2014 20:04:17 +0000 (14:04 -0600)]
intel: Fix bug in create color blend state
Courtney Goeltzenleuchter [Wed, 27 Aug 2014 19:59:36 +0000 (13:59 -0600)]
intel: Add WA pipe control for GEN6 HW.
Courtney Goeltzenleuchter [Wed, 27 Aug 2014 00:16:41 +0000 (18:16 -0600)]
tests: Need to define blend state.
Chia-I Wu [Wed, 27 Aug 2014 06:58:05 +0000 (14:58 +0800)]
render_tests: write the result to TriangleTest.ppm
Chia-I Wu [Wed, 27 Aug 2014 07:02:10 +0000 (15:02 +0800)]
render_tests: use XGL_NUM_FMT_UNORM
With 8-bit per channel and UNORM, [0.0, 1.0] will be scaled to [0, 255].
Chia-I Wu [Wed, 27 Aug 2014 06:22:38 +0000 (14:22 +0800)]
tests: fix memory access with uninitialized values
ch and num are uninitialized.
Chia-I Wu [Wed, 27 Aug 2014 05:19:29 +0000 (13:19 +0800)]
intel: emit 3DSTATE_CONSTANT_*
Chia-I Wu [Wed, 27 Aug 2014 02:22:34 +0000 (10:22 +0800)]
intel: partial intelCmdPrepare*() to flush caches
No resolving is done yet.
Chia-I Wu [Wed, 27 Aug 2014 04:51:47 +0000 (12:51 +0800)]
intel: record number of draws in intel_cmd_bind
Chia-I Wu [Wed, 27 Aug 2014 04:51:26 +0000 (12:51 +0800)]
intel: clear intel_cmd_bind on reset
Chia-I Wu [Wed, 27 Aug 2014 02:37:43 +0000 (10:37 +0800)]
intel: declare intel_dev in layout.h
Chia-I Wu [Tue, 26 Aug 2014 06:31:55 +0000 (14:31 +0800)]
intel: update genhw
Chia-I Wu [Tue, 26 Aug 2014 06:13:46 +0000 (14:13 +0800)]
intel: update winsys
Mainly to deprecate INTEL_DOMAIN_x.
Chia-I Wu [Mon, 25 Aug 2014 15:13:46 +0000 (23:13 +0800)]
intel: rework command buffer workarounds
Add a missing workaround, and add wa_flags so that a workaround is not emitted
more than necessary.
Chia-I Wu [Mon, 25 Aug 2014 14:54:16 +0000 (22:54 +0800)]
intel: add a command buffer scratch bo
It is owned by intel_dev so that all command buffers can share it. Will be
used for workarounds.
Chia-I Wu [Mon, 25 Aug 2014 14:36:01 +0000 (22:36 +0800)]
intel: clean up queue init
Rename queue_set_state() to queue_select_pipeline(), and separate out queue
init code to queue_init_hw_and_atomic_bo().
Chia-I Wu [Mon, 25 Aug 2014 07:53:39 +0000 (15:53 +0800)]
intel: emit depth buffer workaround
Chia-I Wu [Mon, 25 Aug 2014 05:50:26 +0000 (13:50 +0800)]
intel: make PIPELINE_SELECT a queue state
Mantle has the concept of a universal queue, and it can switch between
GRAPHICS and COMPUTE within a command buffer. On the other hand, an XGL
command buffer is created with either XGL_QUEUE_TYPE_GRAPHICS or
XGL_QUEUE_TYPE_COMPUTE. Swtiching to another queue type in the middle of a
command buffer is not allowed. Letting the queue emit PIPELINE_SELECT allows
us to avoid unnecessary PIPELINE_SELECTs in the command buffer.
Chia-I Wu [Mon, 25 Aug 2014 04:19:02 +0000 (12:19 +0800)]
intel: emit STATE_BASE_ADDRESS
Chia-I Wu [Mon, 25 Aug 2014 04:46:10 +0000 (12:46 +0800)]
intel: use absolute pos in cmd_writer_add_reloc()
Add cmd_state_reloc() as a wrapper using relative pos.
Chia-I Wu [Mon, 25 Aug 2014 04:38:56 +0000 (12:38 +0800)]
intel: add a note about cmd->reloc_count
Chia-I Wu [Mon, 25 Aug 2014 04:11:36 +0000 (12:11 +0800)]
intel: intel_bo instead of intel_mem in intel_cmd_reloc
The spec states that
The rules for rebinding memory are different for images and all other object
types. Rebinding of a given non-image object should not occur from the time
of building a command buffer or a descriptor set which references that
object to the time at which the GPU has finished execution of that command
buffer or descriptor set. If a new memory location is bound to a non-image
object while that object is referenced in a command buffer scheduled for
execution on GPU, the execution results are not guaranteed after memory
rebinding.
and
Image memory can be rebound at any time, even during command buffer
construction or descriptor set building. A snapshot of image memory binding
at the time of building a command buffer or descriptor set data is taken and
recorded in command buffer or descriptor set on binding image to state or
referencing image otherwise.
Chia-I Wu [Mon, 25 Aug 2014 03:09:17 +0000 (11:09 +0800)]
intel: add a queue bo to initialize the hw context
The bo is used to initialize the hardware context. It will be reused for
atomic counters.
It may be used as the workaround bo too, but let's not worry about that yet.
Chia-I Wu [Mon, 25 Aug 2014 03:38:08 +0000 (11:38 +0800)]
intel: replace intel_queue_submit() by queue_submit_bo()
We want to be able to submit BOs instead of just CMDs.
Chia-I Wu [Mon, 25 Aug 2014 02:56:13 +0000 (10:56 +0800)]
intel: emit 3DSTATE_DRAWING_RECTANGLE
Chia-I Wu [Mon, 25 Aug 2014 02:44:45 +0000 (10:44 +0800)]
intel: emit 3DSTATE_CLEAR_PARAMS
Chia-I Wu [Mon, 25 Aug 2014 02:17:58 +0000 (10:17 +0800)]
intel: refactor cmd_pipeline
Add helper functions for each of the API functions.
Chia-I Wu [Mon, 25 Aug 2014 01:50:12 +0000 (09:50 +0800)]
intel: add a command writer for kernel buffers
Chia-I Wu [Mon, 25 Aug 2014 02:02:53 +0000 (10:02 +0800)]
intel: use cmd_batch_reserve_reloc() when relocs are added
Chia-I Wu [Sat, 23 Aug 2014 08:47:48 +0000 (16:47 +0800)]
intel: emit RTs and BINDING_TABLE_STATE
Chia-I Wu [Sat, 23 Aug 2014 09:47:45 +0000 (17:47 +0800)]
render_test: no descriptor set nor dynamic view mapping
Chia-I Wu [Sat, 23 Aug 2014 09:26:08 +0000 (17:26 +0800)]
intel: export the length of SURFACE_STATE
6 on GEN6 and 8 on GEN7+.
Chia-I Wu [Sat, 23 Aug 2014 09:00:35 +0000 (17:00 +0800)]
intel: create VS and FS resource mappings
Chia-I Wu [Fri, 22 Aug 2014 05:56:18 +0000 (13:56 +0800)]
intel: add intel_rmap for shader resource mapping
It will be used to parse XGL_DESCRIPTOR_SET_MAPPING and
XGL_DYNAMIC_MEMORY_VIEW_SLOT_INFO.
Chia-I Wu [Sat, 23 Aug 2014 07:02:25 +0000 (15:02 +0800)]
intel: add INTEL_DEBUG=nohw to disable bo submission
Chia-I Wu [Sat, 23 Aug 2014 06:57:35 +0000 (14:57 +0800)]
intel: add INTEL_DEBUG env var to help debugging
INTEL_DEBUG=batch to enable bo decoding on cmdbuf submission
Courtney Goeltzenleuchter [Fri, 22 Aug 2014 23:54:03 +0000 (17:54 -0600)]
intel: Debug batch output
Courtney Goeltzenleuchter [Fri, 22 Aug 2014 22:27:58 +0000 (16:27 -0600)]
render_test: Add remaining calls to output a command buffer
Courtney Goeltzenleuchter [Fri, 22 Aug 2014 22:27:11 +0000 (16:27 -0600)]
device_class: Add helper function to alloc and bind memory
Courtney Goeltzenleuchter [Fri, 22 Aug 2014 22:26:07 +0000 (16:26 -0600)]
intel: Use correct debug type (DS vs. MSAA)
Courtney Goeltzenleuchter [Fri, 22 Aug 2014 22:25:24 +0000 (16:25 -0600)]
intel: Only output depth-stencil reloc if using it.
Courtney Goeltzenleuchter [Fri, 22 Aug 2014 15:24:52 +0000 (09:24 -0600)]
intel: Shader must be multiple of 64bytes in size
Courtney Goeltzenleuchter [Fri, 22 Aug 2014 15:09:46 +0000 (09:09 -0600)]
intel: Switch to genhw defines and remove brw_defines.h
Courtney Goeltzenleuchter [Thu, 21 Aug 2014 23:34:43 +0000 (17:34 -0600)]
tests: bug fix
Courtney Goeltzenleuchter [Thu, 21 Aug 2014 23:34:22 +0000 (17:34 -0600)]
tests: read shader IL from file
Courtney Goeltzenleuchter [Thu, 21 Aug 2014 23:33:46 +0000 (17:33 -0600)]
intel: Continue dev on pipeline
Courtney Goeltzenleuchter [Thu, 21 Aug 2014 23:33:09 +0000 (17:33 -0600)]
tests: pretend shader IL binaries.
Chia-I Wu [Fri, 22 Aug 2014 03:10:17 +0000 (11:10 +0800)]
intel: emit viewport states
Chia-I Wu [Fri, 22 Aug 2014 02:58:57 +0000 (10:58 +0800)]
intel: fix intel_viewport_state
Correctly align and build the hardware states.
Chia-I Wu [Fri, 22 Aug 2014 02:38:51 +0000 (10:38 +0800)]
intel: allow blend and ds states to be NULL
Chia-I Wu [Fri, 22 Aug 2014 02:28:29 +0000 (10:28 +0800)]
inte: emit CC states
Chia-I Wu [Thu, 21 Aug 2014 16:46:04 +0000 (00:46 +0800)]
intel: emit intel_msaa_state into the batch buffer
Chia-I Wu [Fri, 22 Aug 2014 01:26:22 +0000 (09:26 +0800)]
intel: indicate cmd_len in intel_msaa_state
Depending on GENs, cmd_len may change.
Chia-I Wu [Fri, 22 Aug 2014 01:27:36 +0000 (09:27 +0800)]
intel: improve batch/state writer helpers
Hopefully they cover my immediate needs now.
Chia-I Wu [Thu, 21 Aug 2014 12:24:31 +0000 (20:24 +0800)]
intel: add a state buffer to intel_cmd
Chia-I Wu [Thu, 21 Aug 2014 12:19:12 +0000 (20:19 +0800)]
intel: remove unused generic intel_cmd_writer functions
Different writers are used differently. Generic functions require too many
typings.
Chia-I Wu [Thu, 21 Aug 2014 07:40:07 +0000 (15:40 +0800)]
intel: fix intel_cmd_end()
We should loop for reloc_used times, not reloc_count times.
Chia-I Wu [Thu, 21 Aug 2014 06:05:23 +0000 (14:05 +0800)]
intel: introduce intel_cmd_writer
There is currently a single writer for the batch buffer. We want to add more
writers later.
Chia-I Wu [Thu, 21 Aug 2014 06:37:35 +0000 (14:37 +0800)]
intel: use XGL_GPU_SIZE for GPU sizes
Chia-I Wu [Thu, 21 Aug 2014 05:45:20 +0000 (13:45 +0800)]
intel: move device dbg variables to intel_dev_dbg
Chia-I Wu [Thu, 21 Aug 2014 03:54:29 +0000 (11:54 +0800)]
intel: use intel_pipeline to emit 3DSTATE_VF and etc.
Chia-I Wu [Thu, 21 Aug 2014 03:39:44 +0000 (11:39 +0800)]
intel: emit 3DSTATE_DEPTH_BUFFER and etc.
Chia-I Wu [Thu, 21 Aug 2014 03:33:29 +0000 (11:33 +0800)]
intel: extend GEN_RENDER_CMD for different GENs
Chia-I Wu [Thu, 21 Aug 2014 03:28:11 +0000 (11:28 +0800)]
intel: hide intel_cmd_reloc
And mark intel_mem in it const.
Chia-I Wu [Thu, 21 Aug 2014 03:07:57 +0000 (11:07 +0800)]
intel: use width/height from intel_layout
Chia-I Wu [Thu, 21 Aug 2014 02:51:07 +0000 (10:51 +0800)]
intel: emit 3DPRIMITIVE
Chia-I Wu [Thu, 21 Aug 2014 02:37:52 +0000 (10:37 +0800)]
intel: call intel_pipeline()
Chia-I Wu [Wed, 20 Aug 2014 07:39:56 +0000 (15:39 +0800)]
intel: emit 3DSTATE_INDEX_BUFFER directly on GEN7.5+
Chia-I Wu [Wed, 20 Aug 2014 05:38:52 +0000 (13:38 +0800)]
intel: add command buffer bind points
Chia-I Wu [Wed, 20 Aug 2014 08:39:20 +0000 (16:39 +0800)]
intel: add command buffer relocs
Chia-I Wu [Thu, 21 Aug 2014 01:12:19 +0000 (09:12 +0800)]
intel: export batch_buffer_reloc_count
Courtney Goeltzenleuchter [Wed, 20 Aug 2014 21:28:00 +0000 (15:28 -0600)]
tests: Add pipeline init to render test.
Courtney Goeltzenleuchter [Wed, 20 Aug 2014 21:26:55 +0000 (15:26 -0600)]
tests: Add base tests: shader, cmdbuf, pipeline
Add basic light switch tests for xglCreateShader,
xglCreateCmdBuffer and xglCreateGraphicsPipeline.
Courtney Goeltzenleuchter [Wed, 20 Aug 2014 21:26:23 +0000 (15:26 -0600)]
tests: Update xgldevice class with more xgl functions
Courtney Goeltzenleuchter [Wed, 20 Aug 2014 00:35:50 +0000 (18:35 -0600)]
tests: Add begining of render test
Courtney Goeltzenleuchter [Tue, 19 Aug 2014 19:34:28 +0000 (13:34 -0600)]
tests: Add basic CreateShader test.
Courtney Goeltzenleuchter [Tue, 19 Aug 2014 17:52:02 +0000 (11:52 -0600)]
intel: Add CreateShader
Courtney Goeltzenleuchter [Tue, 19 Aug 2014 17:43:21 +0000 (11:43 -0600)]
icd: Add shader IL header
Courtney Goeltzenleuchter [Wed, 20 Aug 2014 21:39:51 +0000 (15:39 -0600)]
intel: Remove generated pipeline commands from dispatch
Courtney Goeltzenleuchter [Fri, 15 Aug 2014 20:54:34 +0000 (14:54 -0600)]
intel: Begin adding pipeline support.
Courtney Goeltzenleuchter [Fri, 15 Aug 2014 20:54:58 +0000 (14:54 -0600)]
xgl: Fix typo for IA_PIPELINE sType.
Courtney Goeltzenleuchter [Thu, 14 Aug 2014 23:41:57 +0000 (17:41 -0600)]
tests: Add file for extended image tests