Muhammad Omair Javaid [Tue, 24 Aug 2021 21:53:31 +0000 (02:53 +0500)]
[LLDB] Remove typos from NativeRegisterContextLinux_arm*
This patch removed some typos from NativeRegisterContextLinux_arm and
NativeRegisterContextLinux_arm64. Some of the log/error messages were
being reported as x86_64.
Alex Langford [Tue, 24 Aug 2021 21:52:17 +0000 (14:52 -0700)]
Revert "[lldb] Refactor Module::LookupInfo constructor"
This reverts commit
cd2134e42aa7d1168a3ed54e41793b022f961b1f.
Seems like this broke some tests on arm and aarch64 boxes. Will
investigate before re-landing.
Justin Cady [Tue, 24 Aug 2021 19:34:41 +0000 (12:34 -0700)]
[MSAN] Fix wordexp interception when WRDE_DOOFFS is used
Handle the case of wordexp being invoked with WRDE_DOOFFS and
we.we_offs set to a positive value, which will result in NULL
entries prepended to the result. With this change the entire
result, containing both NULL and actual entries, is unpoisoned.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D108646
Philip Reames [Tue, 24 Aug 2021 21:28:57 +0000 (14:28 -0700)]
[tests] Add a couple tests for intersection of ec8d87e and D108651
Bob Haarman [Sat, 21 Aug 2021 00:14:32 +0000 (00:14 +0000)]
[clang][codegen] Set CurLinkModule in CodeGenAction::ExecuteAction
CodeGenAction::ExecuteAction creates a BackendConsumer for the
purpose of handling diagnostics. The BackendConsumer's
DiagnosticHandlerImpl method expects CurLinkModule to be set,
but this did not happen on the code path that goes through
ExecuteAction. This change makes it so that the BackendConsumer
constructor used by ExecuteAction requires the Module to be
specified and passes the appropriate module in ExecuteAction.
The change also adds a test that fails without this change
and passes with it. To make the test work, the FIXME in the
handling of DK_Linker diagnostics was addressed so that warnings
and notes are no longer silently discarded. Since this introduces
a new warning diagnostic, a flag to control it (-Wlinker-warnings)
has also been added.
Reviewed By: xur
Differential Revision: https://reviews.llvm.org/D108603
Philip Reames [Tue, 24 Aug 2021 21:23:03 +0000 (14:23 -0700)]
[SCEV] Infer nuw from nw for addrecs
This was previously committed in 914836b, and reverted due to confusion on the status of the review.
Differential Revision: https://reviews.llvm.org/D108601
Ben Langmuir [Tue, 24 Aug 2021 18:10:11 +0000 (11:10 -0700)]
[orc] Fix unit tests that use ORC C API
* c_api_tests was failing to build after the API change to
__orc_rt_CWrapperFunctionResultAllocate
* wrapper_function_utils_test was causing an assertion failure, because
it was creating a result for `void(void)` with Size = 0, but seeing an
uninitialized pointer, which it considered to be an out-of-bound
error.
I noticed locally that making modifications to c_api.h is not causing
these unit tests to be rebuilt, which may be how the bug slipped in in
the first place.
Differential Revision: https://reviews.llvm.org/D108649
Philip Reames [Tue, 24 Aug 2021 21:18:50 +0000 (14:18 -0700)]
[test] Prcommit tests for D108651
Mitch Phillips [Tue, 24 Aug 2021 21:10:02 +0000 (14:10 -0700)]
[hwasan] Always untag short granule in shadow.
Fixes a regression when the allocator is disabled, and a dirty
allocation is re-used. This only occurs when the allocator is disabled,
so a test-only fix, but still necessary.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D108650
Min-Yih Hsu [Tue, 24 Aug 2021 21:07:21 +0000 (14:07 -0700)]
[X86] Add explicit library dependency on LLVMInstrumentation
Patch
9588b685c6b2 introduced dependency on ASAN. But it didn't
explicitly put LLVMInstrumentation as one of the library dependencies
such that the build will fail if we're building LLVM as shared libraries
(i.e. -DBUILD_SHARED_LIBS=ON).
This patch explicitly links X86CodeGen against the Instrumentation
component.
Differential Revision: https://reviews.llvm.org/D108662
Jessica Paquette [Tue, 24 Aug 2021 20:21:15 +0000 (13:21 -0700)]
[AArch64][GlobalISel] Legalize narrow scalar FP arithmetic
Widen narrow fp arithmetic ops (e.g. G_FADD). When we don't have full FP16
support, widen to s32. Otherwise widen to s16.
https://godbolt.org/z/TbT9Pqa7e
Differential Revision: https://reviews.llvm.org/D108660
Alex Langford [Tue, 17 Aug 2021 17:55:05 +0000 (10:55 -0700)]
[lldb] Refactor Module::LookupInfo constructor
Module::LookupInfo's constructor currently goes over supported languages
trying to figure out the best way to search for a symbol name. This
seems like a great candidate for refactoring. Specifically, this is work
that can be delegated to language plugins.
Once again, the goal here is to further decouple plugins from
non-plugins. The idea is to have each language plugin take a name and
give you back some information about the name from the perspective of
the language. Specifically, each language now implements a
`GetFunctionNameInfo` method which returns an object of type
`Language::FunctionNameInfo`. Right now, it consists of a basename,
a context, and a FunctionNameType. Module::LookupInfo's constructor will
call `GetFunctionNameInfo` with the appropriate language plugin(s) and
then decide what to do with that information. I have attempted to maintain
existing behavior as best as possible.
A nice side effect of this change is that lldbCore no longer links
against the ObjC Language plugin.
Differential Revision: https://reviews.llvm.org/D108229
Kazushi (Jam) Marukawa [Tue, 24 Aug 2021 20:51:21 +0000 (16:51 -0400)]
[libc++abi] Apply simplify scan_eh_tab to SjLj
Previous "simplify scan_eh_tab" patch, https://reviews.llvm.org/D93190,
saves landingpad if and only if the target is not using SjLj exceptions.
However, the landingpad is used by SjLj exception handler also. This
patch changes to set landingpad for both exception handlers.
Differential Revision: https://reviews.llvm.org/D108082
Rumeet Dhindsa [Tue, 24 Aug 2021 20:38:45 +0000 (13:38 -0700)]
[lldb] Add support for debugging via the dynamic linker.
This patch adds support for shared library load when the executable is
called through ld.so.
Differential Revision:https://reviews.llvm.org/D108061
Nico Weber [Tue, 24 Aug 2021 20:40:44 +0000 (16:40 -0400)]
[gn build] (manually) port
87dd51983cf9
Nico Weber [Tue, 24 Aug 2021 20:38:34 +0000 (16:38 -0400)]
Make WindowsManifestMerger::merge() take a MemoryBufferRef
No behavior change.
Fangrui Song [Tue, 24 Aug 2021 20:35:19 +0000 (13:35 -0700)]
llvm-xray {convert,extract}: Add --demangle
No demangling may be a better default in the future.
Add `--demangle` for migration convenience.
Reviewed By: Enna1
Differential Revision: https://reviews.llvm.org/D108100
Patrick Holland [Fri, 23 Jul 2021 00:46:39 +0000 (17:46 -0700)]
[MCA] Adding an AMDGPUCustomBehaviour implementation.
This implementation allows mca to model the desired behaviour of the s_waitcnt
instruction. This patch also adds the RetireOOO flag to the AMDGPU instructions
within the scheduling model. This flag is only used by mca and allows
instructions to finish out-of-order which helps mca's simulations more closely
model the actual device.
Differential Revision: https://reviews.llvm.org/D104730
Kirill Stoimenov [Tue, 24 Aug 2021 20:01:21 +0000 (13:01 -0700)]
Revert "[asan] Implemented intrinsic for the custom calling convention similar used by HWASan for X86."
This reverts commit
9588b685c6b2d90e4b6dd68e02e6a44affd77c3f. Breaks a bunch of builds.
Reviewed By: GMNGeoffrey
Differential Revision: https://reviews.llvm.org/D108658
Michael Jones [Tue, 24 Aug 2021 19:59:29 +0000 (19:59 +0000)]
[libc] Fix too long number in strtoul_test
I think this is the last windows type conversion fix, the rest of the
build seems to be okay.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D108659
Min-Yih Hsu [Tue, 24 Aug 2021 19:50:28 +0000 (12:50 -0700)]
[M68k][test] Migrate MC tests related to MOVEM instruciton
Since we're now supporting the (correct) assembly syntax for MOVEM since
47f52f989b06. The remaining MOVEM MC tests can not be migrated into
test/MC/M68k.
Shilei Tian [Tue, 24 Aug 2021 20:00:17 +0000 (16:00 -0400)]
[Clang][OpenMP] Use enum to dereference children data array in OMPAtomicDirective
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D108648
Michael Jones [Tue, 24 Aug 2021 18:38:40 +0000 (18:38 +0000)]
[libc] Fix type errors on Windows
Fix the errors caused by having some numbers too large for a 32 bit
number in the tests for windows. Also fix the base causing some type
confusion.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D108653
Sanjay Patel [Tue, 24 Aug 2021 19:14:21 +0000 (15:14 -0400)]
[InstSimplify] fold or+shifted -1 to -1
These are similar to the rotate pattern added with:
dcf659e8219b
...but we don't have guard ops on the shift amount,
so we don't canonicalize to the intrinsic.
declare void @llvm.assume(i1)
define i32 @src(i32 %shamt, i32 %bitwidth) {
; subtract must be in range of bitwidth
%lt = icmp ule i32 %bitwidth, 32
call void @llvm.assume(i1 %lt)
%r = lshr i32 -1, %shamt
%s = sub i32 %bitwidth, %shamt
%l = shl i32 -1, %s
%o = or i32 %r, %l
ret i32 %o
}
define i32 @tgt(i32 %shamt, i32 %bitwidth) {
ret i32 -1
}
https://alive2.llvm.org/ce/z/aF7WHx
Sanjay Patel [Tue, 24 Aug 2021 17:06:38 +0000 (13:06 -0400)]
[InstSimplify] add tests for or-of-shifted-one-bits; NFC
Kirill Stoimenov [Tue, 10 Aug 2021 17:49:48 +0000 (17:49 +0000)]
[asan] Implemented intrinsic for the custom calling convention similar used by HWASan for X86.
The implementation uses the int_asan_check_memaccess intrinsic to instrument the code. The intrinsic is replaced by a call to a function which performs the access check. The generated function names encode the input register name as a number using Reg - X86::NoRegister formula.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D107850
Thomas Johnson [Tue, 24 Aug 2021 17:22:34 +0000 (10:22 -0700)]
[ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for associated instructions
Differential Revision: https://reviews.llvm.org/D108598
Michael Kruse [Tue, 24 Aug 2021 18:44:48 +0000 (13:44 -0500)]
[Polly][test] Add missing %loadPolly.
This fixes check-polly when using the -load mechanism,
i.e. LLVM_POLLY_LINK_INTO_TOOLS=OFF.
Eli Friedman [Tue, 24 Aug 2021 18:43:35 +0000 (11:43 -0700)]
[NFC] Add tests for i128 fshl on a few targets.
In preparation for D108058.
Tyler Augustine [Tue, 24 Aug 2021 18:38:32 +0000 (20:38 +0200)]
Support alias.scope and noalias metadata
Introduces new Ops to represent 1. alias.scope metadata in LLVM, and 2. domains for these scopes. These correspond to the metadata described in https://llvm.org/docs/LangRef.html#noalias-and-alias-scope-metadata. Lists of scopes are modeled the same way as access groups - as an ArrayAttr on the Op (added in https://reviews.llvm.org/D97944).
Lowering 'noalias' attributes on function parameters is already supported. However, lowering `noalias` metadata on individual Ops is not, which is added in this change. LLVM uses the same keyword for these, but this change introduces a separate attribute name 'noalias_scopes' to represent this distinct concept.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D107870
Louis Dionne [Tue, 24 Aug 2021 15:40:05 +0000 (11:40 -0400)]
[libc++] Remove support for CloudABI, which has been abandoned
Based on https://github.com/NuxiNL/cloudlibc, it appears that the CloudABI
project has been abandoned. This patch removes a bunch of CloudABI specific
logic that had been added to support that platform.
Note that some knobs like LIBCXX_ENABLE_STDIN and LIBCXX_ENABLE_STDOUT
coud be useful in their own right, however those are currently broken.
If we want to re-add such knobs in the future, we can do it like we've
done it for localization & friends so that we can officially support
that configuration.
Differential Revision: https://reviews.llvm.org/D108637
Stanislav Mekhanoshin [Thu, 19 Aug 2021 18:42:09 +0000 (11:42 -0700)]
Allow rematerialization of virtual reg uses
Currently isReallyTriviallyReMaterializableGeneric() implementation
prevents rematerialization on any virtual register use on the grounds
that is not a trivial rematerialization and that we do not want to
extend liveranges.
It appears that LRE logic does not attempt to extend a liverange of
a source register for rematerialization so that is not an issue.
That is checked in the LiveRangeEdit::allUsesAvailableAt().
The only non-trivial aspect of it is accounting for tied-defs which
normally represent a read-modify-write operation and not rematerializable.
The test for a tied-def situation already exists in the
/CodeGen/AMDGPU/remat-vop.mir,
test_no_remat_v_cvt_f32_i32_sdwa_dst_unused_preserve.
The change has affected ARM/Thumb, Mips, RISCV, and x86. For the targets
where I more or less understand the asm it seems to reduce spilling
(as expected) or be neutral. However, it needs a review by all targets'
specialists.
Differential Revision: https://reviews.llvm.org/D106408
Michael Jones [Mon, 23 Aug 2021 22:37:08 +0000 (22:37 +0000)]
[libc] fix string conversion tests for windows
There were some copy paste errors as well as some oddities around how
windows handles the difference between long and long long types. This
change fixes those.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D108591
Jessica Paquette [Tue, 24 Aug 2021 04:59:27 +0000 (21:59 -0700)]
[AArch64][GlobalISel] Legalize + select v2p0 -> v264 G_PTRTOINT
1) Just mark this case as legal because it can just be a copy.
2) Ensure the copy in the existing code actually gets selected. Without doing
this, we'll crash because the destination won't have a register class.
This fell back 35 times in a build of clang with GISel for AArch64.
Differential Revision: https://reviews.llvm.org/D108610
Michael Kruse [Tue, 24 Aug 2021 17:38:00 +0000 (12:38 -0500)]
[OpenMP][amdgcn] Don't use in-tree clang if not available.
The use of `$<TARGET_FILE:clang>` was adapted too broadly from D101265.
Fixes llvm.org/PR51579
Also see discussion in D108534.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D108640
Arthur Eubanks [Tue, 24 Aug 2021 17:22:34 +0000 (10:22 -0700)]
[llvm-reduce] Check if module data strings are empty before attempting to reduce
Vitaly Buka [Tue, 24 Aug 2021 06:38:17 +0000 (23:38 -0700)]
[tsan] Fix sigaction interceptor after D107186
Set SA_SIGINFO only if we set sighandler, or we can set the flag, and
return it as 'old' without actual sigaction set.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D108616
Andrei Elovikov [Tue, 24 Aug 2021 17:16:07 +0000 (10:16 -0700)]
Try to fix build with modules enabled after D108422
D108422 removed Basic/X86Target.def but didn't delete the entry in
module.modulemap. Do it now. Hopefully it will fix the build.
Ben Langmuir [Thu, 12 Aug 2021 20:55:16 +0000 (13:55 -0700)]
Fix compilation errors in C API when using C compiler
* Cannot use sizeof() on another union member
* nullptr vs NULL
* () vs (void)
Incidentally, fix an incorrect comment about memory ownership on the
argument to __orc_rt_CreateCWrapperFunctionResultFromOutOfBandError,
which is copied, not moved.
Arthur Eubanks [Tue, 24 Aug 2021 16:53:39 +0000 (09:53 -0700)]
[NFC] Add and use AttributeList::removeFnAttributes()
Arthur Eubanks [Mon, 23 Aug 2021 17:58:16 +0000 (10:58 -0700)]
[llvm-reduce] Remove various module data
This removes the data layout, target triple, source filename, and module
identifier when possible.
Reviewed By: swamulism
Differential Revision: https://reviews.llvm.org/D108568
Benson Chu [Tue, 24 Aug 2021 16:40:38 +0000 (11:40 -0500)]
Revert "[AST] Pick last tentative definition as the acting definition"
This reverts commit
9a5f3888505630cea88f8372d3068b2d63cfb381.
The written test breaks some builds on Mach-O.
Rong Xu [Tue, 24 Aug 2021 16:04:37 +0000 (09:04 -0700)]
[CSPGO] Fix lost IRPGOFlag in CSPGO instrumentation
The IRPGOFlag symbol (__llvm_profile_raw_version) is dropped when
identified as non-prevailing for either regular or thin LTO during
the mixed-LTO mode compilation. This happens in the module where
IRPGOFlag is marked as non-prevailing. This variable
is emitted in the final object from the prevailing module.
This is still problematic because we currently query this symbol
to coordinate some actions between PGOInstrumentation pass
and InstrProfiling lowering pass, like whether to do value
profiling, whether to do comdat renaming.
This problem is bought up by YolandaCY in
https://reviews.llvm.org/D107034
YolandCY reported unresolved symbol linker errors in
CSPGO instrumentation build for chromium.
This patch let LTO retain IRPGOFlag decl by adding it to
CompilerUsed list and relax the check in isIRPGOFlagSet() when
doing the InstrProfiling lowering.
The test case in the patch is from D107034
<https://reviews.llvm.org/D107034>.
Differential Revision: https://reviews.llvm.org/D108581
Michael Jones [Wed, 18 Aug 2021 18:56:46 +0000 (18:56 +0000)]
[compiler-rt] change internal internal libc invariants
llvm-libc is expected to be built with sanitizers and not use interceptors in
the long run. For now though, we have a hybrid process, where functions
implemented in llvm-libc are instrumented, and glibc fills and sanitizer
interceptors fill in the rest.
Current sanitizers have an invariant that the REAL(...) function called from
inside of an interceptor is uninstrumented. A lot of interceptors call strlen()
in order to figure out the size of the region to check/poison. Switch these
callsites over to the internal, unsanitized implementation.
Reviewed By: hctim, vitalybuka
Differential Revision: https://reviews.llvm.org/D108316
peter klausler [Mon, 23 Aug 2021 20:56:22 +0000 (13:56 -0700)]
[flang] runtime: fix WRITE after BACKSPACE on variable-length file
BACKSPACE leaves "recordLength" set, which is fine for a later READ,
but it causes a later WRITE to fail due to a misinterpretation of the
knowledge of the record length as indication of a fixed-length record
file (RECL=). Fix.
Differential Revision: https://reviews.llvm.org/D108594
peter klausler [Fri, 20 Aug 2021 22:18:21 +0000 (15:18 -0700)]
[flang] Extension: reduced scope for some implied DO loop indices
The index of an implied DO loop in a DATA statement or array
constructor is defined by Fortran 2018 to have scope over its
implied DO loop. This definition is unfortunate, because it
requires the implied DO loop's bounds expressions to be in the
scope of the index variable. Consequently, in code like
integer, parameter :: j = 5
real, save :: a(5) = [(j, j=1, j)]
the upper bound of the loop is a reference to the index variable,
not the parameter in the enclosing scope.
This patch limits the scope of the index variable to the "body"
of the implied DO loop as one would naturally expect, with a warning.
I would have preferred to make this a hard error, but most Fortran
compilers treat this case as f18 now does. If the standard
were to be fixed, the warning could be made optional.
Differential Revision: https://reviews.llvm.org/D108595
Philip Reames [Tue, 24 Aug 2021 16:27:53 +0000 (09:27 -0700)]
Revert "[SCEV] Infer nsw/nuw from nw for addrecs"
This reverts commit
914836b1c8b36d4a317ef6c233746f6ec37b57a5. Further comments on review came up after initial approval. Reverting while addressing.
Andrei Elovikov [Tue, 24 Aug 2021 15:59:05 +0000 (08:59 -0700)]
[NFC][clang] Move remaining part of X86Target.def to llvm/Support/X86TargetParser.def
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D108422
Jessica Paquette [Tue, 24 Aug 2021 15:55:04 +0000 (08:55 -0700)]
[AArch64][GlobalISel] Select @llvm.aarch64.neon.ld4.*
Reuse the selection code from the ld2 case. This is similar to how SDAG handles
things in AArch64ISelDAGToDAG. (See SelectLoad)
This fell back ~100 times while building clang with GISel enabled for AArch64.
Factoring out the gross subreg copy part ought to make selecting the rest of
this family fairly easy.
Differential Revision: https://reviews.llvm.org/D108600
Philip Reames [Tue, 24 Aug 2021 15:53:42 +0000 (08:53 -0700)]
Revert "Special case common branch patterns in breakLoopBackedge"
This reverts commit
aec08e86004bb3b8a7c5a86992945c936593db59.
Several problems have been reported with malformed loopinfo after this change, see discussion on https://reviews.llvm.org/rGaec08e86004b.
Philip Reames [Tue, 24 Aug 2021 00:52:09 +0000 (17:52 -0700)]
[SCEV] Infer nsw/nuw from nw for addrecs
If we no an addrec doesn't self-wrap, the increment is strictly positive, and the start value is the smallest representable value, then we know that the corresponding wrap type can not occur.
Differential Revision: https://reviews.llvm.org/D108601
Aart Bik [Tue, 24 Aug 2021 15:20:08 +0000 (08:20 -0700)]
[mlir][sparse] use new permutation utility to avoid codedup
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D108636
Simon Pilgrim [Tue, 24 Aug 2021 15:08:09 +0000 (16:08 +0100)]
[X86] Freeze vXi8 shl(x,1) -> add(x,x) vector fold (PR50468)
We don't have any vXi8 shift instructions (other than on XOP which is handled separately), so replace the shl(x,1) -> add(x,x) fold with shl(x,1) -> add(freeze(x),freeze(x)) to avoid the undef issues identified in PR50468.
Split off from D106675 as I'm still looking at whether we can fix the vXi16/i32/i64 issues with the D106679 alternative.
Differential Revision: https://reviews.llvm.org/D108139
Aart Bik [Tue, 24 Aug 2021 02:00:38 +0000 (19:00 -0700)]
[mlir] add permutation utility
I found myself typing this code several times at different places
by now, so time to make this a general utility instead. Given
a permutation, it returns the permuted position of the input,
for example (i,j,k) -> (k,i,j) yields position 1 for input 0.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D108347
Simon Pilgrim [Tue, 24 Aug 2021 12:48:55 +0000 (13:48 +0100)]
[DAG] LoadedSlice::canMergeExpensiveCrossRegisterBankCopy - replace getABITypeAlign with allowsMemoryAccess (PR45116)
One of the cases identified in PR45116 - we don't need to limit load combines to ABI alignment, we can use allowsMemoryAccess - which tests using getABITypeAlign, but also checks if a target permits (fast) misaligned memory loads by checking allowsMisalignedMemoryAccesses as a fallback.
Whisperity [Tue, 24 Aug 2021 14:10:19 +0000 (16:10 +0200)]
[clang-tidy] Hotfix default parameter value in 'bugprone-easily-swappable-parameters'
As identified by @RKSimon, there was a missing comma in the default
value for the "ignored parameter type suffixes" array, resulting in
bogus concatenation of two elements.
Kazu Hirata [Tue, 24 Aug 2021 13:52:15 +0000 (06:52 -0700)]
[InstCombine] Remove CreateNonTerminatorUnreachable (NFC)
The function was introduced without a use on Jun 3, 2020 in commit
2a6c871596ce8bdd23501a96fd22f0f16d3cfcad. Note that the identical
function is defined in InstCombineInternal.h without static, which is
in use.
Benson Chu [Sun, 15 Aug 2021 18:12:21 +0000 (13:12 -0500)]
[AST] Pick last tentative definition as the acting definition
Clang currently picks the second tentative definition when
VarDecl::getActingDefinition is called.
This can lead to attributes being dropped if they are attached to
tentative definitions that appear after the second one. This is
because VarDecl::getActingDefinition loops through VarDecl::redecls
assuming that the last tentative definition is the last element in the
iterator. However, it is the second element that would be the last
tentative definition.
This changeset modifies getActingDefinition to iterate through the
declaration chain in reverse, so that it can immediately return when
it encounters a tentative definition.
Differential Revision: https://reviews.llvm.org/D99732
Simon Pilgrim [Tue, 24 Aug 2021 12:11:27 +0000 (13:11 +0100)]
[DAG] TransformFPLoadStorePair - replace getABITypeAlign with allowsMemoryAccess (PR45116)
One of the cases identified in PR45116 - we don't need to limit load combines (in this case for fp->int load/store copies) to ABI alignment, we can use allowsMemoryAccess - which tests using getABITypeAlign, but also checks if a target permits (fast) misaligned memory loads by checking allowsMisalignedMemoryAccesses as a fallback.
Differential Revision: https://reviews.llvm.org/D108318
Simon Pilgrim [Tue, 24 Aug 2021 11:30:51 +0000 (12:30 +0100)]
[DAG] CombineConsecutiveLoads - replace getABITypeAlign with allowsMemoryAccess (PR45116)
One of the cases identified in PR45116 - we don't need to limit load combines (in this case for ISD::BUILD_PAIR) to ABI alignment, we can use allowsMemoryAccess - which tests using getABITypeAlign, but also checks if a target permits (fast) misaligned memory loads by checking allowsMisalignedMemoryAccesses as a fallback.
This helps in particular for 32-bit X86 cases loading 64-bit size data, reducing codegen diffs vs x86_64.
Differential Revision: https://reviews.llvm.org/D108307
Paul Herman [Tue, 24 Aug 2021 11:11:38 +0000 (07:11 -0400)]
Fix documentation and snippets for the handle attributes; NFC
Sindhu Chittireddy [Tue, 24 Aug 2021 11:08:18 +0000 (07:08 -0400)]
Avoid nullptr dereferencing of 'Constraint'; NFC
Klocwork static code analysis exposed this bug:
Pointer 'Constraint' returned from call to function
'cast_or_null<clang::ConceptSpecializationExpr,clang::Expr>' may
be NULL and will be dereferenced in the statement following it
Replace 'cast_or_null' with 'cast' so that the latter can assert
when it encounters a NULL.
This also removes an 'assert' that is covered by the previous
call to 'cast<>'.
Matthias Springer [Tue, 24 Aug 2021 10:41:16 +0000 (19:41 +0900)]
[mlir][tensor] Insert explicit tensor.cast ops for insert_slice src
If additional static type information can be deduced from a insert_slice's size operands, insert an explicit cast of the op's source operand.
This enables other canonicalization patterns that are matching for tensor_cast ops such as `ForOpTensorCastFolder` in SCF.
Differential Revision: https://reviews.llvm.org/D108617
Matthias Springer [Tue, 24 Aug 2021 10:33:58 +0000 (19:33 +0900)]
[mlir][SCF] Use symbols in loop peeling rewrite
Use symbols in the affine map instead of dims. Dims should not be divided.
Differential Revision: https://reviews.llvm.org/D108431
Krasimir Georgiev [Tue, 24 Aug 2021 10:36:53 +0000 (12:36 +0200)]
[clang-format] keep TypeScript argument decorators in line
As a follow-up from https://reviews.llvm.org/D108538, ensure TypeScript
argument decorators are kept in line with the argument.
Reviewed By: MyDeveloperDay
Differential Revision: https://reviews.llvm.org/D108620
Dawid Jurczak [Mon, 23 Aug 2021 10:24:12 +0000 (12:24 +0200)]
[NFC][LoopIdiom] Add reproducer of wrong memmove transformation
That's precommit test for D107964.
Differential Revision: https://reviews.llvm.org/D108537
Ricky Taylor [Mon, 23 Aug 2021 22:49:52 +0000 (23:49 +0100)]
[M68k][AsmParser] Support parsing register masks & fix printing them
Fixes PR51580.
Register masks will now be printed as 'movem.l (%sp), %a0-%a5/%d5'
for example and can now be parsed in the same format.
Previously the printed syntax was 'movem.l (%sp), %a0-%a5,%d', which
didn't match prior art and was too ambiguous to easily parse.
Differential Revision: https://reviews.llvm.org/D108597
Jeremy Morse [Tue, 24 Aug 2021 09:14:37 +0000 (10:14 +0100)]
[DebugInfo][InstrRef] Fix over-droppage of locations in X86FloatingPoint
Over in D105657, we started dropping instruction numbers (that become
variable locations) from call instructions, as we can't correctly represent
the x87 FP stack. Unfortunately, it turns out that the "special FP
instructions" that this pass transforms includes "every call instruction"
[0]. Thus, we've ended up dropping all return values from all calls. Ouch.
This patch adds a filter: only drop instruction numbers from calls if they
return something on the FP stack. Seeing how LLVM only allows a single
return value, this should drop instruction numbers on anything that returns
a float, and nothing else.
Rather than writing a new test, I've modified the original one to have a
positive and negative case: drop instruction number on a call with an
FP-stack modification, keep it on a plain call.
Differential Revision: https://reviews.llvm.org/D108580
Petar Avramovic [Tue, 24 Aug 2021 09:09:37 +0000 (11:09 +0200)]
[GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner
When Src and Dst used in buildAnyExtOrTrunc or buildSExtOrTrunc
have the same type (creates COPY) use Src register directly or
use replaceRegOrBuildCopy instead.
Differential Revision: https://reviews.llvm.org/D108306
Jingu Kang [Tue, 17 Aug 2021 12:14:42 +0000 (13:14 +0100)]
[GVN] Execute performLoopLoadPRE ahead of PerformLoadPRE
Differential Revision: https://reviews.llvm.org/D108204
Cullen Rhodes [Tue, 24 Aug 2021 08:13:57 +0000 (08:13 +0000)]
[AArch64][SME] Fix v8.6a bf16 NEON instruction predication
In streaming mode on SME targets only the scalar BFCVT armv8.6-a
instruction is legal, predicate the illegal instructions on NEON to
disable them in streaming mode (see D107902). BFCVT is predicated on
HasNEONorStreamingSVE.
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2021-06/SIMD-FP-Instructions
Reviewed By: paulwalker-arm
Differential Revision: https://reviews.llvm.org/D108279
Michael Kruse [Tue, 24 Aug 2021 07:49:06 +0000 (02:49 -0500)]
[Polly] Don't redundantly link libPolly into unittests.
With LLVM_LINK_LLVM_DYLIB and LLVM_POLLY_LINK_INTO_TOOLS, Polly is
already linked into libLLVM.so, linking libPolly.a as well into
unittests results in duplicate command line registration errors.
Martin Storsjö [Mon, 2 Aug 2021 08:16:42 +0000 (11:16 +0300)]
[ARM] Allow using ';' as asm statement separator in MSVC mode
This does the same as D96259, but for ARM, just like AArch64,
using the same comment char as for ELF and MinGW mode.
As the assembly input/output of LLVM is GAS style, trying to
match what MS armasm.exe does isn't needed (because the comment
char used is the least concern when it comes to that; all
directives differ too). If a separate armasm compatible mode
is implemented, it can use its own comment style (just like
llvm-ml implements MS ml.exe compatible assembly parsing).
This fixes building compiler-rt assembly files for ARM in MSVC
mode.
The updated testcase literals-comments.s was only intended to
make sure that '#' isn't interpreted as a comment char.
Differential Revision: https://reviews.llvm.org/D107251
Pushpinder Singh [Wed, 11 Aug 2021 06:35:56 +0000 (06:35 +0000)]
[AMDGPU][Libomptarget] Delete g_atl_machine global
With uses of g_atl_machine gone, a significant portion of dead
code has been removed.
This patch depends on D104691 and D104695.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D104696
Zhouyi Zhou [Tue, 24 Aug 2021 07:23:20 +0000 (15:23 +0800)]
[clang] NFC: remove superfluous braces
In commit
9bb33f572f7609d469d3a505c9987b83eac5b78c, a pair of superfluous braces are introduced to the function Sema::BuildDeclarationNameExpr.
This patch tries to remove the superfluous braces. Also use clang-format to further beautify the above function.
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D108609
Anton Afanasyev [Thu, 19 Aug 2021 16:36:54 +0000 (19:36 +0300)]
[AggressiveInstCombine] Add arithmetic shift right instr to `TruncInstCombine` DAG
Add `ashr` instruction to the DAG post-dominated by `trunc`, allowing
`TruncInstCombine` to reduce bitwidth of expressions containing
these instructions.
We should be shifting by less than the target bitwidth.
Also it is sufficient to require that all truncated bits
of the value-to-be-shifted are sign bits (all zeros or ones) and
one sign bit is left untruncated: https://alive2.llvm.org/ce/z/Ajo2__
Part of https://reviews.llvm.org/D107766
Differential Revision: https://reviews.llvm.org/D108355
Lang Hames [Tue, 24 Aug 2021 07:16:20 +0000 (17:16 +1000)]
[ORC-RT] Add non-const WrapperFunctionResult data access, simplify allocate.
WrapperFunctionResult no longer supports wrapping constant data, so this patch
provides direct non-const access to the wrapped data. Since wrapped data can now
be written, the WrapperFunctionResult::allocate method can be simplified to
return a WrapperFunctionResult.
This is essentially the same change (and with the same motivation) as LLVM
commit
8b117830b1b, but applied to the ORC runtime's WrapperFunctionResult code.
Anton Afanasyev [Fri, 20 Aug 2021 13:16:54 +0000 (16:16 +0300)]
[Test][AggressiveInstCombine] Modify shift tests
Add `sext` for `ashr`, remove unrelated tests
Lang Hames [Tue, 24 Aug 2021 05:13:54 +0000 (15:13 +1000)]
[ORC] Add non-const WrapperFunctionResult::data method, simplify allocate.
WrapperFunctionResult no longer supports wrapping constant data, so this patch
adds a non-const data method. Since data can now be written through the data
method, the allocate method can be simplified to return a WrapperFunctionResult.
Pushpinder Singh [Thu, 19 Aug 2021 11:41:19 +0000 (17:11 +0530)]
[OpenMP][AMDGCN] Enable complex functions
This patch enables basic complex functionality using the ocml builtins.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D108552
Liu, Chen3 [Tue, 24 Aug 2021 05:58:08 +0000 (13:58 +0800)]
[X86] Building constant vector which element type is half will cause assertion fail.
Fix assertion fail when building con constant vector which element type is half.
Differential Revision: https://reviews.llvm.org/D108612
Omar Emara [Tue, 24 Aug 2021 05:08:28 +0000 (22:08 -0700)]
[LLDB][GUI] Handle extra navigation keys in forms
This patch handles the up and down keys if they weren't handled by the
selected field. Moreover, it makes sure the form always absorb the key
to take full control until the form is canceled or submitted.
Differential Revision: https://reviews.llvm.org/D108414
Kazu Hirata [Tue, 24 Aug 2021 05:20:22 +0000 (22:20 -0700)]
[IPO] Remove DisableTailCalls (NFC)
The last use was removed on Jun 9, 2015 in commit
d9699bc7bdf0362173fcd256690f61a4d47429c2.
Omar Emara [Tue, 24 Aug 2021 04:18:05 +0000 (21:18 -0700)]
[LLDB][GUI] Add submit form key combination
This patch adds a new key ALt+Enter key combination to form windows.
Once invoked, the first action is executed without having to navigate to
its button.
Field exit callbacks are now also invoked on validation to support this
aforementioned key combination.
One concern for this key combination is its potential use by the window
manager of the host. I am not sure if this will be a problem, but it is
worth putting in consideration.
Differential Revision: https://reviews.llvm.org/D108410
Petr Hosek [Tue, 24 Aug 2021 04:24:24 +0000 (21:24 -0700)]
[profile] Update counter offset to account for binary ids
In the raw profile, binary ids immediately follow the header so when
computing counters offset we need to account for the new section.
Differential Revision: https://reviews.llvm.org/D108608
Omar Emara [Thu, 19 Aug 2021 18:47:07 +0000 (11:47 -0700)]
[LLDB][GUI] Add extra keys to text field
This patch adds many new keys to the text field and implements new
behaviors as follows:
```
case KEY_HOME:
case KEY_CTRL_A:
MoveCursorToStart();
case KEY_END:
case KEY_CTRL_E:
MoveCursorToEnd();
case KEY_RIGHT:
case KEY_SF:
MoveCursorRight();
case KEY_LEFT:
case KEY_SR:
MoveCursorLeft();
case KEY_BACKSPACE:
case KEY_DELETE:
RemovePreviousChar();
case KEY_DC:
RemoveNextChar();
case KEY_EOL:
case KEY_CTRL_K:
ClearToEnd();
case KEY_DL:
case KEY_CLEAR:
Clear();
```
This patch also refactors scrolling to be dynamic at draw time for
easier handing.
Differential Revision: https://reviews.llvm.org/D108385
Wang, Pengfei [Tue, 24 Aug 2021 01:05:33 +0000 (09:05 +0800)]
[X86] AVX512FP16 instructions enabling 5/6
Enable FP16 FMA instructions.
Ref.: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-fp16-architecture-specification.html
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D105268
Philip Reames [Tue, 24 Aug 2021 00:36:24 +0000 (17:36 -0700)]
[SCEV] Add a hasFlags utility to improve readability [NFC]
Jessica Paquette [Mon, 23 Aug 2021 22:17:47 +0000 (15:17 -0700)]
[AArch64][GlobalISel] Select @llvm.aarch64.neon.ld2.*
This is pretty similar to the ST2 selection code in
`AArch64InstructionSelector::selectIntrinsicWithSideEffects`.
This is a GISel equivalent of the ld2 case in `AArch64DAGToDAGISel::Select`.
There's some weirdness there that appears here too (e.g. using ld1 for scalar
cases, which are 1-element vectors in SDAG.)
It's a little gross that we have to create the copy and then select it right
after, but I think we'd need to refactor the existing copy selection code
quite a bit to do better.
This was falling back while building llvm-project with GISel for AArch64.
Differential Revision: https://reviews.llvm.org/D108590
Haowei Wu [Mon, 9 Aug 2021 18:45:49 +0000 (11:45 -0700)]
[lit] Add the option to output test result as resultdb json format
This change adds the option --resultdb-output=path allow llvm-lit
generating LuCI ResultDB JSON output for the test results, which
can be better integrated with certain CI/CQ framework.
Differential Revision: https://reviews.llvm.org/D108238
MaheshRavishankar [Mon, 23 Aug 2021 23:27:15 +0000 (16:27 -0700)]
[mlir]Linalg] Allow controlling fusion of linalg.generic -> linalg.tensor_expand_shape.
Differential Revision: https://reviews.llvm.org/D108565
Reid Kleckner [Mon, 23 Aug 2021 22:56:29 +0000 (15:56 -0700)]
[dllexport] Instantiate default ctor default args
Fixes https://bugs.llvm.org/show_bug.cgi?id=51414.
Differential Revision: https://reviews.llvm.org/D108021
Greg Clayton [Fri, 20 Aug 2021 19:10:21 +0000 (12:10 -0700)]
Fix DWARFDie::getDeclFile(...) to work with DW_AT_specification.
DWARFDie::getDeclFile(...) previously only supported getting the DW_AT_decl_file if the DIE itself contained the DW_AT_decl_file attribute, or if the DIE had a DW_AT_abstract_origin that pointed to another DIE that had a DW_AT_decl_file. This patch allows the function to get the right attribute value if there is a DW_AT_specification that points to another DIE. We also test that if a DW_AT_abtract_origin or DW_AT_specification points to a DIE in another CU with a DW_FORM_ref_addr, that the right line table is used to extract the file index.
Full tests were added for the following cases:
- DIE has a DW_AT_decl_file attribute
- DIE has a DW_AT_abtract_origin that points to another die in the same CU
- DIE has a DW_AT_abtract_origin that points to another die in another CU
- DIE has a DW_AT_specification that points to another die in the same CU
- DIE has a DW_AT_specification that points to another die in another CU
Differential Revision: https://reviews.llvm.org/D108480
Jon Chesterfield [Mon, 23 Aug 2021 22:07:46 +0000 (23:07 +0100)]
[openmp][devicertl] Freestanding nvptx via stub printf
Compiled nvptx devicertl as freestanding, breaking the
dependency on host glibc and gcc-multilibs. Thus build it by default.
Comes at the cost of #defining out printf. Tried mapping it onto
__builtin_printf but that gets transformed back to printf instead
of hitting the cuda/openmp lowering transform.
Printf could be preserved by one of:
- dropping all the standard headers and ffreestanding
- providing a header only printf implementation
- changing the compiler handling of printf
Reviewed By: grokos
Differential Revision: https://reviews.llvm.org/D108349
Mircea Trofin [Mon, 23 Aug 2021 21:43:36 +0000 (14:43 -0700)]
[MLGO] Make sure inliner logs when deleting callees
When using final reward (which is now the default), we were skipping
logging decisions that were leading to callee deletion. This fixes that.
Differential Revision: https://reviews.llvm.org/D108587
Azharuddin Mohammed [Mon, 23 Aug 2021 21:34:46 +0000 (14:34 -0700)]
[ExecutionEngine] Use the libunwind __register_frame on Darwin
This was already the case, but the recent change (
957334382cd1) altered
the behavior on some of our bots where __unw_add_dynamic_fde is not
found. This restores the prior behavior on Darwin while also retaining
the new behavior from that change.
Aart Bik [Mon, 23 Aug 2021 17:29:19 +0000 (10:29 -0700)]
[mlir][sparse] replace support lib conversion with actual MLIR codegen
Rationale:
Passing in a pointer to the memref data in order to implement the
dense to sparse conversion was a bit too low-level. This revision
improves upon that approach with a cleaner solution of generating
a loop nest in MLIR code itself that prepares the COO object before
passing it to our "swiss army knife" setup. This is much more
intuitive *and* now also allows for dynamic shapes.
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D108491
Michael Jones [Fri, 20 Aug 2021 18:05:52 +0000 (18:05 +0000)]
[libc] Enable string to integer conversion functions in the default build
Adds atoi, atol, atoll, strtol, strtoll, strtoul, and strtoull to the
list of entrypoints for Windows and aarch64 linux, as well as moving
them out of the LLVM_LIBC_FULL_BUILD condition for x86_64 linux.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D108477
Sanjay Patel [Mon, 23 Aug 2021 21:03:09 +0000 (17:03 -0400)]
[InstCombine] generalize subtract with 'not' operands; 2nd try
This is a re-try of
3aa009cc87e3 which was reverted at
9577fac0fddf because it caused an infinite loop.
For the extra test case, either re-ordering the transforms
or adding the extra clause to avoid sub-of-sub is enough
to prevent the infinite compile, but I'm doing both to be
safer.
Original commit message:
The motivation was to get min/max intrinsics to parity
with cmp+select idioms, but this unlocks a few more
folds because isFreeToInvert recognizes add/sub with
constants too.
In the min/max example, we have too many extra uses
for smaller folds to improve things, but this fold
is able to eliminate uses even though we can't reduce
the number of instructions.
Fangrui Song [Mon, 23 Aug 2021 20:54:39 +0000 (13:54 -0700)]
[TargetMachine] Move COFF special case for ExternalSymbolSDNode from shouldAssumeDSOLocal to X86Subtarget
Intended to be NFC. ARM/AArch64 don't appear to need adjustment.
TargetMachine::shouldAssumeDSOLocal is expected to be very simple, ideally
matching isDSOLocal(). The IR producers are expected to set dso_local correctly.
(While some may think this function can make producers' work easier, the
function is really not in a good position to set dso_local. See the various
special cases we duplicate from clang CodeGenModule.cpp.)
Reviewed By: mstorsjo
Differential Revision: https://reviews.llvm.org/D108514