Rosie Sumpter [Wed, 9 Jun 2021 09:00:16 +0000 (10:00 +0100)]
[CostModel][AArch64] Improve the cost estimate of CTPOP intrinsic
Added a case for CTPOP to AArch64TTIImpl::getIntrinsicInstrCost so that
the cost estimate matches the codegen in
test/CodeGen/AArch64/arm64-vpopcnt.ll
Differential Revision: https://reviews.llvm.org/D103952
Ole Strohm [Fri, 11 Jun 2021 09:42:41 +0000 (10:42 +0100)]
[OpenCL] Fix overloading resolution of addrspace constructors
This fixes the prioritization of address spaces when choosing a
constructor, stopping them from being considered equally good,
which made the construction of types that could be constructed
by more than one of the constructors.
It does this by preferring the most specific address space,
which is decided by seeing if one of the address spaces is
a superset of the other, and preferring the other.
Fixes: PR50329
Reviewed By: Anastasia
Differential Revision: https://reviews.llvm.org/D102850
Martin Probst [Fri, 11 Jun 2021 09:43:00 +0000 (11:43 +0200)]
clang-format: [JS] don't sort named imports if off.
The previous implementation would accidentally still sort the individual
named imports, even if the module reference was in a clang-format off
block.
Differential Revision: https://reviews.llvm.org/D104101
Simon Pilgrim [Fri, 11 Jun 2021 09:56:05 +0000 (10:56 +0100)]
[llvm-stress] Fix dead code preventing us generating per-element vector selects
This has been reported several times by the PVS Studio team as well as coming up in some static analysis.
getRandom() % 1 always returns 0 so we never actually test this codepath, (git blame suggests this has always been like this) - given that we have plenty of other "getRandom() & 1" the typo is pretty obvious, and matches the intention in the comment above - with this change we generate a nice mixture of scalar/vector condition selects of vectors.
I don't know llvm-stress that well - but I don't think we guarantee that the same seed value will always generate the same IR for later versions of the program - just that the same binary would.
Differential Revision: https://reviews.llvm.org/D104022
Valeriy Savchenko [Thu, 3 Jun 2021 17:39:25 +0000 (20:39 +0300)]
[analyzer] Refactor trackExpressionValue to accept TrackingOptions
Differential Revision: https://reviews.llvm.org/D103633
Valeriy Savchenko [Thu, 3 Jun 2021 16:51:19 +0000 (19:51 +0300)]
[analyzer] Turn TrackControlDependencyCond into a tracking visitor
Differential Revision: https://reviews.llvm.org/D103631
Valeriy Savchenko [Thu, 3 Jun 2021 16:32:04 +0000 (19:32 +0300)]
[analyzer] Refactor trackRValueExpression into ExpressionHandler
Differential Revision: https://reviews.llvm.org/D103630
Valeriy Savchenko [Thu, 3 Jun 2021 16:09:43 +0000 (19:09 +0300)]
[analyzer] Turn ReturnVisitor into a tracking visitor
Whenever Tracker spawns a visitor that needs to call tracker
back, we have to use TrackingBugReporterVisitor in order to maintain
all the hooks that the checker might've used.
Differential Revision: https://reviews.llvm.org/D103628
Valeriy Savchenko [Thu, 3 Jun 2021 15:54:32 +0000 (18:54 +0300)]
[analyzer] Hide and rename FindLastStoreBRVisitor
This component should not be used directly at this point and it is
simply an implementation detail, that's why StoreSiteFinder is
out of the header file.
Differential Revision: https://reviews.llvm.org/D103624
Valeriy Savchenko [Thu, 10 Jun 2021 10:57:39 +0000 (13:57 +0300)]
[analyzer] Change FindLastStoreBRVisitor to use Tracker
Additionally, this commit completely removes any uses of
FindLastStoreBRVisitor from the analyzer except for the
one in Tracker.
The next step is actually removing this class altogether
from the header file.
Differential Revision: https://reviews.llvm.org/D103618
Valeriy Savchenko [Thu, 3 Jun 2021 13:47:33 +0000 (16:47 +0300)]
[analyzer] Reimplement trackExpressionValue as ExpressionHandler
This commit moves trackExpressionValue into the Tracker interface
as DefaultExpressionHandler. It still can be split into smaller
handlers, but that can be a future change.
Additionally, this commit doesn't remove the original trackExpressionValue
interface, so it's not too big. One of the next commits will address it.
Differential Revision: https://reviews.llvm.org/D103616
Valeriy Savchenko [Thu, 3 Jun 2021 09:55:43 +0000 (12:55 +0300)]
[analyzer] Introduce a new interface for tracking
Tracking values through expressions and the stores is fundamental
for producing clear diagnostics. However, the main components
participating in this process, namely `trackExpressionValue` and
`FindLastStoreBRVisitor`, became pretty bloated. They have an
interesting dynamic between them (and some other visitors) that
one might call a "chain reaction". `trackExpressionValue` adds
`FindLastStoreBRVisitor`, and the latter calls `trackExpressionValue`.
Because of this design, individual checkers couldn't affect what's
going to happen somewhere in the middle of that chain. Whether they
want to produce a more informative note or keep the overall tracking
going by utilizing some of the domain expertise. This all lead to two
biggest problems that I see:
* Some checkers don't use it
This should probably never be the case for path-sensitive checks.
* Some checkers incorporated their logic directly into those
components
This doesn't make the maintenance easier, breaks multiple
architecture principles, and makes the code harder to read adn
understand, thus, increasing the probability of the first case.
This commit introduces a prototype for a new interface that will be
responsible for tracking. My main idea here was to make operations
that I want have as a checker developer easy to implement and hook
directly into the tracking process.
Differential Revision: https://reviews.llvm.org/D103605
Roman Lebedev [Fri, 11 Jun 2021 09:31:09 +0000 (12:31 +0300)]
[VectorCombine] scalarizeLoadExtract(): use computeAlignmentAfterScalarization() helper
This results in slightly more optimistic alignments in some cases
Roman Lebedev [Fri, 11 Jun 2021 09:22:02 +0000 (12:22 +0300)]
[NFC][VectorCombine] Extract computeAlignmentAfterScalarization() helper function
Bing1 Yu [Fri, 11 Jun 2021 09:20:58 +0000 (17:20 +0800)]
[X86] Support __tile_stream_loadd intrinsic for new AMX interface
Adding support for __tile_stream_loadd intrinsic.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D103784
Simon Pilgrim [Fri, 11 Jun 2021 09:20:59 +0000 (10:20 +0100)]
SampleProf.h - fix spelling mistake in assert message. NFC.
Simon Pilgrim [Fri, 11 Jun 2021 09:19:37 +0000 (10:19 +0100)]
[Analysis] Pass RecurrenceDescriptor as const reference. NFCI.
We were passing the RecurrenceDescriptor by value to most of the reduction analysis methods, despite it being rather bulky with TrackingVH members (that can be costly to copy). In all these cases we're only using the RecurrenceDescriptor for rather basic purposes (access to types/kinds etc.).
Differential Revision: https://reviews.llvm.org/D104029
Simon Pilgrim [Thu, 10 Jun 2021 12:01:03 +0000 (13:01 +0100)]
Fix implicit dependency on <string> header. NFCI.
Sven van Haastregt [Fri, 11 Jun 2021 09:22:59 +0000 (10:22 +0100)]
[OpenCL][NFC] Reorganize ClangOpenCLBuiltinEmitter comments
Since
8866793b4e0a ("[OpenCL] Add OpenCL builtin test generator",
2021-06-09) there are two emitters in this file, so move the
file-level comment to the appropriate class.
Stephen Hines [Fri, 11 Jun 2021 09:07:59 +0000 (02:07 -0700)]
[compiler-rt] [builtins] [AArch64] Add missing AArch64 data synchronization barrier (dsb) to __clear_cache
https://developer.arm.com/documentation/den0024/a/Caches/Cache-maintenance
covers how to properly clear caches on AArch64, and the builtin
implementation was missing a `dsb ish` after clearing the icache for the
selected range.
Reviewed By: kristof.beyls
Differential Revision: https://reviews.llvm.org/D104094
Ivan Murashko [Fri, 11 Jun 2021 08:44:56 +0000 (01:44 -0700)]
[clang-tidy] LIT test fix for Remark diagnostic
There is a followup fix for a unit test introduced at D102906. The test file was placed into a temp folder and test assumed that it would be visible without the full path specification.
This behaviour can be changed in future and it would be good to specify full path to the file at the test.
Test Plan:
```
ninja check-clang-tools
```
Reviewed By: DmitryPolukhin
Differential Revision: https://reviews.llvm.org/D104021
Adrian Kuegel [Fri, 11 Jun 2021 07:37:01 +0000 (09:37 +0200)]
[mlir] Refactor ComplexOps.td [NFC]
Create a ComplexUnaryOp base class and use it for AbsOp, ReOp and ImOp.
Sort all ops in lexicographic order.
Differential Revision: https://reviews.llvm.org/D104095
LLVM GN Syncbot [Fri, 11 Jun 2021 08:23:07 +0000 (08:23 +0000)]
[gn build] Port
c4a0969b9c14
Sjoerd Meijer [Tue, 4 May 2021 14:12:44 +0000 (15:12 +0100)]
Function Specialization Pass
This adds a function specialization pass to LLVM. Constant parameters
like function pointers and constant globals are propagated to the callee by
specializing the function.
This is a first version with a number of limitations:
- The pass is off by default, so needs to be enabled on the command line,
- It does not handle specialization of recursive functions,
- It does not yet handle constants and constant ranges,
- Only 1 argument per function is specialised,
- The cost-model could be further looked into, and perhaps related,
- We are not yet caching analysis results.
This is based on earlier work by Matthew Simpson (D36432) and Vinay Madhusudan.
More recently this was also discussed on the list, see:
https://lists.llvm.org/pipermail/llvm-dev/2021-March/149380.html.
The motivation for this work is that function specialisation often comes up as
a reason for performance differences of generated code between LLVM and GCC,
which has this enabled by default from optimisation level -O3 and up. And while
this certainly helps a few cpu benchmark cases, this also triggers in real
world codes and is thus a generally useful transformation to have in LLVM.
Function specialisation has great potential to increase compile-times and
code-size. The summary from some investigations with this patch is:
- Compile-time increases for short compile jobs is high relatively, but the
increase in absolute numbers still low.
- For longer compile-jobs, the extra compile time is around 1%, and very much
in line with GCC.
- It is difficult to blame one thing for compile-time increases: it looks like
everywhere a little bit more time is spent processing more functions and
instructions.
- But the function specialisation pass itself is not very expensive; it doesn't
show up very high in the profile of the optimisation passes.
The goal of this work is to reach parity with GCC which means that eventually
we would like to get this enabled by default. But first we would like to address
some of the limitations before that.
Differential Revision: https://reviews.llvm.org/D93838
Petr Hosek [Fri, 11 Jun 2021 07:43:52 +0000 (00:43 -0700)]
Revert "[Driver] Support libc++ in MSVC"
This reverts commit
9625d61eb66c12388875e081b63ebed7e42c6bbb since
libc++ currently has issues with disabled exceptions which breaks
the runtimes build.
Petr Hosek [Fri, 11 Jun 2021 07:43:27 +0000 (00:43 -0700)]
Revert "[CMake] Don't use libc++ by default on Windows yet"
This reverts commit
b413e44200e715c254fa9a41f6a86f8761c9b362.
Vitaly Buka [Fri, 11 Jun 2021 01:43:35 +0000 (18:43 -0700)]
[lldb] Fix leak in test
Test leaks if we run
tools/lldb/unittests/Host/HostTests without --gtest_filter
Reviewed By: teemperor
Differential Revision: https://reviews.llvm.org/D104091
Qiu Chaofan [Fri, 11 Jun 2021 06:51:36 +0000 (14:51 +0800)]
[PowerPC] Relax register superclasses for paired memops
Relaxing superclass constraint for VSX register classes helps reducing
32-byte spills and copies when register pressure is high.
In test case affected, some of them introduces more copies due to new
allocation order. However, this patch should not be the root cause, and
we may be able to fix it in other places of register allocation.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D104006
Raphael Isemann [Fri, 11 Jun 2021 06:51:04 +0000 (08:51 +0200)]
[lldb] Move once_flags in HostInfoLinux so the internal state struct
The HostInfoLinuxFields struct is supposed to be set up/torn down on
Initialize/Terminate and should contain all the state of the plugin.
`once_flags` are part of this state and should also be reset on `Terminate` so
we can re-initialize these lazy values after the next `Initialize` call.
This itself is NFC as the HostInfoLinux was broken before this patch and is
still broken afterwards. D104091 will be the proper fix.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D104093
Hsiangkai Wang [Thu, 3 Jun 2021 15:45:49 +0000 (23:45 +0800)]
[RISCV] Avoid scalar outgoing argumetns overwriting vector frame objects.
When using FP to access stack objects, the scalable stack objects will
be put at the lower end of the frame. It looks like
```
|-------------------| <-- FP
| callee-saved regs |
|-------------------|
| scalar local vars |
|-------------------|
| RVV local vars |
|-------------------| <-- SP
```
If there are scalar arguments that need to pass through memory and there
are vector objects on the stack using FP to access. The outgoing scalar
arguments will overwrite the vector objects. It looks like
```
|-------------------| <-- FP
| callee-saved regs |
|-------------------|
| scalar local vars |
|-------------------| |-------------------|
| RVV local vars | | outgoing args | <- outgoing arguments
|-------------------| <-- SP |-------------------| overwrite from here.
```
In this patch, we reserve the stack for the outgoing arguments before
function calls if using FP to access and there are scalable vector frame
objects. It looks like
```
|-------------------| <-- FP
| callee-saved regs |
|-------------------|
| scalar local vars |
|-------------------|
| RVV local vars |
|-------------------|
| outgoing args |
|-------------------| <-- SP
```
Differential Revision: https://reviews.llvm.org/D103622
Nico Weber [Fri, 11 Jun 2021 00:17:54 +0000 (20:17 -0400)]
[lld/mac] Make binaries written by lld strippable
Be less clever when writing the indirect symbols in LC_DYSYMTAB:
lld used to make point __stubs and __la_symbol_ptr point at the
same bytes in the indirect symbol table in the __LINKEDIT segment.
That confused strip, so write the same bytes twice and make
__stubs and __la_symbol_ptr point at one copy each, so that they
don't share data. This unconfuses strip, and seems to be what ld64
does too, so hopefully tools are generally more used to this.
This makes the output binaries a bit larger, but not much: 4 bytes
for roughly each called function from a dylib and each weak function.
Chromium Framewoork grows by 6536 bytes, clang-format by a few hundred.
With this, `strip -x Chromium\ Framework` works (244 MB before stripping
to 171 MB after stripping, compared to 236 MB=>164 MB with ld64). Running
strip without `-x` produces the same error message now for lld-linked
Chromium Framework as for when using ld64 as a linker.
`strip clang-format` also works now but didn't previously.
Fixes PR50657.
Differential Revision: https://reviews.llvm.org/D104081
Craig Topper [Fri, 11 Jun 2021 03:42:11 +0000 (20:42 -0700)]
[RISCV] Remove extra assignment of intrinsic ID in ManualCodegen. NFC
There's already an autogenerated assignment.
Fixes static analyzer warning reported in PR50593.
Arthur Eubanks [Fri, 11 Jun 2021 03:33:36 +0000 (20:33 -0700)]
Revert "[clang] NRVO: Improvements and handling of more cases."
This reverts commit
667fbcdd0b2ee5e78f5ce9789b862e3bbca94644.
Causes crashes on a stage 2 build on Windows.
Arthur Eubanks [Fri, 11 Jun 2021 02:54:50 +0000 (19:54 -0700)]
Revert "[clang] Implement P2266 Simpler implicit move"
This reverts commit
cbd0054b9eb17ec48f0702e3828209646c8f5ebd.
Qiu Chaofan [Fri, 11 Jun 2021 02:28:15 +0000 (10:28 +0800)]
[VectorCombine] Fix alignment in single element store
This fixes the concern in single element store scalarization that the
alignment of new store may be larger than it should be. It calculates
the largest alignment if index is constant, and a safe one if not.
Reviewed By: lebedev.ri, spatel
Differential Revision: https://reviews.llvm.org/D103419
Craig Topper [Fri, 11 Jun 2021 00:05:34 +0000 (17:05 -0700)]
[RISCV] Use ComputeNumSignBits/MaskedValueIsZero in RISCVDAGToDAGISel::selectSExti32/selectZExti32.
This helps us select W instructions in more cases. Most of the
affected tests have had the sign_extend_inreg or AND folded into
sextload/zextload.
Differential Revision: https://reviews.llvm.org/D104079
Michael Kruse [Fri, 11 Jun 2021 00:58:46 +0000 (19:58 -0500)]
[Flang] Compile fix after D99459.
Fix Flang build after addition of a new OpenMP clauses for a Clang
patch (D99459). Flang is using TableGen to generation the declaration
of clause checks and the new clause was missing a definiton.
River Riddle [Fri, 11 Jun 2021 00:34:33 +0000 (17:34 -0700)]
[mlir-ir-printing] Prefix the dump message with the split marker(// -----)
This allows for better interaction with tools (such as mlir-lsp-server), as it separates the IR into separate modules for consecutive dumps.
Differential Revision: https://reviews.llvm.org/D104073
River Riddle [Fri, 11 Jun 2021 00:22:49 +0000 (17:22 -0700)]
[mlir] Add new SubElementAttr/SubElementType Interfaces
These interfaces allow for a composite attribute or type to opaquely provide access to any held attributes or types. There are several intended use cases for this interface. The first of which is to allow the printer to create aliases for non-builtin dialect attributes and types. In the future, this interface will also be extended to allow for SymbolRefAttr to be placed on other entities aside from just DictionaryAttr and ArrayAttr.
To limit potential test breakages, this revision only adds the new interfaces to the builtin attributes/types that are currently hardcoded during AsmPrinter alias generation. In a followup the remaining builtin attributes/types, and non-builtin attributes/types can be extended to support it.
Differential Revision: https://reviews.llvm.org/D102945
River Riddle [Fri, 11 Jun 2021 00:22:37 +0000 (17:22 -0700)]
[mlir][IR] Move MemRefElementTypeInterface to a new BuiltinTypeInterfaces file
This allows for using other type interfaces in the builtin dialect, which currently results in a compile time failure (as it generates duplicate interface declarations).
Amara Emerson [Thu, 10 Jun 2021 22:45:43 +0000 (15:45 -0700)]
[AArch64][GlobalISel] Fix incorrectly generating uxtw/sxtw for addressing modes.
When the extend is from 8 or 16 bits, the addressing modes don't support those
extensions, but we weren't checking that and therefore always generated the 32->64b
extension mode. Fun.
Differential Revision: https://reviews.llvm.org/D104070
Carl Ritson [Thu, 10 Jun 2021 23:40:51 +0000 (08:40 +0900)]
[ValueTypes] Define MVTs for v6i32, v6f32, v7i32, v7f32
For use in AMDGPU selection DAG.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D103881
Carl Ritson [Thu, 10 Jun 2021 23:40:21 +0000 (08:40 +0900)]
[SDAG] Fix pow2 assumption when splitting vectors
When reducing vector builds to shuffles it possible that
the DAG combiner may try to extract invalid subvectors.
This happens as the existing code assumes vectors will be power
of 2 sizes, which is already untrue, but becomes more noticable
with v6 and v7 types.
Specifically the existing code assumes that half PowerOf2Ceil of
a given vector index will fit twice into a given vector.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D103880
Craig Topper [Thu, 10 Jun 2021 23:42:29 +0000 (16:42 -0700)]
[RISCV] Add test cases that show failure to use some W instructions if they are proceeded by a load. NFC
The loads end up becoming sextload/zextload which prevent our
isel patterns from finding the sign_extend_inreg or AND instruction
we need.
The easiest way to fix this is to use computeKnownBits or
ComputeNumSignBits in our isel matching to catch this.
Sami Tolvanen [Thu, 10 Jun 2021 23:18:57 +0000 (16:18 -0700)]
[IR] Value: Fix OpCode checks
Value::SubclassID cannot be directly compared to Instruction enums, such as
Instruction::{Call,Invoke,CallBr}. We have to first subtract InstructionVal
from the SubclassID to get the OpCode, similar to Instruction::getOpCode().
Reviewed By: nickdesaulniers
Differential Revision: https://reviews.llvm.org/D104043
Wolfgang Pieb [Wed, 2 Jun 2021 18:37:35 +0000 (11:37 -0700)]
[static initializers] Emit global_ctors and global_dtors in reverse order when .ctors/.dtors are used.
Reviewed By: rnk, MaskRay, efriedma
Differential Revision: https://reviews.llvm.org/D103495
Slava Nikolaev [Thu, 10 Jun 2021 23:01:01 +0000 (16:01 -0700)]
LoadStoreVectorizer: support different operand orders in the add sequence match
First we refactor the code which does no wrapping add sequences
match: we need to allow different operand orders for
the key add instructions involved in the match.
Then we use the refactored code trying 4 variants of matching operands.
Originally the code relied on the fact that the matching operands
of the two last add instructions of memory index calculations
had the same LHS argument. But which operand is the same
in the two instructions is actually not essential, so now we allow
that to be any of LHS or RHS of each of the two instructions.
This increases the chances of vectorization to happen.
Reviewed By: volkan
Differential Revision: https://reviews.llvm.org/D103912
Arthur Eubanks [Thu, 10 Jun 2021 23:23:09 +0000 (16:23 -0700)]
[Profile] Remove redundant check
This is already checked outside the loop.
Followup to D104050.
Nick Desaulniers [Thu, 10 Jun 2021 23:03:14 +0000 (16:03 -0700)]
[IR] make -warn-frame-size into a module attr
-Wframe-larger-than= is an interesting warning; we can't know the frame
size until PrologueEpilogueInsertion (PEI); very late in the compilation
pipeline.
-Wframe-larger-than= was propagated through CC1 as an -mllvm flag, then
was a cl::opt in LLVM's PEI pass; this meant it was dropped during LTO
and needed to be re-specified via -plugin-opt.
Instead, make it part of the IR proper as a module level attribute,
similar to D103048. Introduce -fwarn-stack-size CC1 option.
Reviewed By: rsmith, qcolombet
Differential Revision: https://reviews.llvm.org/D103928
Arthur Eubanks [Thu, 10 Jun 2021 17:33:47 +0000 (10:33 -0700)]
[Profile] Handle invalid profile data
This mostly follows LLVM's InstrProfReader.cpp error handling.
Previously, attempting to merge corrupted profile data would result in
crashes. See https://crbug.com/1216811#c4.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D104050
Matheus Izvekov [Fri, 19 Mar 2021 02:32:06 +0000 (03:32 +0100)]
[clang] Implement P2266 Simpler implicit move
This Implements [[http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p2266r1.html|P2266 Simpler implicit move]].
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: Quuxplusone
Differential Revision: https://reviews.llvm.org/D99005
Andy Kaylor [Thu, 10 Jun 2021 00:02:53 +0000 (17:02 -0700)]
Preserve more MD_mem_parallel_loop_access and MD_access_group in SROA
SROA sometimes preserves MD_mem_parallel_loop_access and MD_access_group metadata on loads/stores, and sometimes fails to do so. This change adds copying of the MD after other CreateAlignedLoad/CreateAlignedStores. Also fix a case where the metadata was being copied from a load, rather than the store.
Added a LIT test to catch one case.
Patch by Mark Mendell
Differential Revision: https://reviews.llvm.org/D103254
Christopher Di Bella [Fri, 14 May 2021 06:20:07 +0000 (06:20 +0000)]
[libcxx][ranges] removes default_initializable from weakly_incrementable and view
also:
* removes default constructors from predefined iterators
* makes span and string_view views
Partially implements P2325.
Partially resolves LWG3326.
Differential Revision: https://reviews.llvm.org/D102468
Jessica Paquette [Thu, 10 Jun 2021 21:40:18 +0000 (14:40 -0700)]
[AArch64][GlobalISel] Legalize scalar G_CTTZ + G_CTTZ_ZERO_UNDEF
This adds legalization for scalar G_CTTZ and G_CTTZ_ZERO_UNDEF. Vector support
requires handling vector G_BITREVERSE, which I haven't gotten around to yet.
For G_CTTZ_ZERO_UNDEF, we just lower it to G_CTTZ.
For G_CTTZ, we match SelectionDAG's lowering to a G_BITREVERSE + G_CTLZ.
e.g. https://godbolt.org/z/nPEseYh1s
(With this patch, we have slightly worse codegen than SDAG for types smaller
than s32; it seems like we're missing a combine.)
Also, this adds in a function to build G_BITREVERSE to MachineIRBuilder.
Differential Revision: https://reviews.llvm.org/D104065
Geoffrey Martin-Noble [Fri, 14 May 2021 19:45:57 +0000 (12:45 -0700)]
[MLIR] Document that Dialect Conversion traverses in preorder
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D102525
Benoit Jacob [Thu, 10 Jun 2021 20:57:44 +0000 (13:57 -0700)]
2d Arm Neon sdot op, and lowering to the intrinsic.
This adds Sdot2d op, which is similar to the usual Neon
intrinsic except that it takes 2d vector operands, reflecting the
structure of the arithmetic that it's performing: 4 separate
4-dimensional dot products, whence the vector<4x4xi8> shape.
This also adds a new pass, arm-neon-2d-to-intr, lowering
this new 2d op to the 1d intrinsic.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D102504
Joachim Meyer [Tue, 8 Jun 2021 16:16:08 +0000 (18:16 +0200)]
[LV] Parallel annotated loop does not imply all loads can be hoisted.
As noted in https://bugs.llvm.org/show_bug.cgi?id=46666, the current behavior of assuming if-conversion safety if a loop is annotated parallel (`!llvm.loop.parallel_accesses`), is not expectable, the documentation for this behavior was since removed from the LangRef again, and can lead to invalid reads.
This was observed in POCL (https://github.com/pocl/pocl/issues/757) and would require similar workarounds in current work at hipSYCL.
The question remains why this was initially added and what the implications of removing this optimization would be.
Do we need an alternative mechanism to propagate the information about legality of if-conversion?
Or is the idea that conditional loads in `#pragma clang loop vectorize(assume_safety)` can be executed unmasked without additional checks flawed in general?
I think this implication is not part of what a user of that pragma (and corresponding metadata) would expect and thus dangerous.
Only two additional tests failed, which are adapted in this patch. Depending on the further direction force-ifcvt.ll should be removed or further adapted.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D103907
Sanjay Patel [Thu, 10 Jun 2021 20:59:41 +0000 (16:59 -0400)]
[SimplifyCFG] avoid 'tmp' variables in test file; NFC
Matheus Izvekov [Fri, 19 Mar 2021 02:32:06 +0000 (03:32 +0100)]
[clang] NRVO: Improvements and handling of more cases.
This expands NRVO propagation for more cases:
Parse analysis improvement:
* Lambdas and Blocks with dependent return type can have their variables
marked as NRVO Candidates.
Variable instantiation improvements:
* Fixes crash when instantiating NRVO variables in Blocks.
* Functions, Lambdas, and Blocks which have auto return type have their
variables' NRVO status propagated. For Blocks with non-auto return type,
as a limitation, this propagation does not consider the actual return
type.
This also implements exclusion of VarDecls which are references to
dependent types.
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: Quuxplusone
Differential Revision: https://reviews.llvm.org/D99696
David Green [Thu, 10 Jun 2021 20:53:04 +0000 (21:53 +0100)]
[ARM] Fix Changed status in MVEGatherScatterLoweringPass.
Now that we are calling SimplifyInstructionsInBlock, make sure we update
Changed when it reports alterations.
Philip Reames [Thu, 10 Jun 2021 20:36:14 +0000 (13:36 -0700)]
[LI] Add a cover function for checking if a loop is mustprogress [nfc]
Essentially, the cover function simply combines the loop level check and the function level scope into one call. This simplifies several callers and is (subjectively) less error prone.
Louis Dionne [Thu, 10 Jun 2021 20:35:17 +0000 (16:35 -0400)]
[libc++] Remove unnecessary header in enable_view.h (which caused a cycle)
Fangrui Song [Thu, 10 Jun 2021 20:30:16 +0000 (13:30 -0700)]
[ELF] Simplify getAArch64UndefinedRelativeWeakVA. NFC
Fangrui Song [Thu, 10 Jun 2021 20:25:16 +0000 (13:25 -0700)]
[ELF][RISCV] Resolve branch relocations referencing undefined weak to current location if not using PLT
In a -no-pie link we optimize R_PLT_PC to R_PC. Currently we resolve a branch
relocation to the link-time zero address. However such a choice tends to cause
relocation overflow possibility for RISC architectures.
* aarch64: GNU ld: rewrite the instruction to a NOP; ld.lld: branch to the next instruction
* mips: GNU ld: branch to the start of the text segment (?); ld.lld: branch to zero
* ppc32: GNU ld: rewrite the instruction to a NOP; ld.lld: branch to the current instruction
* ppc64: GNU ld: rewrite the instruction to a NOP; ld.lld: branch to the current instruction
* riscv: GNU ld: branch to the absolute zero address (with instruction rewriting)
* i386/x86_64: GNU ld/ld.lld: branch to the link-time zero address
I think that resolving to the same location is a good choice. The instruction,
if triggered, is clearly an undefined behavior. Resolving to the same location
can cause an infinite loop (making the user aware of the issue) while ensuring
no overflow.
Reviewed By: jrtc27
Differential Revision: https://reviews.llvm.org/D103001
Philip Reames [Thu, 10 Jun 2021 20:16:50 +0000 (13:16 -0700)]
[SCEV] Use mustprogress flag on loops (in addition to function attribute)
This addresses a performance regression reported against
3c6e4191. That change (correctly) limited a transform based on assumed finiteness to mustprogress loops, but the previous change (38540d7) which introduced the mustprogress check utility only handled function attributes, not the loop metadata form.
It turns out that clang uses the function attribute form for C++, and the loop metadata form for C. As a result,
3c6e4191 ended up being a large regression in practice for C code as loops weren't being considered mustprogress despite the language semantics.
Sterling Augustine [Thu, 10 Jun 2021 20:12:46 +0000 (13:12 -0700)]
Move variable only used inside an assert into the assert.
This prevents build failures with -Wunused.
Philip Reames [Thu, 10 Jun 2021 20:00:21 +0000 (13:00 -0700)]
Move code for checking loop metadata into Analysis [nfc]
I need the mustprogress loop metadata in ScalarEvolution and it makes sense to keep all the accessors for quering loop metadate together.
LLVM GN Syncbot [Thu, 10 Jun 2021 19:39:58 +0000 (19:39 +0000)]
[gn build] Port
bbb3d03f93b8
Christopher Di Bella [Thu, 10 Jun 2021 18:40:21 +0000 (18:40 +0000)]
[libcxx][ranges][nfc] moves view concepts into `__ranges/concepts.h`
Michael Kruse [Thu, 10 Jun 2021 19:24:17 +0000 (14:24 -0500)]
[OpenMP] Implement '#pragma omp unroll'.
Implementation of the unroll directive introduced in OpenMP 5.1. Follows the approach from D76342 for the tile directive (i.e. AST-based, not using the OpenMPIRBuilder). Tries to use `llvm.loop.unroll.*` metadata where possible, but has to fall back to an AST representation of the outer loop if the partially unrolled generated loop is associated with another directive (because it needs to compute the number of iterations).
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D99459
David Green [Thu, 10 Jun 2021 19:18:12 +0000 (20:18 +0100)]
[ARM] Ensure instructions are simplified prior to GatherScatter lowering.
Surprisingly, not all instructions are always simplified after unrolling
and before MVE gather/scatter lowering. Notably dead gather operations
can be left around which cause the gather/scatter lowering pass to crash
if there are multiple gathers, some of which are dead.
This patch ensures they are simplified before we modify anything, which
can change some of the existing tests, including making them no-longer
test what they originally tested. This uses a combination of disabling
the gather/scatter lowering pass and adjusting the test to keep them as
before.
Differential Revision: https://reviews.llvm.org/D103150
Jez Ng [Thu, 10 Jun 2021 19:06:20 +0000 (15:06 -0400)]
[lld-macho][nfc] Fix uninitialized members warning from Coverity
We were always assigning to this member before using it, but just to be
safe...
See https://lists.llvm.org/pipermail/llvm-dev/2021-June/151029.html
Tue Ly [Fri, 23 Apr 2021 04:38:59 +0000 (00:38 -0400)]
[libc] Add implementation of expm1f.
Use expm1f(x) = exp(x) - 1 for |x| > ln(2).
For |x| <= ln(2), divide it into 3 subintervals: [-ln2, -1/8], [-1/8, 1/8], [1/8, ln2]
and use a degree-6 polynomial approximation generated by Sollya's fpminmax for each interval.
Errors < 1.5 ULPs when we use fma to evaluate the polynomials.
Differential Revision: https://reviews.llvm.org/D101134
River Riddle [Thu, 10 Jun 2021 18:33:47 +0000 (11:33 -0700)]
[mlir-vscode] Fix dependencies to enable packaging the extension properly.
Eric Astor [Thu, 10 Jun 2021 17:28:18 +0000 (13:28 -0400)]
[ms] [llvm-ml] Warn on command-line redefinition
If a macro is defined on the command line and then overridden in the source code, this is likely to be an error in the user's build system. We should warn on this.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D104008
Stella Stamenova [Thu, 10 Jun 2021 18:13:38 +0000 (11:13 -0700)]
[lldb, win] Remove obsolete workaround for MSVC and python libs
This workaround was necessary before the major changes of managing python versions, but it is not needed anymore.
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D104047
River Riddle [Thu, 10 Jun 2021 17:58:08 +0000 (10:58 -0700)]
[mlir-lsp-server] Document the features provided by the language server
This revision adds focused documentation on each of the individual features of the server, with images showcasing how they look in vscode.
Differential Revision: https://reviews.llvm.org/D103942
River Riddle [Thu, 10 Jun 2021 17:57:55 +0000 (10:57 -0700)]
[mlir-lsp-server] Add support for textDocument/documentSymbols
This allows for building an outline of the symbols and symbol tables within the IR. This allows for easy navigations to functions/modules and other symbol/symbol table operations within the IR.
Differential Revision: https://reviews.llvm.org/D103729
Jessica Paquette [Thu, 10 Jun 2021 00:35:17 +0000 (17:35 -0700)]
[AArch64][GlobalISel] Mark some G_BITREVERSE types as legal + select them
We fall back on G_CTTZ_ZERO_UNDEF a lot when building clang for arm64 with
gisel.
Handling this will require that we can handle G_BITREVERSE.
This patch marks G_BITREVERSE instructions with natively supported types as
legal. We get selection on these types for free via the importer.
Differential Revision: https://reviews.llvm.org/D103999
Alexey Bataev [Thu, 10 Jun 2021 12:15:27 +0000 (05:15 -0700)]
[SLP]Disable scheduling of insertelements.
There is no need to schedule insertelement instructions. The compiler
did not schedule them before it started support their vectorization and
it should not do it after. We pre-schedule them manually when finding
a build vector sequence.
Disabling scheduling of insertelement instructions improves compile
time and vectorization of the very large basic blocks by saving
scheduling budget for other instructions.
Differential Revision: https://reviews.llvm.org/D104026
Zachary Selk [Thu, 10 Jun 2021 17:14:25 +0000 (11:14 -0600)]
[flang] Fixed simple typo in runtime code
Reviewed By: klausler
Differential Revision: https://reviews.llvm.org/D104034
Nico Weber [Thu, 10 Jun 2021 16:50:04 +0000 (12:50 -0400)]
[gn build] minor TODO.txt update
Michael Kruse [Thu, 10 Jun 2021 16:23:53 +0000 (11:23 -0500)]
[Flang][Runtime][tests] Escape regex special character.
The second argument of `ASSERT_DEATH` describes a regular expression, in
which parentheses have special meaning. Matches of literal parentheses
need to be escaped.
Fixes failure of InvalidFormatFailure.ParenMismatch and
InvalidFormatFailure.ParenMismatch when gtest is compiled with MSVC's
regex implementation.
Reviewed By: awarzynski
Differential Revision: https://reviews.llvm.org/D104011
Jonas Devlieghere [Thu, 10 Jun 2021 16:28:45 +0000 (09:28 -0700)]
[lldb] Add
9494c510af56 to .git-blame-ignore-revs
Adding
9494c510af56 to .git-blame-ignore-revs after having let it simmer
for a day.
Louis Dionne [Wed, 9 Jun 2021 17:04:32 +0000 (13:04 -0400)]
[libc++abi] Remove the LIBCXXABI_ENABLE_PIC option
Instead, people should be using CMAKE_POSITION_INDEPENDENT_CODE to control
whether they want to use PIC or not. We should try to avoid reinventing
the wheel whenever CMake natively supports something.
This makes libc++abi consistent with libc++ and libunwind.
Differential Revision: https://reviews.llvm.org/D103973
Melanie Blower [Thu, 10 Jun 2021 15:44:18 +0000 (11:44 -0400)]
Revert "[clang][FPEnv] Clang floatng point model ffp-model=precise enables ffp-contract=on"
This reverts commit
8daac3714083aa5507622dba858344051f6b5574.
The build bots are showing some fails on broadwell and arm.
Fix to LNT test suite needs work.
David Tenty [Thu, 10 Jun 2021 15:15:04 +0000 (11:15 -0400)]
[AIX] Build libLTO as MODULE rather than SHARED
On CMake versions greater that >= 3.16 on AIX, shared libraries are
created as archives (which is the normal form for the platform). However
plugins libraries which are passed directly to a executable, like
libLTO to the linker, are usual build as plain `.so`, so this patch
restores this behaviour for libLTO on AIX (and adjust the name if need be
to account for the fact that llvm_add_library likes to force an empty
name prefix on modules), so we end up with the expected libLTO.so
Reviewed By: w2yehia
Differential Revision: https://reviews.llvm.org/D103824
Aaron Ballman [Thu, 10 Jun 2021 15:59:29 +0000 (11:59 -0400)]
Add a page to track the status of C proposals in Clang.
Keith Smiley [Wed, 9 Jun 2021 16:08:54 +0000 (09:08 -0700)]
Fix range-loop-analysis warning
```
llvm-project/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:8024:19: warning: loop variable 'VF' of type 'const llvm::ElementCount' creates a copy from type 'const llvm::ElementCount' [-Wrange-loop-analysis]
for (const auto VF : VFCandidates) {
^
llvm-project/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp:8024:8: note: use reference type 'const llvm::ElementCount &' to prevent copying
for (const auto VF : VFCandidates) {
^~~~~~~~~~~~~~~
&
1 warning generated.
```
Differential Revision: https://reviews.llvm.org/D103970
thomasraoux [Wed, 9 Jun 2021 16:42:32 +0000 (09:42 -0700)]
[mlir][gpu] Add op to create MMA constant matrix
This allow creating a matrix with all elements set to a given value. This is
needed to be able to implement a simple dot op.
Differential Revision: https://reviews.llvm.org/D103870
gbreynoo [Thu, 10 Jun 2021 15:32:31 +0000 (16:32 +0100)]
[docs][llvm-ar] Add rsp-quoting option to the llvm-ar command guide.
I noticed that I did not update the command guide when introducing the
--rsp-quoting option. This change fixes this.
Differential Revision: https://reviews.llvm.org/D103915
Benjamin Kramer [Thu, 10 Jun 2021 15:23:37 +0000 (17:23 +0200)]
[AArch64] Silence fallthrough warning. NFC.
AArch64TargetTransformInfo.cpp:302:3: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
default:
^
Markus Böck [Thu, 10 Jun 2021 15:06:19 +0000 (17:06 +0200)]
[clang-cl] Add /permissive and /permissive-
This patch adds the command line options /permissive and /permissive- to clang-cl. These flags are used in MSVC to enable various /Zc language conformance options at once. In particular, /permissive is used to enable the various non standard behaviour of MSVC, while /permissive- is the opposite.
When either of two command lines are specified they are simply expanded to the various underlying /Zc options. In particular when /permissive is passed it currently expands to:
/Zc:twoPhase- (disable two phase lookup)
-fno-operator-names (disable C++ operator keywords)
/permissive- expands to the opposites of these flags + /Zc:strictStrings (/Zc:strictStrings- does not currently exist). In the future, if any more MSVC workarounds are ever added they can easily be added to the expansion. One is also able to override settings done by permissive. Specifying /permissive- /Zc:twoPhase- will apply the settings from permissive minus, but disables two phase lookup.
Motivation for this patch was mainly parity with MSVC as well as compatibility with Windows SDK headers. The /permissive page from MSVC documents various workarounds that have to be done for the Windows SDK headers [1], when MSVC is used with /permissive-. In these, Microsoft often recommends simply compiling with /permissive for the specified source files. Since some of these also apply to clang-cl (which acts like /permissive- by default mostly), and some are currently implemented as "hacks" within clang that I'd like to remove, adding /permissive and /permissive- to be in full parity with MSVC and Microsofts documentation made sense to me.
[1] https://docs.microsoft.com/en-us/cpp/build/reference/permissive-standards-conformance?view=msvc-160#windows-header-issues
Differential Revision: https://reviews.llvm.org/D103773
Markus Böck [Thu, 10 Jun 2021 15:02:44 +0000 (17:02 +0200)]
[clang][msvc] Define _HAS_STATIC_RTTI to 0, when compiling with -fno-rtti
When using the -fno-rtti option of the GCC style clang++, using typeid results in an error. The MSVC STL however kindly provides a define flag called _HAS_STATIC_RTTI, which either enables or disables uses of typeid throughout the STL. By default, if undefined, it is set to 1, enabling the use of typeid.
With this patch, _HAS_STATIC_RTTI is set to 0 when -fno-rtti is specified. This way various headers of the MSVC STL like functional can be consumed without compilation failures.
Differential Revision: https://reviews.llvm.org/D103771
Markus Böck [Thu, 10 Jun 2021 15:01:13 +0000 (17:01 +0200)]
[clang][driver] Add -foperator-names
This patch adds the command line option -foperator-names which acts as the opposite of -fno-operator-names. With this command line option it is possible to reenable C++ operator keywords on the command line if -fno-operator-names had previously been passed.
Differential Revision: https://reviews.llvm.org/D103749
Adam Czachorowski [Mon, 7 Jun 2021 16:26:21 +0000 (18:26 +0200)]
[clang] Do not crash when ArgTy is null in CheckArgAlignment
This can happen around RecoveryExpr.
Differential Revision: https://reviews.llvm.org/D103825
Luo, Yuanke [Thu, 10 Jun 2021 14:36:17 +0000 (22:36 +0800)]
[X86][NFC] Fix typo.
Xing Xue [Thu, 10 Jun 2021 14:45:50 +0000 (10:45 -0400)]
[libc++abi] NFC: adding a new parameter base to functions for calculating addresses with relative encodings
Summary:
This NFC patch adds a new parameter base to functions invoked by scan_eh_tab() for calculating the address of the encoding with a relative value. base defaults to 0. This is in preparation for the AIX implementation which uses the DW_EH_PE_datarel encoding.
Reviewed by: MaskRay, sfertile, compnerd, libc++abi
Differential Revision: https://reviews.llvm.org/D101545
Paul C. Anagnostopoulos [Tue, 8 Jun 2021 15:51:53 +0000 (11:51 -0400)]
[TableGen] Eliminate dead code in ParseForeachDeclaration [NFC]
Differential Revision: https://reviews.llvm.org/D103904
Irina Dobrescu [Thu, 3 Jun 2021 08:46:12 +0000 (09:46 +0100)]
[AArch64] Add cost tests for bitreverse
This patch includes cost tests for bit reverse as well as some adjustments to the cost model.
Differential Revision: https://reviews.llvm.org/D102755