Benjamin Kramer [Tue, 21 Aug 2018 18:44:25 +0000 (18:44 +0000)]
[NVPTX] Remove ftz variants of cvt with rounding mode
These do not exist in ptxas, it refuses to compile them.
Differential Revision: https://reviews.llvm.org/D51042
llvm-svn: 340317
Matt Davis [Tue, 21 Aug 2018 18:39:20 +0000 (18:39 +0000)]
[llvm-mca] Remove unused decl. NFC.
llvm-svn: 340316
Eric Christopher [Tue, 21 Aug 2018 18:35:08 +0000 (18:35 +0000)]
Temporarily Revert "[PowerPC] Generate Power9 extswsli extend sign and shift immediate instruction" due to it causing a compiler crash on valid.
This reverts commit r340016, testcase forthcoming.
llvm-svn: 340315
Andrea Di Biagio [Tue, 21 Aug 2018 18:20:16 +0000 (18:20 +0000)]
[llvm-mca] Add the ability to customize the instruction selection strategy in the Scheduler.
The constructor of Scheduler now accepts a SchedulerStrategy object, which is
used internally by method Scheduler::select() to drive the instruction selection
process.
The goal of this patch is to enable the definition of custom selection
strategies while reusing the same algorithms implemented by class Scheduler.
The motivation is that, on some targets, the default strategy may not well
approximate the selection logic in the hardware schedulers.
This patch also adds the ability to pass a ResourceManager object to the
constructor of Scheduler. This gives a bit more flexibility to the design, and
potentially it allows to expose processor resources to SchedulerStrategy
objects.
Differential Revision: https://reviews.llvm.org/D51051
llvm-svn: 340314
Simon Pilgrim [Tue, 21 Aug 2018 18:02:28 +0000 (18:02 +0000)]
[X86][SSE] Add non-uniform udiv test that is mostly divide by 1.
The test demonstrates over-complicated codegen for a udiv that only has one divisor that doesn't equal 1. This should have allowed the codegen to be a lot simpler (uniform shifts etc.) but only the SSE2 manages to make use of this......
llvm-svn: 340313
Philip Reames [Tue, 21 Aug 2018 17:59:11 +0000 (17:59 +0000)]
[AST] Remove notion of volatile from alias sets [NFCI]
Volatility is not an aliasing property. We used to model volatile as if it had extremely conservative aliasing implications, but that hasn't been true for several years now. So, it doesn't make sense to be in AliasSet.
It also turns out the code is entirely a noop. Outside of the AST code to update it, there was only one user: load store promotion in LICM. L/S promotion doesn't need the check since it walks all the users of the address anyway. It already checks each load or store via !isUnordered which causes us to bail for volatile accesses. (Look at the lines immediately following the two remove asserts.)
There is the possibility of some small compile time impact here, but the only case which will get noticeably slower is a loop with a large number of loads and stores to the same address where only the last one we inspect is volatile. This is sufficiently rare it's not worth optimizing for..
llvm-svn: 340312
Erik Pilkington [Tue, 21 Aug 2018 17:50:10 +0000 (17:50 +0000)]
Address Aaron Ballman's post-commit review comments from r340306, NFC
llvm-svn: 340311
Yury Delendik [Tue, 21 Aug 2018 17:48:28 +0000 (17:48 +0000)]
Update DBG_VALUE register operand during LiveInterval operations
Summary:
Handling of DBG_VALUE in ConnectedVNInfoEqClasses::Distribute() was fixed in
PR16110. However DBG_VALUE register operands are not getting updated. This
patch properly resolves the value location.
Reviewers: MatzeB, vsk
Reviewed By: MatzeB
Subscribers: kparzysz, thegameg, vsk, MatzeB, dschuff, sbc100, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D48994
llvm-svn: 340310
Aditya Nandakumar [Tue, 21 Aug 2018 17:30:31 +0000 (17:30 +0000)]
Revert "Revert rr340111 "[GISel]: Add Legalization/lowering code for bit counting operations""
This reverts commit
d1341152d91398e9a882ba2ee924147ea2f9b589.
This patch originally made use of Nested MachineIRBuilder buildInstr
calls, and since order of argument processing is not well defined, the
instructions were built slightly in a different order (still correct).
I've removed the nested buildInstr calls to have a defined order now.
Patch was tested by Mikael.
llvm-svn: 340309
Vlad Tsyrklevich [Tue, 21 Aug 2018 17:29:01 +0000 (17:29 +0000)]
SafeStack: Use correct unsafe stack sizes
Summary:
When deallocating thread stacks, we use one thread's unsafe stack size
to deallocate another thread's unsafe stack; however, the two sizes may
differ. Record an unsafe stack's size in the thread stack linked list.
Reviewers: pcc, eugenis
Reviewed By: eugenis
Subscribers: delcypher, llvm-commits, #sanitizers, kcc
Differential Revision: https://reviews.llvm.org/D51016
llvm-svn: 340308
Simon Pilgrim [Tue, 21 Aug 2018 17:27:03 +0000 (17:27 +0000)]
[X86][SSE] Lower vXi8 general shifts to SSE shifts directly. NFCI.
Most of these shifts are extended to vXi16 so we don't gain anything from forcing another round of generic shift lowering - we know these extended cases are legal constant splat shifts.
llvm-svn: 340307
Erik Pilkington [Tue, 21 Aug 2018 17:24:06 +0000 (17:24 +0000)]
Add a new flag and attributes to control static destructor registration
This commit adds the flag -fno-c++-static-destructors and the attributes
[[clang::no_destroy]] and [[clang::always_destroy]]. no_destroy specifies that a
specific static or thread duration variable shouldn't have it's destructor
registered, and is the default in -fno-c++-static-destructors mode.
always_destroy is the opposite, and is the default in -fc++-static-destructors
mode.
A variable whose destructor is disabled (either because of
-fno-c++-static-destructors or [[clang::no_destroy]]) doesn't count as a use of
the destructor, so we don't do any access checking or mark it referenced. We
also don't emit -Wexit-time-destructors for these variables.
rdar://
21734598
Differential revision: https://reviews.llvm.org/D50994
llvm-svn: 340306
Peter Collingbourne [Tue, 21 Aug 2018 17:18:18 +0000 (17:18 +0000)]
llvm-readobj: Simplify. NFCI.
llvm-svn: 340305
Raphael Isemann [Tue, 21 Aug 2018 17:15:57 +0000 (17:15 +0000)]
[ASTImporter] Add test for CXXNoexceptExpr
Reviewers: a.sidorin, a_sidorin
Reviewed By: a_sidorin
Subscribers: a_sidorin, hiraditya, martong, cfe-commits
Differential Revision: https://reviews.llvm.org/D50737
llvm-svn: 340304
Craig Topper [Tue, 21 Aug 2018 17:15:33 +0000 (17:15 +0000)]
[BypassSlowDivision] Teach bypass slow division not to interfere with div by constant where constants have been constant hoisted, but not moved from their basic block
DAGCombiner doesn't pay attention to whether constants are opaque before doing the div by constant optimization. So BypassSlowDivision shouldn't introduce control flow that would make DAGCombiner unable to see an opaque constant. This can occur when a div and rem of the same constant are used in the same basic block. it will be hoisted, but not leave the block.
Longer term we probably need to look into the X86 immediate cost model used by constant hoisting and maybe not mark div/rem immediates for hoisting at all.
This fixes the case from PR38649.
Differential Revision: https://reviews.llvm.org/D51000
llvm-svn: 340303
Simon Pilgrim [Tue, 21 Aug 2018 17:05:07 +0000 (17:05 +0000)]
[X86][SSE] Lower v8i16 general shifts to SSE shifts directly. NFCI.
We don't gain anything from forcing another round of generic shift lowering - we know these are legal constant splat shifts.
llvm-svn: 340302
Erik Pilkington [Tue, 21 Aug 2018 16:47:04 +0000 (16:47 +0000)]
[Parser] Support alternative operator token keyword args in Objective-C++
rdar://
30741878
Differential revision: https://reviews.llvm.org/D50527
llvm-svn: 340301
Simon Pilgrim [Tue, 21 Aug 2018 16:46:48 +0000 (16:46 +0000)]
[X86][SSE] Lower directly to SSE shifts in the BLEND(SHIFT, SHIFT) combine. NFCI.
We don't gain anything from forcing another round of generic shift lowering - we know these are legal constant splat shifts.
llvm-svn: 340300
Raphael Isemann [Tue, 21 Aug 2018 16:36:49 +0000 (16:36 +0000)]
[ASTImporter] Add test for CXXForRangeStmt
Reviewers: a.sidorin, martong
Reviewed By: martong
Subscribers: rnkovacs, martong, cfe-commits
Differential Revision: https://reviews.llvm.org/D51001
llvm-svn: 340297
Matt Arsenault [Tue, 21 Aug 2018 16:24:56 +0000 (16:24 +0000)]
Try to fix bot build failure
llvm-svn: 340296
Farhana Aleen [Tue, 21 Aug 2018 16:21:15 +0000 (16:21 +0000)]
[AMDGPU] Support idot2 pattern.
Summary: Transform add (mul ((i32)S0.x, (i32)S1.x),
add( mul ((i32)S0.y, (i32)S1.y), (i32)S3) => i/udot2((v2i16)S0, (v2i16)S1, (i32)S3)
Author: FarhanaAleen
Reviewed By: arsenm
Subscribers: llvm-commits, AMDGPU
Differential Revision: https://reviews.llvm.org/D50024
llvm-svn: 340295
Adrian Prantl [Tue, 21 Aug 2018 16:13:37 +0000 (16:13 +0000)]
lldbtest.py: Unconditionally set the clang module cache path.
This should fix the errors observable on the new lldb-cmake bot.
llvm-svn: 340293
Matt Arsenault [Tue, 21 Aug 2018 16:13:29 +0000 (16:13 +0000)]
AMDGPU: Move target code into TargetParser
llvm-svn: 340292
Matt Arsenault [Tue, 21 Aug 2018 16:13:01 +0000 (16:13 +0000)]
AMDGPU: Partially move target handling code from clang to TargetParser
A future change in clang necessitates access of this information
from the driver, so move this into a common place.
Try to mimic something resembling the API the other targets are
using here.
One thing I'm uncertain about is how to split amdgcn and r600
handling. Here I've mostly duplicated the functions for each,
while keeping the same enums. I think this is a bit awkward
for the features which don't matter for amdgcn.
It's also a bit messy that this isn't a complete set of
subtarget features. This is just the minimum set needed
for the driver code. For example building the list of
subtarget feature names is still in clang.
llvm-svn: 340291
Simon Pilgrim [Tue, 21 Aug 2018 15:57:33 +0000 (15:57 +0000)]
[X86][SSE] Add helper function to convert to/between the SSE vector shift opcodes. NFCI.
Also remove some more getOpcode calls from LowerShift when we already have Opc.
llvm-svn: 340290
Louis Dionne [Tue, 21 Aug 2018 15:54:24 +0000 (15:54 +0000)]
[clang][NFC] Fix typo in the name of a note
Summary:
r306722 introduced a new note called note_silence_unligned_allocation_unavailable
where I believe what was meant is note_silence_aligned_allocation_unavailable.
Reviewers: ahatanak
Subscribers: dexonsmith, cfe-commits
Differential Revision: https://reviews.llvm.org/D51043
llvm-svn: 340288
Daniel Sanders [Tue, 21 Aug 2018 15:47:25 +0000 (15:47 +0000)]
[aarch64][mc] Don't lookup symbols when there is no symbol lookup callback
Summary: When run under llvm-mc-disassemble-fuzzer, there is no symbol lookup callback so tryAddingSymbolicOperand() must fail gracefully instead of crashing
Reviewers: aemerson, javed.absar
Reviewed By: aemerson
Subscribers: lhames, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D51005
llvm-svn: 340287
Adrian Prantl [Tue, 21 Aug 2018 15:46:15 +0000 (15:46 +0000)]
Makefile.rules: Use an absolute path to the module cache directory.
This change is NFC, but it makes it more obvious in log files what happened.
llvm-svn: 340286
Nicola Zaghen [Tue, 21 Aug 2018 15:27:32 +0000 (15:27 +0000)]
[InstCombine] Add new tests for icmp ugt/ult (add nuw X, C2), C
Differential Revision: https://reviews.llvm.org/D51040
llvm-svn: 340284
Simon Pilgrim [Tue, 21 Aug 2018 15:21:45 +0000 (15:21 +0000)]
[X86] Add SSE2 and XOP udiv combine tests
llvm-svn: 340282
Zaara Syeda [Tue, 21 Aug 2018 15:13:53 +0000 (15:13 +0000)]
[PPC64] Add TLS initial exec to local exec relaxation
This patch adds the target call back relaxTlsIeToLe to support TLS relaxation
from initial exec to local exec model.
Differential Revision: https://reviews.llvm.org/D48091
llvm-svn: 340281
Kristof Umann [Tue, 21 Aug 2018 15:09:22 +0000 (15:09 +0000)]
[analyzer] Correctly marked a virtual function 'override'
llvm-svn: 340280
Sanjay Patel [Tue, 21 Aug 2018 14:45:13 +0000 (14:45 +0000)]
[InstSimplify] use isKnownNeverNaN to fold more fcmp ord/uno
Remove duplicate tests from InstCombine that were added with
D50582. I left negative tests there to verify that nothing
in InstCombine tries to go overboard. If isKnownNeverNaN is
improved to handle the FP binops or other cases, we should
have coverage under InstSimplify, so we could remove more
duplicate tests from InstCombine at that time.
llvm-svn: 340279
Anna Thomas [Tue, 21 Aug 2018 14:40:27 +0000 (14:40 +0000)]
[LV] Vectorize loops where non-phi instructions used outside loop
Summary:
Follow up change to rL339703, where we now vectorize loops with non-phi
instructions used outside the loop. Note that the cyclic dependency
identification occurs when identifying reduction/induction vars.
We also need to identify that we do not allow users where the PSCEV information
within and outside the loop are different. This was the fix added in rL307837
for PR33706.
Reviewers: Ayal, mkuper, fhahn
Subscribers: javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D50778
llvm-svn: 340278
Balazs Keri [Tue, 21 Aug 2018 14:32:21 +0000 (14:32 +0000)]
[ASTImporter] Adding some friend function related unittests.
Reviewers: a.sidorin, a_sidorin
Reviewed By: a_sidorin
Subscribers: a_sidorin, martong, cfe-commits
Differential Revision: https://reviews.llvm.org/D49798
llvm-svn: 340277
Sanjay Patel [Tue, 21 Aug 2018 13:33:13 +0000 (13:33 +0000)]
[InstSimplify] add tests for FP uno/ord with nnan; NFC
This is a slight modification of the tests from D50582;
change half of the predicates to 'uno' so we have coverage
for that side too. All of the positive tests can fold to a
constant (true/false), so that should happen in instsimplify.
llvm-svn: 340276
Anna Thomas [Tue, 21 Aug 2018 13:02:09 +0000 (13:02 +0000)]
NFC: Add loop vectorizer tests showing various control flow within loop that skip iterations
llvm-svn: 340275
Andrea Di Biagio [Tue, 21 Aug 2018 13:00:44 +0000 (13:00 +0000)]
[llvm-mca] Replace use of llvm::any_of with std::any_of.
This should unbreak the buildbots.
llvm-svn: 340274
Andrea Di Biagio [Tue, 21 Aug 2018 12:40:15 +0000 (12:40 +0000)]
[llvm-mca] Add method cycleEvent() to class Scheduler. NFCI
The goal of this patch is to simplify the Scheduler's interface in preparation
for D50929.
Some methods in the Scheduler's interface should not be exposed to external
users, since their presence makes it hard to both understand, and extend the
Scheduler's interface.
This patch removes the following two methods from the public Scheduler's API:
- reclaimSimulatedResources()
- updatePendingQueue()
Their logic has been migrated to a new method named 'cycleEvent()'.
Methods 'updateIssuedSet()' and 'promoteToReadySet()' still exist. However,
they are now private members of class Scheduler.
This simplifies the interaction with the Scheduler from the ExecuteStage.
llvm-svn: 340273
Kristof Umann [Tue, 21 Aug 2018 12:16:59 +0000 (12:16 +0000)]
[analyzer][UninitializedObjectChecker] Explicit namespace resolution for inherited data members
For the following example:
struct Base {
int x;
};
// In a different translation unit
struct Derived : public Base {
Derived() {}
};
For a call to Derived::Derived(), we'll receive a note that
this->x is uninitialized. Since x is not a direct field of Derived,
it could be a little confusing. This patch aims to fix this, as well
as the case when the derived object has a field that has the name as
an inherited uninitialized data member:
struct Base {
int x; // note: uninitialized field 'this->Base::x'
};
struct Derived : public Base {
int x = 5;
Derived() {}
};
Differential Revision: https://reviews.llvm.org/D50905
llvm-svn: 340272
Hiroshi Inoue [Tue, 21 Aug 2018 11:41:41 +0000 (11:41 +0000)]
Add missing library dependency to fix build break after rC340247
llvm-svn: 340271
Tim Renouf [Tue, 21 Aug 2018 11:08:12 +0000 (11:08 +0000)]
[AMDGPU] Allow int types for MUBUF vdata
Summary:
Previously the new llvm.amdgcn.raw/struct.buffer.load/store intrinsics
only allowed float types for the data to be loaded or stored, which
sometimes meant the frontend needed to generate a bitcast. In this, the
new intrinsics copied the old buffer intrinsics.
This commit extends the new intrinsics to allow int types as well.
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D50315
Change-Id: I8202af2d036455553681dcbb3d7d32ae273f8f85
llvm-svn: 340270
Tim Renouf [Tue, 21 Aug 2018 11:07:10 +0000 (11:07 +0000)]
[AMDGPU] New buffer intrinsics
Summary:
This commit adds new intrinsics
llvm.amdgcn.raw.buffer.load
llvm.amdgcn.raw.buffer.load.format
llvm.amdgcn.raw.buffer.load.format.d16
llvm.amdgcn.struct.buffer.load
llvm.amdgcn.struct.buffer.load.format
llvm.amdgcn.struct.buffer.load.format.d16
llvm.amdgcn.raw.buffer.store
llvm.amdgcn.raw.buffer.store.format
llvm.amdgcn.raw.buffer.store.format.d16
llvm.amdgcn.struct.buffer.store
llvm.amdgcn.struct.buffer.store.format
llvm.amdgcn.struct.buffer.store.format.d16
llvm.amdgcn.raw.buffer.atomic.*
llvm.amdgcn.struct.buffer.atomic.*
with the following changes from the llvm.amdgcn.buffer.*
intrinsics:
* there are separate raw and struct versions: raw does not have an
index arg and sets idxen=0 in the instruction, and struct always sets
idxen=1 in the instruction even if the index is 0, to allow for the
fact that gfx9 does bounds checking differently depending on whether
idxen is set;
* there is a combined cachepolicy arg (glc+slc)
* there are now only two offset args: one for the offset that is
included in bounds checking and swizzling, to be split between the
instruction's voffset and immoffset fields, and one for the offset
that is excluded from bounds checking and swizzling, to go into the
instruction's soffset field.
The AMDISD::BUFFER_* SD nodes always have an index operand, all three
offset operands, combined cachepolicy operand, and an extra idxen
operand.
The obsolescent llvm.amdgcn.buffer.* intrinsics continue to work.
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D50306
Change-Id: If897ea7dc34fcbf4d5496e98cc99a934f62fc205
llvm-svn: 340269
Tim Renouf [Tue, 21 Aug 2018 11:06:05 +0000 (11:06 +0000)]
[AMDGPU] New tbuffer intrinsics
Summary:
This commit adds new intrinsics
llvm.amdgcn.raw.tbuffer.load
llvm.amdgcn.struct.tbuffer.load
llvm.amdgcn.raw.tbuffer.store
llvm.amdgcn.struct.tbuffer.store
with the following changes from the llvm.amdgcn.tbuffer.* intrinsics:
* there are separate raw and struct versions: raw does not have an index
arg and sets idxen=0 in the instruction, and struct always sets
idxen=1 in the instruction even if the index is 0, to allow for the
fact that gfx9 does bounds checking differently depending on whether
idxen is set;
* there is a combined format arg (dfmt+nfmt)
* there is a combined cachepolicy arg (glc+slc)
* there are now only two offset args: one for the offset that is
included in bounds checking and swizzling, to be split between the
instruction's voffset and immoffset fields, and one for the offset
that is excluded from bounds checking and swizzling, to go into the
instruction's soffset field.
The AMDISD::TBUFFER_* SD nodes always have an index operand, all three
offset operands, combined format operand, combined cachepolicy operand,
and an extra idxen operand.
The tbuffer pseudo- and real instructions now also have a combined
format operand.
The obsolescent llvm.amdgcn.tbuffer.* and llvm.SI.tbuffer.store
intrinsics continue to work.
V2: Separate raw and struct intrinsics.
V3: Moved extract_glc and extract_slc defs to a more sensible place.
V4: Rebased on D49995.
V5: Only two separate offset args instead of three.
V6: Pseudo- and real instructions have joint format operand.
V7: Restored optionality of dfmt and nfmt in assembler.
V8: Addressed minor review comments.
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D49026
Change-Id: If22ad77e349fac3a5d2f72dda53c010377d470d4
llvm-svn: 340268
Bjorn Pettersson [Tue, 21 Aug 2018 10:59:50 +0000 (10:59 +0000)]
Change how finalizeBundle selects debug location for the BUNDLE instruction
Summary:
Previously a BUNDLE instruction inherited the DebugLoc from the
first instruction in the bundle, even if that DebugLoc had no
DILocation. With this commit this is changed into selecting the
first DebugLoc that has a DILocation, by searching among the
bundled instructions.
The idea is to reduce amount of bundles that are lacking
debug locations.
Reviewers: #debug-info, JDevlieghere
Reviewed By: JDevlieghere
Subscribers: JDevlieghere, mattd, llvm-commits
Differential Revision: https://reviews.llvm.org/D50639
llvm-svn: 340267
Kristof Umann [Tue, 21 Aug 2018 10:47:19 +0000 (10:47 +0000)]
[analyzer][UninitializedObjectChecker] Added documentation to the checker list
Differential Revision: https://reviews.llvm.org/D50904
llvm-svn: 340266
Kristof Umann [Tue, 21 Aug 2018 10:45:21 +0000 (10:45 +0000)]
[analyzer][UninitializedObjectChecker] Refactoring p6.: Move dereferencing to a function
Now that it has it's own file, it makes little sense for
isPointerOrReferenceUninit to be this large, so I moved
dereferencing to a separate function.
Differential Revision: https://reviews.llvm.org/D50509
llvm-svn: 340265
Simon Pilgrim [Tue, 21 Aug 2018 10:44:06 +0000 (10:44 +0000)]
[X86] Add SSE2 sdiv combine tests
llvm-svn: 340264
Kirill Bobyrev [Tue, 21 Aug 2018 10:40:19 +0000 (10:40 +0000)]
[clangd] NFC: Fix broken build
llvm-svn: 340263
Kirill Bobyrev [Tue, 21 Aug 2018 10:32:27 +0000 (10:32 +0000)]
[clangd] Allow using experimental Dex index
This patch adds hidden Clangd flag ("use-dex-index") which replaces
(currently) default `MemIndex` with `DexIndex` for the static index.
Reviewed by: ioeric
Differential Revision: https://reviews.llvm.org/D50897
llvm-svn: 340262
Sam Parker [Tue, 21 Aug 2018 10:26:59 +0000 (10:26 +0000)]
[DAGCombiner] Reduce load widths of shifted masks
During combining, ReduceLoadWdith is used to combine AND nodes that
mask loads into narrow loads. This patch allows the mask to be a
shifted constant. This results in a narrow load which is then left
shifted to compensate for the new offset.
Differential Revision: https://reviews.llvm.org/D50432
llvm-svn: 340261
Simon Pilgrim [Tue, 21 Aug 2018 10:20:36 +0000 (10:20 +0000)]
[TargetLowering] Add BuildSDiv support for division by one or negone.
This reduces most of the sdiv stages (the MULHS, shifts etc.) to just zero/identity values and use the numerator scale factor to multiply by +1/-1.
llvm-svn: 340260
George Rimar [Tue, 21 Aug 2018 08:27:23 +0000 (08:27 +0000)]
[LLD][ELF] - Fix BB after r340257.
Renamed Filecheck->FileCheck.
llvm-svn: 340259
Petar Jovanovic [Tue, 21 Aug 2018 08:15:56 +0000 (08:15 +0000)]
[MIPS GlobalISel] Select bitwise instructions
Select bitwise instructions for i32.
Patch by Petar Avramovic.
Differential Revision: https://reviews.llvm.org/D50183
llvm-svn: 340258
George Rimar [Tue, 21 Aug 2018 08:13:06 +0000 (08:13 +0000)]
[LLD][ELF] - Check the architecture of lazy objects earlier.
Our code in LazyObjFile::parse() has an ELFT switch and
adds a lazy object by its ELFT kind.
Though it might be possible to add a file using a different
architecture and make LLD to silently accept it (if the file
is empty or contains only week symbols). That itself, not a
huge issue perhaps (because the error would be reported later
if the file is fetched), but still does not look clean and correct.
It is possible to report an error earlier and clean up the
code. That is what the patch does.
Ideally, we might want to reuse isCompatible from SymbolTable.cpp,
but it is static and accepts a file as an argument, what is not
convenient. Since such a situation should be rare, I think it
should be OK to go with the way chosen in this patch.
Differential revision: https://reviews.llvm.org/D50899
llvm-svn: 340257
Max Kazantsev [Tue, 21 Aug 2018 08:11:31 +0000 (08:11 +0000)]
[LICM] Hoist guards with invariant conditions
This patch teaches LICM to hoist guards from the loop if they are guaranteed to execute and
if there are no side effects that could prevent that.
Differential Revision: https://reviews.llvm.org/D50501
Reviewed By: reames
llvm-svn: 340256
Bjorn Pettersson [Tue, 21 Aug 2018 07:49:05 +0000 (07:49 +0000)]
[RegisterCoalescer] Do not assert when trying to remat dead values
Summary:
RegisterCoalescer::reMaterializeTrivialDef used to assert that
the input register was live in. But as shown by the new
coalesce-dead-lanes.mir test case that seems to be a valid
scenario. We now return false instead of the assert, simply
avoiding to remat the dead def.
Normally a COPY of an undef value is eliminated by
eliminateUndefCopy(). Although we only do that when the
destination isn't a physical register. So the situation
above should be limited to the case when we copy an undef
value to a physical register.
Reviewers: kparzysz, wmi, tpr
Reviewed By: kparzysz
Subscribers: MatzeB, qcolombet, tpr, llvm-commits
Differential Revision: https://reviews.llvm.org/D50842
llvm-svn: 340255
Max Kazantsev [Tue, 21 Aug 2018 07:37:02 +0000 (07:37 +0000)]
[NFC] Add some LICM tests
llvm-svn: 340254
Fangrui Song [Tue, 21 Aug 2018 07:35:23 +0000 (07:35 +0000)]
[docs] Add --print-icf-sections to ld.lld.1
llvm-svn: 340253
Kirill Bobyrev [Tue, 21 Aug 2018 07:23:45 +0000 (07:23 +0000)]
[llvm] NFC: Fix assert condition and suppress warning
As mentioned by andreadb, assert condition is wrong and causes
GCC warning.
Related Revision: https://reviews.llvm.org/D50839
llvm-svn: 340252
Mikael Holmen [Tue, 21 Aug 2018 07:22:45 +0000 (07:22 +0000)]
Removed unused variable [NFC]
The compiler warned:
../tools/clang/lib/Sema/SemaType.cpp:6788:31: error: unused variable 'AT' [-Werror,-Wunused-variable]
if (const AttributedType *AT = S.getCallingConvAttributedType(type)) {
^
1 error generated.
llvm-svn: 340251
Max Kazantsev [Tue, 21 Aug 2018 07:15:06 +0000 (07:15 +0000)]
[NFC] Factor out predecessors collection into a separate method
It may be reused in a different piece of logic.
Differential Revision: https://reviews.llvm.org/D50890
Reviewed By: reames
llvm-svn: 340250
Serguei Katkov [Tue, 21 Aug 2018 04:27:07 +0000 (04:27 +0000)]
[IR Verifier] Do not allow bitcast of pointer to vector of pointers and vice versa.
LangRef for BitCast requires that
"The bit sizes of value and the destination type, ty2, must be identical".
Currently verifier allows BitCast of pointer to vector of pointers so that
the sizes are different.
This change fixes that.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: llvm-commits, wdng
Differential Revision: https://reviews.llvm.org/D50886
llvm-svn: 340249
George Karpenkov [Tue, 21 Aug 2018 03:09:02 +0000 (03:09 +0000)]
[analyzer] [NFC] Split up RetainSummaryManager from RetainCountChecker - try #2
Turns out it can't be removed from the analyzer since it relies on CallEvent.
Moving to staticAnalyzer/core
Differential Revision: https://reviews.llvm.org/D51023
llvm-svn: 340247
Alex Langford [Tue, 21 Aug 2018 01:43:03 +0000 (01:43 +0000)]
[docs] Fix a small typo in a debug info example
llvm-svn: 340246
Philip Reames [Tue, 21 Aug 2018 00:55:35 +0000 (00:55 +0000)]
[AST] Mark invariant.starts as being readonly
These intrinsics are modelled as writing for control flow purposes, but they don't actually write to any location. Marking these - as we did for guards - allows LICM to hoist loads out of loops containing invariant.starts.
Differential Revision: https://reviews.llvm.org/D50861
llvm-svn: 340245
Philip Reames [Tue, 21 Aug 2018 00:42:07 +0000 (00:42 +0000)]
[LICM] Add tests from D50786 [NFC]
Exercise more use of volatiles to illustrate that nothing changes as we tweak how we detect them.
llvm-svn: 340244
Philip Reames [Tue, 21 Aug 2018 00:37:09 +0000 (00:37 +0000)]
[LICM][NFC] Add tests from D50730
Landing tests so corresponding change can show effects clearly. see
D50730 [AST] Generalize argument specific aliasing
llvm-svn: 340243
Philip Reames [Tue, 21 Aug 2018 00:14:14 +0000 (00:14 +0000)]
[LICM] More tests for D50925 [NFC]
This time, the corresponding cases where we can hoist (store-like) calls out of loops.
llvm-svn: 340242
Fangrui Song [Tue, 21 Aug 2018 00:13:52 +0000 (00:13 +0000)]
[llvm-objcopy] Simplify find(X,Y) != X.end() with is_contained()
llvm-svn: 340241
Reid Kleckner [Tue, 21 Aug 2018 00:03:21 +0000 (00:03 +0000)]
Fix global_metadata_external_comdat.ll test
llvm-svn: 340240
Zachary Turner [Mon, 20 Aug 2018 23:59:21 +0000 (23:59 +0000)]
[MS Demangler] Demangle special operator 'dynamic initializer'.
This is encoded as __E and should print something like
"dynamic initializer for 'Foo'(void)"
This also adds support for dynamic atexit destructor, which is
basically identical but encoded as __F with slightly different
description.
llvm-svn: 340239
Zachary Turner [Mon, 20 Aug 2018 23:58:58 +0000 (23:58 +0000)]
[MS Demangler] Anonymous namespace hashes can be backreferenced.
Previously we were not remembering the key values of anonymous
namespaces, but we need to do this.
llvm-svn: 340238
Zachary Turner [Mon, 20 Aug 2018 23:58:35 +0000 (23:58 +0000)]
[MS Demangler] Properly demangle anonymous namespaces.
llvm-svn: 340237
Heejin Ahn [Mon, 20 Aug 2018 23:49:34 +0000 (23:49 +0000)]
[WebAssembly] Revert type of wake count in atomic.wake to i32
Summary:
We decided to revert this from i64 to i32 in Nov 28 CG meeting. Fixes
PR38632.
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, sunfish, jfb, cfe-commits
Differential Revision: https://reviews.llvm.org/D51013
llvm-svn: 340235
Heejin Ahn [Mon, 20 Aug 2018 23:49:29 +0000 (23:49 +0000)]
[WebAssembly] Revert type of wake count in atomic.wake to i32
Summary:
We decided to revert this from i64 to i32 in Nov 28 CG meeting. Fixes
PR38632.
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, sunfish, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D51010
llvm-svn: 340234
Philip Reames [Mon, 20 Aug 2018 23:37:59 +0000 (23:37 +0000)]
[LICM][Tests] Add tests for store hoisting [NFC]
https://reviews.llvm.org/D50925 will be rebased on top of this.
llvm-svn: 340233
Reid Kleckner [Mon, 20 Aug 2018 23:35:45 +0000 (23:35 +0000)]
Re-land r334313 "[asan] Instrument comdat globals on COFF targets"
If we can use comdats, then we can make it so that the global metadata
is thrown away if the prevailing definition of the global was
uninstrumented. I have only tested this on COFF targets, but in theory,
there is no reason that we cannot also do this for ELF.
This will allow us to re-enable string merging with ASan on Windows,
reducing the binary size cost of ASan on Windows.
I tested this change with ASan+PGO, and I fixed an issue with the
__llvm_profile_raw_version symbol. With the old version of my patch, we
would attempt to instrument that symbol on ELF because it had a comdat
with external linkage. If we had been using the linker GC-friendly
metadata scheme, everything would have worked, but clang does not enable
it by default.
llvm-svn: 340232
Craig Topper [Mon, 20 Aug 2018 23:04:25 +0000 (23:04 +0000)]
[InstCombine] Add splat vector constant support to foldICmpAddOpConst.
Differential Revision: https://reviews.llvm.org/D50946
llvm-svn: 340231
Heejin Ahn [Mon, 20 Aug 2018 23:02:15 +0000 (23:02 +0000)]
[WebAssembly] Remove an unused argument from writeSPToMemory (NFC)
Reviewers: dschuff
Subscribers: dschuff, sbc100, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D50933
llvm-svn: 340230
Fangrui Song [Mon, 20 Aug 2018 23:01:57 +0000 (23:01 +0000)]
[llvm-strip] Allow only one input
Summary: Before, llvm-strip accepted a second argument but it would just be ignored.
Reviewers: alexshap, jhenderson, paulsemel
Reviewed By: alexshap
Subscribers: jakehehrlich, rupprecht, llvm-commits
Differential Revision: https://reviews.llvm.org/D51004
llvm-svn: 340229
Saleem Abdulrasool [Mon, 20 Aug 2018 22:50:18 +0000 (22:50 +0000)]
libclang: add install/distribution targets for python
Add installation support for the python bindings for libclang. Add an
additional CMake configuration variable to enumerate the python versions for
which the bindings should be installed. This allows for a LLVM/clang
distribution to distribute the python bindings for libclang as part of the
image. Because the python versions need to be explicitly stated by the user,
the default image remains unchanged.
llvm-svn: 340228
Matt Davis [Mon, 20 Aug 2018 22:41:27 +0000 (22:41 +0000)]
[llvm-mca] Remove unused formal parameter. NFC.
llvm-svn: 340227
Kamil Rytarowski [Mon, 20 Aug 2018 22:29:20 +0000 (22:29 +0000)]
Teach libc++ to use native NetBSD's max_align_t
Summary:
The NetBSD headers ship with max_align_t, that is not
compatible with the fallback version in libc++.
There is no defined a compiler specific symbol in the headers like:
- __CLANG_MAX_ALIGN_T_DEFINED
- _GCC_MAX_ALIGN_T
- __DEFINED_max_align_t
Sponsored by <The NetBSD Foundation>
Reviewers: chandlerc, dlj, EricWF, joerg
Reviewed By: joerg
Subscribers: bsdjhb, llvm-commits, cfe-commits
Differential Revision: https://reviews.llvm.org/D47814
llvm-svn: 340224
Michael Berg [Mon, 20 Aug 2018 22:26:58 +0000 (22:26 +0000)]
extend binop folds for selects to include true and false binops flag intersection
Summary: This change address bug 38641
Reviewers: spatel, wristow
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D50996
llvm-svn: 340222
Zachary Turner [Mon, 20 Aug 2018 22:18:21 +0000 (22:18 +0000)]
[llvm-objdump] Add ability to demangle COFF symbols.
llvm-svn: 340221
Raphael Isemann [Mon, 20 Aug 2018 22:13:24 +0000 (22:13 +0000)]
[ASTImporter] Add test for C++'s try/catch statements.
Summary: Also enable exceptions in clang-import-test so that we can parse the test files.
Reviewers: a.sidorin, a_sidorin
Reviewed By: a_sidorin
Subscribers: a_sidorin, martong, cfe-commits
Differential Revision: https://reviews.llvm.org/D50978
llvm-svn: 340220
Adrian Prantl [Mon, 20 Aug 2018 22:00:32 +0000 (22:00 +0000)]
Reflow comments
llvm-svn: 340219
Adrian Prantl [Mon, 20 Aug 2018 22:00:31 +0000 (22:00 +0000)]
Set path to sanitizer runtime when running tests through LIT on macOS.
rdar://problem/
42984739
Differential Revision: https://reviews.llvm.org/D50997
llvm-svn: 340218
Craig Topper [Mon, 20 Aug 2018 21:51:35 +0000 (21:51 +0000)]
[X86] Add test command line to expose PR38649.
Bypass slow division and constant hoisting are conspiring to break div+rem of large constants.
llvm-svn: 340217
Evgeniy Stepanov [Mon, 20 Aug 2018 21:49:15 +0000 (21:49 +0000)]
[hwasan] Add a (almost) no-interceptor mode.
Summary:
The idea behind this change is to allow sanitization of libc. We are prototyping on Bionic,
but the tool interface will be general enough (or at least generalizable) to support any other libc.
When libc depends on libclang_rt.hwasan, the latter can not interpose libc functions.
In fact, majority of interceptors become unnecessary when libc code is instrumented.
This change gets rid of most hwasan interceptors and provides interface for libc to notify
hwasan about thread creation and destruction events. Some interceptors (pthread_create)
are kept under #ifdef to enable testing with uninstrumented libc. They are expressed in
terms of the new libc interface.
The new cmake switch, COMPILER_RT_HWASAN_WITH_INTERCEPTORS, ON by default, builds testing
version of the library with the aforementioned pthread_create interceptor.
With the OFF setting, the library becomes more of a libc plugin.
Reviewers: vitalybuka, kcc, jfb
Subscribers: srhines, kubamracek, mgorny, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D50922
llvm-svn: 340216
Richard Smith [Mon, 20 Aug 2018 21:47:29 +0000 (21:47 +0000)]
Model type attributes as regular Attrs.
Specifically, AttributedType now tracks a regular attr::Kind rather than
having its own parallel Kind enumeration, and AttributedTypeLoc now
holds an Attr* instead of holding an ad-hoc collection of Attr fields.
Differential Revision: https://reviews.llvm.org/D50526
This reinstates r339623, reverted in r339638, with a fix to not fail
template instantiation if we instantiate a QualType with no associated
type source information and we encounter an AttributedType.
llvm-svn: 340215
Craig Topper [Mon, 20 Aug 2018 21:08:35 +0000 (21:08 +0000)]
[X86] Prevent lowerVectorShuffleByMerging128BitLanes from creating cycles
Due to some splat handling code in getVectorShuffle, its possible for NewV1/NewV2 to have their mask modified from what is requested. This can lead to cycles being created in the DAG.
This patch examines the returned mask and makes sure its different. Long term we may need to look closer at that splat code in getVectorShuffle, or add more splat awareness to getVectorShuffle.
Fixes PR38639
Differential Revision: https://reviews.llvm.org/D50981
llvm-svn: 340214
Craig Topper [Mon, 20 Aug 2018 20:57:35 +0000 (20:57 +0000)]
[X86] Teach combineTruncatedArithmetic to handle some cases of ISD::SUB
We can safely avoid interfering with the subus combine if both inputs are freely truncatable. Either both extends, or an extend and a constant vector.
Differential Revision: https://reviews.llvm.org/D50878
llvm-svn: 340212
Craig Topper [Mon, 20 Aug 2018 20:57:32 +0000 (20:57 +0000)]
[X86] Pre-commit test cases for D50878.
llvm-svn: 340211
Craig Topper [Mon, 20 Aug 2018 20:57:30 +0000 (20:57 +0000)]
[LegacyPassManager] Remove analysis P from AnUsageMap before deleting it in schedulePass.
If we deem the analysis pass useless and delete it, we need to make sure we remove it from AnUsageMap. Otherwise we might allocate another pass in the freed memory. This will cause us to reuse the AnalysisUsage from the original pass instead of the new one.
Fixes PR38511
Differential Revision: https://reviews.llvm.org/D50573
llvm-svn: 340210
Krzysztof Parzyszek [Mon, 20 Aug 2018 20:37:57 +0000 (20:37 +0000)]
Consistently use MemoryLocation::UnknownSize to indicate unknown access size
1. Change the software pipeliner to use unknown size instead of dropping
memory operands. It used to do it before, but MachineInstr::mayAlias
did not handle it correctly.
2. Recognize UnknownSize in MachineInstr::mayAlias.
3. Print and parse UnknownSize in MIR.
Differential Revision: https://reviews.llvm.org/D50339
llvm-svn: 340208
Richard Smith [Mon, 20 Aug 2018 20:14:49 +0000 (20:14 +0000)]
Port LLVM r340203 (and r340205) to libcxxabi.
Move Itanium demangler implementation into a header file and add visitation support.
Summary:
This transforms the Itanium demangler into a generic reusable library that can
be used to build, traverse, and transform Itanium mangled name trees.
This is in preparation for adding a canonicalizing demangler, which
cannot live in the Demangle library for layering reasons. In order to
keep the diffs simpler, this patch moves more code to the new header
than is strictly necessary: in particular, all of the printLeft /
printRight implementations can be moved to the implementation file.
(And indeed we could make them non-virtual now if we wished, and remove
the vptr from Node.)
All nodes are now included in the Kind enumeration, rather than omitting
some of the Expr nodes, and the three different floating-point literal
node types now have distinct Kind values.
As a proof of concept for the visitation / matching mechanism, this
patch implements a Node dumping facility on top of it, replacing the
prior mechanism that produced the pretty-printed output rather than a
tree dump. Sample dump output:
FunctionEncoding(
NameType("int"),
NameWithTemplateArgs(
NestedName(
NameWithTemplateArgs(
NameType("A"),
TemplateArgs(
{NameType("B")})),
NameType("f")),
TemplateArgs(
{NameType("int")})),
{},
<null>,
QualConst, FunctionRefQual::FrefQualLValue)
As a next step, it would make sense to move the LLVM high-level interface to
the demangler (the itaniumDemangler function and ItaniumPartialDemangler class)
into the Support library, and implement them in terms of the Demangle library.
This would allow the libc++abi demangler implementation to be an identical copy
of the llvm Demangle library, and would allow the LLVM implementation to reuse
LLVM components such as llvm::BumpPtrAllocator, but we'll need to decide how to
coordinate that with the MS ABI demangler, so I'm not doing that in this patch.
No functionality change intended other than the behavior of dump().
Reviewers: erik.pilkington, zturner, chandlerc, dlj
Subscribers: aheejin, llvm-commits
Differential Revision: https://reviews.llvm.org/D50930
llvm-svn: 340207
David Blaikie [Mon, 20 Aug 2018 20:14:08 +0000 (20:14 +0000)]
DebugInfo: Add the ability to disable DWARF name tables entirely
This changes the current default behavior (from emitting pubnames by
default, to not emitting them by default) & moves to matching GCC's
behavior* with one significant difference: -gno(-gnu)-pubnames disables
pubnames even in the presence of -gsplit-dwarf (though -gsplit-dwarf
still by default enables -ggnu-pubnames). This allows users to disable
pubnames (& the new DWARF5 accelerated access tables) when they might
not be worth the size overhead.
* GCC's behavior is that -ggnu-pubnames and -gpubnames override each
other, and that -gno-gnu-pubnames and -gno-pubnames act as synonyms and
disable either kind of pubnames if they come last. (eg: -gpubnames
-gno-gnu-pubnames causes no pubnames (neither gnu or standard) to be
emitted)
llvm-svn: 340206
David Blaikie [Mon, 20 Aug 2018 20:02:29 +0000 (20:02 +0000)]
Add missing include (<functional> for std::ref)
llvm-svn: 340205