Timur Kristóf [Sat, 12 Sep 2020 12:48:52 +0000 (14:48 +0200)]
aco: Use NIR IO semantics for tess factor IO locations.
Previously we relied on looping over the NIR output variables
to remember the driver location of the tess factors, now use
the new NIR IO semantics instead.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6689>
Lionel Landwerlin [Wed, 15 Jul 2020 09:30:49 +0000 (12:30 +0300)]
anv: implement VK_KHR_copy_commands2
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6801>
Lionel Landwerlin [Wed, 15 Jul 2020 08:03:10 +0000 (11:03 +0300)]
vulkan: bump headers/registry to 1.2.154
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6801>
Danylo Piliaiev [Fri, 21 Aug 2020 14:21:14 +0000 (17:21 +0300)]
nir/lower_samplers: Clamp out-of-bounds access to array of samplers
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
"In the subsections described above for array, vector, matrix and
structure accesses, any out-of-bounds access produced undefined
behavior.... Out-of-bounds reads return undefined values, which
include values from other variables of the active program or zero."
Robustness extensions suggest to return zero on out-of-bounds
accesses, however it's not applicable to the arrays of samplers,
so just clamp the index.
Otherwise instr->sampler_index or instr->texture_index would be out
of bounds, and they are used as an index to arrays of driver state.
E.g. this fixes such dereference:
if (options->lower_tex_packing[tex->sampler_index] !=
in nir_lower_tex.c
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
Danylo Piliaiev [Fri, 21 Aug 2020 13:35:28 +0000 (16:35 +0300)]
nir/large_constants: Eliminate out-of-bounds writes to large constants
Out-of-bounds writes could be eliminated per spec:
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
"In the subsections described above for array, vector, matrix and
structure accesses, any out-of-bounds access produced undefined
behavior.... Out-of-bounds writes may be discarded or overwrite
other variables of the active program."
Fixes:
1235850522cd5e7b07701f7065996430ca1514b6
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
Danylo Piliaiev [Fri, 21 Aug 2020 10:42:55 +0000 (13:42 +0300)]
nir/lower_io: Eliminate oob writes and return zero for oob reads
Out-of-bounds writes could be eliminated per spec:
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
"In the subsections described above for array, vector, matrix and
structure accesses, any out-of-bounds access produced undefined
behavior....
Out-of-bounds writes may be discarded or overwrite
other variables of the active program.
Out-of-bounds reads return undefined values, which
include values from other variables of the active program or zero."
GL_KHR_robustness and GL_ARB_robustness encourage us to return zero
for reads.
Otherwise get_io_offset would return out-of-bound offset which may
result in out-of-bound loading/storing of inputs/outputs,
that could cause issues in drivers down the line.
E.g. this fixes such dereference:
int vue_slot = vue_map->varying_to_slot[intrin->const_index[0]];
in brw_nir.c
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
Marek Olšák [Thu, 6 Aug 2020 16:47:01 +0000 (12:47 -0400)]
radeon: rename RADEON_TRANSFER_* -> RADEON_MAP_*
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>
Marek Olšák [Wed, 1 Jul 2020 12:41:11 +0000 (08:41 -0400)]
gallium: rename transfer flags -> map flags in comments
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>
Marek Olšák [Wed, 1 Jul 2020 12:21:38 +0000 (08:21 -0400)]
gallium: rename pipe_transfer_usage -> pipe_map_flags
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>
Marek Olšák [Wed, 1 Jul 2020 12:16:12 +0000 (08:16 -0400)]
gallium: rename PIPE_TRANSFER_* -> PIPE_MAP_*
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5749>
Marek Olšák [Fri, 24 Jul 2020 20:15:51 +0000 (16:15 -0400)]
radeonsi: add 16-bit ALU vectorization
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
Marek Olšák [Fri, 24 Jul 2020 20:14:02 +0000 (16:14 -0400)]
radeonsi: don't scalarize 16-bit vec2 ALU opcodes
prerequisite for enabling vectorization, so that we don't scalarize
and vectorize at the same time, causing an infinite loop.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
Marek Olšák [Fri, 24 Jul 2020 20:16:46 +0000 (16:16 -0400)]
radeonsi: vectorize IO for better ALU vectorization
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
Marek Olšák [Mon, 11 May 2020 06:42:18 +0000 (02:42 -0400)]
radeonsi: implement 16-bit FS color outputs
This removes type conversions from 16 bits to 32 bits in the main function
and then back to 16 bits in the epilog.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
Marek Olšák [Fri, 4 Sep 2020 17:48:30 +0000 (13:48 -0400)]
radeonsi: set flags for FP16 in shaders
v2: remove the enablement code
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
Marek Olšák [Fri, 4 Sep 2020 10:49:09 +0000 (06:49 -0400)]
radeonsi: don't lower pack for better 16-bit vectorization
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
Daniel Schürmann [Mon, 31 Aug 2020 16:34:02 +0000 (17:34 +0100)]
ac/nir: implement nir_op_[un]pack_[64/32]_*
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6622>
Vinson Lee [Fri, 18 Sep 2020 00:32:15 +0000 (17:32 -0700)]
glsl: Initialize ir_constant member const_elements in all constructors.
Fix defects reported by Coverity Scan.
Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member const_elements is not
initialized in this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6770>
Vinson Lee [Fri, 18 Sep 2020 22:21:14 +0000 (15:21 -0700)]
pan/bi: Fix typo.
Fix defect reported by Coverity Scan.
Same on both sides (CONSTANT_EXPRESSION_RESULT)
pointless_expression: The expression src0_u8 || src0_u8 does not
accomplish anything because it evaluates to either of its
identical operands, src0_u8.
Fixes:
2ff53879f214 ("pan/bi: Use new packing")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6780>
Bas Nieuwenhuizen [Sat, 19 Sep 2020 15:28:17 +0000 (17:28 +0200)]
st/mesa: Deal with empty textures/buffers in semaphore wait/signal.
The actual texture might not have been created yet.
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3257
CC: mesa-stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6788>
Eric Anholt [Thu, 17 Sep 2020 16:13:10 +0000 (09:13 -0700)]
turnip/kgsl: Associate fences with submits.
This fixes all the I was seeing in the multiview tests.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4479>
Kristian H. Kristensen [Tue, 7 Apr 2020 19:36:20 +0000 (12:36 -0700)]
turnip: Add kgsl backend
Lacking a bit around fences and wsi integration, but there's enough
here to actually drive the GPU.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4479>
Lionel Landwerlin [Tue, 15 Sep 2020 12:33:14 +0000 (15:33 +0300)]
intel/compiler: fixup Gen12 workaround for array sizes
We didn't handle the case of NULL images/textures for which we should
return 0.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
397ff2976ba281 ("intel: Implement Gen12 workaround for array textures of size 1")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3522
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6729>
Adam Jackson [Mon, 21 Sep 2020 19:48:22 +0000 (15:48 -0400)]
wsi/x11: Create a present queue for VK_PRESENT_MODE_FIFO_RELAXED_KHR
This activates the target_msc computation that we'd otherwise be using
if we were just FIFO; otherwise we'd always set target_msc = 0 and it'd
act like IMMEDIATE.
Fixes:
77d25627933 "wsi/x11: Hook up VK_PRESENT_MODE_FIFO_RELAXED_KHR"
Fixes: mesa/mesa#3512
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6804>
Thong Thai [Tue, 15 Sep 2020 22:55:45 +0000 (18:55 -0400)]
gallium/auxiliary/vl: Include src region in scale_y calculation
Signed-off-by: Thong Thai <thong.thai@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3521
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6736>
Thong Thai [Tue, 2 Jun 2020 13:27:07 +0000 (09:27 -0400)]
frontends/va: Enabled packed headers for H.264 encoder
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>
Thong Thai [Thu, 12 Mar 2020 14:05:48 +0000 (10:05 -0400)]
radeon: Pass HEVC encode crop parameters to the encoder
Signed-off-by: Thong Thai <thong.thai@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2351
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>
Thong Thai [Thu, 12 Mar 2020 14:06:52 +0000 (10:06 -0400)]
gallium: Parse packed HEVC SPS encode header for crop parameters
The crop / conformance window parameters are set by ffmpeg but they only
seem to be made available in packed headers. This commit copies the H265
header parsing code from st/omx (planning in the future to move this
code to a common place to be shared by the different state trackers) in
order to grab the crop parameters
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4184>
Gert Wollny [Sat, 19 Sep 2020 13:38:35 +0000 (15:38 +0200)]
r600/sfn: Fix typo in comment
Thanks Stanislav Jakúbek for ponting it out.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>
Gert Wollny [Sat, 19 Sep 2020 13:36:35 +0000 (15:36 +0200)]
r600/sfn: Fix component count for fdph
The second parameter has four components, and this is the one that would
be copied when splitting constants.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>
Gert Wollny [Sat, 19 Sep 2020 13:24:15 +0000 (15:24 +0200)]
r600/sfn: make number of source components a local variable
There is no need to keep that value as a member and it irritates
Coverity.
Fixes:
688680decce9
r600/nir: fetch sources and split uniforms before emittting alu instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6787>
Krunal Patel [Sun, 20 Sep 2020 21:19:20 +0000 (02:49 +0530)]
gallium/auxiliary/vl: Odd Dimensions are failing
Issue: While running the tast for odd resolutions there are green lines
observed in the dumped image. The resolution is 321x241, the extra 1 pixel
data is missing in the image. The reason for this is in the post
processing when we adjust the size of height and width we are
dividing it by 2.
Fix: To resolve this issue we first need to align it to 2 and then divide
by 2 to get the required values. Once we do this we will have proper data
in the dumped image and missing pixel data will be available.
Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6795>
Samuel Pitoiset [Tue, 2 Jun 2020 11:20:34 +0000 (13:20 +0200)]
radv: do not lower UBO/SSBO access to offsets
Use nir_lower_explicit_io instead of lowering to offsets. Extra
(useless) additions are removed by lowering load_vulkan_descriptor
to vec2(src.x, 0).
fossils-db (Navi):
Totals from 18236 (13.21% of 138013) affected shaders:
SGPRs: 1172766 -> 1168278 (-0.38%); split: -0.89%, +0.50%
VGPRs: 940156 -> 952232 (+1.28%); split: -0.08%, +1.37%
SpillSGPRs: 30286 -> 31109 (+2.72%); split: -0.78%, +3.50%
SpillVGPRs: 1893 -> 1909 (+0.85%)
CodeSize:
87910396 ->
88113592 (+0.23%); split: -0.35%, +0.58%
Scratch: 819200 -> 823296 (+0.50%)
MaxWaves: 205535 -> 202102 (-1.67%); split: +0.05%, -1.72%
Instrs:
17052527 ->
17113484 (+0.36%); split: -0.32%, +0.67%
Cycles:
670794876 ->
669084540 (-0.25%); split: -0.38%, +0.13%
VMEM: 5274728 -> 5388556 (+2.16%); split: +3.10%, -0.94%
SMEM: 1196146 -> 1165850 (-2.53%); split: +2.06%, -4.60%
VClause: 381463 -> 399217 (+4.65%); split: -1.08%, +5.73%
SClause: 666216 -> 631135 (-5.27%); split: -5.44%, +0.18%
Copies: 1292720 -> 1289318 (-0.26%); split: -1.28%, +1.01%
Branches: 467336 -> 473028 (+1.22%); split: -0.67%, +1.89%
PreSGPRs: 766459 -> 772175 (+0.75%); split: -0.53%, +1.28%
PreVGPRs: 819746 -> 825327 (+0.68%); split: -0.05%, +0.73%
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6202>
Samuel Pitoiset [Tue, 2 Jun 2020 15:29:14 +0000 (17:29 +0200)]
radv: add a helper for loading meta descriptors
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6202>
Michel Dänzer [Wed, 2 Sep 2020 16:39:52 +0000 (18:39 +0200)]
ci: Don't create test-docs job if the pages one exists in the pipeline
It's redundant in that case.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Wed, 2 Sep 2020 16:35:32 +0000 (18:35 +0200)]
ci: Prevent pages job from running in pre-merge pipelines
Since pre-merge pipelines run in the "mesa" namespace now, the rule
would have created the job if the source branch was named "master" (and
the job might have updated the public website).
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Tue, 8 Sep 2020 16:02:58 +0000 (18:02 +0200)]
ci: Always use CI_PROJECT_NAMESPACE instead of CI_PROJECT_PATH
And always check it first.
Cleanup for consistency.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Tue, 8 Sep 2020 16:00:21 +0000 (18:00 +0200)]
ci: Add "is for Marge Bot" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Tue, 8 Sep 2020 15:58:32 +0000 (17:58 +0200)]
ci: Add "is pre-merge pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Tue, 8 Sep 2020 15:47:18 +0000 (17:47 +0200)]
ci: Add "is post-merge pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Tue, 8 Sep 2020 15:52:24 +0000 (17:52 +0200)]
ci: Add "is forked branch" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Tue, 8 Sep 2020 15:30:49 +0000 (17:30 +0200)]
ci: Add "is forked branch or pre-merge pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Tue, 8 Sep 2020 10:36:11 +0000 (12:36 +0200)]
ci: Add "is post-merge pipeline, not for Marge Bot" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Tue, 8 Sep 2020 10:31:08 +0000 (12:31 +0200)]
ci: Add "is pre-merge pipeline for Marge Bot" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Tue, 8 Sep 2020 10:20:39 +0000 (12:20 +0200)]
ci: Add "is master branch of main project" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Michel Dänzer [Tue, 8 Sep 2020 15:44:40 +0000 (17:44 +0200)]
ci: Add "is scheduled pipeline" YAML anchor
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6566>
Samuel Pitoiset [Mon, 21 Sep 2020 11:43:49 +0000 (13:43 +0200)]
radv: fix transform feedback crashes if pCounterBufferOffsets is NULL
From the Vulkan 1.2.154 spec:
"If pCounterBufferOffsets is NULL, then it is assumed the
offsets are zero."
Fix new CTS
dEQP-VK.transform_feedback.simple.backward_dependency_no_offset_array.
CC: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6798>
Rhys Perry [Mon, 14 Sep 2020 15:45:55 +0000 (16:45 +0100)]
aco: use bit vectors for liveness sets
This seems to be much faster than hash sets. When compiling pipelines from
5 games, live_var_analysis takes about a third the time it used to and
fossilize-replay is ~1.77% faster.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6733>
Rhys Perry [Mon, 14 Sep 2020 19:58:33 +0000 (20:58 +0100)]
aco: keep track of temporaries' regclasses in the Program
A future change will switch the liveness sets to bit vectors, which don't
contain regclass information.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6733>
Pierre-Eric Pelloux-Prayer [Wed, 16 Sep 2020 11:08:58 +0000 (13:08 +0200)]
radeonsi: change vendor name to AMD
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6754>
Pierre-Eric Pelloux-Prayer [Wed, 16 Sep 2020 21:11:01 +0000 (23:11 +0200)]
radeonsi: reduce PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE value
The new value (64 MB) is a compromise:
- the old value was very large (max_alloc & 0xffffffff) and caused https://gitlab.freedesktop.org/mesa/mesa/-/issues/3301
- amdgpu-pro allows 512MB, nvidia 64MB
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6754>
Pierre-Eric Pelloux-Prayer [Tue, 15 Sep 2020 08:48:26 +0000 (10:48 +0200)]
radeonsi: move GL vendor workaround to drirc
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6754>
Pierre-Eric Pelloux-Prayer [Mon, 14 Sep 2020 08:49:29 +0000 (10:49 +0200)]
gallium: add PIPE_CAP_MAX_TEXTURE_MB
Allows driver to override the default value (1024) from mesa.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6754>
Rhys Perry [Thu, 17 Sep 2020 13:41:27 +0000 (14:41 +0100)]
radv,aco: fix reading primitive ID in FS after TES
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3530
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6760>
Boris Brezillon [Thu, 10 Sep 2020 10:46:33 +0000 (12:46 +0200)]
panfrost: decode: Misc formatting improvements
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 8 Sep 2020 18:32:41 +0000 (20:32 +0200)]
panfrost: Avoid copying job descriptors around when we can
Job descriptors are written section by section and are never modified
after them been emitted. Let's avoid copying things around by allocating
descriptors upfront and letting the scoreboard logic only write the
header section.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 8 Sep 2020 17:41:51 +0000 (19:41 +0200)]
panfrost: XML-ify the compute job descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 8 Sep 2020 10:48:15 +0000 (12:48 +0200)]
panfrost: Rename the Blend dither disable flag
It's actually encoding the "Round to FB precision" information.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 8 Sep 2020 10:43:48 +0000 (12:43 +0200)]
panfrost: XML-ify the fragment job descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 8 Sep 2020 08:39:23 +0000 (10:39 +0200)]
panfrost: XML-ify the write value job descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 8 Sep 2020 05:07:41 +0000 (07:07 +0200)]
panfrost: XML-ify the job header descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 8 Sep 2020 08:17:40 +0000 (10:17 +0200)]
panfrost: XML-ify the multi-target framebuffer descriptors
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 8 Sep 2020 08:11:26 +0000 (10:11 +0200)]
panfrost: XML-ify the bifrost tiler descriptors
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Sun, 6 Sep 2020 09:01:09 +0000 (11:01 +0200)]
panfrost: XML-ify the single target framebuffer descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Sat, 5 Sep 2020 16:16:37 +0000 (18:16 +0200)]
panfrost: XML-ify the midgard tiler descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Thu, 3 Sep 2020 15:27:51 +0000 (17:27 +0200)]
panfrost: Add Tiled linear mode to the Block Format enum
Add it for completeness.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Thu, 3 Sep 2020 15:26:49 +0000 (17:26 +0200)]
panfrost: Clarify what TILED mode is
We have 2 tile modes: tiled linear and tiled U-interleaved. Let's rename
the existing value to clarify that.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Thu, 3 Sep 2020 07:18:09 +0000 (09:18 +0200)]
panfrost: XML-ify the local storage descriptor
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 15 Sep 2020 07:25:18 +0000 (09:25 +0200)]
panfrost: decode: Use pan_{unpack,print}() when applicable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Sat, 5 Sep 2020 16:14:17 +0000 (18:14 +0200)]
panfrost: decode: Add a macro to dump unpacked descriptors
And use it where it makes sense.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Wed, 9 Sep 2020 15:56:53 +0000 (17:56 +0200)]
panfrost: decode: Rework the DUMP_{CL,ADDR}() macros
We don't need to pass the indentation level explicitly if we use
pandecode_log() instead of fprintf(). This helps keeping a consistent
indentation across descriptors.
While at it, let's rework those macros to allow creating titles from
a format string.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Wed, 9 Sep 2020 15:52:23 +0000 (17:52 +0200)]
panfrost: decode: Make the indentation consistent with auto-generated print helpers
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 15 Sep 2020 07:48:57 +0000 (09:48 +0200)]
panfrost: gen_pack: Allow enum/define values expressed in hexadecimal
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Tue, 15 Sep 2020 07:38:11 +0000 (09:38 +0200)]
panfrost: gen_pack: Add a log2 modifier
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Suggested-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Mon, 7 Sep 2020 09:16:38 +0000 (11:16 +0200)]
panfrost: gen_pack: Add an align() modifier
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Sun, 6 Sep 2020 08:50:16 +0000 (10:50 +0200)]
panfrost: gen_pack: Allow empty structs
This is useful if we want to declare padding sections which can be
packed (filled with zeros) and unpacked (checked for non zero entries).
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Sat, 5 Sep 2020 10:00:21 +0000 (12:00 +0200)]
panfrost: gen_pack: Add the aggregate concept
Panfrost descriptors are big and are usually built from a combination of
sub-descriptors. On top of that, layout of sub-descriptors might vary
depending on the architecture version. Since unions are not really an
option (too complex), here is a thin abstraction layer allowing us to
manipulate aggregates in their packed format. Each aggregate is formed
of one or more sections that are meant to be packed/unpacked/printed
separately. Section overlapping is allowed to facilitate handling of
descriptor variants.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Sat, 5 Sep 2020 09:53:06 +0000 (11:53 +0200)]
panfrost: gen_pack: Move the group get_length() logic to its own method
So we can re-use it elsewhere.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Sat, 5 Sep 2020 16:04:43 +0000 (18:04 +0200)]
panfrost: gen_pack: Add pan_{unpack,print}() helpers
And use them in pandecode.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Wed, 9 Sep 2020 08:46:03 +0000 (10:46 +0200)]
panfrost: gen_pack: Fix __gen_unpack_uint()
The mask should be a 64-bit value and we should promote cl bytes to u64
before shifting them.
Fixes:
75cc5b8c2922 ("panfrost: Adopt gen_pack_header.py via v3d")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Boris Brezillon [Sat, 5 Sep 2020 16:03:11 +0000 (18:03 +0200)]
panfrost: gen_pack: Minor formatting improvement
Escape the \ in pan_pack() so the end result is actually a multi-line
macro.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6797>
Icecream95 [Sat, 19 Sep 2020 08:33:14 +0000 (20:33 +1200)]
Revert "panfrost: Drop implicit blend pooling"
This reverts commit
dc7fbe114bac338e7075efdb325053ef41dad91c.
Fixes INSTR_INVALID_PC faults with the SuperTuxKart advanced rendering
pipeline, which occurred when blend shader BOs were allocated far apart.
Fixes:
dc7fbe114ba ("panfrost: Drop implicit blend pooling")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6785>
Bas Nieuwenhuizen [Tue, 15 Sep 2020 11:00:54 +0000 (13:00 +0200)]
Revert "radv: emit {CB,DB}_RMI_L2_CACHE_CONTROL at framebuffer time"
This reverts commit
d6bc0f26c918a67ebf85595d06628e8092e271d0.
These registers are now constant.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6726>
Bas Nieuwenhuizen [Tue, 15 Sep 2020 10:54:03 +0000 (12:54 +0200)]
Revert "radv: set BIG_PAGE to improve performance on GFX10.3"
This reverts commit
f4d861696dfb11dc2b6242a683a13238981f705f.
Turns out we cannot use BIG_PAGE with GTT and we can't tell
when a buffer is spilled to GTT.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6726>
Bas Nieuwenhuizen [Thu, 13 Aug 2020 22:58:06 +0000 (00:58 +0200)]
radv,radeonsi: Disable compression on interop depth images
If we want to use HTILE correctly we need to communicate extra stuff
like clear colors. (Unlike DCC there is no HTILE FCE)
CC: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6617>
Bas Nieuwenhuizen [Thu, 13 Aug 2020 21:29:15 +0000 (23:29 +0200)]
ac/surface: Fix depth import on GFX6-GFX8.
Lets just do depth interop imports by convention between radv and
radeonsi for now. The only thing using this should be Vulkan interop
anyway.
CC: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6617>
Jason Ekstrand [Fri, 18 Sep 2020 23:11:10 +0000 (18:11 -0500)]
intel/fs/swsb: SCHEDULING_FENCE only emits SYNC_NOP
It's not really unordered in the sense that it can still stall on
ordered things and we don't need a SYNC_NOP for that because it is a
SYNC_NOP. However, it also doesn't count when computing instruction
distances.
Fixes:
18e72ee2108 "intel/fs: Add FS_OPCODE_SCHEDULING_FENCE"
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6781>
Jason Ekstrand [Wed, 2 Sep 2020 21:51:51 +0000 (16:51 -0500)]
nir: Add a pass for lowering CL-style image ops to texture ops
In CL 1.2, images are required to be either read-only or write-only. We
can always translate the read-only image ops to texture ops. In CL 2.0
(and an extension), the ability is added to have read-write images but
sampling (with a sampler) is only allowed on read-only images. As long
as we only lower read-only images to texture ops, everything should stay
consistent.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
Jason Ekstrand [Wed, 2 Sep 2020 21:11:38 +0000 (16:11 -0500)]
spirv: Plumb access qualifiers through from image types
In SPIR-V, the access qualifiers for an image are provided on the image
type. Assuming no one swaps the types around on us (I think that should
be illegal), this means we can reliably fetch the access qualifiers from
the type itself. The ops which don't really have an easy-to-fetch type
are the atomics because they use OpImageTexelPointer. However, those
are only allowed on read/write images and that's the default.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
Jason Ekstrand [Thu, 3 Sep 2020 05:07:13 +0000 (00:07 -0500)]
spirv: Access qualifiers are not a bitfield
They're an actual enum. My bad.
Fixes:
de36b5b805be "nir/vtn: Add support for kernel images to SPIRV-to-NIR"
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
Jason Ekstrand [Mon, 31 Aug 2020 21:43:40 +0000 (16:43 -0500)]
clover: Pull the stride from pipe_transfer for image maps
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6578>
Icecream95 [Sat, 5 Sep 2020 05:00:37 +0000 (17:00 +1200)]
pan/mdg: Use nir_shader_instructions_pass for fdot2 lowering
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6718>
Icecream95 [Sat, 5 Sep 2020 04:58:34 +0000 (16:58 +1200)]
pan/mdg: Use nir_shader_instructions_pass for nir_lod_errata
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6718>
Icecream95 [Mon, 14 Sep 2020 23:57:50 +0000 (11:57 +1200)]
pan/mdg: Return a bool from midgard_nir_lod_errata
To match other NIR passes.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6718>
Icecream95 [Thu, 10 Sep 2020 09:08:25 +0000 (21:08 +1200)]
panfrost: Set modifier_constant to true for exported resources
Not actually seen in the wild but could theoretically be a problem for
applications that explicitly import/export resources.
v2: Set it on exporting as well as importing (Daniel Stone)
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6717>
Erico Nunes [Wed, 9 Sep 2020 22:02:38 +0000 (00:02 +0200)]
lima: fix vertex shader uniform buffer size
In some cases when switching shader programs, mesa does not switch the
currently set pipe_constant_buffer, which keeps pointing to the one
previously set.
If the two shader programs have a different number of uniforms, the size
of the constant buffer may be different and this needs to be considered
while generating the next draw command.
This patch fixes the uniform buffer creation in the lima vertex shader
command to avoid an out of bounds memcpy due to a previously set
pipe_constant_buffer.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6701>
Erico Nunes [Sat, 29 Aug 2020 14:32:24 +0000 (16:32 +0200)]
lima: allocate new bo for stream draw
In stream draws, the resource bo might be in use in a previous draw.
Allocate a new one for the resource to avoid overwriting data in use.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6503>
Bas Nieuwenhuizen [Fri, 7 Aug 2020 01:05:37 +0000 (03:05 +0200)]
radeonsi: Move display dcc dirty tracking to framebuffer emission.
To improve performance.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>
Bas Nieuwenhuizen [Thu, 30 Jul 2020 15:14:38 +0000 (17:14 +0200)]
radeonsi: Put retile map in separate buffers.
The retile maps are a software mechanism and hence very suceptible
to change. As such I'd like to avoid making it part of the cross
driver ABI.
Ideally we'd just use the cached tile info + a shader to avoid these
buffers altogether.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>
Bas Nieuwenhuizen [Sun, 2 Aug 2020 23:05:07 +0000 (01:05 +0200)]
amd/common: Store non-displayable DCC pitch.
For DRM planes with modifiers.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6783>
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