platform/kernel/linux-stable.git
11 years agodrm/radeon/si: fix define for MC_SEQ_TRAIN_WAKEUP_CNTL
Alex Deucher [Mon, 28 Oct 2013 14:56:23 +0000 (10:56 -0400)]
drm/radeon/si: fix define for MC_SEQ_TRAIN_WAKEUP_CNTL

Typo in the register offset.

Noticed-by: Sylvain BERTRAND <sylware@legeek.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
11 years agodrm/radeon: fix endian handling in rlc buffer setup
Alex Deucher [Wed, 23 Oct 2013 22:27:10 +0000 (18:27 -0400)]
drm/radeon: fix endian handling in rlc buffer setup

The buffers needs to be in little endian format.

Noticed-by: Sylvain BERTRAND <sylware@legeek.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: retain user selected performance level across state changes
Alex Deucher [Wed, 23 Oct 2013 21:31:42 +0000 (17:31 -0400)]
drm/radeon/dpm: retain user selected performance level across state changes

If the user has forced the state high or low, retain that preference
even when we switch power states.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=70654

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: disable force performance state when thermal state is active
Alex Deucher [Wed, 23 Oct 2013 21:22:29 +0000 (17:22 -0400)]
drm/radeon: disable force performance state when thermal state is active

If the thermal state is active, we are in the lowest performance level
to cool down the chip.  Don't let the user force it higher.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: enable DPM by default on r7xx asics
Alex Deucher [Fri, 1 Nov 2013 19:16:02 +0000 (15:16 -0400)]
drm/radeon: enable DPM by default on r7xx asics

Seems to be stable on them.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: enable DPM by default on evergreen asics
Alex Deucher [Fri, 1 Nov 2013 19:11:34 +0000 (15:11 -0400)]
drm/radeon: enable DPM by default on evergreen asics

Seems to be stable on them.  There are still some issues
with the performance states staying in the highest levels
on certain cards when multiple monitors are attached, but
being that the the cards are always in their highest power
state at boot up anyway, this doesn't really change anything
and improves things in all other cases.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: enable DPM by default on BTC asics
Alex Deucher [Wed, 30 Oct 2013 14:18:37 +0000 (10:18 -0400)]
drm/radeon: enable DPM by default on BTC asics

Seems to be stable on them.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: enable DPM by default on SI asics
Alex Deucher [Wed, 23 Oct 2013 21:14:06 +0000 (17:14 -0400)]
drm/radeon: enable DPM by default on SI asics

Seems to be stable on them and improves peformance
as most SI asics have very low boot clocks.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: enable DPM by default on SUMO/PALM APUs
Alex Deucher [Wed, 23 Oct 2013 21:11:06 +0000 (17:11 -0400)]
drm/radeon: enable DPM by default on SUMO/PALM APUs

DPM seems to be stable on these asics and it drastically
improves performance depending on the boot clocks.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: only print dpm debugging messages when radeon_dpm=1
Alex Deucher [Wed, 23 Oct 2013 22:35:43 +0000 (18:35 -0400)]
drm/radeon/dpm: only print dpm debugging messages when radeon_dpm=1

Avoids spamming the system log for chips where dpm is enabled by
default, but prints then messages when users force it on for other
asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: Implement radeon_pci_shutdown
Markus Trippelsdorf [Wed, 23 Oct 2013 21:07:30 +0000 (17:07 -0400)]
drm/radeon: Implement radeon_pci_shutdown

Currently radeon devices are not properly shutdown during kexec. This
causes a varity of issues, e.g. dpm initialization failures.
Fix this by implementing a radeon_pci_shutdown function, that unloads
the driver cleanly.

Signed-off-by: Markus Trippelsdorf <markus@trippelsdorf.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/audio: write audio/video latency info for DCE6/8
Alex Deucher [Thu, 10 Oct 2013 22:03:06 +0000 (18:03 -0400)]
drm/radeon/audio: write audio/video latency info for DCE6/8

Needed by the hda driver to properly set up synchronization
on the audio side.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
11 years agodrm/radeon/audio: write audio/video latency info for DCE4/5
Alex Deucher [Thu, 10 Oct 2013 21:54:51 +0000 (17:54 -0400)]
drm/radeon/audio: write audio/video latency info for DCE4/5

Needed by the hda driver to properly set up synchronization
on the audio side.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
11 years agodrm/radeon/audio: break out of loops once we match connector
Alex Deucher [Thu, 10 Oct 2013 21:58:27 +0000 (17:58 -0400)]
drm/radeon/audio: break out of loops once we match connector

No need to continue with the loops once we've matched
the appropriate connector.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE4.x
Alex Deucher [Thu, 10 Oct 2013 20:59:49 +0000 (16:59 -0400)]
drm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE4.x

The plain [EN|DIS]ABLE functions do the same thing and more
and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE3.x
Alex Deucher [Wed, 23 Oct 2013 20:29:04 +0000 (16:29 -0400)]
drm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE3.x

The plain [EN|DIS]ABLE functions do the same thing and more
and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/si: tell dpm there is a display connected
Alex Deucher [Thu, 10 Oct 2013 16:31:43 +0000 (12:31 -0400)]
drm/radeon/si: tell dpm there is a display connected

On SI asics, the SMC will automatically force the performance
level to the lowest level if there are no displays active.  This
prevents automatic performance scaling on PowerXpress systems or
for offscreen rendering or compute when displays are disabled.

Going forward, it would be best to dynamically change this, but
for now leave scaling enabled.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=69395

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: implement blit copy callback for CIK
Alex Deucher [Tue, 1 Oct 2013 20:36:51 +0000 (16:36 -0400)]
drm/radeon: implement blit copy callback for CIK

Uses the CP ring rather than the DMA ring.  Useful
for debugging and benchmarking.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: cleanup a type issue with rv6xx_clocks_per_unit()
Dan Carpenter [Tue, 2 Jul 2013 06:22:55 +0000 (09:22 +0300)]
drm/radeon/dpm: cleanup a type issue with rv6xx_clocks_per_unit()

The rv6xx_clocks_per_unit() function pretends it can set flags in a u64
bitfield but really because "1" is an int it doesn't work for more than
32 bits.  The only caller truncates the high bits away anyway.  I've
just changed it to be a u32.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: plug in blit copy routine for SI
Alex Deucher [Tue, 1 Oct 2013 20:17:14 +0000 (16:17 -0400)]
drm/radeon: plug in blit copy routine for SI

Uses CP DMA packet just like previous asics.
Useful for debugging and benchmarking.  Uses
same packet format as prior asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: enable hdmi audio by default
Alex Deucher [Thu, 26 Sep 2013 17:11:18 +0000 (13:11 -0400)]
drm/radeon: enable hdmi audio by default

Seems to be stable enough for the majority of users.
It can be disabled on the fly via connector attributes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add runtime PM support (v2)
Dave Airlie [Mon, 17 Sep 2012 04:40:31 +0000 (14:40 +1000)]
drm/radeon: add runtime PM support (v2)

This hooks radeon up to the runtime PM system to enable
dynamic power management for secondary GPUs in switchable
and powerxpress laptops.

v2: agd5f: clean up, add module parameter

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: convert to pmops
Dave Airlie [Thu, 13 Sep 2012 02:02:30 +0000 (12:02 +1000)]
drm/radeon: convert to pmops

This is a pre-requisite for runtime pm on powerxpress systems.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add a connector property for dither
Alex Deucher [Tue, 24 Sep 2013 21:26:26 +0000 (17:26 -0400)]
drm/radeon: add a connector property for dither

Allows you to enable dither in the display hardware
when the monitor supports lower a lower bpc than the
current framebuffer format.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: Add support for programming the FMT blocks
Alex Deucher [Mon, 23 Sep 2013 16:22:11 +0000 (12:22 -0400)]
drm/radeon: Add support for programming the FMT blocks

The FMT blocks control how data is sent from the backend
of the display pipe to to monitor.  Proper set up of the
FMT blocks are required for 30bpp formats.  Additionally,
dithering can be enabled on for better display with 18 and
24bpp displays.  The exception is LVDS/eDP which atom
takes care of in the SelectCRTC_Source table.  For now
just enable truncation until we test dithering more.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/sysfs: Do not drop device reference twice
Thierry Reding [Wed, 30 Oct 2013 10:59:05 +0000 (11:59 +0100)]
drm/sysfs: Do not drop device reference twice

device_unregister() already drops its reference to the struct device, so
explicitly calling put_device() before device_unregister() can cause the
device to have been freed before it can be unregistered.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agoMerge tag 'drm-intel-next-2013-10-18' of git://people.freedesktop.org/~danvet/drm...
Dave Airlie [Fri, 25 Oct 2013 08:35:04 +0000 (09:35 +0100)]
Merge tag 'drm-intel-next-2013-10-18' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

- CRC support from Damien and He Shuang. Long term this should allow us to
  test an awful lot modesetting corner cases automatically. So for me as
  the maintainer this is really big.
- HDMI audio fix from Jani.
- VLV dpll computation code refactoring from Ville.
- Fixups for the gpu booster from last time around (Chris).
- Some cleanups in the context code from Ben.
- More watermark work from Ville (we'll be getting there ...).
- vblank timestamp improvements from Ville.
- CONFIG_FB=n support, including drm core changes to make the fbdev
  helpers optional.
- DP link training improvements (Jani).
- mmio vtable from Ben, prep work for future hw.

* tag 'drm-intel-next-2013-10-18' of git://people.freedesktop.org/~danvet/drm-intel: (132 commits)
  drm/i915/dp: don't mention eDP bpp clamping if it doesn't affect bpp
  drm/i915: remove dead code in ironlake_crtc_mode_set
  drm/i915: crc support for hsw
  drm/i915: fix CRC debugfs setup
  drm/i915: wait one vblank when disabling CRCs
  drm/i915: use ->get_vblank_counter for the crc frame counter
  drm/i915: wire up CRC interrupt for ilk/snb
  drm/i915: add CRC #defines for ilk/snb
  drm/i915: extract display_pipe_crc_update
  drm/i915: don't Oops in debugfs for I915_FBDEV=n
  drm/i915: set HDMI pixel clock in audio configuration
  drm/i915: pass mode to ELD write vfuncs
  cpufreq: Add dummy cpufreq_cpu_get/put for CONFIG_CPU_FREQ=n
  drm/i915: check gem bo size when creating framebuffers
  drm/i915: Use unsigned long for obj->user_pin_count
  drm/i915: prevent tiling changes on framebuffer backing storage
  drm/i915: grab dev->struct_mutex around framebuffer_init
  drm/i915: vlv: fix VGA hotplug after modeset
  drm: add support for additional stereo 3D modes
  drm/i915: preserve dispaly init order on ByT
  ...

11 years agodrm/qxl: fix disabling extra monitors from client
Marc-André Lureau [Fri, 18 Oct 2013 14:11:33 +0000 (16:11 +0200)]
drm/qxl: fix disabling extra monitors from client

To disable a monitor, a Spice client sends a monitor config with the
monitor resolution to 0x0.

However, before qxl_crtc_disable() is reached after the hotplug event,
it can happen that another monitor is reconfigured, and
qxl_send_monitors_config() is called with the old config, which will
re-enable the monitor on the client.

Reset config if monitor is found disconnected, during
drm_helper_hpd_irq_event().

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm/qxl: remove unnecessary check
Marc-André Lureau [Fri, 18 Oct 2013 14:11:32 +0000 (16:11 +0200)]
drm/qxl: remove unnecessary check

All hard-coded resolutions are passing this check.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm/qxl: prefer the monitor config resolution
Marc-André Lureau [Fri, 18 Oct 2013 14:11:31 +0000 (16:11 +0200)]
drm/qxl: prefer the monitor config resolution

By default, 1024x768 is the preferred resolution. However, when a
monitor config is given, it should be the only preferred resolution.

Note that the monitor config resolution is passed to
qxl_add_common_modes() to avoid adding a duplicate mode without the
preferred resolution. That would discard the previous monitor config
preferred bit.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm: copy mode type in drm_mode_connector_list_update()
Marc-André Lureau [Fri, 18 Oct 2013 14:11:30 +0000 (16:11 +0200)]
drm: copy mode type in drm_mode_connector_list_update()

In commit 38d5487db7f289be1d56ac7df704ee49ed3213b9, Keith explained:
    This patch simply merges the two mode type bits together; that seems
    reasonable to me, but perhaps only a subset of the bits should be
    used? None of these can be user defined as they all come from
    looking at just the hardware.

However, merging the bits means that a flag becomes sticky. It is not
possible, for example to update the mode type to remove the
DRM_MODE_TYPE_PREFERRED bit.

After a brief discussion with Dave Airlie on irc, it was agreed to
propose that change, instead of introducing another function to remove a
bit from exisiting modes type.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm/qxl: notify that the monitor config changed
Marc-André Lureau [Fri, 18 Oct 2013 14:11:29 +0000 (16:11 +0200)]
drm/qxl: notify that the monitor config changed

drm_helper_hpd_irq_event() only notifies when the connector status
changed. However, Spice monitor config can change while the connector is
connected, to support arbitrary resolution. Do an hotplug event if it
wasn't done by drm_helper_hpd_irq_event().

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm: return if changed in drm_helper_hpd_irq_event()
Marc-André Lureau [Fri, 18 Oct 2013 14:11:28 +0000 (16:11 +0200)]
drm: return if changed in drm_helper_hpd_irq_event()

The caller may want to know whether the configuration was changed, and
if an hotplug event was sent.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm: fix a small spelling
Marc-André Lureau [Fri, 18 Oct 2013 14:11:27 +0000 (16:11 +0200)]
drm: fix a small spelling

Fix a little spelling of drm_crtc_convert_umode() comment.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agoMerge branch 'drm-tda998x-3.12-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox...
Dave Airlie [Wed, 23 Oct 2013 09:09:56 +0000 (10:09 +0100)]
Merge branch 'drm-tda998x-3.12-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox into drm-next

Fix build on non-ARM
* 'drm-tda998x-3.12-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox:
  DRM: Armada: depend on ARM

11 years agoDRM: Armada: depend on ARM
Russell King [Tue, 22 Oct 2013 13:11:36 +0000 (14:11 +0100)]
DRM: Armada: depend on ARM

Armada DRM uses relaxed accessors which are not available on other
platforms.  Limit it to just ARM.

Acked-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
11 years agoMerge branch 'drm-tda998x-3.12' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox into...
Dave Airlie [Tue, 22 Oct 2013 08:38:18 +0000 (09:38 +0100)]
Merge branch 'drm-tda998x-3.12' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox into drm-next

This adds support for the Armada 510 display subsystem found on the
Marvell Dove devices.  This IP is re-used across several different Marvell
SoCs with various tweaks, and this driver has been structured to allow
the other IPs to re-use the bulk of this code; further work in this area
is expected from interested parties.

This has been extensively tested on the SolidRun Cubox platform and
appears to work well there.

[airlied: update for api changes merged previous to this]

11 years agodrm/sysfs: sort out minor and connector device object lifetimes.
Dave Airlie [Fri, 11 Oct 2013 04:07:25 +0000 (14:07 +1000)]
drm/sysfs: sort out minor and connector device object lifetimes.

So drm was abusing device lifetimes, by having embedded device structures
in the minor and connector it meant that the lifetime of the internal drm
objects (drm_minor and drm_connector) were tied to the lifetime of the device
files in sysfs, so if something kept those files opened the current code
would kfree the objects and things would go downhill from there.

Now in reality there is no need for these lifetimes to be so intertwined,
especailly with hotplugging of devices where we wish to remove the sysfs
and userspace facing pieces before we can unwind the internal objects due
to open userspace files or mmaps, so split the objects out so the struct
device is no longer embedded and do what fbdev does and just allocate
and remove the sysfs inodes separately.

Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agoDRM: Armada: add support for drm tda19988 driver
Russell King [Sat, 4 May 2013 19:08:27 +0000 (20:08 +0100)]
DRM: Armada: add support for drm tda19988 driver

Add support for TDA998x output via the slave driver in the kernel.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
11 years agoMerge branches 'drm-3.12' and 'tda998x-3.12' into drm-tda998x-3.12
Russell King [Fri, 18 Oct 2013 15:00:02 +0000 (16:00 +0100)]
Merge branches 'drm-3.12' and 'tda998x-3.12' into drm-tda998x-3.12

11 years agodrm/i2c: tda998x: set VIF for full range, underscanned display
Russell King [Tue, 27 Aug 2013 00:27:42 +0000 (01:27 +0100)]
drm/i2c: tda998x: set VIF for full range, underscanned display

Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
11 years agoDRM: Armada: Add support for ARGB 32x64 or 64x32 hardware cursors
Russell King [Sun, 19 May 2013 09:55:17 +0000 (10:55 +0100)]
DRM: Armada: Add support for ARGB 32x64 or 64x32 hardware cursors

This patch adds ARGB hardware cursor support to the DRM driver for the
Marvell Armada SoCs.  ARGB cursors are supported at either 32x64 or
64x32 resolutions.

Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
11 years agodrm/i915/dp: don't mention eDP bpp clamping if it doesn't affect bpp
Jani Nikula [Wed, 16 Oct 2013 14:06:17 +0000 (17:06 +0300)]
drm/i915/dp: don't mention eDP bpp clamping if it doesn't affect bpp

This is useful with the follow-up patch that frobs
dev_priv->vbt.edp_bpp, and the value no longer comes directly from
VBT.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: remove dead code in ironlake_crtc_mode_set
Daniel Vetter [Thu, 17 Oct 2013 20:44:31 +0000 (22:44 +0200)]
drm/i915: remove dead code in ironlake_crtc_mode_set

In

Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Jun 5 13:34:23 2013 +0200

    drm/i915: consolidate pch pll enable sequence

I've removed all the code from this if block, but somehow forgotten to
kill the block itself.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: crc support for hsw
Daniel Vetter [Wed, 16 Oct 2013 20:55:52 +0000 (22:55 +0200)]
drm/i915: crc support for hsw

hw designers decided to change the CRC registers and coalesce them all
into one. Otherwise nothing changed. I've opted for a new hsw_ version
to grab the crc sample since hsw+1 will have the same crc registers,
but different interrupt source registers. So this little helper
function will come handy there.

Also refactor the display error handler with a neat pipe loop.

v2: Use for_each_pipe.

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: fix CRC debugfs setup
Daniel Vetter [Wed, 16 Oct 2013 20:55:51 +0000 (22:55 +0200)]
drm/i915: fix CRC debugfs setup

We've set up all files, but removed only those for which we have a
pipe. Which leaves the one for pipe C on machines with less than 2
pipes, breaking module reload.

v2: We can't get at the drm device this early (wtf), so just register
all the files and also remove them all again.

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: wait one vblank when disabling CRCs
Daniel Vetter [Wed, 16 Oct 2013 20:55:50 +0000 (22:55 +0200)]
drm/i915: wait one vblank when disabling CRCs

This avoids a spurious spurious interrupt warning.

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: use ->get_vblank_counter for the crc frame counter
Daniel Vetter [Wed, 16 Oct 2013 20:55:49 +0000 (22:55 +0200)]
drm/i915: use ->get_vblank_counter for the crc frame counter

Suggested by Ville.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: wire up CRC interrupt for ilk/snb
Daniel Vetter [Wed, 16 Oct 2013 20:55:48 +0000 (22:55 +0200)]
drm/i915: wire up CRC interrupt for ilk/snb

We enable the interrupt unconditionally and only control it
through the enable bit in the CRC control register.

v2: Extract per-platform helpers to compute the register values.

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: add CRC #defines for ilk/snb
Daniel Vetter [Wed, 16 Oct 2013 20:55:47 +0000 (22:55 +0200)]
drm/i915: add CRC #defines for ilk/snb

Also add a new _PIPE_INC macro which takes an base plus increment.
Much less likely to botch the job by missing an s/A/B/ somewhere.

v2: They've moved the bitfield. Argh!

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: extract display_pipe_crc_update
Daniel Vetter [Wed, 16 Oct 2013 20:55:46 +0000 (22:55 +0200)]
drm/i915: extract display_pipe_crc_update

The ringbuffer update logic should always be the same, but different
platforms have different amounts of CRC registers. Hence extract it.

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: don't Oops in debugfs for I915_FBDEV=n
Daniel Vetter [Thu, 17 Oct 2013 12:35:31 +0000 (14:35 +0200)]
drm/i915: don't Oops in debugfs for I915_FBDEV=n

Failed to properly test this.

Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: set HDMI pixel clock in audio configuration
Jani Nikula [Wed, 16 Oct 2013 09:34:48 +0000 (12:34 +0300)]
drm/i915: set HDMI pixel clock in audio configuration

The HDMI audio expects HDMI pixel clock to be set in the audio
configuration. We've currently just set 0, using 25.2 / 1.001 kHz
frequency, which fails with some modes.

v2: Now with a commit message.

Reference: http://mid.gmane.org/CAGpEb3Ep1LRZETPxHGRfBDqr5Ts2tAc8gCukWwugUf1U5NYv1g@mail.gmail.com
Reference: http://mid.gmane.org/20130206213533.GA16367@hardeman.nu
Reported-by: David Härdeman <david@hardeman.nu>
Reported-by: Jasper Smet <josbeir@gmail.com>
Tested-by: Jasper Smet <josbeir@gmail.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: pass mode to ELD write vfuncs
Jani Nikula [Wed, 16 Oct 2013 09:34:47 +0000 (12:34 +0300)]
drm/i915: pass mode to ELD write vfuncs

This will be needed for setting the HDMI pixel clock for audio
config. No functional changes.

v2: Now with a commit message.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agocpufreq: Add dummy cpufreq_cpu_get/put for CONFIG_CPU_FREQ=n
Daniel Vetter [Tue, 8 Oct 2013 08:56:11 +0000 (10:56 +0200)]
cpufreq: Add dummy cpufreq_cpu_get/put for CONFIG_CPU_FREQ=n

The drm/i915 driver wants to adjust it's own power policies using the
cpu policies as a guideline (we can implicitly boost the cpus through
the gpus on some platforms). To avoid a dreaded select (since a
depends will leave users wondering where where their driver has gone
too) add dummy functions.

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Cc: kbuild test robot <fengguang.wu@intel.com>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: cpufreq@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: check gem bo size when creating framebuffers
Daniel Vetter [Wed, 9 Oct 2013 19:55:33 +0000 (21:55 +0200)]
drm/i915: check gem bo size when creating framebuffers

It's better to catch such fallout early, and this way we can rely on
the checking done by the drm core on fb->heigh/width at modeset time.

If we ever support planar formats on intel we might want to look into
a common helper to do all this, but for now this is good enough.

v2: Take tiling into account, requested by Ville.

v3: Fix tile height on gen2, spotted by Ville.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Requested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Use unsigned long for obj->user_pin_count
Daniel Vetter [Thu, 10 Oct 2013 12:46:37 +0000 (14:46 +0200)]
drm/i915: Use unsigned long for obj->user_pin_count

At least on linux sizeof(long) == sizeof(void*) and the thinking
is that you can grab about as many references as there's memory.

Doesn't really matter, just a bit of OCD since the fixed size data
type in a pure in-kernel datastructure look off.

v2: Ville asked for an overflow check since no one prevents userspace
from incrementing the pin count forever.

v3: s/INT/LONG/, noticed by Chris.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: prevent tiling changes on framebuffer backing storage
Daniel Vetter [Wed, 9 Oct 2013 19:23:52 +0000 (21:23 +0200)]
drm/i915: prevent tiling changes on framebuffer backing storage

Assuming that all framebuffer related metadata is invariant simplifies
our userspace input data checking. And current userspace always first
updates the tiling of an object before creating a framebuffer with it.

This allows us to upconvert a check in pin_and_fence to a WARN.

In the future it should also be helpful to know which buffer objects
are potential scanout targets for e.g. frontbuffer rendering tracking
and similar things.

Note that SNA shipped for one prerelease with code which will be
broken through this patch. But users shouldn't notice since it's
purely an optimization and will transparently fall back to allocating
a new fb. i-g-t also had offending code (now fixed), but we don't
really care about breaking the test-suite.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Grumpily-reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: grab dev->struct_mutex around framebuffer_init
Daniel Vetter [Wed, 9 Oct 2013 19:23:51 +0000 (21:23 +0200)]
drm/i915: grab dev->struct_mutex around framebuffer_init

We look at gem state (like obj->tiling/obj->stride), we better have
the relevant locks.

Right now this doesn't matter much since most of these checks are
a curtesy to safe buggy userspace, but I'd like to freeze the tiling
once we have framebuffer objects attached. And then locking matters.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: vlv: fix VGA hotplug after modeset
Imre Deak [Wed, 16 Oct 2013 17:39:24 +0000 (20:39 +0300)]
drm/i915: vlv: fix VGA hotplug after modeset

Since

commit 912d812e84cea8689a2bf3dd13b11dfe191f0f1e
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Oct 11 20:08:23 2012 +0200

    drm/i915/crt: don't set HOTPLUG bits on !PCH

on VLV we don't detect any VGA unplug event after a modeset, since there we
reset the ADPA hotplug bits. Fix it by preserving the hotplug bits on VLV as
well.

Signed-off-by: Imre Deak <imre.deak@intel.com>
[danvet: For consistency use gen >= 5 like in Chris' exact same fix
in intel_crt_reset.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm: add support for additional stereo 3D modes
Thomas Wood [Wed, 16 Oct 2013 14:58:50 +0000 (15:58 +0100)]
drm: add support for additional stereo 3D modes

Parse the 3D_Structure_ALL and 3D_MASK fields of the HDMI Vendor
Specific Data Block to expose more stereo 3D modes.

v2: Use (1 << 0) for consistency. (Ville Syrjälä)
    Skip adding any modes if 3D_MASK is indicated as being present but
    the length only includes 3D_Structure_ALL. (Ville Syrjälä)
    Check that the value of HDMI_3D_LEN is large enough to include
    3D_Structure_ALL and 3D_MASK, if they are present. (Ville Syrjälä)
v3: Increment offset before the length checks. (Ville Syrjälä)

Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: preserve dispaly init order on ByT
Artem Bityutskiy [Wed, 16 Oct 2013 15:10:41 +0000 (18:10 +0300)]
drm/i915: preserve dispaly init order on ByT

This patch changes HDMI port registration order for the BayTrail platform.

The story is that in kernel version 3.11 i915 supported only one HDMI port -
the HDMIB port. So this port ended up being HDMI-1 in user-space.

But commit '6f6005a drm/i915: expose HDMI connectors on port C on BYT'
introduced HDMIC port support. And added HDMIC  registration prior to HDMIB,
so HDMIB became HDMI-2 and HDMIC became HDMI-1.

Well, this is fine as far as the kernel is concerned. i915 does not give any
guarantees to the numbering, and has never given them.

However, this breaks wayland setup in Tizen IVI. We have only one single HDMI
port on our hardware, and it is connected to HDMIB. Our configuration relies on
the fact that it is HDMI-1.

Well, certainly this is user-space problem which was exposed with Jesse's
patch. However, there is a reason why we have to do this assumption - we use
touchscreen monitors and we have to associate event devices with the monitors,
and this is not easy to do dynamically, so we just have a static setup.

Anyway, while the user-space setup will have to be fixed regardless, let's
chane the HDMI port registration order so that HDMIB stays HDMI-1, just like it
was in 3.11. Simply because there is no strong reason for changing the order in
the kernel, and it'll help setups like ours in sense that we'll have more time
for fixing the issue properly.

Also amend the commentary which looks a bit out-of-date.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
[danvet: Drop the commment, SDVOC is gone and we have a proper HDMIC
define now.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Use pipe_name() instead of the pipe number
Damien Lespiau [Wed, 16 Oct 2013 11:29:54 +0000 (12:29 +0100)]
drm/i915: Use pipe_name() instead of the pipe number

Yet other direct usages of the pipe number instead of pipe_name().
We've been tracking them lately but managed to miss these last ones.

v2: Catch them all! (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Disable all GEM timers and work on unload
Chris Wilson [Wed, 16 Oct 2013 10:50:01 +0000 (11:50 +0100)]
drm/i915: Disable all GEM timers and work on unload

We have two once very similar functions, i915_gpu_idle() and
i915_gem_idle(). The former is used as the lower level operation to
flush work on the GPU, whereas the latter is the high level interface to
flush the GEM bookkeeping in addition to flushing the GPU. As such
i915_gem_idle() also clears out the request and activity lists and
cancels the delayed work. This is what we need for unloading the driver,
unfortunately we called i915_gpu_idle() instead.

In the process, make sure that when cancelling the delayed work and
timer, which is synchronous, that we do not hold any locks to prevent a
deadlock if the work item is already waiting upon the mutex. This
requires us to push the mutex down from the caller to i915_gem_idle().

v2: s/i915_gem_idle/i915_gem_suspend/

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70334
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: xunx.fang@intel.com
[danvet: Only set ums.suspended for !kms as discussed earlier. Chris
noticed that this slipped through.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Move some hdmi enable function name to vlv specific.
Chon Ming Lee [Wed, 16 Oct 2013 09:07:41 +0000 (17:07 +0800)]
drm/i915: Move some hdmi enable function name to vlv specific.

There is no functional change on this patch.  Only rename several
hdmi encoder function name which suppose to use only by valleyview from
intel_hdmi_pre_pll_enable to vlv_hdmi_pre_pll_enable, and etc.

Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: constify harder
Daniel Vetter [Wed, 16 Oct 2013 09:51:54 +0000 (11:51 +0200)]
drm/i915: constify harder

We not only want const strings, but a const array of them. Reported by
checkpatch.pl

Cc: Damien Lespiau <damien.lespiau@intel.com>
Acked-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: static inline for dummy crc functions
Daniel Vetter [Wed, 16 Oct 2013 09:49:58 +0000 (11:49 +0200)]
drm/i915: static inline for dummy crc functions

Also use #ifdef to keep consistent with all other such cases.

Cc: Damien Lespiau <damien.lespiau@intel.com>
Acked-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Enable pipe CRCs
Damien Lespiau [Tue, 15 Oct 2013 17:55:42 +0000 (18:55 +0100)]
drm/i915: Enable pipe CRCs

It's time to declare them ready. Unleash the beast.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Only one open() allowed on pipe CRC result files
Damien Lespiau [Tue, 15 Oct 2013 17:55:41 +0000 (18:55 +0100)]
drm/i915: Only one open() allowed on pipe CRC result files

It doesn't really make sense to have two processes dequeueing the CRC
values at the same time. Forbid that usage.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Implement blocking read for pipe CRC files
Damien Lespiau [Tue, 15 Oct 2013 17:55:40 +0000 (18:55 +0100)]
drm/i915: Implement blocking read for pipe CRC files

seq_file is not quite the right interface for these ones. We have a
circular buffer with a new entry per vblank on one side and a process
wanting to dequeue the CRC with a read().

It's quite racy to wait for vblank in user land and then try to read a
pipe_crc file, sometimes the CRC interrupt hasn't been fired and we end
up with an EOF.

So, let's have the read on the pipe_crc file block until the interrupt
gives us a new entry. At that point we can wake the reading process.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Move drm_add_fake_info_node() higher in the file
Damien Lespiau [Tue, 15 Oct 2013 17:55:39 +0000 (18:55 +0100)]
drm/i915: Move drm_add_fake_info_node() higher in the file

Following commit needs drm_add_fake_info_node() higher in the file to
avoid having a forward declaration. Move this helper near the top of the
file.

This also makes the next commit diff a bit easier to review.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Add log messages when CRCs collection is started/stopped
Damien Lespiau [Tue, 15 Oct 2013 17:55:38 +0000 (18:55 +0100)]
drm/i915: Add log messages when CRCs collection is started/stopped

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Warn if we receive an interrupt after freeing the buffer
Damien Lespiau [Tue, 15 Oct 2013 17:55:37 +0000 (18:55 +0100)]
drm/i915: Warn if we receive an interrupt after freeing the buffer

This shouldn't happen as the buffer is freed after disable pipe CRCs,
but better be safe than sorry.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Rename i915_pipe_crc_ctl to i915_display_crc_ctl
Damien Lespiau [Tue, 15 Oct 2013 17:55:36 +0000 (18:55 +0100)]
drm/i915: Rename i915_pipe_crc_ctl to i915_display_crc_ctl

In the same spirit than:

    drm/i915: Generalize the CRC command format for future work

    Let's move from writing 'A plane1' to 'pipe A plane1' to
    i915_pipe_crc_ctl. This will allow us to extend the interface to
    transcoders or DDIs in the future.

Let's rename the CRC control file to be more generic.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Generalize the CRC command format for future work
Damien Lespiau [Tue, 15 Oct 2013 17:55:35 +0000 (18:55 +0100)]
drm/i915: Generalize the CRC command format for future work

Let's move from writing 'A plane1' to 'pipe A plane1' to
i915_pipe_crc_ctl. This will allow us to extend the interface to
transcoders or DDIs in the future.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Dynamically allocate the CRC circular buffer
Damien Lespiau [Tue, 15 Oct 2013 17:55:34 +0000 (18:55 +0100)]
drm/i915: Dynamically allocate the CRC circular buffer

So we don't eat that memory when not needed.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Empty the circular buffer when asked for a new source
Damien Lespiau [Tue, 15 Oct 2013 17:55:33 +0000 (18:55 +0100)]
drm/i915: Empty the circular buffer when asked for a new source

So we don't read out stale CRCs from a previous run left in the buffer.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Enforce going back to none before changing CRC source
Damien Lespiau [Tue, 15 Oct 2013 17:55:32 +0000 (18:55 +0100)]
drm/i915: Enforce going back to none before changing CRC source

This way we can have some init/fini code on those transitions.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Make switching to the same CRC source a no-op
Damien Lespiau [Tue, 15 Oct 2013 17:55:31 +0000 (18:55 +0100)]
drm/i915: Make switching to the same CRC source a no-op

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Sample the frame counter instead of a timestamp for CRCs
Damien Lespiau [Tue, 15 Oct 2013 17:55:30 +0000 (18:55 +0100)]
drm/i915: Sample the frame counter instead of a timestamp for CRCs

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Keep the CRC values into a circular buffer
Damien Lespiau [Tue, 15 Oct 2013 17:55:29 +0000 (18:55 +0100)]
drm/i915: Keep the CRC values into a circular buffer

There are a few good properties to a circular buffer, for instance it
has a number of entries (before we were always dumping the full buffer).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Add a control file for pipe CRCs
Daniel Vetter [Wed, 16 Oct 2013 11:30:34 +0000 (13:30 +0200)]
drm/i915: Add a control file for pipe CRCs

Note the "return -ENODEV;" in pipe_crc_set_source(). The ctl file is
disabled until the end of the series to be able to do incremental
improvements.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Expose latest 200 CRC value for pipe through debugfs
Shuang He [Tue, 15 Oct 2013 17:55:27 +0000 (18:55 +0100)]
drm/i915: Expose latest 200 CRC value for pipe through debugfs

There are several points in the display pipeline where CRCs can be
computed on the bits flowing there. For instance, it's usually possible
to compute the CRCs of the primary plane, the sprite plane or the CRCs
of the bits after the panel fitter (collectively called pipe CRCs).

v2: Quite a bit of rework here and there (Damien)

Signed-off-by: Shuang He <shuang.he@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Fix intermediate compile file reported by Wu Fengguang's
kernel builder.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Replace has_bsd/blt/vebox with a mask
Ben Widawsky [Tue, 15 Oct 2013 17:02:57 +0000 (10:02 -0700)]
drm/i915: Replace has_bsd/blt/vebox with a mask

I've sent this patch several times for various reasons. It essentially
cleans up a lot of code where we need to do something per ring, and want
to query whether or not the ring exists on that hardware.

It has various uses coming up, but for now it shouldn't be too
offensive.

v2: Big conflict resolution on Damien's DEV_INFO_FOR_EACH stuff

v3: Resolved vebox addition

v4: Rebased after months of disuse. Also made failed ringbuffer init
cleaner.

v5: Remove the init cleaner from v4. There is a better way to do it.
(Chris)

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: cleanup context fini
Ben Widawsky [Mon, 14 Oct 2013 17:01:37 +0000 (10:01 -0700)]
drm/i915: cleanup context fini

I had this lying around from he original PPGTT series, and thought we
might try to get it in by itself.

With the introduction of context refcounting we never explicitly
ref/unref the backing object. As such, the previous fix was a bit wonky.

Aside from fixing the above, this patch also puts us in good shape for
an upcoming patch which allows a failure to occur in between
context_init and the first do_switch.

CC: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Do a fuller init after reset
Ben Widawsky [Mon, 14 Oct 2013 17:01:36 +0000 (10:01 -0700)]
drm/i915: Do a fuller init after reset

I had this lying around from he original PPGTT series, and thought we
might try to get it in by itself.

It's convenient to just call i915_gem_init_hw at reset because we'll be
adding new things to that function, and having just one function to call
instead of reimplementing it in two places is nice.

In order to accommodate we cleanup ringbuffers in order to bring them
back up cleanly. Optionally, we could also teardown/re initialize the
default context but this was causing some problems on reset which I
wasn't able to fully debug, and is unnecessary with the previous context
init/enable split.

This essentially reverts:
commit 8e88a2bd5987178d16d53686197404e149e996d9
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Tue Jun 19 18:40:00 2012 +0200

    drm/i915: don't call modeset_init_hw in i915_reset

It seems to work for me on ILK now. Perhaps it's due to:
commit 8a5c2ae753c588bcb2a4e38d1c6a39865dbf1ff3
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Thu Mar 28 13:57:19 2013 -0700

    drm/i915: fix ILK GPU reset for render

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Check 5/6 DDB split only when sprites are enabled
Ville Syrjälä [Fri, 11 Oct 2013 12:26:26 +0000 (15:26 +0300)]
drm/i915: Check 5/6 DDB split only when sprites are enabled

Using the 5/6 DDB split make sense only when sprites are enabled.
So check that before we waste any cycles computing the merged
watermarks with the 5/6 DDB split.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Rename ilk_check_wm to ilk_validate_wm_level
Ville Syrjälä [Wed, 9 Oct 2013 16:18:10 +0000 (19:18 +0300)]
drm/i915: Rename ilk_check_wm to ilk_validate_wm_level

Makes the behaviour of the function more clear.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Rename ilk_wm_max to ilk_compute_wm_maximums
Ville Syrjälä [Wed, 9 Oct 2013 16:18:09 +0000 (19:18 +0300)]
drm/i915: Rename ilk_wm_max to ilk_compute_wm_maximums

Makes the intention more clear.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Adjust watermark register masks
Ville Syrjälä [Wed, 9 Oct 2013 16:18:07 +0000 (19:18 +0300)]
drm/i915: Adjust watermark register masks

We want to be able to use the masks to decode the register contents
regardless of the hardware generation. So just expand the masks to
cover all available bits, even if those are reserved on some
generations.

v2: Don't extend WM1_LP_SR_MASK so far, for the *future*

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Remove a somewhat silly debug print from watermark code
Ville Syrjälä [Wed, 9 Oct 2013 16:18:06 +0000 (19:18 +0300)]
drm/i915: Remove a somewhat silly debug print from watermark code

This debug print just adds overhead to the watermark merging process,
and doesn't really give enough information to be useful. Just kill
and let's add something much better a bit later.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Init HSW watermark tracking in intel_modeset_setup_hw_state()
Ville Syrjälä [Mon, 14 Oct 2013 11:55:24 +0000 (14:55 +0300)]
drm/i915: Init HSW watermark tracking in intel_modeset_setup_hw_state()

Fill out the HSW watermark s/w tracking structures with the current
hardware state in intel_modeset_setup_hw_state(). This allows us to skip
the HW state readback during watermark programming and just use the values
we keep around in dev_priv->wm. Reduces the overhead of the watermark
programming quite a bit.

v2: s/init_wm/wm_get_hw_state
    Remove stale comment about sprites
    Make DDB partitioning readout safer

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[danvet: Fix whitespace fail.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Improve watermark dirtyness checks
Ville Syrjälä [Fri, 11 Oct 2013 16:39:52 +0000 (19:39 +0300)]
drm/i915: Improve watermark dirtyness checks

Currently hsw_write_vm_values() may write to certain watermark
registers needlessly. For instance if only, say, LP3 changes,
the current code will again disable all LP1+ watermarks even
though only LP3 needs to be reconfigured.

Add an easy to read function that will compute the dirtyness of the
watermarks, and use that information to further optimize the watermark
programming.

v2: Disable LP1+ watermarks around changing LP0 watermarks for Paulo

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Store current watermark state in dev_priv->wm
Ville Syrjälä [Wed, 9 Oct 2013 16:18:03 +0000 (19:18 +0300)]
drm/i915: Store current watermark state in dev_priv->wm

To make it easier to check what watermark updates are actually
necessary, keep copies of the relevant bits that match the current
hardware state.

Also add DDB partitioning into hsw_wm_values as that's another piece
of state we want to track.

We don't read out the hardware state on init yet, so we can't really
start using this yet, but it will be used later.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[danvet: Paulo asked for a comment around the memcmp to say that we
depend upon zero-initializing the entire structures due to padding.
But a later patch in this series removes the memcmp again. So this is
ok as-is.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Kill fbc_wm_enabled from intel_wm_config
Ville Syrjälä [Wed, 9 Oct 2013 16:18:02 +0000 (19:18 +0300)]
drm/i915: Kill fbc_wm_enabled from intel_wm_config

The fbc_wm_enabled member in intel_wm_config is useless for the time
being. The original idea for it was that we'd pre-compute it and so
that the WM merging process could know whether it needs to worry
about FBC watermarks at all.

But we don't have a convenient way to pre-check for the possibility
of FBC being used. intel_update_fbc() should be split up for that.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Refactor wm_lp to level calculation
Ville Syrjälä [Wed, 9 Oct 2013 16:18:01 +0000 (19:18 +0300)]
drm/i915: Refactor wm_lp to level calculation

On HSW the LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4. We make the
conversion from LPn to to the level at one point current. Later we're
going to do it in a few places, so move it to a separate function.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Check 5/6 DDB split only when sprites are enabled
Ville Syrjälä [Fri, 11 Oct 2013 12:26:26 +0000 (15:26 +0300)]
drm/i915: Check 5/6 DDB split only when sprites are enabled

Using the 5/6 DDB split make sense only when sprites are enabled.
So check that before we waste any cycles computing the merged
watermarks with the 5/6 DDB split.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: abstract the conversion of device->minor out to a macro
Dave Airlie [Fri, 11 Oct 2013 04:45:30 +0000 (14:45 +1000)]
drm/i915: abstract the conversion of device->minor out to a macro

This will make the next patch to change how this works a lot cleaner.

Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agoMerge branch 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel into...
Dave Airlie [Tue, 15 Oct 2013 08:04:08 +0000 (18:04 +1000)]
Merge branch 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

New feature pile for 3.12! Highlights:
- Stereo/3d support for hdmi from Damien, both the drm core bits and
  the i915 integration.
- Manual boost/deboost logic for gpu turbo (Chris)
- Fixed up clock readout support for vlv (Chris).
- Tons of little fixes and improvements for vlv in general (Chon Minng
  Lee and Jesse Barnes).
- Power well support for the legacy vga plane (Ville).
- DP impromevents from Jani.
- Improvements to the Haswell modeset sequence (Ville+Paulo).
- Haswell DDI improvements, using the VBT for some tuning values and
  to check the configuration (Paulo).
- Tons of other small improvements and fixups.

* 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel: (92 commits)
  drm/i915: Use adjusted_mode in the fastboot hack to disable pfit
  drm/i915: Add a more detailed comment about the set_base() fastboot hack
  drm/i915/vlv: Turn off power gate for BIOS-less system.
  drm/i915/vlv: reset DPIO on load and resume v2
  drm/i915: Simplify PSR debugfs
  drm/i915: Tweak RPS thresholds to more aggressively downclock
  drm/i915: Boost RPS frequency for CPU stalls
  drm/i915: Fix __wait_seqno to use true infinite timeouts
  drm/i915: Add some missing steps to i915_driver_load error path
  drm/i915: Clean up the ring scaling calculations
  drm/i915: Don't populate pipe_src_{w,h} multiple times
  drm/i915: implement the Haswell mode set sequence workaround
  drm/i915: Disable/enable planes as the first/last thing during modeset on HSW
  i915/vlv: untangle integrated clock source handling v4
  drm/i915: fix typo s/PatherPoint/PantherPoint/
  drm/i915: Make intel_resume_power_well() static
  drm/i915: destroy connector sysfs files earlier
  drm/i915/dp: do not write DP_TRAINING_PATTERN_SET all the time
  drm/i915/dp: retry i2c-over-aux seven times on AUX DEFER
  drm/i915/vlv: reduce GT FIFO error info to a debug message
  ...

11 years agodrm/i915: Move some computations out from hsw_compute_wm_parameters()
Ville Syrjälä [Wed, 9 Oct 2013 16:17:59 +0000 (19:17 +0300)]
drm/i915: Move some computations out from hsw_compute_wm_parameters()

Move the watermark max computations into haswell_update_wm(). This
allows keeping the 1/2 vs. 5/6 split code in one place, and avoid having
to pass around so many things. We also save a bit of stack space by only
requiring one copy of struct hsw_wm_maximums.

Also move the intel_wm_config out from hsw_compute_wm_parameters() and
pass it it. We'll have some need for it in haswell_update_wm() later.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>