Jesse Natalie [Thu, 11 Aug 2022 16:38:45 +0000 (09:38 -0700)]
microsoft/compiler: Support up to shader model 6.5
We don't actually use any of the new features, but that's okay, it's
still valid DXIL at the higher shader models.
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18022>
Jesse Natalie [Thu, 11 Aug 2022 16:35:58 +0000 (09:35 -0700)]
microsoft/compiler: Always emit a shader at the max-supported shader model
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18022>
Chia-I Wu [Thu, 25 Aug 2022 16:11:53 +0000 (09:11 -0700)]
turnip: improve tracing of secondary cmd buffers
This visualizes secondary cmd buffers in perfetto. I did not test
dynamic rendering, which appears to call tu_clone_trace_range already.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Tue, 23 Aug 2022 23:37:28 +0000 (16:37 -0700)]
turnip: add cmd_buffer tracepoint
It is only used for primary cmd buffers for the moment.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Tue, 23 Aug 2022 18:04:39 +0000 (11:04 -0700)]
turnip: rename some tracing stages
Rename SURFACE_STAGE_ID to RENDER_PASS_STAGE_ID. Indicate whether gmem
or bypass is used in the stage name.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Tue, 23 Aug 2022 20:09:35 +0000 (13:09 -0700)]
turnip: clean up tu_perfetto.h
Move enums, stages, queues, and some function declarations to
tu_perfetto.cc.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Tue, 23 Aug 2022 19:30:29 +0000 (12:30 -0700)]
turnip: convert tu_perfetto_state to a stack
A stage does not end until its nested stages end. tu_perfetto_state can
be a stack.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Tue, 23 Aug 2022 22:54:42 +0000 (15:54 -0700)]
turnip: add tu_clone_trace_range helper
Remove some duplicated code.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Tue, 23 Aug 2022 17:06:31 +0000 (10:06 -0700)]
util/u_trace: add PERFETTO HeaderScope
Headers with the PERFETTO scope will be included by the generated
perfetto utils header. This is needed because to_prim_type may have
header dependencies.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Tue, 23 Aug 2022 17:23:17 +0000 (10:23 -0700)]
util/u_trace: include the generated header first
This is a good practice to make sure the generated header is
self-contained (no missing includes, declarations, etc.).
Remove unnecessary SOURCE header scope from the default.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Tue, 23 Aug 2022 17:23:20 +0000 (10:23 -0700)]
turnip: tidy up tracepoint header includes
Remove unused util/u_dump.h. Add missing forward declarations.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Wed, 24 Aug 2022 01:18:02 +0000 (18:18 -0700)]
turnip: fix gem_store tracepoint
Set cmd->trace_renderpass_end after tu6_emit_tile_store in case of gmem.
To be able to do that, we push the update of cmd->trace_renderpass_end
down into tu_cmd_render_tiles/tu_cmd_render_sysmem.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Thu, 25 Aug 2022 15:47:50 +0000 (08:47 -0700)]
turnip: move trace_start_gmem_store before cond exec
Suggested by Danylo.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Tue, 23 Aug 2022 21:03:04 +0000 (14:03 -0700)]
turnip: fix a missing trace_end_gmem_clear
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Chia-I Wu [Tue, 23 Aug 2022 01:15:24 +0000 (18:15 -0700)]
turnip: improve perfetto sync_timestamp
tu_device_get_gpu_timestamp takes >100us on my otherwise idle sc7180.
Read the cpu block again after the call returns.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18238>
Yiwei Zhang [Fri, 19 Aug 2022 19:45:05 +0000 (19:45 +0000)]
venus: avoid scrubing wsi/external sempahores
When the renderer supports sync_fd import for the binary semaphore,
venus can import the special signaled payload to the semaphore instead
of scrubing it. This avoids the bugs w.r.t timeline semaphore and device
group submission in the legacy scrub path.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Thu, 18 Aug 2022 21:57:47 +0000 (21:57 +0000)]
venus: re-implement sync_fd external sempahore
sync_wait is deferred to a submission that waits on the semaphore.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Thu, 18 Aug 2022 16:55:06 +0000 (16:55 +0000)]
venus: re-implement sync_fd external fence
Instead of waiting for signal before importing, we are able to retain
the imported sync file and handle the fence related commands on the
driver side.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Sat, 13 Aug 2022 06:55:38 +0000 (06:55 +0000)]
venus: query renderer sync_fd props to fill the feature stubs
This change enables the fixed code paths.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Fri, 12 Aug 2022 22:20:09 +0000 (22:20 +0000)]
venus: fix vn_GetSemaphoreFdKHR
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Fri, 12 Aug 2022 17:09:43 +0000 (17:09 +0000)]
venus: fix vn_GetFenceFdKHR
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Fri, 12 Aug 2022 18:31:13 +0000 (18:31 +0000)]
venus: put android wsi on the sub-optimal path
Simplify Android wsi to only use performant path if fixed sync_fd fence
support is enabled. This removes hacky codes and allows us to deprecate
a special ring wait code path as well.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Fri, 12 Aug 2022 05:55:34 +0000 (05:55 +0000)]
venus: stub out renderer sync_fd fencing features
With syncFdFencing feature, venus starts forwarding renderer sync_fd
fencing support. The driver side now can track the renderer sync_fd
fencing features. This change adds the initial stubs.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Fri, 12 Aug 2022 05:45:44 +0000 (05:45 +0000)]
venus: sync to latest venus protocol headers for syncFdFencing
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Thu, 11 Aug 2022 22:38:20 +0000 (22:38 +0000)]
venus: avoid pre-allocating the feedback pool
Now that we don't create fence upon device creation, let's also defer
the feedback pool grow to the first event or non-external fence
creation. This makes venus device creation lighter and is good for CI.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Thu, 11 Aug 2022 22:33:26 +0000 (22:33 +0000)]
venus: lazily create queue wait fence and make it non-external
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Thu, 11 Aug 2022 22:08:43 +0000 (22:08 +0000)]
venus: use a separate sync fence for Android wsi
Also refactors the codes a bit.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Sat, 6 Aug 2022 05:18:49 +0000 (05:18 +0000)]
venus: avoid feedback for external fence
Sync fd fence export implies a payload reset operation, and application
can immediately do another submission with the same fence after export.
Concurrent use of the same feedback slot is incorrect. Keeping a list of
feedback slots for sync_fd external fence is a bit over designed given
those fences are usually not checked or waited by the app, but will hand
off the ownership via sync fd to an external client.
Fixes:
d7f2e6c8d03 ("venus: add fence feedback")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Thu, 4 Aug 2022 21:15:48 +0000 (21:15 +0000)]
venus: require necessary extensions for common wsi support
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Yiwei Zhang [Mon, 8 Aug 2022 18:19:03 +0000 (18:19 +0000)]
venus: fix external memory ext filtering
Fixes:
390722620e1 ("venus: clean up vn_device_fix_create_info")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
Dawn Han [Mon, 11 Jul 2022 19:25:29 +0000 (19:25 +0000)]
Update venus-protocol to add extension `VK_VALVE_mutable_descriptor_type`
Signed-off-by: Dawn Han <dawnhan@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17975>
José Roberto de Souza [Tue, 23 Aug 2022 17:49:59 +0000 (10:49 -0700)]
anv: Return earlier in anv_gem_get_tiling() when not supported
Tiling set and get UAPIs has the same support level.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18251>
José Roberto de Souza [Tue, 23 Aug 2022 17:36:23 +0000 (10:36 -0700)]
anv: Nuke dead code
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18251>
Jesse Natalie [Tue, 23 Aug 2022 19:14:56 +0000 (12:14 -0700)]
mesa: Expose GL_NV_ES1_1_compatibility
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18217>
Jesse Natalie [Wed, 24 Aug 2022 21:57:25 +0000 (14:57 -0700)]
meson: Add an option to specify the WGL gallium megadriver filename
Specifying the name at build time, as opposed to renaming after
the build, serves two purposes:
1. The link from Mesa's OpenGL32.dll and (and EGL/GLES) to the
megadriver is done by filename. If using these frontends, the
megadriver can't be renamed afterwards. And Windows doesn't
have very good symlink support, so that's not really an option
either.
2. The symbol (PDB) filename is also embedded in the DLL using the
build-time expected filename. Renaming can produce odd artifacts
while debugging.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7115
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18239>
Jesse Natalie [Wed, 24 Aug 2022 21:49:29 +0000 (14:49 -0700)]
gallium/windows: Delete OpenGLOn12.dll target
This is pretty much identical to libgallium_wgl.dll except for the
DLL name.
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18239>
Rhys Perry [Thu, 18 Aug 2022 13:31:06 +0000 (14:31 +0100)]
aco: fix long-jump version of discard early exit
It isn't safe to modify the exec mask before the discard block, and the
definition interferes with GFX11 NOP insertion.
Just use s[0:1] instead, since we won't be using it.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18125>
Karmjit Mahil [Wed, 10 Aug 2022 08:38:32 +0000 (09:38 +0100)]
pvr: Fix calculation in rogue_max_compute_shared_registers().
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18224>
Karmjit Mahil [Wed, 10 Aug 2022 08:36:44 +0000 (09:36 +0100)]
pvr: Compete pvr_calc_fscommon_size_and_tiles_in_flight().
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18224>
Qiang Yu [Tue, 23 Aug 2022 08:14:56 +0000 (16:14 +0800)]
winsys/amdgpu: fix non-page-aligned sparse buffer creation
ARB_sparse_buffer does not require sparse buffer size to be
page aligned. So we need to align it before VM ops as KMD
will check whether it's aligned and return EINVAL if not.
Fixes:
667da4eaed3 ("winsys/amdgpu: sparse buffer creation / destruction / commitment")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7104
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18206>
Eric Engestrom [Mon, 15 Aug 2022 21:37:30 +0000 (22:37 +0100)]
v3d: introduce V3D_DBG() macro to make V3D_DEBUG checks consistent
The main issue was the inconsistent use of `unlikely()`, but the macro
also simplifies the code a little bit.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18086>
Eric Engestrom [Mon, 15 Aug 2022 21:38:26 +0000 (22:38 +0100)]
vc4: introduce VC4_DBG() macro to make VC4_DEBUG checks consistent
The main issue was the inconsistent use of `unlikely()`, but the macro
also simplifies the code a little bit.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18086>
Chad Versace [Tue, 2 Aug 2022 00:46:06 +0000 (17:46 -0700)]
venus: Enable VK_EXT_pipeline_creation_cache_control
The extension disrupts assumptions in venus. It gives
vkCreateFooPipelines an additional success code,
VK_PIPELINE_COMPILE_REQUIRED, which allows some pipelines to succeed
creation and others fail.
Tested with 'dEQP-VK.*cache_control*' at vulkan-cts-1.3.3.1.
pass/fail/skip/warn = 15/0/0/3
Warnings were from long pipeline compiles on a full debug build in host
and guest.
See: https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/890
Signed-off-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17847>
Chad Versace [Fri, 12 Aug 2022 22:57:05 +0000 (15:57 -0700)]
venus: Fix failure path on pipeline creation
It's not sufficient to vk_free() the pipeline. We must also
vn_object_base_fini().
Signed-off-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17847>
Chad Versace [Fri, 12 Aug 2022 21:56:31 +0000 (14:56 -0700)]
venus: Dedupe pipeline handle creation
Refactor the code into new function vn_create_pipeline_handles().
Signed-off-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17847>
Eric Engestrom [Mon, 22 Aug 2022 20:03:15 +0000 (21:03 +0100)]
meson: replace manual compiler flags with meson arguments
These would only have worked in GCC and Clang, which so far wasn't an
issue, but let's clean it up anyway.
Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18190>
Dave Airlie [Wed, 24 Aug 2022 20:03:45 +0000 (06:03 +1000)]
vulkan: update rest of the headers to v1.3.225
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18237>
Alyssa Rosenzweig [Tue, 2 Aug 2022 15:36:41 +0000 (11:36 -0400)]
pan/mdg: Use correct idiv lowering
Rip off the bandaid. We can't tolerate straight-up wrong results. We have an
efficient umul_high implementation so it's not so bad.
total instructions in shared programs: 1537404 -> 1537204 (-0.01%)
instructions in affected programs: 143299 -> 143099 (-0.14%)
helped: 89
HURT: 283
helped stats (abs) min: 1.0 max: 41.0 x̄: 5.87 x̃: 6
helped stats (rel) min: 0.39% max: 6.67% x̄: 1.41% x̃: 1.44%
HURT stats (abs) min: 1.0 max: 7.0 x̄: 1.14 x̃: 1
HURT stats (rel) min: 0.24% max: 5.71% x̄: 0.35% x̃: 0.27%
95% mean confidence interval for instructions value: -0.96 -0.12
95% mean confidence interval for instructions %-change: -0.17% 0.03%
Inconclusive result (%-change mean confidence interval includes 0).
total bundles in shared programs: 647521 -> 648154 (0.10%)
bundles in affected programs: 45833 -> 46466 (1.38%)
helped: 92
HURT: 228
helped stats (abs) min: 1.0 max: 13.0 x̄: 3.10 x̃: 3
helped stats (rel) min: 0.69% max: 7.14% x̄: 2.11% x̃: 1.99%
HURT stats (abs) min: 1.0 max: 7.0 x̄: 4.03 x̃: 5
HURT stats (rel) min: 0.59% max: 7.22% x̄: 2.93% x̃: 3.40%
95% mean confidence interval for bundles value: 1.58 2.38
95% mean confidence interval for bundles %-change: 1.21% 1.76%
Bundles are HURT.
total quadwords in shared programs: 1135141 -> 1138268 (0.28%)
quadwords in affected programs: 101064 -> 104191 (3.09%)
helped: 30
HURT: 342
helped stats (abs) min: 1.0 max: 30.0 x̄: 4.97 x̃: 3
helped stats (rel) min: 0.24% max: 5.99% x̄: 1.72% x̃: 1.06%
HURT stats (abs) min: 1.0 max: 16.0 x̄: 9.58 x̃: 10
HURT stats (rel) min: 0.73% max: 17.14% x̄: 3.64% x̃: 3.80%
95% mean confidence interval for quadwords value: 7.84 8.97
95% mean confidence interval for quadwords %-change: 2.99% 3.43%
Quadwords are HURT.
total registers in shared programs: 91938 -> 92265 (0.36%)
registers in affected programs: 2639 -> 2966 (12.39%)
helped: 0
HURT: 280
HURT stats (abs) min: 1.0 max: 3.0 x̄: 1.17 x̃: 1
HURT stats (rel) min: 9.09% max: 50.00% x̄: 12.75% x̃: 11.11%
95% mean confidence interval for registers value: 1.12 1.22
95% mean confidence interval for registers %-change: 12.05% 13.45%
Registers are HURT.
total threads in shared programs: 55280 -> 55268 (-0.02%)
threads in affected programs: 24 -> 12 (-50.00%)
helped: 0
HURT: 11
HURT stats (abs) min: 1.0 max: 2.0 x̄: 1.09 x̃: 1
HURT stats (rel) min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: -1.29 -0.89
95% mean confidence interval for threads %-change: -50.00% -50.00%
Threads are HURT.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17860>
Alyssa Rosenzweig [Wed, 24 Aug 2022 16:21:37 +0000 (12:21 -0400)]
pan/mdg: Reexpress umul_high packing
There are a bunch of subtle details of how 32-bit sources are
zero-extended to 64-bit, how their swizzles work, how 64-bit
destinations are shrunk to 32-bit, and how those two interact. This
fixes the interactions... mostly.
Fixes umul_high, all such tests should be passing now. Unblocks idiv
lowering that depends on umul_high.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17860>
Alyssa Rosenzweig [Wed, 24 Aug 2022 16:20:04 +0000 (12:20 -0400)]
pan/mdg: Replicate swizzles for scalar sources
This works around issue packing 32-bit scalar swizzles zero-extended to
64-bit, seen with the umul_high implementation. I tried for a while
figuring out the root cause (even rewrote a big chunk of disassembler)
but am still a bit lost. Nevertheless this is a safe workaround with no
performance impact (and avoids relying on NIR undefined behaviour to
implement GPU undefined behaviour), so let's do this for now to fix
umul_high.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17860>
Marek Olšák [Wed, 24 Aug 2022 14:59:31 +0000 (10:59 -0400)]
ci: update pass/fail results for spec@!opengl 1.0@gl-1.0-dlist-bitmap
This is mostly positive.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17780>
Marek Olšák [Mon, 25 Jul 2022 00:36:00 +0000 (20:36 -0400)]
st/mesa: fix potential use-after-free in draw_bitmap_quad
This is super unlikely to be freed before use, but let's fix it anyway.
setup_render_state calls set_sampler_views(take_ownership=true), which
means it takes ownership of the sampler view reference and is free to
unreference it, so we can't use sv after setup_render_state.
Fixes:
feda6e9c5d101 - st/mesa: set take_ownership = true in set_sampler_views
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17780>
Marek Olšák [Mon, 25 Jul 2022 00:47:26 +0000 (20:47 -0400)]
mesa: create glBitmap textures while creating display lists
This makes glCallList just a textured draw, which is blazingly fast.
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17780>
Marek Olšák [Sun, 24 Jul 2022 23:35:28 +0000 (19:35 -0400)]
Revert "mesa: implement a display list / glBitmap texture atlas"
This reverts commit
b26ddda12fe7dbb6a4e6af3b47c1e837cc7ebb03 and
commit
06d3b0a006f35dc232d512d09f45a6cb4f13cfdf.
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17780>
Lionel Landwerlin [Mon, 1 Aug 2022 15:12:45 +0000 (18:12 +0300)]
intel/fs: bump max SIMD size for A64 atomics with LSC
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>.
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
Lionel Landwerlin [Sun, 24 Jul 2022 13:17:17 +0000 (16:17 +0300)]
intel/fs: port block a64/surface messages to use LSC
v2: Fixup block load/store on surfaces/shared-memory (Rohan)
v3: drop write specific size_written case (Rohan)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
Lionel Landwerlin [Mon, 18 Jul 2022 09:27:53 +0000 (12:27 +0300)]
intel/fs: switch register allocation spilling to use LSC on Gfx12.5+
v2: drop the hardcoded inst->mlen=1 (Rohan)
v3: Move back to LOAD/STORE messages (limited to SIMD16 for LSC)
v4: Also use 4 GRFs transpose loads for fills (Curro)
v5: Reduce amount of needed register to build per lane offsets (Curro)
Drop some now useless SIMD32 code
Unify unspill code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
Lionel Landwerlin [Sun, 24 Jul 2022 10:05:57 +0000 (13:05 +0300)]
intel/fs: fixup SEND validation check on overlapping src0/src1
With the following SEND instruction :
send(1) nullUD nullUD g0UD 0x4200c504 a0.1<0>UD
This instruction although valid but somewhat nonsensical (SEND message
to write at offset contained in NULL register), triggers an error in
the validator.
The restriction is that we cannot have overlapping sources. The
validator not checking the type of register incorrectly thinks that
the null register (offset 0) is the same as g0.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
Lionel Landwerlin [Sat, 23 Jul 2022 19:57:12 +0000 (22:57 +0300)]
intel/fs: remove unused opcode
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
Lionel Landwerlin [Fri, 15 Jul 2022 10:08:23 +0000 (13:08 +0300)]
intel/fs: switch compute push constant loads to LSC
We're now able to load up to 8 GRFs in one send.
v2: Switch to use transpose + vector of up to 64 (Thanks Curro!)
v3: Increase parallelism by not reusing the same register for push
constant offset (Curro)
v4: Drop dead ADD() instruction (Curro)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
Mike Blumenkrantz [Wed, 24 Aug 2022 12:53:31 +0000 (08:53 -0400)]
tu: fix invalid free on alloc failure
this is not an allocated pointer
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18230>
Georg Lehmann [Mon, 22 Aug 2022 14:45:00 +0000 (16:45 +0200)]
radv: Fold 16bit image sources.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18106>
Georg Lehmann [Thu, 11 Aug 2022 12:12:33 +0000 (14:12 +0200)]
aco: Combine 16bit undef and constants instead of using s_pack.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18106>
Georg Lehmann [Thu, 11 Aug 2022 10:11:25 +0000 (12:11 +0200)]
aco: Implement storage image A16.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18106>
Georg Lehmann [Thu, 11 Aug 2022 10:11:04 +0000 (12:11 +0200)]
nir/fold_16bit_tex_image: Add an option to fold image sources.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18106>
Gert Wollny [Wed, 24 Aug 2022 07:09:10 +0000 (09:09 +0200)]
nir_lower_atomics_to_ssbo: Initialize deref struct
This fixes the use of an uninitialzed value:
Conditional jump or move depends on uninitialised value(s)
bcmp (vg_replace_strmem.c:1203)
_mesa_add_sized_state_reference (prog_parameter.c:434)
st_nir_assign_uniform_locations(gl_context*, gl_program*, nir_shader*) (st_glsl_to_nir.cpp:209)
st_finalize_nir (st_glsl_to_nir.cpp:1041)
by 0x58271B9: st_glsl_to_nir_post_opts(st_context*, gl_program*, gl_shader_program*) (st_glsl_to_nir.cpp:571)
...
Uninitialised value was created by a heap allocation
malloc (vg_replace_malloc.c:381)
ralloc_size (ralloc.c:114)
ralloc_array_size (ralloc.c:218)
deref_offset_var (nir_lower_atomics_to_ssbo.c:47)
lower_instr (nir_lower_atomics_to_ssbo.c:111)
nir_lower_atomics_to_ssbo (nir_lower_atomics_to_ssbo.c:204)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18227>
Georg Lehmann [Mon, 22 Aug 2022 14:32:36 +0000 (16:32 +0200)]
nir: Add nir_ssa_scalar_is_undef.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18183>
David Heidelberg [Wed, 24 Aug 2022 12:49:57 +0000 (14:49 +0200)]
ci: fix leftover tag in image-tags.yml
Fixes:
eb6ce47d4f75 ("ci: Use mold for x86-64 and AArch64 builds")
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18228>
Konstantin Seurer [Sun, 21 Aug 2022 11:54:14 +0000 (13:54 +0200)]
radv: Advertise subgroup ops for rt stages
Closes: #7098
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18169>
Mike Blumenkrantz [Thu, 18 Aug 2022 16:59:46 +0000 (12:59 -0400)]
zink: support PIPE_CAP_FBFETCH_COHERENT
that's what VK_EXT_rasterization_order_attachment_access is for
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18133>
Mike Blumenkrantz [Thu, 18 Aug 2022 16:59:33 +0000 (12:59 -0400)]
vulkan: Update the XML and headers to 1.3.225
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18133>
Samuel Pitoiset [Mon, 22 Aug 2022 13:37:11 +0000 (15:37 +0200)]
radv: merge gather_tess_info() with radv_fill_shader_info()
Shouldn't introduce any functional changes. The dependencies between
stages might be improved with a new helper that will link shader_info.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18184>
Samuel Pitoiset [Mon, 22 Aug 2022 13:22:30 +0000 (15:22 +0200)]
radv: remove unused num_tess_patches assignment for VS
This is never used.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18184>
Samuel Pitoiset [Mon, 22 Aug 2022 13:12:49 +0000 (15:12 +0200)]
radv: remove unused tcs_vertices_out assignment for VS
This is never used.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18184>
Samuel Pitoiset [Mon, 22 Aug 2022 13:00:50 +0000 (15:00 +0200)]
radv: remove redundant assignment of tcs.tcs_vertices_out
It's already assigned from radv_nir_shader_info_pass() and it's only
used to configure the VGT_TF_PARAM register. Otherwise, we read it
from NIR shader info during compilation.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18184>
Lucas Stach [Sun, 14 Aug 2022 13:17:16 +0000 (15:17 +0200)]
etnaviv: mark instanced draw extensions as supported in docs/features.txt
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18046>
Lucas Stach [Thu, 11 Aug 2022 13:21:03 +0000 (15:21 +0200)]
etnaviv: expose ARB_draw_instanced
Just set the pipe cap correctly. The InstanceID support is already
hooked up in the NIR compiler. All enabled piglit tests pass.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18046>
Vinson Lee [Sat, 20 Aug 2022 22:34:57 +0000 (15:34 -0700)]
zink: Remove duplicate variable zero.
Fix defect reported by Coverity Scan.
Evaluation order violation (EVALUATION_ORDER)
write_write_typo: In zero = zero = nir_imm_zero(b, nir_dest_num_components(intr->dest), nir_dest_bit_size(intr->dest)),
zero is written twice with the same value.
Fixes:
0f97e317e33 ("zink: rewrite all undefined shader reads as 0001 instead of undef")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18164>
Timothy Arceri [Mon, 22 Aug 2022 01:10:19 +0000 (11:10 +1000)]
glsl: fix location for array subscript
xfb_decl_assign_location() assumes that arrays are going to be packed.
But some conditions might prevent packing (e.g: explicit location or
smooth interpolation mode).
Instead of assuming that packing will happen, this commit adds a check to
determine if it'll happen and use the result to compute the proper location.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2214
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18175>
Timothy Arceri [Mon, 22 Aug 2022 01:08:32 +0000 (11:08 +1000)]
glsl: make packed varying helper needs_lowering() external
We will use this helper to correctly calculate xfb offsets in the
following patch.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18175>
Qiang Yu [Sun, 21 Aug 2022 07:25:50 +0000 (15:25 +0800)]
radeonsi: fix tcs_out_lds_offsets arg alignment
tcs_out_lds_offsets is not sure to be 16 byte aligned, it's
calculated like this:
num_patches * patch_vertices * lshs_vertex_stride
num_patches and patch_vertices are not sure to be any value aligned,
lshs_vertex_stride is added one extra dword, so it's only 4 byte
aligned.
This may cause problem even before we switch to nir tess output
lower when write tess factor before read tail of input. But it's
more likely to cause problem after we switch to nir tess output
lower because the main body won't eliminate the low 4bit offset
but epilog will, so they use different offset to read/write tess
factor.
Fixes:
7598bfd768f ("radeonsi: replace llvm tcs output with nir lower pass")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7083
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18174>
Caio Oliveira [Tue, 23 Aug 2022 05:50:23 +0000 (22:50 -0700)]
intel/compiler: Use fs_reg helpers for GS icp_handle selection
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18221>
Caio Oliveira [Sat, 20 Aug 2022 00:07:44 +0000 (17:07 -0700)]
intel/compiler: Use fs_reg helpers for TCS icp_handle selection
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18221>
Caio Oliveira [Tue, 16 Aug 2022 18:02:20 +0000 (11:02 -0700)]
intel/compiler: Rename 8_PATCH to MULTI_PATCH
Make it clearer we are dealing with multiple patches,
works better in constrast with SINGLE_PATCH.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18151>
Caio Oliveira [Fri, 19 Aug 2022 18:40:13 +0000 (11:40 -0700)]
intel/compiler: Remove INTEL_DEBUG=tcs8
For Gen11 and prior, the dispatch mode for TCS was SINGLE_PATCH, and
this debug setting could be used to change it to 8_PATCH (falling back
to SINGLE_PATCH when shader couldn't be in the multi dispatch mode).
However after talking to Ken, seems this debug setting is not really
worth keeping around, so removing it.
For Gen12+ the only option is 8_PATCH, so it was always using that
dispatch mode as before.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18151>
Bas Nieuwenhuizen [Fri, 19 Aug 2022 12:17:28 +0000 (14:17 +0200)]
vulkan/wsi: Take max extent into consideration for modifier selection.
For AMD we kinda have some modifiers with a max size ... (Which is
really a compositor/kms issue, but getting them to try kinda falls
into the unsolved "how to allocate/what pitch to use" bucket, so
we solve it on the allocating side)
Cc: mesa-stable
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18139>
Daniel Stone [Wed, 27 Jul 2022 15:38:09 +0000 (16:38 +0100)]
ci: Use mold for x86-64 and AArch64 builds
mold is a fancy new linker that's really fast.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6877
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17992>
Jordan Justen [Thu, 11 Aug 2022 08:47:09 +0000 (01:47 -0700)]
iris: Drop extra file-descriptor dup in iris_drm_screen_create()
In
a99e85db9eb, we added a dup into iris_screen_create(). Apparently
some android code paths must be hitting iris_screen_create() without
calling iris_drm_screen_create(). After
a99e85db9eb, the code paths
that do hit iris_drm_screen_create() will now dup the fd twice, but
iris_screen_destroy() will only close 1 of these fds.
Fixes:
a99e85db9eb ("iris:Duplicate DRM fd internally instead of reuse.")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18020>
Lionel Landwerlin [Wed, 8 Jun 2022 08:04:31 +0000 (11:04 +0300)]
intel/fs: fixup scratch load/store handling on Gfx12.5+
We did not handle the operation with data size < 4. It works fine on
all other messages (global/shared). The initial commit was just too
restrictive.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
1e242785c315 ("intel/fs: Implement load/store_scratch on XeHP")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16964>
Lionel Landwerlin [Thu, 7 Jul 2022 06:35:38 +0000 (09:35 +0300)]
intel/fs: fix load_scratch intrinsic
The selection of the internal opcode to deal with load_scratch is
incorrect.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
c6439792287f ("intel/fs: Choose memory message type based on bit size")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16964>
Caio Oliveira [Fri, 19 Aug 2022 23:53:48 +0000 (16:53 -0700)]
intel/compiler: Make component() work for FIXED_GRF/ARF
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18157>
Francisco Jerez [Mon, 8 Aug 2022 21:04:06 +0000 (14:04 -0700)]
intel/fs: Fix horiz_offset() to handle FIXED_GRFs with non-trivial 2D regions.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18157>
Karol Herbst [Mon, 22 Aug 2022 13:05:22 +0000 (15:05 +0200)]
ci: update CI to reflect clovers LLVM version bump
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16047>
Kai Wasserbäch [Tue, 19 Apr 2022 18:41:29 +0000 (20:41 +0200)]
chore(deps): clover: raise the minimum LLVM version to 11.0.0
LLVM 11 was released in October 2020. If you want to build against
Mesa's Git version, that seems like enough time to upgrade to at least
LLVM 11 (Debian stable has this too).
It reduces the amount of #if gates we need and more will be incoming
again, given the Opaque Pointer transition.
Additionally radeonsi is already requiring LLVM 11. Therefore the
minimum will have been LLVM 11 for many builds anyway.
Note that clc is kept to LLVM 10 for the time being.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16047>
John Brooks [Tue, 9 Aug 2022 21:15:33 +0000 (17:15 -0400)]
radv: Fix mipmap views on GFX10+
As explained in the previous commit, GFX9+ has issues with addressing
mipmaps in block-compressed images. In the case of copy commands, we fix
this by doing an extra copy for the missing blocks.
For GFX10, the mipmap layout in memory allows us to do better than that. We
can change the base level of the descriptor to one level bigger than the
requested level and adjust the extent and address to match. This is done by
ComputeNonBlockCompressedView in addrlib. Thus on GFX10 we can skip the
fixup copy workaround, and this will also fix cases outside of explicit
copy commands.
Signed-off-by: John Brooks <john@fastquake.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17970>
John Brooks [Mon, 8 Aug 2022 21:35:56 +0000 (17:35 -0400)]
radv: Fix corrupted mipmap copies on GFX9+
GFX9+ hardware has an issue where mipmap degradations are calculated
incorrectly due to using divide-by-two integer math and certain mipmap
sizes lose blocks.
This issue has been documented before, and we ported a workaround from
AMDVLK to increase the extent that is programmed into the descriptor, so
that the hardware arrives at the correct result. However, this is
insufficient as we cannot safely increase the extent beyond the physical
extent of the image in memory. If we can't increase it enough, the image
will still be missing blocks.
But there is still hope. In cases where RADV is responsible for copying to
or from an image (such as vkCmdCopyBufferToImage/vkCmdCopyImageToBuffer),
we can perform a second copy of the blocks that the hardware excluded so
that the resulting image is complete. This is another workaround from
AMDVLK.
This fixes corrupted textures in Halo: The Master Chief Collection.
v2: Add RADV_CMD_FLAG_INV_L2 | RADV_CMD_FLAG_INV_VCACHE to flush_bits
just in case (Samuel Pitoiset)
Closes: #3347
Signed-off-by: John Brooks <john@fastquake.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17970>
John Brooks [Sat, 13 Aug 2022 15:21:41 +0000 (11:21 -0400)]
radv: Only apply mipmap view adjustments to block compressed images
This workaround need not apply to subsampled formats.
Signed-off-by: John Brooks <john@fastquake.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17970>
John Brooks [Mon, 15 Aug 2022 14:59:17 +0000 (10:59 -0400)]
vulkan: Introduce vk_format_is_block_compressed function
Signed-off-by: John Brooks <john@fastquake.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17970>
John Brooks [Wed, 17 Aug 2022 01:15:21 +0000 (21:15 -0400)]
radv: Add get_addrlib function to radv_radeon_winsys
Signed-off-by: John Brooks <john@fastquake.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17970>
Eric Engestrom [Mon, 22 Aug 2022 20:31:52 +0000 (21:31 +0100)]
anv: convert assert into unreachable to avoid fallthrough error
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18192>