radv/shader_info: add RT stages to radv_get_user_data_0()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: extend radv_pipeline_group_handle with shader VAs

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv/rt: adjust shared_size when lowering hit_attribs

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

aco: implement select_program_rt()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

aco: implement nir_intrinsic_load_resume_shader_address_amd

Similar to p_constaddr but targeting BBs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

nir: add nir_intrinsic_resume_shader_address_amd

This intrinsic returns a pointer to the end of the shader
and is intended for stitched binaries.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

nir,amd: add nir_intrinsic_store_[scalar|vector]_arg_amd to overwrite inputs

This intrinsic must only be used at top-level CF in order
to not break SSA properties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

radv: add remaining RT shader args for separate compilation

Also wrap RT args into struct {} rt for improved consistency
and remove some 'ray_' prefixes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>

intel/genxml: Drop Tiled Resource Mode fields

Neither RENDER_SURFACE_STATE nor VDENC_SURFACE_CONTROL_BITS have a
Tiled Resource Mode field anymore.  The RENDER_SURFACE_STATE field
was also overlapping with the L1 Cache Control settings field.

This also drops the assignment of that field in isl, because we were
just explicitly setting it to NONE (0) which is already the default
value genxml packing will give us.  That saves us some ifdefs.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23449>

iris: Assert against FCV_CCS_E for blitter writes

The FCV feature is documented to occur on regular render writes. Blitter
writes don't fall under that category. So, if the destination resource
of a blitter write had the FCV aux usage, we would have a good reason to
change the aux usage of the access to plain CCS_E.

We don't actually need to write code to handle this. iris doesn't use
any compression on blitter writes. Make that obvious with an assert.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>

iris: Avoid FCV_CCS_E for shader image accesses

The FCV feature is documented to occur on regular render writes. Images
are written to with the DC data port however.

By using plain CCS_E for image writes, we can avoid the COMPRESSED_CLEAR
aux state in more cases. Doing this can avoid full resolves or partial
resolves for future accesses.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>

iris: Avoid extra CCS_E flushes for aux mode changes

We're going to start toggling between FCV_CCS_E and CCS_E. When
switching aux modes, flush_previous_aux_mode would typically perform
cache flushes for good reason. In the case of switching between CCS_E
with FCV on vs off, we haven't found aux mode flushing to matter. Treat
both CCS_E variants as equivalent to avoid extra cache flushing.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>

intel: Rename the GFX12_CCS_E aux-usage to FCV_CCS_E

Rename the isl_aux_usage enum to clarify that it is optional on gfx125.

The new name comes from the Alchemist docs, where the feature is
referred to as "Fast Clear Optimization (FCV)".

The rename was done with this command:

   git grep -l "GFX12_CCS_E" | xargs sed -ie "s/GFX12_CCS_E/FCV_CCS_E/g"

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>

iris: Drop a GFX12_CCS_E check in can_fast_clear_color

The 8 bpp restriction isn't specific to the automatic fast clear
behavior of GFX12_CCS_E. It is applicable to both GFX12_CCS_E and CCS_E.
Drop the aux usage check completely.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23220>

compiler/types: Make key in subroutine_name more effective

Use the string itself as a key for searching -- and the internal
allocated name as a key when storing.

Because record_key_hash doesn't consider the name field, which is
the only used field for a SUBROUTINE type, the hash key was always
the same for all types.  Using the name fixes this.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23277>

anv: convert Wa_14010455700 to use workaround mechanism

The original lineage for 14010455700 is 1808121037.  Use this defect
number to apply the workaround to relevant platforms with the new
workaround mechanism.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23380>

iris: convert Wa_14010455700 to use workaround mechanism

The original lineage for 14010455700 is 1808121037.  Use this defect
number to apply the workaround to relevant platforms with the new
workaround mechanism.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23380>

Update OpenGL headers

Token from commit 91cdaf381d77b6e700654ecd78cb88a95c1fde1a of
OpenGL-Registry.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23144>

amd: drop support for LLVM 14

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>

amd: drop support for LLVM 13

We can remove the LLVM 13 Wave32 discard workaround and
SI_PROFILE_IGNORE_LLVM13_DISCARD_BUG that disabled the workaround.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>

amd: drop support for LLVM 12

The demote emulation can be removed, and FS_CORRECT_DERIVS_AFTER_KILL
can be removed because it's always enabled on LLVM >= 13.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>

amd: drop support for LLVM 11

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23471>

ac/gpu_info: rearrange if checks for dcc config

rearrange the if checks so that there is less if checks
for newer gpus.

v2: fix block comment coding guideline (Marek Olšák)
    simplify gfx9 if condition (Marek Olšák)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>

ac/gpu_info: num_cu = 4 and gfx11 enable dcc with retile

With num_cu = 4 in gfx11 measured power for idle, video playback and observed
power savings, hence enable dcc with retile for gfx11 with num_cu >= 4.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>

etnaviv: nir: do not call nir_lower_idiv(..) unconditionally

GPUs without native integers lower idiv in lower_int_to_float and
there is no need to call nir_lower_idiv(..) for such GPUs.

Fixes nir crashes I am seeing with gc2000_gles2 CI job.

Fixes: f532202f2d5 ("etnaviv: use nir_lower_idiv(..) before opt loop")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23450>

v3d,v3dv: fix viewport offset for negative viewport center

If the viewport center is not positive we can't express it
through the fine coordinates, which are unsigned, and we
need to use the coarse coordinates too.

Fixes new crashes in Vulkan CTS 1.3.6.0:
dEQP-VK.draw.renderpass.offscreen_viewport.*negative*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>

broadcom/cle: fix up viewport offset packet definition for V3D 4.1+

These are split between fine and coarse coordinates. We have only been
using fine until now, so we kept the same naming convention we had
prior to V3D 4.1 for simplicity, but we will start using the coarse
coordinates soon too.

Also, the signedness was reversed: coarse coordinates are signed and
fine coordinates are unsigned.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>

v3dv: simplify scissor setup for negative viewport height

KHR_maintenance1 allows clients to specify a negative
height, but not a negative width, so assert on that and
simplify the computations for the horizontal dimension.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>

v3dv: remove bogus viewport code

This is incorrectly undoing the code right above it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23489>

zink: add a ci flake

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>

zink: enable EXT_shader_object globally with have_EXT_attachment_feedback_loop_dynamic_state

this leaves fbfetch as the lone case where it can't yet be used

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>

zink: use dynamic state for feedback loops when available

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>

zink: hook up VK_EXT_attachment_feedback_loop_dynamic_state

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23092>

pvr: Fix PDS temps allocation on fragment stage

Previously the USC temps count was incorrectly being used for the
PDS temps count.

It was causing:
  csbgen/pvr_packet_helpers.h:79:
    __pvr_uint: Assertion `v <= max' failed.

This fixes the assert being hit on:
  dEQP-VK.ubo.random.basic_arrays.2
  dEQP-VK.ubo.random.all_shared_buffer.3
  dEQP-VK.ubo.random.all_shared_buffer.48
  dEQP-VK.ubo.random.all_out_of_order_offsets.3

This does not fully fix the tests though.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23356>

pvr: Rename temps_count to pds_temps_count

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23356>

pvr: Fix draw indirect page faults due to missing index list buffer

Fixes:
  dEQP-VK.draw.renderpass.basic_draw.draw_indirect.*
  dEQP-VK.draw.renderpass.basic_draw.draw_indexed_indirect.*

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23491>

treewide: use uint64_t / (u)intptr_t in image address calculations

16K * 16K * 16bpp = 4G, which overflows int32, so layer_stride needs to
have 64 bits. More generally, any "byte_stride * height" computation
can overflow int32.

Use (u)intptr_t in some gallium and st/mesa places where we do CPU access.
Use uint64_t otherwise.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23389>

pvr: add block compressed formats blit support

Surface dimensions and rectangle mappings need to be adjusted for
block compressed formats.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23466>

mailmap: Add Lucas Fryzek to mailmap

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23499>

ci: uprev virglrenderer and crosvm

Update to their latest version on time

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23427>

ci: Bump base tag to rebuild piglit

This has been forgotten in latest piglit uprev

Fixes: d75973a1422d86799312d7aa60d0dce846fb3dba
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23427>

radv: advertise VK_KHR_fragment_shader_barycentric on GFX10.3+

It can't be supported on older hardware because it's impossible to
determine the provoking vertex ID without LOAD_PROVOKING_VTX which is
GFX10.3+ only.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6557
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: gather info about nir_intrinsic_load_sample_positions_amd

nir_intrinsic_load_barycentric_coord_at_sample is lowered before the
radv_shader_info pass and load_sample_positions_amd might be needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: add a NIR pass that lower fragment shader barycentric intrinsics

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: configure RSRC1.LOAD_PROVOKING_VTX for the fragment shader

This enables provoking vertex info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: set ROTATE_PC_PTR for custom interpolations

This seems needed for computing stable barycentric coordinates.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: handle per_vertex variables when gathering FS inputs

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: add support for nir_intrinsic_load_rasterization_primitive_amd

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

nir: add nir_intrinsic_load_rasterization_primitive_amd

For VK_KHR_fragment_shader_barycentric, AMD needs to know the primitive
topology in the fragment shader but with fast-link GPL this is unknown
at compile time and it needs to be passed dynamically.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: track if the rasterization primitive is known at compile time

For fast-linking with GPL, we might not know the pre-rasterization
stages at compile time (when only the FS is compiled) and we will need
to load the rasterization primitive through an user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

radv: add support for nir_intrinsic_load_provoking_vtx_amd

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

nir: add nir_intrinsic_load_provoking_vtx_amd

Will be used to load provoking vertex info from the hardware to
determine the provoking vertex ID.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>

.mailmap: add an alias for Clayton Craft

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Clayton Craft <clayton@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15260>

.mailmap: add an alias for Miguel Casas-Sanchez

Signed-off-by: Andres Gomez <agomez@igalia.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15260>

pvr: Don't overwrite PDS vertex input flags

Fixes:
  dEQP-VK.draw.renderpass.simple_draw.simple_draw_triangle_list
  dEQP-VK.draw.renderpass.simple_draw.simple_draw_triangle_strip
  dEQP-VK.draw.renderpass.indexed_draw.draw_indexed_triangle_list
  dEQP-VK.draw.renderpass.indexed_draw.draw_indexed_triangle_strip

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23458>

pvr: Allow S8_UINT to be used as a stencil attachment format

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23431>

pvr: Refactor pvr_unwind_rects()

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23430>

pvr: Correct calculations in pvr_unwind_rects()

Fixes: 6d3d1f884ceadf62e332e797e994b810a0e010b0
       pvr: Fix rect splitting logic in pvr_unwind_rects()

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reported-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23430>

aco: remove memory_barrier_buffer implementation

This is no longer used.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21624>

ac/nir: use scoped barriers to finish stores before exports

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21624>

aco: consider position/primitive exports around memory barriers

This is needed to create barriers which ensure stores finish before
position/primitive exports.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21624>

aco: use v_fma_mix for f2f32 and f2f16 on gfx11 if wave64

v_fma_mix can be dual issued, trade some code size for throughput.

Foz-DB GFX1100:
Totals from 8204 (6.08% of 134864) affected shaders:
CodeSize: 89608584 -> 89693968 (+0.10%)
Latency: 160744811 -> 160699309 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 19737977 -> 19678308 (-0.30%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>

aco: use v_add_f{16,32} with clamp for fsat

v_add can be dual issued on gfx11, v_med3 cannot.
Don't use v_add directly to still optimize omod(fsat(x)).

Foz-DB GFX1100:
Totals from 32702 (24.24% of 134913) affected shaders:
Latency: 475008203 -> 474928037 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 59226198 -> 59140787 (-0.14%); split: -0.14%, +0.00%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>

aco/statistics: improve v_fma_mix dual issuing detection

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>

aco/ir: return true in hasRegClass for Operand(reg, rc)

Makes isOfType() usable after lower_to_hw_instr.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21402>

vulkan/wsi: Remove duplicate NULL check

Fix defect reported by Coverity Scan.

Logically dead code (DEADCODE)
dead_error_line: Execution cannot reach this statement: return NULL;.

Fixes: eadc64ab248 ("vulkan/wsi/display: do not dereference a NULL pointer")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23415>

tu: Fix missing unlock

Fix defect reported by Coverity Scan.

Missing unlock (LOCK)
missing_unlock: Returning without unlocking dev->vma_mutex.

Fixes: c20139c2922 ("tu: Enable bufferDeviceAddressCaptureReplay")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23490>

etnaviv: move printing of final shader out of etna_link_shaders(..)

Printing the final shaders in etna_link_shaders(..) can be quite noisy and
does not work when using shader-db. Lets make it possible to stare at the
generaded shader code when using shader-db by moving the etna_dump_shader(..)
call into create_variant(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23396>

etnaviv: correct number of instructions in dump_shader_info(..)

code_size is overall size in uint32 words of the whole shader. As
Vivante GPUs have a fixed size ISA we simply need to divide code_size
by 4 to get the number if ISA instructions.

shader-db shows the correct numbers now.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23396>

nv50/ir: convert to scoped_barrier

Contrary to how we implemented barriers the MEMBAR instruction actually
does not allow us to specify which memory to synchronize. We can only
specify the scope.

No regressions on TU102.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: M Henning <drawoc@darkrefraction.com>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23208>

v3d: handle samplerExternalOES

Add handling for GLSL_SAMPLER_DIM_EXTERNAL.

Fixes `spec@oes_egl_image_external_essl3@oes_egl_image_external_essl3`.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23469>

vulkan: move nir_convert_ycbcr into vulkan runtime

This only used by vulkan drivers and depends on vulkan util, so do the move to decouple
nir from vulkan utils

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23444>

zink: also disable bg compile for compute with nobgc

forgot this one in the original MR

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22933>

ci/etnaviv: Update some xfails common between the last 3 nightly runs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23446>

ci/crocus: Update trace hash for the neverball regression.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23446>

lavapipe: fix memory budget reporting

I put this on the wrong struct

Fixes: 1c42056ee12 ("lavapipe: EXT_memory_budget")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23395>

lavapipe: don't remove queue family barriers.

This fixes the remaining barrier issues.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23453>

llvmpipe: emit fences for barrier.

I tried emitting less here but I'm just gonna hit it with the big
seq_cst hammer.

Fixes:
dEQP-VK.memory_model.message_passing.*

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23453>

docs: update venus VK_EXT_device_memory_report support

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23411>

venus: enable VK_EXT_device_memory_report

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23411>

venus: emit device memory report for device memory events

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23411>

venus: handle device memory report requests

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23411>

venus: refactor vn_device_memory to track VkMemoryType

The VkMemoryType::heapIndex will be used by device memory report.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23411>

freedreno/a6xx: Use idalloc for samp/view seqno's

Samplers and views can be re-created dynamically or long-lasting,
resulting in the possibility of a tex cache collision.  So instead
of a simple counter, use idalloc.

Fixes: a3c73987ab92 ("freedreno/a6xx: Move rsc seqno out of tex cache key")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9111
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23470>

freedreno/a6xx: Directly invalidate on samp view update

Instead of incrementing the seqno, just directly invalidate any existing
tex cache entries when we update a sampler view.

No reason not to just directly clear stale entries, and avoiding to re-
assign the seqno will simplify the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23470>

freedreno/batch: Add driver-thread assert

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23470>

freedreno: Add extra assert

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23470>

asahi: Remove stale comments

Trivial.

It is now later and I have confirmed with Piglit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

asahi: Do not leak meta shader NIR

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

asahi: Fix memory leak in agx_nir_lower_sysvals()

We need to free the dynarray.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

asahi: Use os_dupfd_cloexec() instead of dup()

This fixes file descriptor leaks in konsole/etc.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

asahi: Decompress with format reinterpretation

The internal layout used with compression partially depends on the pixel format.
Some limited reinterpretation is definitely allowed (linear vs sRGB views of the
same physical format are documented by Apple as allowed). Some reinterpretations
are definitely forbidden (R8G8B8A8 vs R32, I think). At some point we'll need to
work out the exact rule. I suspect the answer is that "you can reinterpret iff
the Channels field matches". Meaning that R8G8B8A8_UNORM and B8G8R8A8_SINT would
be compatible, but not R16G16_UNORM. But I haven't tested that.

Fixes all fails in:

   dEQP-GLES31.functional.image_load_store.*.format_reinterpret.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

asahi: Decompress writable images

We can't write to compressed images. Decompress on the fly if needed. mesa/st
doesn't bother to do this for us.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

asahi: Extract transition_resource helper

We'll reuse this logic for images. Extract it out and generalize it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

asahi: Add ASAHI_MESA_DEBUG=nowc flag

Add a debug flag to disable write-combining as a performance hack. This may help
diagnose slowness with glReadPixels() heavy workloads like screen capture.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

agx: Stop bit-inexact conversion propagation

Despite being mathematically equivalent, the following code sequences are not
bit-identical under IEEE 754 rules due to differing internal precision:

   fadd16 r0l, r2, 0.0              z = f2f16 x
   fadd16 r1h, r0l, r0h             w = fadd z, y

versus

   fadd32 r1h, r2, r0h              f2f16(w) = fadd x, f2f32(y)

This is probably fine under GL's relaxed floating point precision rules, but
it's definitely not ok with the more strict OpenCL or Vulkan. It also is a
potential problem with GL invariance rules, if we get different results for the
same shader depending whether we did a monolithic compile or a fast link. The
place for doing inexact transformations is NIR, when we have the information
available to do so correctly. By the time we get to the backend, everything we
do needs to be bit-exact to preserve sanity.

Fixes dEQP-GLES2.functional.shaders.algorithm.rgb_to_hsl_vertex. We believe that
this is a CTS bug, but it's a useful one since it uncovered a serious driver bug
that would bite us in the much less friendly Vulkan (or god forbid OpenCL) CTS
later. It also seems like a magnet for GL app bugs, the fp16 support we do now
is uncovering bad enough bugs as it is.

shader-db results are pretty abysmal, though :|

total instructions in shared programs: 1537964 -> 1571328 (2.17%)
instructions in affected programs: 670231 -> 703595 (4.98%)

total bytes in shared programs: 10533984 -> 10732316 (1.88%)
bytes in affected programs: 4662414 -> 4860746 (4.25%)

total halfregs in shared programs: 483448 -> 474541 (-1.84%)
halfregs in affected programs: 58867 -> 49960 (-15.13%)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

asahi: Advertise GL 3.1

We now have support for baseline MSAA, except for support for eMRT. But hey,
this gets us 99% of the way there, so it's worth flipping on at least in
agx/next.

We can also advertise dual-source blending again. It was reverted since Chromium
freaks out with dual-source blending on a GL 2.1 driver, but since we're
advertising GL 3.1 now, it's ok.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

agx: Emit shader info late

So we can take into account program transformations for the final info. This
reports more accurate metadata.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

asahi: Use nonempty tib for MSAA

Affects
dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_depth_2d. This
needs tests, but whatever, 70% of the YouTube chat said to land the hack.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
HackHackHacked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: YouTube Viewers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>

asahi: Lower MSAA

Use the shiny new passes to lower fragment shaders. Monolithic only right now.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>