platform/kernel/u-boot.git
9 years agox86: galileo: Convert to use CONFIG_DM_USB
Bin Meng [Thu, 3 Sep 2015 12:37:28 +0000 (05:37 -0700)]
x86: galileo: Convert to use CONFIG_DM_USB

Move to driver model for USB on Intel Galileo.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: quark: Add USB PHY initialization support
Bin Meng [Thu, 3 Sep 2015 12:37:27 +0000 (05:37 -0700)]
x86: quark: Add USB PHY initialization support

USB PHY needs to be properly initialized per Quark firmware writer
guide, otherwise the EHCI controller on Quark SoC won't work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Convert to use driver model pci on quark/galileo
Bin Meng [Thu, 3 Sep 2015 12:37:26 +0000 (05:37 -0700)]
x86: Convert to use driver model pci on quark/galileo

Move to driver model pci for Intel quark/galileo.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Enable PCIe controller on quark/galileo
Bin Meng [Thu, 3 Sep 2015 12:37:25 +0000 (05:37 -0700)]
x86: Enable PCIe controller on quark/galileo

Quark SoC holds the PCIe controller in reset following a power on.
U-Boot needs to release the PCIe controller from reset. The PCIe
controller (D23:F0/F1) will not be visible in PCI configuration
space and any access to its PCI configuration registers will cause
system hang while it is held in reset.

Enable PCIe controller per Quark firmware writer guide.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: quark: Avoid chicken and egg problem
Bin Meng [Thu, 3 Sep 2015 12:37:24 +0000 (05:37 -0700)]
x86: quark: Avoid chicken and egg problem

If we convert to use driver model pci on quark, we will encounter
some chicken and egg problems like below:

- To enable PCIe root ports, we need program some registers on the
  message bus via pci bus. With driver model, the first time to
  access pci bus, the pci enumeration process will be triggered.
  But without first enabling PCIe root ports, pci enumeration
  just hangs when scanning PCIe root ports.
- Similar situation happens when trying to access GPIO from the
  PCIe enabling codes, as GPIO requires its block base address
  to be assigned via a pci configuration register in the bridge.

To avoid such dilemma, replace all pci calls in the quark codes
to use the local version which does not go through driver model.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: quark: Optimize MRC execution time
Bin Meng [Thu, 3 Sep 2015 12:37:23 +0000 (05:37 -0700)]
x86: quark: Optimize MRC execution time

Intel Quark SoC has a low end x86 processor with only 400MHz
frequency. Currently it takes about 15 seconds for U-Boot to
boot to shell and the most time consuming part is with MRC,
which is about 12 seconds. MRC programs lots of registers on
the SoC internal message bus indirectly accessed via pci bus.

To speed up the boot, create an optimized version of pci config
read/write dword routines which directly operate on PCI I/O ports.
These two routines are inlined to provide better performance too.
Now it only takes about 3 seconds to finish MRC, which is really
fast (4 times faster than before).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agodm: pci: Allow a PCI bus to be found without an alias
Simon Glass [Tue, 1 Sep 2015 00:55:35 +0000 (18:55 -0600)]
dm: pci: Allow a PCI bus to be found without an alias

At present, until a PCI bus is probed, it cannot be found by its sequence
number unless it has an alias. This is the same with any device.

However with PCI this is more annoying than usual, since bus 0 is always the
same device.

Add a function that tries a little harder to locate PCI bus 0. This means
that PCI enumeration will happen automatically on the first access.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agobuildman: Improve the config comparison feature
Simon Glass [Wed, 26 Aug 2015 03:52:14 +0000 (21:52 -0600)]
buildman: Improve the config comparison feature

At present buildman can compare configurations between commits but the
feature is less useful than it could be. There is no summary by architecture
and changes are not reported on a per-board basis.

Correct these deficiencies so that it is possible to see exactly what is
changing for any number of boards.

Note that 'buildman -b <branch> -C' is recommended for any build where you
will be comparing configuration. Without -C the correct configuration will
not be reported since changes will often not be picked up.

Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoRevert "patman: use -D option for git format-patch"
Masahiro Yamada [Sun, 30 Aug 2015 16:23:32 +0000 (01:23 +0900)]
Revert "patman: use -D option for git format-patch"

This reverts commit 19b4a3369876f9215e2b861f211e8df1a75e26ca.

Since that commit, patman generates useless patches for file removal;
"git format -D" prints only the header but not the diff when deleting
files, and "git am" always refuses such patches.

The following is the quotation from "man git-format-patch":

  -D, --irreversible-delete
    Omit the preimage for deletes, i.e. print only the header but
    not the diff between the preimage and /dev/null. The resulting
    patch is not meant to be applied with patch nor git apply; this
    is solely for people who want to just concentrate on reviewing
    the text after the change. In addition, the output obviously
    lack enough information to apply such a patch in reverse, even
    manually, hence the name of the option.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: bayleybay: Convert to use more dm drivers
Bin Meng [Fri, 28 Aug 2015 09:22:39 +0000 (02:22 -0700)]
x86: bayleybay: Convert to use more dm drivers

Move to driver model for USB and ETH on Intel Bayley Bay.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: coreboot: Convert to use more dm drivers
Bin Meng [Fri, 28 Aug 2015 09:22:38 +0000 (02:22 -0700)]
x86: coreboot: Convert to use more dm drivers

Move to driver model for RTC, USB and ETH on coreboot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: crownbay: Enable CONFIG_PCH_GBE
Bin Meng [Fri, 28 Aug 2015 05:25:59 +0000 (22:25 -0700)]
x86: crownbay: Enable CONFIG_PCH_GBE

Now that we have converted the pch_gbe driver to driver moel,
enable it on Intel Crown Bay board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agonet: pch_gbe: Add Kconfig option
Bin Meng [Fri, 28 Aug 2015 05:25:58 +0000 (22:25 -0700)]
net: pch_gbe: Add Kconfig option

Add Kconfig option in preparation for moving board to use Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
9 years agonet: pch_gbe: Convert to driver model
Bin Meng [Fri, 28 Aug 2015 05:25:57 +0000 (22:25 -0700)]
net: pch_gbe: Convert to driver model

This commit converts pch_gbe ethernet driver to driver model.

Since this driver is only used by Intel Crown Bay board, the
conversion does not keep the non-dm version.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: crownbay: Convert to use CONFIG_DM_ETH for E1000
Bin Meng [Fri, 28 Aug 2015 05:25:56 +0000 (22:25 -0700)]
x86: crownbay: Convert to use CONFIG_DM_ETH for E1000

Since E1000 driver has been converted to driver model, enable it
on Intel Crown Bay. But the Intel Topcliff GbE driver has not been
converted to driver model yet, disable it for now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agox86: crownbay: Convert to use CONFIG_DM_USB
Bin Meng [Fri, 28 Aug 2015 05:25:55 +0000 (22:25 -0700)]
x86: crownbay: Convert to use CONFIG_DM_USB

Move to driver model for USB on Intel Crown Bay.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agodm: eth: Correctly detect alias in eth_get_dev_by_name()
Bin Meng [Fri, 28 Aug 2015 05:25:54 +0000 (22:25 -0700)]
dm: eth: Correctly detect alias in eth_get_dev_by_name()

When given a device name string, we should test to see if it is
really an alias like "eth#".

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agodm: test: Add a new test case for dm_test_eth_rotate
Bin Meng [Fri, 28 Aug 2015 05:25:53 +0000 (22:25 -0700)]
dm: test: Add a new test case for dm_test_eth_rotate

Add one more ethernet device node in the sandbox test device tree,
with name 'sbe5'. This is to support a new test case for testing
network device rotation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agodm: eth: Do not print misleading "Net Initialization Skipped"
Bin Meng [Fri, 28 Aug 2015 05:25:52 +0000 (22:25 -0700)]
dm: eth: Do not print misleading "Net Initialization Skipped"

With driver model, board_eth_init() or cpu_eth_init() is not a must.
Thus we don't need print a misleading "Net Initialization Skipped".

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agonet: Revert "tftp: adjust settings to be suitable for 100Mbit ethernet"
Bin Meng [Fri, 28 Aug 2015 05:25:51 +0000 (22:25 -0700)]
net: Revert "tftp: adjust settings to be suitable for 100Mbit ethernet"

Commit 620776d "tftp: adjust settings to be suitable for 100Mbit ethernet"
causes the following error message when trying to load a file using 'tftp'
command via a tftp server.

    TFTP error: 'Unsupported option(s) requested' (8)

This is due to with commit 620776d changes, the tftp option 'timeout'
value is now set to zero which is an invalid value as per RFC2349 [1].
Valid values range between "1" and "255" seconds, inclusive. With some
tftp servers that strictly implement the RFC requirement, it reports
such an error message.

Revert commit 620776d for RFC compliance.

[1] https://www.ietf.org/rfc/rfc2349.txt

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agox86: panther: Add PCI and video configuration
Simon Glass [Fri, 28 Aug 2015 01:54:48 +0000 (19:54 -0600)]
x86: panther: Add PCI and video configuration

Add a PCI node to the device tree. This allows SPI flash and SATA to work
correctly. Also configure the video to come up correctly even though there
is no keyboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: bayleybay: Change default vga bios rom address
Bin Meng [Thu, 27 Aug 2015 15:38:17 +0000 (08:38 -0700)]
x86: bayleybay: Change default vga bios rom address

With multiple microcode blobs included, the generated u-boot-dtb.bin
leaves merely several hundred bytes before the vga bios. Change the
vga bios rom address to make a bigger room for u-boot-dtb.bin.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
9 years agox86: doc: Change to use CONFIG_VGA_BIOS_ADDR
Bin Meng [Thu, 27 Aug 2015 15:38:16 +0000 (08:38 -0700)]
x86: doc: Change to use CONFIG_VGA_BIOS_ADDR

CONFIG_X86_OPTION_ROM_ADDR has been renamed to CONFIG_VGA_BIOS_ADDR.
Update the doc to refer to the new name.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
9 years agox86: ifdtool: Support checking region overlap before U-Boot
Bin Meng [Thu, 27 Aug 2015 15:38:15 +0000 (08:38 -0700)]
x86: ifdtool: Support checking region overlap before U-Boot

We have the capability to check regions written after U-Boot that
do not overlap. Since regions can also be written before U-Boot,
add such check for these too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Andy Pont <andy.pont@sdcsystems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
9 years agoPrepare v2015.10-rc3 v2015.10-rc3
Tom Rini [Mon, 7 Sep 2015 12:56:35 +0000 (08:56 -0400)]
Prepare v2015.10-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoMerge git://git.denx.de/u-boot-usb
Tom Rini [Mon, 7 Sep 2015 12:56:23 +0000 (08:56 -0400)]
Merge git://git.denx.de/u-boot-usb

9 years agoMerge git://git.denx.de/u-boot-socfpga
Tom Rini [Mon, 7 Sep 2015 12:56:08 +0000 (08:56 -0400)]
Merge git://git.denx.de/u-boot-socfpga

9 years agousb: ehci: remember init mode
Stephen Warren [Thu, 20 Aug 2015 23:38:05 +0000 (17:38 -0600)]
usb: ehci: remember init mode

When an EHCI device is registered in device mode, the HW isn't actually
initialized at all, and hence isn't left in a running state. Consequently,
when the device is deregistered, ehci_shutdown() will fail, since the HW
bits it expects to see set in response to its shutdown requests will not
be sent, and the message "EHCI failed to shut down host controller." will
be printed.

Fix ehci-hcd.c to remember whether the device was registered in host or
device mode, and only call ehci_shutdown() for host mode registrations.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
9 years agodfu: tftp: Kconfig: Enable DFU_TFTP support on the am335x_boneblack_defconfig
Lukasz Majewski [Sun, 23 Aug 2015 22:21:50 +0000 (00:21 +0200)]
dfu: tftp: Kconfig: Enable DFU_TFTP support on the am335x_boneblack_defconfig

This commit enables support for DFU_TFTP on the am335x bone black device.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agodfu: tftp: Kconfig: Add Kconfig entry for dfu tftp feature
Lukasz Majewski [Sun, 23 Aug 2015 22:21:49 +0000 (00:21 +0200)]
dfu: tftp: Kconfig: Add Kconfig entry for dfu tftp feature

The dfu tftp feature can be now enabled via Kconfig. This
commit provides necessary code for it.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agodfu: command: Extend "dfu" command to handle receiving data via TFTP
Lukasz Majewski [Sun, 23 Aug 2015 22:21:48 +0000 (00:21 +0200)]
dfu: command: Extend "dfu" command to handle receiving data via TFTP

The "dfu" command has been extended to support transfers via TFTP protocol.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agoupdate: tftp: dfu: Extend update_tftp() function to support DFU
Lukasz Majewski [Sun, 23 Aug 2015 22:21:47 +0000 (00:21 +0200)]
update: tftp: dfu: Extend update_tftp() function to support DFU

This code allows using DFU defined mediums for storing data received via
TFTP protocol.

It reuses and preserves functionality of legacy code at common/update.c.

The update_tftp() function now accepts parameters - namely medium device
name and its number (e.g. mmc 1).

Without this information passed old behavior is preserved.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agodfu: tftp: update: Add dfu_write_from_mem_addr() function
Lukasz Majewski [Sun, 23 Aug 2015 22:21:46 +0000 (00:21 +0200)]
dfu: tftp: update: Add dfu_write_from_mem_addr() function

This function allows writing via DFU data stored from fixed buffer address
(like e.g. loadaddr env variable).

Such predefined buffers are used in the update_tftp() code. In fact this
function is a wrapper on the dfu_write() and dfu_flush().

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agodfu: tftp: update: Provide tftp support for the DFU subsystem
Lukasz Majewski [Sun, 23 Aug 2015 22:21:45 +0000 (00:21 +0200)]
dfu: tftp: update: Provide tftp support for the DFU subsystem

This commit adds initial support for using tftp for downloading and
upgrading firmware on the device.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agotftp: update: Allow some parts of the code to be reused when CONFIG_SYS_NO_FLASH...
Lukasz Majewski [Sun, 23 Aug 2015 22:21:44 +0000 (00:21 +0200)]
tftp: update: Allow some parts of the code to be reused when CONFIG_SYS_NO_FLASH is set

Up till now it was impossible to use code from update.c when system
was not equipped with raw FLASH memory.
Such behavior prevented DFU from reusing this code.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agonet: tftp: Move tftp.h file from ./net to ./include/net
Lukasz Majewski [Sun, 23 Aug 2015 22:21:43 +0000 (00:21 +0200)]
net: tftp: Move tftp.h file from ./net to ./include/net

This change gives the ability to reuse the <tftp.h> header file by other
subsystems (like e.g. dfu).

Without this change compilation error emerges for the legacy update.c file.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agodoc: dfu: tftp: README entry for TFTP extension of DFU
Lukasz Majewski [Sun, 23 Aug 2015 22:21:42 +0000 (00:21 +0200)]
doc: dfu: tftp: README entry for TFTP extension of DFU

Documentation file for DFU extension. With this functionality it is now
possible to transfer FIT images with firmware updates via TFTP and use
DFU backend for storing them.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agoh2200: Fix build error
Kishon Vijay Abraham I [Fri, 21 Aug 2015 05:32:04 +0000 (11:02 +0530)]
h2200: Fix build error

Commit <8bfc288c3955> ("usb: gadget: ether: Perform board
initialization from ethernet gadget driver") added board_usb_init
and board_usb_cleanup in ethernet gadget driver. But h2200 board
didn't have board_usb_init and board_usb_cleanup implementations.

This introduced the following build errors
+drivers/usb/gadget/built-in.o: In function `usb_eth_halt':
+drivers/usb/gadget/ether.c:2498: undefined reference to `board_usb_cleanup'
+drivers/usb/gadget/built-in.o: In function `usb_eth_init':
+drivers/usb/gadget/ether.c:2316: undefined reference to `board_usb_init'

Fix it here by adding empty board_usb_init and board_usb_cleanup
functions in h2200.c.

Fixes: <8bfc288c3955> ("usb: gadget: ether: Perform board
initialization from ethernet gadget driver")

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
9 years agodfu: Delete superfluous initialization of the dfu_buf_size static variable
Lukasz Majewski [Wed, 8 Jul 2015 21:43:18 +0000 (23:43 +0200)]
dfu: Delete superfluous initialization of the dfu_buf_size static variable

After extension of the dfu_get_buf() to also setup (implicitly) the dfu_buf_size
variable it is not needed to set dfu_buf_size to CONFIG_SYS_DFU_DATA_BUF_SIZE.

This variable is set in the dfu_get_buf() by not only considering
CONFIG_SYS_DFU_DATA_BUF but more importantly the "dfu_bufsiz" env variable.
Therefore, dfu_get_buf() should be used for initialization.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
9 years agodfu:tests: Modify dfu_gadget_test.sh to accept USB device vendor:product ID
Lukasz Majewski [Sat, 15 Aug 2015 09:23:45 +0000 (11:23 +0200)]
dfu:tests: Modify dfu_gadget_test.sh to accept USB device vendor:product ID

dfu-util allows filtering on USB device vendor:product ID by using
the -d flag (-d 0451:d022).
Such option is very handy when many DFU devices are connected to a single
host PC. This commit allows testing when above situation emerges.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Lukasz Majewski <l.majewski@majess.pl>
Test HW - AM335x Beagle Bone Black
NOTE: Max size of file to transfer: 2MiB

9 years agousb: gadget: f_thor: Allocate request up to THOR_PACKET_SIZE
Siva Durga Prasad Paladugu [Wed, 15 Apr 2015 11:42:19 +0000 (13:42 +0200)]
usb: gadget: f_thor: Allocate request up to THOR_PACKET_SIZE

Allocate request up to THOR_PACKET_SIZE not the ep0->maxpacket
as the descriptors data depend on the number of descriptors
and this 64 bytes were not enough and the buffer might overflow
which results in memalign failures later.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agof_thor: Dont perform reset at the end of thor
Siva Durga Prasad Paladugu [Thu, 16 Apr 2015 08:38:34 +0000 (10:38 +0200)]
f_thor: Dont perform reset at the end of thor

Dont perform reset at the end of thor download
if configured to do reset off.
Reset may not be required in all cases and hence
provided an option to do so.

The case would be to download the images to DDR instead
of flash device.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoimplement Fastboot via USB OTG on bcm28155_ap boards
Jiandong Zheng [Thu, 9 Jul 2015 21:26:40 +0000 (14:26 -0700)]
implement Fastboot via USB OTG on bcm28155_ap boards

Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
9 years agoarc: make AXS101 default platform
Alexey Brodkin [Mon, 24 Aug 2015 15:49:37 +0000 (18:49 +0300)]
arc: make AXS101 default platform

This fixes building in automated flow that doesn't use defconfigs.

See discussion on that topic here:
 http://patchwork.ozlabs.org/patch/502558/

See similar patches for other architectures/platforms  here:
 [1] http://git.denx.de/?p=u-boot.git;a=commit;h=ff560a13056a565a4e9ce1761bd04276a3cace88
 [2] http://git.denx.de/?p=u-boot.git;a=commit;h=589907e2c187ec69b351c38ccda36730d25ab5d6

And while at it add missing shell prompt to axs103.

Cc: Tom Rini <trini@konsulko.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
9 years agonet: altera_tse: Zap unused variable
Marek Vasut [Fri, 4 Sep 2015 09:50:28 +0000 (11:50 +0200)]
net: altera_tse: Zap unused variable

Zap variable which is set but never used.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
9 years agoarm: socfpga: Add support for the Terasic DE-0 Atlas board
Dinh Nguyen [Tue, 1 Sep 2015 22:41:52 +0000 (17:41 -0500)]
arm: socfpga: Add support for the Terasic DE-0 Atlas board

Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV
based board. The board can boot from SD/MMC. Ethernet is also supported.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
9 years agoarm: socfpga: Add support for DENX MCV SoM and MCVEVK board
Marek Vasut [Sun, 2 Aug 2015 23:37:28 +0000 (01:37 +0200)]
arm: socfpga: Add support for DENX MCV SoM and MCVEVK board

Add support for DENX MCV SoM, which is CycloneV based and the
associated DENX MCVEVK baseboard. The board can boot from eMMC.
Ethernet and USB is supported.

Signed-off-by: Marek Vasut <marex@denx.de>
9 years agoarm: socfpga: Add support for Terasic SoCkit board
Marek Vasut [Sun, 21 Jun 2015 15:28:53 +0000 (17:28 +0200)]
arm: socfpga: Add support for Terasic SoCkit board

Add support for Terasic SoCkit, which is CycloneV based board.
The board can boot either from SD/MMC or QSPI. Ethernet is also
supported.

Signed-off-by: Marek Vasut <marex@denx.de>
9 years agoarm: socfpga: Do not call board_init_r() from board_init_f()
Marek Vasut [Sat, 29 Aug 2015 08:16:20 +0000 (10:16 +0200)]
arm: socfpga: Do not call board_init_r() from board_init_f()

Instead of calling board_init_r() directly from board_init_f(), just
return from board_init_f(). This will make the code continue executing
in crt0.S _main(), from which the board_init_r() is called. This patch
aligns the SoCFPGA SPL with the correct SPL design as well as reduces
the stack utilisation slightly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
9 years agoarm: socfpga: Zap OF_CONTROL checks, it's always enabled
Marek Vasut [Wed, 19 Aug 2015 21:23:53 +0000 (23:23 +0200)]
arm: socfpga: Zap OF_CONTROL checks, it's always enabled

The CONFIG_OF_CONTROL and CONFIG_SPL_OF_CONTROL is always enabled
on Altera SoCFPGA, remove the unnecessary checks.

Signed-off-by: Marek Vasut <marex@denx.de>
9 years agoarm: socfpga: Always enable OF_CONTROL and SPL_OF_CONTROL
Marek Vasut [Wed, 19 Aug 2015 21:23:52 +0000 (23:23 +0200)]
arm: socfpga: Always enable OF_CONTROL and SPL_OF_CONTROL

The SoCFPGA probes mostly from OF and the OF is mandatory both in
U-Boot itself and U-Boot SPL. Enable it by default.

Signed-off-by: Marek Vasut <marex@denx.de>
9 years agoarm: socfpga: Assure ISWGRP 0 and 1 are inited
Marek Vasut [Mon, 24 Aug 2015 09:51:46 +0000 (11:51 +0200)]
arm: socfpga: Assure ISWGRP 0 and 1 are inited

This fix makes sure that the ISWGRP0 and ISWGRP1 registers are
correctly inited. In case those registers are not initialized,
it is not possible to access the registers synthesised in the
FPGA through the bridges. Any such access produces data abort.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
9 years agommc: dw_mmc: Probe the MMC from OF
Marek Vasut [Sat, 25 Jul 2015 08:48:14 +0000 (10:48 +0200)]
mmc: dw_mmc: Probe the MMC from OF

Rework the driver to probe the MMC controller from Device Tree
and make it mandatory. There is no longer support for probing
from the ancient qts-generated header files.

This patch now also removes previous temporary workaround.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
9 years agodoc: document the fdtdir PXE command
Stefan Brüns [Sun, 30 Aug 2015 17:10:58 +0000 (19:10 +0200)]
doc: document the fdtdir PXE command

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
9 years agodoc: Fix inconsistent filename in PXE config example
Stefan Brüns [Sun, 30 Aug 2015 17:10:59 +0000 (19:10 +0200)]
doc: Fix inconsistent filename in PXE config example

The default config includes base.menu, not linux.list

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
9 years agoMerge git://git.denx.de/u-boot-rockchip
Tom Rini [Thu, 3 Sep 2015 18:57:09 +0000 (14:57 -0400)]
Merge git://git.denx.de/u-boot-rockchip

9 years agorockchip: Put README image creation commands on one line
Simon Glass [Sun, 30 Aug 2015 22:55:52 +0000 (16:55 -0600)]
rockchip: Put README image creation commands on one line

It is easier to paste these into the command line if they are a single
common. Use line continuation instead of separate lines.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Update todo in README.rockchip
Sjoerd Simons [Sun, 30 Aug 2015 22:55:51 +0000 (16:55 -0600)]
rockchip: Update todo in README.rockchip

MMC support works now, so it can be dropped from the todo

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Drop first 32kb of zeros from the rkSD image type
Sjoerd Simons [Sun, 30 Aug 2015 22:55:50 +0000 (16:55 -0600)]
rockchip: Drop first 32kb of zeros from the rkSD image type

Instead of creating a rockchip SPL SD card image with 32KB of zeros
which can be written to the start of an SD card, create the images with
only the useful data that should be written to an offset of 32KB on the
SD card.

The first 32 kilobytes aren't needed for bootup and only serve as
convenient way of accidentally obliterating your partition table.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoarm: Turn of d-cache before i-cache
Sjoerd Simons [Sun, 30 Aug 2015 22:55:49 +0000 (16:55 -0600)]
arm: Turn of d-cache before i-cache

Booting the kernel fails on RK3288 (and probably other rockchip SoCs)
when the i-cache is disabled/flushed before d-cache.

I have not investigated whether this is due to U-Boot hanging or whether
it's very early in the linux boot, but following the approach of the
various rockchip U-Boot forks (first disable d-cache then i-cache) makes
things work.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add config_distro_bootcmd support
Sjoerd Simons [Sun, 30 Aug 2015 22:55:48 +0000 (16:55 -0600)]
rockchip: Add config_distro_bootcmd support

Now that MMC works in U-Boot add config distro command support to start
Linux in a standard fashion. One oddity here is that linux fails to load
when the fdt is relocated to above 512MB, so set fdt_high to make sure it's
loaded below that.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Turn off CONFIG_SPL_LED for firefly
Sjoerd Simons [Sun, 30 Aug 2015 22:55:47 +0000 (16:55 -0600)]
rockchip: Turn off CONFIG_SPL_LED for firefly

With LED support enabled the SPL easily goes over the size limit (e.g.
with both Debians gcc 4.9 and 5.2 cross-compilers). Turn off LED support
in the SPL to reduce the size just enough for those compilers.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tweaked commit subject to remove _SUPPORT
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Disable sdio mmc slot on rk3288-firefly
Sjoerd Simons [Sun, 30 Aug 2015 22:55:46 +0000 (16:55 -0600)]
rockchip: Disable sdio mmc slot on rk3288-firefly

U-Boot can't use the sdio card so turn it of to prevent things getting
confused/struck when trying to use the card as storage.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agommc: Probe DM based mmc devices in u-boot
Sjoerd Simons [Sun, 30 Aug 2015 22:55:45 +0000 (16:55 -0600)]
mmc: Probe DM based mmc devices in u-boot

During mmc initialize probe all devices with the MMC Uclass if build
with CONFIG_DM_MMC

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodoc: Fix reference to Rock pro when Rock 2 is meant
Sjoerd Simons [Sun, 30 Aug 2015 22:55:44 +0000 (16:55 -0600)]
doc: Fix reference to Rock pro when Rock 2 is meant

The Radxa Rock pro board is rk3188 based and thus won't work with U-Boot
built for RK3288. Change the documentation to refer to the intended
board, the Radxa Rock 2, which is an RK3288-based design very similar to
the firefly

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add a simple README
Simon Glass [Sun, 30 Aug 2015 22:55:43 +0000 (16:55 -0600)]
rockchip: Add a simple README

Add a few notes on how to try out the Rockchip support so far.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add basic support for jerry
Simon Glass [Sun, 30 Aug 2015 22:55:42 +0000 (16:55 -0600)]
rockchip: Add basic support for jerry

This builds and displays an SPL message, but does not function beyond that.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add basic support for firefly-rk3288
Simon Glass [Sun, 30 Aug 2015 22:55:41 +0000 (16:55 -0600)]
rockchip: Add basic support for firefly-rk3288

The Firefly RK3288 is a suitable target board for initial mainline Rockchip
support. It includes a good set of peripherals, a recent SoC and it is
readily available.

This adds only some basic files required to allow the baord to display a
serial message in SPL and hang.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add SPI driver
Simon Glass [Wed, 2 Sep 2015 01:19:37 +0000 (19:19 -0600)]
rockchip: Add SPI driver

Add a SPI driver for the Rockchip RK3288, using driver model. It should work
for other Rockchip SoCs also.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add I2C driver
Simon Glass [Sun, 30 Aug 2015 22:55:39 +0000 (16:55 -0600)]
rockchip: Add I2C driver

Add an I2C driver for the Rockchip RK3288, using driver model. It should work
for other Rockchip SoCs also.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add core SoC start-up code
Simon Glass [Sun, 30 Aug 2015 22:55:38 +0000 (16:55 -0600)]
rockchip: Add core SoC start-up code

Add code for starting up U-Boot SPL and U-Boot proper. This is generic and
makes use of devices provided by the board- or SoC-specific code.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add an MMC driver
Simon Glass [Sun, 30 Aug 2015 22:55:37 +0000 (16:55 -0600)]
rockchip: Add an MMC driver

Add an MMC driver which supports RK3288, but may also support other SoCs.
It uses the Designware MMC device.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: rk3288: Add SDRAM init
Simon Glass [Sun, 30 Aug 2015 22:55:36 +0000 (16:55 -0600)]
rockchip: rk3288: Add SDRAM init

Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses
device tree for configuration so should be able to support other RAM
configurations. It may be possible to generalise the code to support other
SoCs at some point.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: rk3288: Add pinctrl driver
Simon Glass [Sun, 30 Aug 2015 22:55:35 +0000 (16:55 -0600)]
rockchip: rk3288: Add pinctrl driver

Add a driver which supports pin multiplexing setup for the most commonly
used peripherals.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: rk3288: Add a simple syscon driver
Simon Glass [Sun, 30 Aug 2015 22:55:34 +0000 (16:55 -0600)]
rockchip: rk3288: Add a simple syscon driver

Add a driver that provides access to system controllers.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: rk3288: Add SoC reset driver
Simon Glass [Sun, 30 Aug 2015 22:55:33 +0000 (16:55 -0600)]
rockchip: rk3288: Add SoC reset driver

We can reset the SoC using some CRU (clock/reset unit) registers. Add support
for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: rk3288: Add header files for PMU and GRF
Simon Glass [Sun, 30 Aug 2015 22:55:32 +0000 (16:55 -0600)]
rockchip: rk3288: Add header files for PMU and GRF

PMU is the power management unit and GRF is the general register file. Both
are heavily used in U-Boot. Add header files with register definitions.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: rk3288: Add clock driver
Simon Glass [Sun, 30 Aug 2015 22:55:31 +0000 (16:55 -0600)]
rockchip: rk3288: Add clock driver

Add a driver for setting up and modifying the various PLLs and peripheral
clocks on the RK3288.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agopower: regulator: Add a driver for ACT8846 regulators
Simon Glass [Sun, 30 Aug 2015 22:55:30 +0000 (16:55 -0600)]
power: regulator: Add a driver for ACT8846 regulators

Add a full regulator driver for the ACT8846. This provides easy access to
voltage and current settings for each regulator.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agopower: Add support for ACT8846 PMIC
Simon Glass [Sun, 30 Aug 2015 22:55:29 +0000 (16:55 -0600)]
power: Add support for ACT8846 PMIC

Add a driver for the ACT8846 PMIC. This supports several LDOs and BUCKs and
is connected to the I2C bus. This driver supports using a regulator driver
to access the regulators.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add basic peripheral and clock definitions
Simon Glass [Sun, 30 Aug 2015 22:55:28 +0000 (16:55 -0600)]
rockchip: Add basic peripheral and clock definitions

Add header files for the peripherals and clocks supported on Rockchip
platforms. The particular implementation (and register set) for each is
SoC-specific, but it seems that the naming can be generic.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: gpio: Add rockchip GPIO driver
Simon Glass [Sun, 30 Aug 2015 22:55:27 +0000 (16:55 -0600)]
rockchip: gpio: Add rockchip GPIO driver

This supports RK3288 at present. It does not implement functions or support
for pull up/down.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add support for the SPI image
Simon Glass [Sun, 30 Aug 2015 22:55:26 +0000 (16:55 -0600)]
rockchip: Add support for the SPI image

The Rockchip boot ROM requires a particular file format for booting from SPI.
It consists of a 512-byte header encoded with RC4, some padding and then up
to 32KB of executable code in 2KB blocks, separated by 2KB empty blocks.

Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be
converted to this format. This allows booting from SPI flash on supported
machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add support for the SD image
Simon Glass [Sun, 30 Aug 2015 22:55:25 +0000 (16:55 -0600)]
rockchip: Add support for the SD image

The Rockchip boot ROM requires a particular file format. It consists of
64KB of zeroes, a 512-byte header encoded with RC4, and then some executable
code.

Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be
converted to this format.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add the rkimage format to mkimage
Simon Glass [Sun, 30 Aug 2015 22:55:24 +0000 (16:55 -0600)]
rockchip: Add the rkimage format to mkimage

Rockchip SoCs require certain formats for code that they execute, The
simplest format is a 4-byte header at the start of a binary file. Add
support for this so that we can create images that the boot ROM understands.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agomkimage: Allow the original file size to be recorded
Simon Glass [Sun, 30 Aug 2015 22:55:23 +0000 (16:55 -0600)]
mkimage: Allow the original file size to be recorded

Allow the image handler to store the original input file size so that it
can reference it later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agomkimage: Allow padding to any length
Simon Glass [Sun, 30 Aug 2015 22:55:22 +0000 (16:55 -0600)]
mkimage: Allow padding to any length

At present there is an arbitrary limit of 4KB for padding. Rockchip needs
more than that, so remove this restriction.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agorockchip: rk3288: dts: Make core devices available early
Simon Glass [Sun, 30 Aug 2015 22:55:21 +0000 (16:55 -0600)]
rockchip: rk3288: dts: Make core devices available early

In SPL we need access to the CRU and other peripherals so we can set up
SDRAM. Mark these so that they will remain in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Bring in RK3288 device tree file includes and bindings
Simon Glass [Sun, 30 Aug 2015 22:55:20 +0000 (16:55 -0600)]
rockchip: Bring in RK3288 device tree file includes and bindings

Bring in required device tree files from Linux. Since mainline Linux is
somewhat behind, use the files from the Chromium tree. We can re-sync once
further code is acccepted upstream.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agorockchip: Add serial support
Simon Glass [Sun, 30 Aug 2015 22:55:19 +0000 (16:55 -0600)]
rockchip: Add serial support

Add support for the Rockchip serial device using the ns16550 driver.
This uses driver model and device tree for both SPL and U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoarm: reset: Avoid a build error when the reset uclass is enabled
Simon Glass [Sun, 30 Aug 2015 22:55:18 +0000 (16:55 -0600)]
arm: reset: Avoid a build error when the reset uclass is enabled

There can be only one do_reset(). When CONFIG_RESET is enabled this is
provided by the reset uclass, and ARM's version should be disabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: Provide better debugging when a device fails to bind
Simon Glass [Sun, 30 Aug 2015 22:55:17 +0000 (16:55 -0600)]
dm: Provide better debugging when a device fails to bind

All devices should bind without error. But when they don't, they can cause
driver model init to fail. A real situation where this can happen is when
there is a missing uclass.

Add a debug() call to dm_scan_fdt_node to make this easier to track.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agodm: Improve handling of a missing uclass
Simon Glass [Sun, 30 Aug 2015 22:55:16 +0000 (16:55 -0600)]
dm: Improve handling of a missing uclass

When a uclass definition is missing, no drivers in that uclass can operate.
This can happen if a board has a strange collection of options (e.g. the
driver is enabled but the uclass is not).

Unfortunately this is very confusing at present. Starting up driver model
results in a -ENOENT error, which is pretty generic. Quite a big of digging
is needed to get to the root cause.

To help with this, change the error to a very strange one with no other
users in U-Boot. Also add a debug message.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agommc: Support bypass mode with the get_mmc_clk() method
Simon Glass [Sun, 30 Aug 2015 22:55:15 +0000 (16:55 -0600)]
mmc: Support bypass mode with the get_mmc_clk() method

Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to support
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
9 years agodm: led: Tidy up SPL options for the led and led-gpio
Simon Glass [Sun, 30 Aug 2015 22:55:14 +0000 (16:55 -0600)]
dm: led: Tidy up SPL options for the led and led-gpio

At present SPL does not have its own option. But these features can
increase SPL code size. Adjust the Kconfig and Makefile so that
separate a SPL option can be selected.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agopinctrl: Add the concept of peripheral IDs
Simon Glass [Sun, 30 Aug 2015 22:55:13 +0000 (16:55 -0600)]
pinctrl: Add the concept of peripheral IDs

My original pinctrl patch operating using a peripheral ID enum. This was
shared between pinmux and clock and provides an easy way to specify a device
that needs to be controlled, even it is does not (yet) have a driver within
driver model.

Masahiro's new simple pinctrl gets around this by providing a
set_state_simple() pinctrl method. By passing a device to that call the
peripheral ID becomes unnecessary. If the driver needs it, it can calculate
it itself and use it internally.

However this does not solve the problem for peripheral clocks. The 'pure'
solution would be to pass a driver to the clock uclass also. But this
requires that all devices should have a driver, and a struct udevide. Also
a key optimisation of the clock uclass is allowing a peripheral clock to
be set even when there is no device for that clock.

There may be a better way to achive the same goal, but for now it seems
expedient to add in peripheral ID to the pinctrl uclass. Two methods are
added - one to get the peripheral ID and one to select it. The existing
set_state_simple() is effectively the union of these.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agopinctrl: Add help text to Kconfig
Simon Glass [Sun, 30 Aug 2015 22:55:12 +0000 (16:55 -0600)]
pinctrl: Add help text to Kconfig

The pinctrl Kconfig options should have help messages. Add this to a few
options.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoconfigs/titanium_defconfig: Select MX6
Tom Rini [Wed, 2 Sep 2015 19:42:27 +0000 (15:42 -0400)]
configs/titanium_defconfig: Select MX6

In 2178282 this config wasn't updated by accident, so update it.

Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoarch/arm/Kconfig: Add back in missing entries.
Tom Rini [Wed, 2 Sep 2015 19:32:20 +0000 (15:32 -0400)]
arch/arm/Kconfig: Add back in missing entries.

In 2178282 we accidentally dropped out hilsilicon and cm_t43.  Bring
these back in.

Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoConvert omap3_logic to ti_omap3_common.h
Adam Ford [Wed, 2 Sep 2015 14:18:20 +0000 (09:18 -0500)]
Convert omap3_logic to ti_omap3_common.h

Convert to using the common config files.

Signed-off-by: Adam Ford <adam.ford@logicpd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>