Stefano Babic [Wed, 10 Oct 2012 21:11:43 +0000 (21:11 +0000)]
MX35: Add soc_boot_mode and soc_boot_device to MX35
The functions are required to use the generic
SPL Framework.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Wed, 10 Oct 2012 21:11:42 +0000 (21:11 +0000)]
MX35: add LOW_LEVEL_SRAM_STACK to use SPL_FRAMEWORK
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Wed, 10 Oct 2012 21:11:41 +0000 (21:11 +0000)]
ARM: Fix start.S when used with SPL in arm1136
This patch modifies start.S for the arm1136 to make it
conform to start.S in armv7 architecture, to make it
usable if the SPL framework is used.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Stefano Babic [Wed, 24 Oct 2012 08:06:28 +0000 (10:06 +0200)]
MX5: fix warning in clock.c
Patch fix warnings compiling with ELDK-4.2:
clock.c: In function 'get_standard_pll_sel_clk':
clock.c:341: warning: 'freq' may be used uninitialized in this function
Reported-by : Marek Vasut <marex@denx.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Troy Kisky [Wed, 3 Oct 2012 15:47:09 +0000 (15:47 +0000)]
imximage: make set_imx_hdr_v1/v2 easier to read
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Troy Kisky [Wed, 3 Oct 2012 15:47:08 +0000 (15:47 +0000)]
imximage: change parameters to set_imx_hdr
Call with the value the function will use
instead of going through a pointer.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Troy Kisky [Wed, 3 Oct 2012 15:47:07 +0000 (15:47 +0000)]
imximage: delay setting of image size
When later we change to variable length
header, we won't know the file size when
set_imx_hdr is called. So this is prep work.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Troy Kisky [Wed, 3 Oct 2012 15:47:06 +0000 (15:47 +0000)]
imximage: fix size of image to load.
sbuf->st_size already includes sizeof(struct imx_header),
so remove extra addition.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Troy Kisky [Wed, 3 Oct 2012 15:47:05 +0000 (15:47 +0000)]
imximage: move flash_offset check to common location
Both set_imx_hdr_v1 and set_imx_hdr_v2 perform the
same check. Move check to before the set_imx_hdr call.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Troy Kisky [Wed, 3 Oct 2012 15:47:04 +0000 (15:47 +0000)]
imximage: remove redundant setting of app_dest_ptr
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Troy Kisky [Wed, 3 Oct 2012 15:47:03 +0000 (15:47 +0000)]
imximage: check dcd_len as entries added
Before the len was checked after the entire file
was processed, so it could have already overflowed.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Fabio Estevam [Wed, 17 Oct 2012 07:33:27 +0000 (07:33 +0000)]
mx6qarm2: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFER
Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Wed, 17 Oct 2012 07:33:26 +0000 (07:33 +0000)]
mx6qsabre_common: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFER
Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Thu, 18 Oct 2012 18:42:00 +0000 (18:42 +0000)]
mx25pdk: Use internal RAM for stack pointer
Use internal RAM for stack pointer as it is done in other i.MX boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 7 May 2012 10:56:00 +0000 (10:56 +0000)]
mx5: Add workaround for ARM erratum ID 468414
Add the software workaround for ARM erratum ID 468414.
According to mx53/mx51 errata document:
"ENGcm11133 - ARM: NEON load data can be incorrectly forwarded to a
subsequent request
Description:
Under very specific set of conditions, data from a Neon load request can be incorrectly forwarded
to a subsequent, unrelated memory request.
The conditions are as follows:
• Neon loads and stores must be in use
• Neon L1 caching must be disabled
• Trustzone must be configured and in use
• The secure memory address space and the non-secure memory address space both use the same
physical addresses, either as an alias or the same memory location or for separate memory
locations
The issue is reported by ARM, erratum ID 468414, Category 2"
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Dirk Behme [Wed, 8 Aug 2012 02:26:31 +0000 (02:26 +0000)]
mx6qsabrelite: enable DCache and MMC bounce buffer
The recent U-Boot version 2012.07 has improved drivers
(e.g. MMC and network/FEC) regarding DCache handling.
So it should be safe to use the DCache on the i.MX6, now.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Mon, 15 Oct 2012 07:26:18 +0000 (07:26 +0000)]
configs: mx53evk: Remove CONFIG_HAS_ETH1
mx53evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 15 Oct 2012 07:26:17 +0000 (07:26 +0000)]
configs: mx51evk: Remove CONFIG_HAS_ETH1
mx51evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 15 Oct 2012 07:26:16 +0000 (07:26 +0000)]
configs: mx53loco: Remove CONFIG_HAS_ETH1
mx53loco has only one Ethernet port, so remove CONFIG_HAS_ETH1 option.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 15 Oct 2012 05:37:17 +0000 (05:37 +0000)]
mx53loco: Adapt the IPU clock
Since PLL2 now has changed, it is necessary to adapt the CONFIG_IPUV3_CLK
accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 15 Oct 2012 05:37:16 +0000 (05:37 +0000)]
mx5: lowlevel_init.S: Fix PLL settings for mx53
Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz.
Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 400MHz
instead.
Without doing so, it is not possible to use a 2.6.35 FSL kernel and display HDMI
at 1080p because the IPU clock cannot reach the requested frequency.
Set PLL2 to 400MHz, so that 1080p can be played and the DDR2 can run at its
maximum frequency.
Also, setup the other PLL's as done in FSL U-boot and re-arrange the code a little
bit to allow easier comparison with the original clock setup from FSL U-boot.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 15 Oct 2012 05:37:15 +0000 (05:37 +0000)]
mx5: lowlevel_init.S: Split init_clock macro
init_clock is currently shared between mx51 and mx53 and it contains lots of
ifdef's which makes it really hard to follow the code.
Split the init_clock between mx51 and mx53 to allow easier readability.
No functional changes are made.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Benoît Thébaudeau [Mon, 8 Oct 2012 08:34:22 +0000 (08:34 +0000)]
mx25: Clean up imx-regs.h
Clean up i.MX25 imx-regs.h:
- Update mx31 imx-regs.h filename.
- Test for __KERNEL_STRICT_NAMES just in case.
- Define internal RAM size.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Eric Nelson [Wed, 3 Oct 2012 07:28:43 +0000 (07:28 +0000)]
i.MX6: mx6qsabrelite: Add splash screen support
Adds support for HDMI, two LVDS panels and one RGB panel to
the SABRE-Lite board.
Displays supported:
HDMI - 1024 x 768 for maximum compatibility
Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480)
Since the ipuv3_fb display driver currently supports only a single display,
this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect
or the I2C touch controller of the LVDS and RGB displays in the priority
listed above.
Setting 'panel' environment variable to one of the names above will
override auto-detection.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Wed, 3 Oct 2012 07:28:42 +0000 (07:28 +0000)]
i.MX6: add HDMI transmitter register declarations from kernel WIP.
Original source from Pengutronix HDMI driver work:
http://git.pengutronix.de/?p=imx/linux-2.6.git;a=commitdiff;h=
72c31cd67ac880bd90785af86f8e46f8ea7b3bb0
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Wed, 3 Oct 2012 07:28:41 +0000 (07:28 +0000)]
i.MX6: set drive strength for parallel RGB pads
Default drive strength is disabled and won't function.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Wed, 3 Oct 2012 07:27:39 +0000 (07:27 +0000)]
i.MX: ipufb: add const to fb_videomode declarations
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Wed, 3 Oct 2012 07:27:38 +0000 (07:27 +0000)]
i.MX video: struct fb_videomode can be const
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Wed, 3 Oct 2012 07:26:38 +0000 (07:26 +0000)]
i.MX: declare iomux_v3_cfg_t arrays as const
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Wed, 3 Oct 2012 07:26:37 +0000 (07:26 +0000)]
i.MX: iomux: input pad array can be const
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Fabio Estevam [Tue, 2 Oct 2012 11:20:12 +0000 (11:20 +0000)]
mx6qsabreauto: Pass the board revision to the kernel
The kernel from Freescale expects that the bootloader passes the board revision.
Read the board revision and pass it via get_board_rev().
Without passing the board revision the kernel does not operate properly as the
initialization of peripherals are different in revA versus revB boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Otavio Salvador [Tue, 2 Oct 2012 09:22:10 +0000 (09:22 +0000)]
mx6qsabreauto: Change mmcroot so it works out of box
The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we
move this to the board configuration file.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Benoît Thébaudeau [Mon, 1 Oct 2012 08:36:25 +0000 (08:36 +0000)]
mxc: Fix SDHC multi-instance clock
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:26:02 +0000 (10:26 +0000)]
mx35: Fix eSDHC clocks
Each eSDHC instance has a dedicated clock.
gd->sdhc_clk must also be set accordingly. This is good for the case only a
single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A
future patch will fix the multi-instance use case (initialization made directly
with fsl_esdhc_initialize()).
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Benoît Thébaudeau [Mon, 20 Aug 2012 09:54:53 +0000 (09:54 +0000)]
mx35: Clean up lowlevel_init
Clean up mx35 lowlevel_init:
- Indent with tabs.
- Fix comments.
- Use defined values instead of literal constants.
- Use defined macros instead of duplicating code.
- Use macro parameters with default values instead of #define'd configs.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Tom Rini [Mon, 15 Oct 2012 20:37:22 +0000 (13:37 -0700)]
Merge branch 'agust@denx.de-next' of git://git.denx.de/u-boot-staging
Joe Hershberger [Fri, 12 Oct 2012 10:23:37 +0000 (10:23 +0000)]
tools/env: Fix build failure from missing header include
This was introduced in:
8679d0ffdcc0beafea8e6942c0c67cf859afa18e -
COMMON: Use __stringify() instead of MK_STR()
The header is now needed since common.h is not included in this tool.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sat, 6 Oct 2012 14:05:01 +0000 (14:05 +0000)]
kerneldoc: Add myself to the git-mailrc for kerneldoc
Add entry for kerneldoc into the git-mailrc pointing to the U-Boot ML
and myself.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 6 Oct 2012 14:05:00 +0000 (14:05 +0000)]
kerneldoc: Implement "Example" section handling
The default kernel-doc strips starting spaces from every single
line in the Example section. This makes the code look bad. Thus,
implement special handling for this section.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 6 Oct 2012 14:04:59 +0000 (14:04 +0000)]
kerneldoc: Add nicer CSS stylesheet for HTML docs
Import basic CSS stylesheet for the HTML documentation. The base for
the stylesheet is taken from:
http://ds9a.nl/docbook/minimal-page.html
I customized the CSS a bit further, for example to add curvy corners
to example section and change the tint of gray. The HTML documentation
does not look that crude anymore.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 6 Oct 2012 14:04:58 +0000 (14:04 +0000)]
kerneldoc: Implant DocBook from Linux kernel
Pull slightly modified version of Documentation/DocBook, the related perl
script scripts/kernel-doc and the scripts/docproc.c from Linux kernel and
implant it into U-Boot. This will allow smooth generation of kerneldoc
style documentation.
It was necessary to modify the DocBook/Makefile to work with U-Boot build
system. The changes were only minor though and involved replacing the kbuild
specific parts.
It was also necessary to replace use of variables like KERNEL_VERSION with
U_BOOT_VERSION, strings like Linux kernel with U-Boot Bootloader etc. so
the generated result actually matches.
Finally, it was necessary to adjust docproc.c, since the documentation in
U-Boot is located in doc/DocBook instead of Documentation/DocBook as is in
case of the Linux kernel.
Some parts of the DocBook Makefile are unused, but to allow easier sync with
Linux kernel, these parts are still left in. The targets enabled now are
"htmldocs" "pdfdocs" "psdocs" "xmldocs" and "cleandocs" to remove the results
of documentation build.
Linux scripts/docproc.c:
commit
f0f3ca8d967462dafb815412b14ca3339b9817a6
Date: Wed Jun 15 11:53:13 2011 +0200
Linux scripts/kernel-doc:
commit
1b40c1944db445c1de1c47ffd8cd426167f488e8
Date: Sun Aug 12 10:46:15 2012 +0200
Linux Documentation/DocBook:
commit
bb8187d35f820671d6dd76700d77a6b55f95e2c5
Date: Thu May 17 19:06:13 2012 -0400
Signed-off-by: Marek Vasut <marex@denx.de>
Fabio Estevam [Sun, 30 Sep 2012 05:07:10 +0000 (05:07 +0000)]
configs: mx6qsabre_common.h: Use default clock definitions
Since commit
50d4a707f0 (mx5/6: Define default SoC input clock frequencies)
we can use the default clock values.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Tue, 25 Sep 2012 08:43:57 +0000 (08:43 +0000)]
mx6qsabreauto: Add Ethernet support
mx6qsabreauto has a AR8031 Gigabit PHY.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Benoît Thébaudeau [Mon, 20 Aug 2012 09:00:57 +0000 (09:00 +0000)]
mx25: Clean up lowlevel_init
Clean up mx25 lowlevel_init:
- Add comments.
- Do not use write32 repeatedly with the same value in order not to increase
code size.
- Make register values configurable.
- Use macro parameters with default values instead of literal constants.
- Use defined macros instead of duplicating code.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Matthias Weisser <weisserm@arcor.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 08:43:07 +0000 (08:43 +0000)]
mx31: Fix PDR0_CSI_PODF
The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0
register is actually composed of two bit-fields: one pre-divider and one
post-divider. This patch fixes the CCM access macros and the code using them
accordingly.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 11:03:59 +0000 (11:03 +0000)]
mx35: Define MAX and AIPS registers
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 08:43:29 +0000 (08:43 +0000)]
mx31: Add more CCM access macros
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Tue, 14 Aug 2012 05:19:12 +0000 (05:19 +0000)]
mx5: Optimize lowlevel_init code size
Optimize mx5 lowlevel_init.S code size:
- Compute values at compile time rather than at runtime where possible.
- Assign r4 to hold the zero value rather than setting registers to 0 again and
again.
- Associate a function to setup_pll rather than expanding its large macro code
multiple times.
- Allocate constant values in section only if used.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Otavio Salvador [Wed, 26 Sep 2012 11:37:01 +0000 (11:37 +0000)]
mx6qsabreauto: Use ttymxc3 as console
The mx6qsabreauto console is different than mx6qsabresd so the console
configuration is now set in the board file.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:28:29 +0000 (10:28 +0000)]
mx25: Fix eSDHC support
The MMC driver appropriate for the i.MX25 is fsl_esdhc, which has nothing to do
with mxcmmc.
Also, each eSDHC instance has a dedicated clock, so gd->sdhc_clk must be set
accordingly. This is good for the case only a single SDHC instance is used
(initialization made with fsl_esdhc_mmc_init()). A future patch will fix the
multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:28:09 +0000 (10:28 +0000)]
mx25: Define cpu_eth_init() only if needed
The FEC is the only SoC Ethernet support available on i.MX25, so define
cpu_eth_init() only for it instead of returning a misleading success code.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:27:57 +0000 (10:27 +0000)]
mx25: Clean up clocks API
Use the standard mxc_get_clock() instead of exporting internal functions and
using literal constant values.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:27:44 +0000 (10:27 +0000)]
mx25 clocks: Fix MXC_FEC_CLK
mxc_get_clock(MXC_FEC_CLK) should return the IPG clock, not the AHB clock.
Also, imx_get_fecclk() was correct but reimplemented the calculation of the IPG
clock, so remove the duplicated code.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:27:28 +0000 (10:27 +0000)]
mx25: Define more standard clocks
Define AHB, IPG and CSPI clocks.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:27:14 +0000 (10:27 +0000)]
mx25: Clean up clock calculations
Avoid possible overflow in clock calculations, and do not waste calls to lldiv()
to divide simple ulongs.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:26:54 +0000 (10:26 +0000)]
mx25: Fix decode_pll
The MFN bit-field of the PLL registers represents a signed value. See the
reference manual.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:24:37 +0000 (10:24 +0000)]
mx5/6 clocks: Fix SDHC clocks
The i.MX5 eSDHC clocks were considered as coming from the IPG clock although
they have dedicated clock paths.
Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must
be set accordingly. This is good for the case only a single SDHC instance is
used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix
the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:24:13 +0000 (10:24 +0000)]
mx51: Fix I2C clock ID check
There are only 2 I²C instances on i.MX51, but 3 on i.MX53.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:23:58 +0000 (10:23 +0000)]
mx5 clocks: Fix MXC_FEC_CLK
The FEC clock does not come from PLL1, but from the IPG clock. The previous code
was even inconsistent with itself, returning the IPG clock as expected for
imx_get_fecclk(), but the PLL1 clock for mxc_get_clock(MXC_FEC_CLK).
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:23:42 +0000 (10:23 +0000)]
mx5 clocks: Simplify imx_get_cspiclk()
The code handling the dividers was duplicated for each possible input clock, and
this function can benefit from the newly introduced get_standard_pll_sel_clk()
function instead of duplicating this mux handling code.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:23:23 +0000 (10:23 +0000)]
mx5 clocks: Fix get_uart_clk()
This function returned
66500000 instead of the correct lp_apm clock frequency if
the CCM.CSCMR1.uart_clk_sel mux is set to 3.
This patch fixes this issue by introducing the get_standard_pll_sel_clk()
function that will be used by future patches to handle identical muxes used by
many other clocks.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:23:08 +0000 (10:23 +0000)]
mx5 clocks: Fix get_ipg_per_clk()
This fixes the "IPG PERCLK" frequency printed by the clocks command. The issue
was that get_ipg_per_clk() used periph_clk instead of lp_apm in the case
CCM.CBCMR.perclk_lp_apm_sel is set.
It also fixes I²C support.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:22:51 +0000 (10:22 +0000)]
mx5 clocks: Fix get_periph_clk()
In the case periph_clk comes from periph_apm_clk, the latter is selected by the
CCM.CBCMR.periph_apm_sel mux, which can source the lp_apm clock from its
input ♯2. get_periph_clk() returned 0 instead of the lp_apm clock frequency in
this case.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:22:37 +0000 (10:22 +0000)]
mx5 clocks: Fix get_lp_apm()
If CCM.CCSR.lp_apm is set, the lp_apm clock is not necessarily 32768 Hz x 1024.
In that case:
- on i.MX51, this clock comes from the output of the FPM,
- on i.MX53, this clock comes from the output of PLL4.
This patch fixes the code accordingly.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:22:22 +0000 (10:22 +0000)]
mx5 clocks: Add and use CCSR definitions
This fixes config_pll_clk(), which used 0x20 instead of 0x200 for PLL4_CLOCK.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Fri, 28 Sep 2012 07:09:03 +0000 (07:09 +0000)]
mx51: Fix USB PHY clocks
The i.MX51 has a single USB PHY clock, while the i.MX53 has two. These 3 clocks
have different clock gate control bit-fields.
The existing code was correct only for i.MX53, so this patch fixes the i.MX51
use case.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Jana Rapava <fermata7@gmail.com>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:21:22 +0000 (10:21 +0000)]
mx5: Fix clock gate values
The clock gate values are 2-bit bit-fields. Hence, setting or clearing only one
of these bits like what was done is wrong and can lead to unpredictable behavior
depending on the original value of these bit-fields.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:21:00 +0000 (10:21 +0000)]
mx5: Use explicit clock gate names
Use clock gate definitions having names showing clearly the gated clock instead
of names giving only a register field index.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:20:33 +0000 (10:20 +0000)]
mx5 clocks: Cleanup
Clean up the i.MX5 clock driver:
- Use readl() and writel() instead of their __raw_ counterparts.
- Use the clr/setbits_le32() family of macros rather than expanding code.
- Use accessor macros for bit-fields instead of _MASK and _OFFSET.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Benoît Thébaudeau [Thu, 27 Sep 2012 10:19:58 +0000 (10:19 +0000)]
mx5/6: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX5/6 in order to get rid of
duplicated definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Matthias Weisser [Mon, 24 Sep 2012 02:46:53 +0000 (02:46 +0000)]
imx: Use MXC_I2C_CLK in imx i2c driver
i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using
MXC_I2C_CLK on all imx systems using i2c.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Eric Benard [Sun, 23 Sep 2012 02:03:05 +0000 (02:03 +0000)]
mx25: add CPU revision 1.2
tested on a MCIMX257CJM4A which now reports :
CPU: Freescale i.MX25 rev1.2 at 399 MHz
Signed-off-by: Eric Bénard <eric@eukrea.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Fabio Estevam [Mon, 24 Sep 2012 08:09:33 +0000 (08:09 +0000)]
mx6q: Add basic support for mx6qsabreauto
mx6qsabreauto is a board based on mx6q SoC with the following features:
- 2GB of DDR3
- 2 USB ports
- 1 HDMI output port
- SPI NOR
- 2 LVDS LCD ports
- Gigabit Ethernet
- Camera
- eMMC and SD card slot
- Multichannel Audio
- CAN
- SATA
- NAND
- PCIE
- Video Input
Add very basic support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 24 Sep 2012 08:09:32 +0000 (08:09 +0000)]
configs: mx6: Add a common config file
Add a common mx6 config file that can be shared between some mx6 boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Eric Nelson [Tue, 18 Sep 2012 15:26:32 +0000 (15:26 +0000)]
i.MX6: get rid of redundant struct src_regs (dupe of struct src)
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Wed, 19 Sep 2012 08:32:31 +0000 (08:32 +0000)]
i.MX6: define struct iomuxc and IOMUX_GPR2 register bitfields
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Eric Nelson [Wed, 19 Sep 2012 08:29:46 +0000 (08:29 +0000)]
i.MX6: Add ANATOP_PFD_480 bitfield constants
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Eric Nelson [Fri, 21 Sep 2012 11:41:42 +0000 (11:41 +0000)]
i.MX6: define IOMUX_GPR3 register bitfields
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Wed, 19 Sep 2012 08:33:50 +0000 (08:33 +0000)]
i.MX6: define bitfields for CHSCCDR register
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Mon, 17 Sep 2012 10:20:50 +0000 (10:20 +0000)]
i.MX6: change register name for CCM_CHSCCDR to match ref. manual
Register CCM_CHSCCDR (offset 0x34 in CCM) is named CCM_CHSCCDR in
reference manual, but was named chscdr in struct mxc_ccm_reg.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Eric Nelson [Fri, 21 Sep 2012 07:33:51 +0000 (07:33 +0000)]
i.MX6: provide functional names for CCM_CCGR0-CCGR6 bit fields
Add meaningful constants for each clock channels and use them for
enabling and disabling i.MX6 clocks.
Includes an update to enable/disable the IPU1 clock in
drivers/video/ipu_common to remove IMX5x register access
when used on i.MX6 as discussed in V1:
http://patchwork.ozlabs.org/patch/185129/
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Fabio Estevam [Tue, 18 Sep 2012 09:27:49 +0000 (09:27 +0000)]
mx6qsabresd: Add 8-bit USDHC support
USDHC3 has 8 pins wired in mx6qsabresd. Configure the extra pins.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Tue, 18 Sep 2012 17:24:23 +0000 (17:24 +0000)]
mx6qsabresd: Add Ethernet support
mx6qsabresd has a AR8031 Gigabit PHY.
Add support for it.
Also increase CONFIG_SYS_MALLOC_LEN so that FEC buffer allocation does not fail.
Tested on 1Gbp and 100Mbps networks.
Suggested-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Fabio Estevam [Thu, 13 Sep 2012 03:18:20 +0000 (03:18 +0000)]
mx6: Add basic support for mx6qsabresd board.
mx6qsabresd is a board based on mx6q SoC with the following features:
- 1GB of DDR3
- 1 USB OTG port
- 1 HDMI output port
- SPI NOR
- LVDS panel
- Gigabit Ethernet
- Camera Connector
- eMMC and SD card slot
- Audio
Add very basic support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Thu, 13 Sep 2012 03:18:19 +0000 (03:18 +0000)]
mx6q: Factor out common DDR3 init code
Factor out common DDR3 initialization code, allowing easier maintainance of such
scripts.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Lukasz Dalek [Tue, 2 Oct 2012 22:51:06 +0000 (00:51 +0200)]
pxa: Add code to examine cpu model and revision
Add function which return CPU model and revision which can be used for
cpu detection.
Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
Lucas Stach [Sat, 29 Sep 2012 10:02:09 +0000 (10:02 +0000)]
tegra: nand: add board pinmux
Boards may require a different pinmux setup for NAND than the default one.
Add a way to call into board specific code to set this up.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Lucas Stach [Sat, 29 Sep 2012 10:02:08 +0000 (10:02 +0000)]
tegra: clean up board include hell
The prototypes used in board files were all scattered out, which lead to
code duplication between SPL and normal U-Boot and some prototypes not actually
being used. Consolidate this in a common board header.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Lucas Stach [Thu, 27 Sep 2012 13:04:27 +0000 (13:04 +0000)]
tegra: add funcmux entry for NAND attached to KBC
Secondary config for the Flash attachment.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Lucas Stach [Tue, 25 Sep 2012 20:21:14 +0000 (20:21 +0000)]
tegra20: rework UART GPIO handling
Rename board provided gpio_config_uart() to
gpio_early_init_uart() as it does the same thing as the equally
called function provided by the uart-switch code. This allows
to simply call this function in early board init whether or not
we are building with CONFIG_UART_SWITCH defined.
Also provide a weak symbol for this function, to avoid the
need to provide this function for boards that don't need any
fixup.
This patch supersedes the earlier posted
"tegra: convert gpio_config_uart to weak symbol".
Build tested with MAKEALL -s tegra20
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Lucas Stach [Tue, 25 Sep 2012 20:21:13 +0000 (20:21 +0000)]
tegra20: add clock_set_pllout function
Common practice on Tegra 2 boards is to use the pllp_out4 FO
to generate the ULPI reference clock. For this to work we have
to override the default hardware generated output divider.
This function adds a clean way to do so.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Lucas Stach [Tue, 25 Sep 2012 09:59:12 +0000 (09:59 +0000)]
tegra20: complete periph_id enum
Most Tegra boards output the ULPI reference clock on pad DEV2.
Complete the periph_id enum so that we are able to enable this
clock output circuit.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 25 Sep 2012 13:32:26 +0000 (13:32 +0000)]
tegra: enable CONFIG_CMD_PART
This is extremely likely to be used from the boot.scr that Tegra's default
bootcmd locates and executes.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Warren [Wed, 19 Sep 2012 22:50:56 +0000 (15:50 -0700)]
Tegra20: Move some include files to arch-tegra for sharing with Tegra30
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.
All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Warren [Wed, 19 Sep 2012 21:08:52 +0000 (14:08 -0700)]
Tegra20: Move some code files to common directories for upcoming Tegra30 patches.
Move files that are going to be common between T20 and T30 into 'tegra-common'
subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any
files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs
and modified for that SoC. The 'common' files should need only minor changes.
Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a
follow-on patch.
Builds fine w/MAKEALL -s tegra20. Checkpatch.pl is clean.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Wed, 19 Sep 2012 00:37:21 +0000 (00:37 +0000)]
tegra: Rename Medcom to Medcom-Wide
Medcom is the marketing name for an older, PXA-based version of the same
device. In order to avoid confusion, rename the Tegra-based version to
the new marketing name.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Thierry Reding [Wed, 19 Sep 2012 00:37:20 +0000 (00:37 +0000)]
tegra: Update Avionic Design vendor prefix
The official vendor prefix for Avionic Design is now "ad". Update the
board DTS files accordingly.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Joe Hershberger [Thu, 4 Oct 2012 08:31:00 +0000 (08:31 +0000)]
tools: Add a README note about fw_printenv lock file
Add a mention of the lock file to the README for the fw_printenv tool.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reported-by: Luka Perkov <uboot@lukaperkov.net>
Joe Hershberger [Wed, 3 Oct 2012 09:38:50 +0000 (09:38 +0000)]
env: Check for NULL pointer in envmatch()
If the pointer passed into envmatch() is NULL, return -1 instead of
crashing.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Joe Hershberger [Wed, 3 Oct 2012 09:38:49 +0000 (09:38 +0000)]
tools/env: Serialize calls to fw_*env
Use a lock file at /var/lock/fw_printenv.lock.
Avoids seriously confusing the MTD driver.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>