Arnd Bergmann [Fri, 14 Apr 2023 13:24:00 +0000 (15:24 +0200)]
Merge tag 'riscv-dt-for-v6.4' of https://git./linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.4
Microchip:
A "fix" for the system controller's regs on PolarFire SoC, adding a
missing reg property.
The patch had been sitting there for months and I only re-found it
recently, so you can guess how much of a "fix" it actually is. It'll
become needed when the system controller's QSPI gets added in the future,
but at present there's no urgency as the driver can handle both the
current and "fixed" versions.
StarFive:
Basic support for the JH7110 & the associated first-party dev board, the
VisionFive v2 (in two forms). There's a bunch of dt-bindings required
for this too, all of which have had input from the DT folk. There's
enough in this tag to boot to a console w/ an initramfs but little more.
The SoC supports some of the "new" bit manipulation instructions, which
is a good test for the recently added Zbb support in the kernel.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree
riscv: dts: starfive: Add StarFive JH7110 pin function definitions
riscv: dts: starfive: Add initial StarFive JH7110 device tree
dt-bindings: riscv: Add SiFive S7 compatible
dt-bindings: interrupt-controller: Add StarFive JH7110 plic
dt-bindings: timer: Add StarFive JH7110 clint
dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
riscv: dts: microchip: fix the mpfs' mailbox regs
riscv: dts: microchip: add mpfs specific macb reset support
Link: https://lore.kernel.org/r/20230406-shank-impromptu-3d483bbc249f@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 14 Apr 2023 13:22:45 +0000 (15:22 +0200)]
Merge tag 'tegra-for-6.4-arm64-dt' of git://git./linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.4-rc1
This adds support for the Jetson Orin NX and includes updates for Jetson
AGX Orin (audio codec, USB Type-C support).
* tag 'tegra-for-6.4-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add vccmq on Jetson TX2
arm64: tegra: Populate USB Type-C Controller for Jetson AGX Orin
arm64: tegra: Audio codec support on Jetson AGX Orin
arm64: tegra: Support Jetson Orin NX reference platform
arm64: tegra: Support Jetson Orin NX
dt-bindings: tegra: Document Jetson Orin NX reference platform
dt-bindings: tegra: Document Jetson Orin NX
arm64: tegra: Add DSU PMUs for Tegra234
arm64: tegra: Drop serial clock-names and reset-names
Link: https://lore.kernel.org/r/20230406124804.970394-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 14 Apr 2023 13:21:05 +0000 (15:21 +0200)]
Merge tag 'tegra-for-6.4-arm-dt' of git://git./linux/kernel/git/tegra/linux into soc/dt
ARM: tegra: Device tree changes for v6.4-rc1
There are several fixes and cleanups here for some of the older Tegra
consumer devices.
* tag 'tegra-for-6.4-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra30: Use cpu* labels
ARM: tegra30: peripherals: Add 266.5MHz nodes
ARM: tegra: asus-tf101: Fix accelerometer mount matrix
ARM: tegra: transformers: Bind RT5631 sound nodes
ARM: tegra: transformers: Update WM8903 sound nodes
Link: https://lore.kernel.org/r/20230406124804.970394-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 14 Apr 2023 13:20:35 +0000 (15:20 +0200)]
Merge tag 'tegra-for-6.4-dt-bindings' of git://git./linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.4-rc1
This is a single patch that drops unneeded quotes from various Tegra-
related device tree bindings.
* tag 'tegra-for-6.4-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: arm: nvidia: Drop unneeded quotes
Link: https://lore.kernel.org/r/20230406124804.970394-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 14 Apr 2023 13:19:25 +0000 (15:19 +0200)]
Merge tag 'asahi-soc-dt-6.4' of https://github.com/AsahiLinux/linux into soc/dt
Apple SoC DT updates for 6.4.
This time we have the M2 (t8112) device trees and compatible updates,
as well as a minor fix for PCIe ports on the prior models.
* tag 'asahi-soc-dt-6.4' of https://github.com/AsahiLinux/linux:
arm64: dts: apple: t600x: Disable unused PCIe ports
arm64: dts: apple: t8103: Disable unused PCIe ports
arm64: dts: apple: t8112: Initial t8112 (M2) device trees
dt-bindings: arm: apple: Add t8112 j413/j473/j493 compatibles
dt-bindings: clock: apple,nco: Add t8112-nco compatible
dt-bindings: i2c: apple,i2c: Add apple,t8112-i2c compatible
dt-bindings: pinctrl: apple,pinctrl: Add apple,t8112-pinctrl compatible
dt-bindings: pci: apple,pcie: Add t8112 support
dt-bindings: nvme: apple: Add apple,t8112-nvme-ans2 compatible string
dt-bindings: mailbox: apple,mailbox: Add t8112 compatibles
dt-bindings: iommu: apple,sart: Add apple,t8112-sart compatible string
dt-bindings: interrupt-controller: apple,aic2: Add apple,t8112-aic compatible
dt-bindings: arm: cpus: Add apple,avalanche & blizzard compatibles
dt-bindings: watchdog: apple,wdt: Add t8112-wdt compatible
dt-bindings: arm: apple: apple,pmgr: Add t8112-pmgr compatible
dt-bindings: power: apple,pmgr-pwrstate: Add t8112 compatible
Link: https://lore.kernel.org/r/7263df01-aebc-2db5-f074-4805e0ae9fbc@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 14 Apr 2023 13:16:22 +0000 (15:16 +0200)]
Merge tag 'samsung-dt-6.4' of https://git./linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM changes for v6.4
1. Several cleanups and improvements as a result of dtbs_checks: align
node names with bindings, drop incorrect properties, fix clock-names,
add missing "ports" node.
2. Move DP and MIPI phys to PMU node (DTS with binding change).
3. Drop old MSHC aliases (while adding proper mmc-ddr-1_8v which was
selected by the driver based on the MSHC alias) and add generic MMC
aliases in each board. The aliases match known numbering in
the schematics.
* tag 'samsung-dt-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: soc: samsung: exynos-pmu: allow phys as child on Exynos3 and Exynos4
ARM: dts: exynos: add mmc aliases
ARM: dts: exynos: replace mshc0 alias with mmc-ddr-1_8v property
ARM: dts: exynos: fix MCT compatible in Universal C210
ARM: dts: exynos: move DP and MIPI phys to PMU node in Exynos5250
ARM: dts: exynos: move DP and MIPI phys to PMU node in Exynos5420
ARM: dts: exynos: move MIPI phy to PMU node in Exynos4
ARM: dts: exynos: move MIPI phy to PMU node in Exynos3250
ARM: dts: exynos: drop unused samsung,camclk-out property in Midas
ARM: dts: s5pv210: correct MIPI CSIS clock name
ARM: dts: exynos: correct whitespace in Midas
ARM: dts: exynos: fix WM8960 clock name in Itop Elite
ARM: dts: exynos: add ports to TC358764 bridge on Arndale
ARM: dts: exynos: drop fake align STMPE properties in P4 Note
ARM: dts: exynos: align STMPE ADC node name with bindings in P4 Note
Link: https://lore.kernel.org/r/20230405080438.156805-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 14 Apr 2023 13:13:22 +0000 (15:13 +0200)]
Merge tag 'samsung-dt64-6.4' of https://git./linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.4
1. Exynos850: add headers with AUD, G3D and HSI clock controller clock
IDs. Add G3D (GPU) clock controller node.
2. Exynos5433: fixes for dtbs_check: move MIPI phy to PMU node.
3. Drop old MSHC aliases (while adding proper mmc-ddr-1_8v which was
selected by the driver based on the MSHC alias) and add generic MMC
aliases in each board. The aliases match known numbering in
the schematics.
* tag 'samsung-dt64-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: add mmc aliases
arm64: dts: exynos: drop mshc aliases
arm64: dts: exynos: Add CMU_G3D node for Exynos850 SoC
arm64: dts: exynos: move MIPI phy to PMU node in Exynos5433
dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
Link: https://lore.kernel.org/r/20230405080438.156805-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conor Dooley [Wed, 5 Apr 2023 21:20:55 +0000 (22:20 +0100)]
Merge branch 'riscv-jh7110_initial_dts' into riscv-dt-for-next
Merge Hal's series adding support for the new StarFive JH7110 SoC.
There's a few bindings here for core components that were not picked up
by the various maintainers for the subsystems (previously Palmer would
pick these up via the RISC-V tree) & the first two commits in the branch
are shared with the clk tree, since the dts depends on defines in the
dt-binding headers.
This is based on -rc2, as the board does not actually boot on -rc1
due to the bug Linus introduced.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Emil Renner Berthing [Sat, 1 Apr 2023 11:19:33 +0000 (19:19 +0800)]
riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree
Add a minimal device tree for StarFive JH7110 VisionFive 2 board
which has version A and version B. Support booting and basic
clock/reset/pinctrl/uart drivers.
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Co-developed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Jianlong Huang [Sat, 1 Apr 2023 11:19:32 +0000 (19:19 +0800)]
riscv: dts: starfive: Add StarFive JH7110 pin function definitions
Add pin function definitions for StarFive JH7110 SoC.
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Emil Renner Berthing [Sat, 1 Apr 2023 11:19:31 +0000 (19:19 +0800)]
riscv: dts: starfive: Add initial StarFive JH7110 device tree
Add initial device tree for the JH7110 RISC-V SoC by StarFive
Technology Ltd.
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Co-developed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
[conor: squashed in the removal of the S7's non-existent mmu]
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Hal Feng [Sat, 1 Apr 2023 11:19:30 +0000 (19:19 +0800)]
dt-bindings: riscv: Add SiFive S7 compatible
Add a new compatible string in cpu.yaml for SiFive S7 CPU
core which is used on SiFive U74-MC core complex etc.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Emil Renner Berthing [Sat, 1 Apr 2023 11:19:29 +0000 (19:19 +0800)]
dt-bindings: interrupt-controller: Add StarFive JH7110 plic
Add compatible string for StarFive JH7110 plic.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Emil Renner Berthing [Sat, 1 Apr 2023 11:19:28 +0000 (19:19 +0800)]
dt-bindings: timer: Add StarFive JH7110 clint
Add compatible string for the StarFive JH7110 clint.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Emil Renner Berthing [Sat, 1 Apr 2023 11:19:14 +0000 (19:19 +0800)]
dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
Add bindings for the always-on clock and reset generator (AONCRG) on the
JH7110 RISC-V SoC by StarFive Ltd.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Emil Renner Berthing [Sat, 1 Apr 2023 11:19:13 +0000 (19:19 +0800)]
dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Add bindings for the system clock and reset generator (SYSCRG) on the
JH7110 RISC-V SoC by StarFive Ltd.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Ben Dooks [Fri, 27 Jan 2023 09:39:10 +0000 (09:39 +0000)]
arm64: tegra: Add vccmq on Jetson TX2
The TX2 SoM's SDIO WiFI card is connected via mmc@3440000 however it does
not look like the upstream kernel is even bothering to power this (and
the regulator framework shuts down this power rail post kernel init).
The issue seems to be a missing link for vccq from the MAX77620 PMIC's LDO5
which is labeled vddio_sdmmc3 (and not used anywhere else) to the mmc@3440000
node to ensure there is at leasr bus power.
Note this does not fix the WiFi issue on upstream kernels, there is still
something else missing that gets the BCM WiFi device to detect properly.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Tue, 31 Jan 2023 17:57:47 +0000 (17:57 +0000)]
arm64: tegra: Populate USB Type-C Controller for Jetson AGX Orin
Add the USB Type-C controller that is present on the Jetson AGX Orin
board. The ports for the Type-C controller are not populated yet, but
will be added later once the USB host and device support for Jetson AGX
Orin is enabled.
This is based upon a patch from Wayne Chang <waynec@nvidia.com>.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Krzysztof Kozlowski [Tue, 7 Feb 2023 19:28:49 +0000 (20:28 +0100)]
dt-bindings: soc: samsung: exynos-pmu: allow phys as child on Exynos3 and Exynos4
Just like on Exynos5250, Exynos5420 and Exynos5433 the MIPI phy is
actually part of the Power Management Unit system controller thus allow
it as PMU's child.
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230207192851.549242-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sameer Pujar [Mon, 13 Feb 2023 04:44:34 +0000 (10:14 +0530)]
arm64: tegra: Audio codec support on Jetson AGX Orin
Jetson AGX Orin has onboard RT5640 audio codec. This patch adds the
codec device node and the bindings to I2S1 interface.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Arnd Bergmann [Tue, 4 Apr 2023 14:28:16 +0000 (16:28 +0200)]
Merge tag 'amlogic-arm64-dt-for-v6.4' of https://git./linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM64 DT changes for v6.4:
- set of DT bindings check fixes
- adjust order of some compatibles to match dt-schema migration
- add support for BananaPi M2S variants
- gxbb-kii-pro: add audio & bluetooth support
- meson-a1: add gpio_intc node
- gxl: use gxl mdio multiplexer
- Add initial support for BPI-CM4 module with BPI-CM4IO baseboard
* tag 'amlogic-arm64-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: amlogic: Add initial support for BPI-CM4 module with BPI-CM4IO baseboard
dt-bindings: arm: amlogic: Document the boards with the BPI-CM4 connected
arm64: dts: amlogic: gxl: use gxl mdio multiplexer
arm64: dts: meson-a1: add gpio_intc node
arm64: dts: meson: gxbb-kii-pro: add initial audio support
arm64: dts: meson: gxbb-kii-pro: complete the bluetooth node
arm64: dts: meson: gxbb-kii-pro: sort and tidy the dts
arm64: dts: meson: adjust order of some compatibles
arm64: dts: meson: add support for BananaPi M2S variants
dt-bindings: arm: amlogic: add support for BananaPi M2S variants
arm64: dts: amlogic: meson-gxm-s912-libretech-pc: remove unused pinctrl-names from phy node
arm64: dts: amlogic: meson-sm1: use correct enable-gpios
arm64: dts: amlogic: meson-s4: fix apb4 bus node name
arm64: dts: amlogic: meson-g12b-odroid-go-ultra: rename keypad-gpio pinctrl node
arm64: dts: amlogic: meson-g12b-radxa-zero2: fix pwm clock names
arm64: dts: amlogic: meson-axg-jethome-jethub-j1xx: remove invalid #gpio-cells in onewire node
arm64: dts: amlogic: meson-gxm-s912-libretech-pc: add simple connector node in fusb302 node
arm64: dts: amlogic: meson-sm1-bananapi: correct usb-hub hog node name
Link: https://lore.kernel.org/r/1b955bb7-1a35-8d67-beb6-dd289533ff6f@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 4 Apr 2023 14:27:38 +0000 (16:27 +0200)]
Merge tag 'amlogic-arm-dt-for-v6.4' of https://git./linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM DT changes for v6.4:
- adjust order of some compatibles
- meson8: add the xtal_32k_out pin
- meson8: add the SDXC_A pins
- mxiii-plus: Enable Bluetooth and WiFi support
* tag 'amlogic-arm-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
ARM: dts: meson8m2: mxiii-plus: Enable Bluetooth and WiFi support
ARM: dts: meson8: add the SDXC_A pins
ARM: dts: meson8: add the xtal_32k_out pin
arm: dts: meson: adjust order of some compatibles
Link: https://lore.kernel.org/r/eb1f32f8-822d-9cfc-fca6-9e044bf4a5ab@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Neil Armstrong [Mon, 3 Apr 2023 07:42:21 +0000 (09:42 +0200)]
dt-bindings: arm: oxnas: remove obsolete bindings
Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove the
OX810 and OX820 SoC and boards bindings.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Neil Armstrong [Mon, 3 Apr 2023 07:42:18 +0000 (09:42 +0200)]
ARM: dts: oxnas: remove obsolete device tree files
Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX810 and OX820 devices.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 4 Apr 2023 14:24:46 +0000 (16:24 +0200)]
Merge tag 'at91-dt-6.4' of git://git./linux/kernel/git/at91/linux into soc/dt
AT91 device tree updates for 6.4:
It contains:
- Update to maximum frequency for QSPI on several boards thanks
to the additon of the new spi-cs-setup-ns property.
* tag 'at91-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum frequency
ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum frequency
ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its maximum frequency
ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency
Link: https://lore.kernel.org/r/20230331142751.41522-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 4 Apr 2023 14:20:32 +0000 (16:20 +0200)]
Merge tag 'omap-for-v6.4/dt-overlays-signed' of git://git./linux/kernel/git/tmlind/linux-omap into soc/dt
Devicetree overlays for omaps for v6.4
Devicetree overlays for omaps to enable the optional LCD and touchscreen
modules on am57xx-evm and am57xx-idk boards.
* tag 'omap-for-v6.4/dt-overlays-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am57xx-idk: Add IDK displays and touchscreens
ARM: dts: ti: Add AM57xx GP EVM Rev A3 board support
ARM: dts: ti: Add AM57xx GP EVM board support
Link: https://lore.kernel.org/r/pull-1680180448-508978@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 4 Apr 2023 14:19:30 +0000 (16:19 +0200)]
Merge tag 'omap-for-v6.4/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into soc/dt
Devicetree changes for omaps for v6.4
Devicetree changes for omaps for gta04, Phytec am335x devices, and to
drop a obsolete compatible property:
- A non-urgent fix for gta04 to enable more dma channels for some audio
configurations
- Update the dts compatible and vendor prefixes for gta04
- A series of updates for Phytec am335x based boards to configure more
devices like rtc and audio, and a few clean-up patches
- A change to drop the usage of "ti,omap36xx" compatible, the driver
code already checks for "ti,omap3630" that is also alread set in the
dts files. This makes the yaml binding conversion a bit simpler.
* tag 'omap-for-v6.4/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap: Drop ti,omap36xx compatible
ARM: dts: am335x-phycore-som: Remove superseded/invalid GPMC NAND type.
ARM: dts: am335x-pcm-953: Remove superseded/invalid LED trigger.
ARM: dts: am335x-phycore-som: Remove underscore in node names.
ARM: dts: am335x-regor: Remove underscore in node names.
ARM: dts: am335x-pcm-935: Remove underscore in node names.
ARM: dts: am335x-wega: Change node name of sound card, remove underscores.
ARM: dts: am335x-wega: Fix audio codec by using simple-audio-card driver.
ARM: dts: am335x-phycore-som: Add alias for TPS65910 RTC
ARM: dts: omap3-gta04: fix compatible record for GTA04 board
ARM: dts: gta04: fix excess dma channel usage
Link: https://lore.kernel.org/r/pull-1680180389-756753@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 4 Apr 2023 14:17:15 +0000 (16:17 +0200)]
Merge tag 'renesas-dts-for-v6.4-tag1' of git://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.4
- Add USB3 support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit 2.0,
- Add uSD card and eMMC support for the RZ/V2M Evaluation Kit 2.0,
- Add CAN-FD, thermal, GMSL2 video capture, and sound support for the
R-Car V4H SoC and the White-Hawk development board,
- Add PMU support for the RZ/G2UL, RZ/G2L{,C}, and RZ/V2L SoCs,
- Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC,
- Add I2C EEPROM support for the Atmark Techno Armadillo-800-EVA, and
the Renesas Condor and ULCB development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (30 commits)
arm64: dts: renesas: r8a779a0: Update CAN-FD to R-Car Gen4 compatible value
arm64: dts: renesas: ulcb: Add I2C EEPROM for PMIC
arm64: dts: renesas: condor: Add I2C EEPROM for PMIC
ARM: dts: armadillo800eva: Add I2C EEPROM for MAC address
arm64: dts: renesas: Remove R-Car H3 ES1.* devicetrees
arm64: dts: renesas: white-hawk: Add R-Car Sound support
arm64: dts: renesas: r8a779g0: R-Car Sound support
arm64: dts: renesas: r9a07g043: Update IRQ numbers for SSI channels
arm64: dts: renesas: r9a07g054: Update IRQ numbers for SSI channels
arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels
arm64: dts: renesas: r8a774c0: Remove bogus voltages from OPP table
arm64: dts: renesas: r8a77990: Remove bogus voltages from OPP table
arm64: dts: renesas: r9a07g054: Add Cortex-A55 PMU node
arm64: dts: renesas: white-hawk-csi-dsi: Add and connect MAX96712
arm64: dts: renesas: r8a779g0: Add and connect all CSI-2, ISP and VIN nodes
arm64: dts: renesas: r8a779f0: Use proper labels for thermal zones
arm64: dts: renesas: r8a779g0: Add thermal nodes
arm64: dts: renesas: rzv2mevk2: Add uart0 pins
arm64: dts: renesas: Drop specifying the GIC_CPU_MASK_SIMPLE() for GICv3 systems
arm64: dts: renesas: r9a07g044: Add Cortex-A55 PMU node
...
Link: https://lore.kernel.org/r/cover.1679907064.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 4 Apr 2023 14:16:18 +0000 (16:16 +0200)]
Merge tag 'renesas-dt-bindings-for-v6.4-tag1' of git://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DT binding updates for v6.4
- Document support for the Renesas RZ/N1 EB board with an RZ/N1D-DB
daughter board,
- Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC.
* tag 'renesas-dt-bindings-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: soc: renesas: Remove R-Car H3 ES1.*
dt-bindings: soc: renesas: renesas.yaml: Add renesas,rzn1d400-eb compatible
Link: https://lore.kernel.org/r/cover.1679907062.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Rob Herring [Fri, 31 Mar 2023 18:21:59 +0000 (13:21 -0500)]
dt-bindings: arm: nvidia: Drop unneeded quotes
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Maxim Schwalm [Wed, 29 Mar 2023 09:04:01 +0000 (12:04 +0300)]
ARM: tegra30: Use cpu* labels
Replace cpu paths with labels since those already exist in tree.
Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Wed, 29 Mar 2023 09:04:03 +0000 (12:04 +0300)]
ARM: tegra30: peripherals: Add 266.5MHz nodes
LG Optimus Vu (p895) and Optimus 4X HD (p880) have 266.5MHz RAM
clock and require this entry to work with it correctly.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Wed, 29 Mar 2023 09:04:02 +0000 (12:04 +0300)]
ARM: tegra: asus-tf101: Fix accelerometer mount matrix
Accelerometer mount matrix used in tf101 downstream is inverted.
This new matrix was generated on actual device using calibration
script, like on other transformers.
Tested-by: Robert Eckelmann <longnoserob@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 31 Mar 2023 16:29:14 +0000 (18:29 +0200)]
arm64: tegra: Support Jetson Orin NX reference platform
Add support for the combination of the NVIDIA Jetson Orin NX (P3767, SKU
0) module and the P3768 carrier board.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 31 Mar 2023 16:29:13 +0000 (18:29 +0200)]
arm64: tegra: Support Jetson Orin NX
This adds a device tree for the Jetson Orin NX module, which is Jetson
AGX Orin's little sibling with 6 or 8 ARM Cortex-A78AE cores, an Ampere
GPU (1024 GPU and 32 tensor cores) and a number of accelerators for
machine learning, image processing and more.
The Jetson Orin NX comes with either 8 or 16 GiB of 128-bit LPDDR5 and
supports NVME for mass storage.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 31 Mar 2023 16:29:12 +0000 (18:29 +0200)]
dt-bindings: tegra: Document Jetson Orin NX reference platform
Document the combination of the P3768 carrier board with the P3767
(Jetson Orin NX) module.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 31 Mar 2023 16:29:11 +0000 (18:29 +0200)]
dt-bindings: tegra: Document Jetson Orin NX
The Jetson Orin NX is the latest iteration in the NX family of Jetson
products. Document the compatible strings used for these devices.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Henrik Grimler [Sun, 2 Apr 2023 14:47:24 +0000 (16:47 +0200)]
ARM: dts: exynos: add mmc aliases
Add aliases for eMMC, SD card and WiFi where applicable, so that
assigned mmc indeces are always the same.
Co-developed-by: Anton Bambura <jenneron@protonmail.com>
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
[ Tested on exynos5800-peach-pi ]
Tested-by: Valentine Iourine <iourine@iourine.msk.su>
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20230402144724.17839-3-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Henrik Grimler [Sun, 2 Apr 2023 14:47:23 +0000 (16:47 +0200)]
ARM: dts: exynos: replace mshc0 alias with mmc-ddr-1_8v property
Previously, the mshc0 alias has been necessary so that
MMC_CAP_1_8V_DDR | MMC_CAP_8_BIT_DATA are set for mshc_0/mmc_0.
However, these capabilities should be described in the device tree so
that we do not have to rely on the alias.
The property mmc-ddr-1_8v replaces MMC_CAP_1_8V_DDR, while bus_width =
<8>, which is already set for all the mshc0/mmc0 nodes, replaces
MMC_CAP_8_BIT_DATA.
Also drop other mshc aliases as they are not needed.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20230402144724.17839-2-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Jon Hunter [Mon, 6 Mar 2023 15:01:57 +0000 (15:01 +0000)]
arm64: tegra: Add DSU PMUs for Tegra234
Populate the DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU)
devices for Tegra234 which has one DSU PMU per CPU cluster.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Krzysztof Kozlowski [Mon, 23 Jan 2023 15:15:43 +0000 (16:15 +0100)]
arm64: tegra: Drop serial clock-names and reset-names
The serial node does not use clock-names and reset-names:
tegra234-sim-vdk.dtb: serial@3100000: Unevaluated properties are not allowed ('clock-names', 'reset-names' were unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tudor Ambarus [Tue, 28 Mar 2023 10:15:17 +0000 (10:15 +0000)]
ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum frequency
sam9x60ek populates an sst26vf064b SPI NOR flash. Its maximum operating
frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V,
increase its maximum supported frequency to 104MHz. The increasing of the
spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.
The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.
With the increase of frequency the reads are now faster with ~33%.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-5-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Tudor Ambarus [Tue, 28 Mar 2023 10:15:16 +0000 (10:15 +0000)]
ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum frequency
sama5d2_icp populates an sst26vf064b SPI NOR flash. Its maximum operating
frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V,
increase its maximum supported frequency to 104MHz. The increasing of the
spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.
The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.
With the increase of frequency the reads are now faster with ~37%.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Tested-by: Nicolas Ferre <nicolas.ferre@microchip.com> # on sama5d2 ICP
Link: https://lore.kernel.org/r/20230328101517.1595738-4-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Tudor Ambarus [Tue, 28 Mar 2023 10:15:15 +0000 (10:15 +0000)]
ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its maximum frequency
sama5d27-som1 populates an sst26vf064b SPI NOR flash. Its maximum
operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated
at 3.3V, increase its maximum supported frequency to 104MHz. The
increasing of the spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.
The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.
With the increase of frequency the reads are now faster with ~37%.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-3-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Tudor Ambarus [Tue, 28 Mar 2023 10:15:14 +0000 (10:15 +0000)]
ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency
sama5d27-wlsom1 populates an sst26vf064b SPI NOR flash. Its maximum
operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated
at 3.3V, increase its maximum supported frequency to 104MHz. The
increasing of the spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.
The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.
With the increase of frequency the reads are now faster with ~37%.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-2-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 15:02:19 +0000 (18:02 +0300)]
ARM: tegra: transformers: Bind RT5631 sound nodes
TF201, TF300TG and TF700T support RT5631 codec.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 15:02:18 +0000 (18:02 +0300)]
ARM: tegra: transformers: Update WM8903 sound nodes
Fix headset detection and use device GPIO microphone detection on WM8903
Transformers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Janne Grunau [Tue, 14 Feb 2023 14:07:23 +0000 (15:07 +0100)]
arm64: dts: apple: t600x: Disable unused PCIe ports
The PCIe ports are unused (without devices) so disable them instead of
removing them.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 14 Feb 2023 14:07:22 +0000 (15:07 +0100)]
arm64: dts: apple: t8103: Disable unused PCIe ports
The PCIe ports are unused (without devices) so disable them instead of
removing them.
Fixes:
7c77ab91b33d ("arm64: dts: apple: Add missing M1 (t8103) devices")
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Tue, 7 Mar 2023 12:10:21 +0000 (13:10 +0100)]
arm64: dts: apple: t8112: Initial t8112 (M2) device trees
This adds device trees for the following devices:
- Macbook Air (M2, 2022)
- Macbook Pro 13" (M2, 2022)
- Mac mini (M2, 2023)
This brings the hardware support of the machines to the same level as M1
and M1 Pro / Max / Ultra. Supported hardware include NVMe, PCIe, serial,
pinctrl/gpio, I2C, iommu, watchdog, admac, nco, cpufreq, boot
framebuffer for laptop panels and the interrupt controller.
The ethernet LAN device on the M2 Mac mini is the only working PCIe
device. The Wlan/BT devices are powered off and controlled by the not
yet supported SMC. The ASMedia xHCI on the M2 Mac mini requires firmware
to be loaded at startup.
The main missing hardware support to make these devices useful are the
integrated USB 2/3/4 controller, keyboard and trackpad on the laptops
and SMC to power the PCIe Wlan/BT device on.
The M2 Mac mini has currently no working display output. Due to changes
in the display pipeline it is currently not possible to initialize the
HDMI output in the bootloader.
Co-developed-by: Janne Grunau <j@jannau.net>
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:20 +0000 (13:10 +0100)]
dt-bindings: arm: apple: Add t8112 j413/j473/j493 compatibles
This adds the following apple,t8112 platforms:
- apple,j413 - MacBook Air (M2, 2022)
- apple,j473 - Mac mini (M2, 2023)
- apple,j493 - MacBook Pro (13-inch, M2, 2022)
The sort order logic here is having SoC numeric code families in release
order, and SoCs within each family in release order:
- t8xxx (Apple HxxP/G series, "phone"/"tablet" chips)
- t8103 (Apple H13G/M1)
- t8112 (Apple H14G/M2)
- t6xxx (Apple HxxJ series, "desktop" chips)
- t6000 (Apple H13J(S)/M1 Pro)
- t6001 (Apple H13J(C)/M1 Max)
- t6002 (Apple H13J(D)/M1 Ultra)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:18 +0000 (13:10 +0100)]
dt-bindings: clock: apple,nco: Add t8112-nco compatible
The block found on Apple's M2 SoC is compatible with the existing driver
so add its per-SoC compatible.
Acked-by: Martin Povišer <povik+lin@cutebit.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:17 +0000 (13:10 +0100)]
dt-bindings: i2c: apple,i2c: Add apple,t8112-i2c compatible
This block on the Apple M2 is compatible with the existing driver so
just add the per-SoC compatible.
Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:16 +0000 (13:10 +0100)]
dt-bindings: pinctrl: apple,pinctrl: Add apple,t8112-pinctrl compatible
This new SoC uses the same pinctrl hardware, so just add a new per-SoC
compatible.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:15 +0000 (13:10 +0100)]
dt-bindings: pci: apple,pcie: Add t8112 support
The block found in the Apple M2 SoC is compatible with the existing
driver, and supports 4 downstream ports like the t6000 one.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:14 +0000 (13:10 +0100)]
dt-bindings: nvme: apple: Add apple,t8112-nvme-ans2 compatible string
"apple,t8112-nvme-ans2" as found on Apple M2 SoCs is compatible with the
existing driver. Add its SoC specific compatible string to allow special
handling if it'll be necessary.
t8112 uses only 2 power-domains as no 4 and 8 TB configurations are
offered.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:13 +0000 (13:10 +0100)]
dt-bindings: mailbox: apple,mailbox: Add t8112 compatibles
The mailbox hardware remains unchanged on M2 SoCs so just add its
per-SoC compatible.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:12 +0000 (13:10 +0100)]
dt-bindings: iommu: apple,sart: Add apple,t8112-sart compatible string
"apple,t8112-sart" as found on the Apple M2 SoC appears to be SART3 as
well. To allow for later discovered incompatibilities use
'"apple,t8112-sart", "apple,t6000-sart"' as compatible string.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:11 +0000 (13:10 +0100)]
dt-bindings: interrupt-controller: apple,aic2: Add apple,t8112-aic compatible
The Apple M2 SoC uses AICv2 and is compatible with the existing driver.
Add its per-SoC compatible.
Since multi-die versions of the M2 are not expected decrease
'#interrupt-cells' to 3 for apple,t8112-aic. This is seamlessly handled
inside the driver.
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:10 +0000 (13:10 +0100)]
dt-bindings: arm: cpus: Add apple,avalanche & blizzard compatibles
These are the CPU cores in the Apple silicon M2 SoC.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:09 +0000 (13:10 +0100)]
dt-bindings: watchdog: apple,wdt: Add t8112-wdt compatible
The block on the Apple M2 SoC is compatible with the existing driver so
add its per-SoC compatible.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 7 Mar 2023 12:10:08 +0000 (13:10 +0100)]
dt-bindings: arm: apple: apple,pmgr: Add t8112-pmgr compatible
The block on Apple M2 SoCs is compatible with the existing driver so
just add its per-SoC compatible.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Tue, 7 Mar 2023 12:10:07 +0000 (13:10 +0100)]
dt-bindings: power: apple,pmgr-pwrstate: Add t8112 compatible
Add the apple,t8112-pmgr-pwrstate compatible for the Apple M2 SoC.
This goes after t8103. The sort order logic here is having SoC numeric
code families in release order, and SoCs within each family in release
order:
- t8xxx (Apple HxxP/G series, "phone"/"tablet" chips)
- t8103 (Apple H13G/M1)
- t8112 (Apple H14G/M2)
- t6xxx (Apple HxxJ series, "desktop" chips)
- t6000 (Apple H13J(S)/M1 Pro)
- t6001 (Apple H13J(C)/M1 Max)
- t6002 (Apple H13J(D)/M1 Ultra)
Note that t600[0-2] share the t6000 compatible where the hardware is
100% compatible, which is usually the case in this highly related set
of SoCs.
Reviewed-by: Janne Grunau <j@jannau.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Andrew Davis [Thu, 16 Feb 2023 15:33:38 +0000 (09:33 -0600)]
ARM: dts: omap: Drop ti,omap36xx compatible
This was not matched anywhere and provides no additional information. The
driver code already checks also for "ti,omap3630" compatible.
Signed-off-by: Andrew Davis <afd@ti.com>
Message-Id: <
20230216153339.19987-2-afd@ti.com>
[tony@atomide.com: updated comments for ti,omap3630 compatible]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Steffen Hemer [Tue, 14 Feb 2023 13:23:02 +0000 (14:23 +0100)]
ARM: dts: am335x-phycore-som: Remove superseded/invalid GPMC NAND type.
According to docu and dtschema check, 'gpmc,device-nand = true' is
no longer valid, so remove it.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <
20230214132302.39087-8-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Steffen Hemer [Tue, 14 Feb 2023 13:23:01 +0000 (14:23 +0100)]
ARM: dts: am335x-pcm-953: Remove superseded/invalid LED trigger.
According to docu and dtschema check, 'linux,default-trigger = gpio' is
no longer valid, so remove it.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <
20230214132302.39087-7-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Steffen Hemer [Tue, 14 Feb 2023 13:23:00 +0000 (14:23 +0100)]
ARM: dts: am335x-phycore-som: Remove underscore in node names.
Remove underscore in node names following conventions.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <
20230214132302.39087-6-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Steffen Hemer [Tue, 14 Feb 2023 13:22:59 +0000 (14:22 +0100)]
ARM: dts: am335x-regor: Remove underscore in node names.
Remove underscore in node names following conventions.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <
20230214132302.39087-5-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Steffen Hemer [Tue, 14 Feb 2023 13:22:58 +0000 (14:22 +0100)]
ARM: dts: am335x-pcm-935: Remove underscore in node names.
Remove underscore in node names following conventions.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <
20230214132302.39087-4-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Steffen Hemer [Tue, 14 Feb 2023 13:22:57 +0000 (14:22 +0100)]
ARM: dts: am335x-wega: Change node name of sound card, remove underscores.
Change node name of sound card to recommended generic and remove also
further underscores in other node names.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <
20230214132302.39087-3-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Steffen Hemer [Tue, 14 Feb 2023 13:22:56 +0000 (14:22 +0100)]
ARM: dts: am335x-wega: Fix audio codec by using simple-audio-card driver.
Sound did not work with the previous EVM sound card binding, EVM dts
switched to using 'simple-audio-card', so this fixes audio codec by using
simple-audio-card driver.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <
20230214132302.39087-2-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Steffen Hemer [Tue, 14 Feb 2023 13:22:55 +0000 (14:22 +0100)]
ARM: dts: am335x-phycore-som: Add alias for TPS65910 RTC
Without an alias for the TPS65910 RTC, it snatches the rtc0 device in
advance to the I2C RTC assigned to that alias.
Signed-off-by: Steffen Hemer <s.hemer@phytec.de>
Message-Id: <
20230214132302.39087-1-s.hemer@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
H. Nikolaus Schaller [Thu, 16 Feb 2023 16:46:43 +0000 (17:46 +0100)]
ARM: dts: omap3-gta04: fix compatible record for GTA04 board
Vendor of the GTA04 boards is and always was
Golden Delicious Computers GmbH&Co. KG, Germany
and not Texas Instruments.
Maybe, TI was references here because the GTA04 was based on
the BeagleBoard design which is designated as "ti,omap3-beagle".
While we are looking at vendors of omap3 based devices, we also
add the record for OpenPandora. The DTS files for the pandora
device already make use of it.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Message-Id: <
38b49aad0cf33bb5d6a511edb458139b58e367fd.
1676566002.git.hns@goldelico.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
H. Nikolaus Schaller [Fri, 13 Jan 2023 21:11:51 +0000 (22:11 +0100)]
ARM: dts: gta04: fix excess dma channel usage
OMAP processors support 32 channels but there is no check or
inspect this except booting a device and looking at dmesg reports
of not available channels.
Recently some more subsystems with DMA (aes1+2) were added filling
the list of dma channels beyond the limit of 32 (even if other
parameters indicate 96 or 128 channels). This leads to random
subsystem failures i(e.g. mcbsp for audio) after boot or boot
messages that DMA can not be initialized.
Another symptom is that
/sys/kernel/debug/dmaengine/summary
has 32 entries and does not show all required channels.
Fix by disabling unused (on the GTA04 hardware) mcspi1...4.
Each SPI channel allocates 4 DMA channels rapidly filling
the available ones.
Disabling unused SPI modules on the OMAP3 SoC may also save
some energy (has not been checked).
Fixes:
c312f066314e ("ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2")
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
[re-enabled aes2, improved commit subject line]
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Message-Id: <
20230113211151.2314874-1-andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Andrew Davis [Tue, 7 Mar 2023 16:17:15 +0000 (10:17 -0600)]
ARM: dts: am57xx-idk: Add IDK displays and touchscreens
This is a more interesting use of DT Overlays than the previous patches.
Here we have two touchscreen modules. Each is compatible with, and can be
attached to, either of the two AM57xx IDK development board variants
(AM571x or AM572x).
Due to the way the extension header was wired on the development boards,
the touch sensor on the touchscreen modules will connect to different
SoC pins when connected. For this the touch sensor is modeled as an
additional overlay that is specific to the development board for which it
is connected.
Basically the LCD overlay can be swapped, but the touchscreen overlay
that attaches to the LCD must be used with the corresponding base DT
and not to the LCD.
AM571x -\ /- osd101t2045.dtbo -\ /- am571x-idk-touchscreen.dtbo
X X
AM572x -/ \- osd101t2587.dtbo -/ \- am572x-idk-touchscreen.dtbo
Signed-off-by: Andrew Davis <afd@ti.com>
Message-Id: <
20230307161715.15209-4-afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Andrew Davis [Tue, 7 Mar 2023 16:17:14 +0000 (10:17 -0600)]
ARM: dts: ti: Add AM57xx GP EVM Rev A3 board support
The A3 revision of the AM57xx GP EVM has the same EVM feature set as the
original but is paired with an updated revision C BeagleBoard X15.
DT Overlays allow us to model this in the same way, we simply apply the
EVM overlay to the Rev C BeagleBoard to create the Rev A3 AM57xx GP EVM.
Signed-off-by: Andrew Davis <afd@ti.com>
Message-Id: <
20230307161715.15209-3-afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Andrew Davis [Tue, 7 Mar 2023 16:17:13 +0000 (10:17 -0600)]
ARM: dts: ti: Add AM57xx GP EVM board support
The AM57xx GP EVM boards are built on top the AM57xx BeagleBoard-X15.
The EVM extends the BeagleBoard by adding a touchscreen, some buttons,
and a handful of peripheral extension slots.
Being a plugin extension of an existing standalone board; we define
the am57xx-evm as a composite-DTB of the base am57xx-beagle-x15
and a new am57xx-evm overlay.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Message-Id: <
20230307161715.15209-2-afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Arnd Bergmann [Fri, 24 Mar 2023 17:55:11 +0000 (18:55 +0100)]
Merge tag 'dt-cleanup-6.4' of https://git./linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM DTS for v6.4
1. TI, Marvell, HiSilicon: "okay" over "ok" is preferred for status
property.
2. OMAP: align UART node name with bindings.
* tag 'dt-cleanup-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: hisilicon: use "okay" for status
ARM: dts: ti: use "okay" for status
ARM: dts: marvell: use "okay" for status
ARM: dts: omap: align UART node name with bindings
Link: https://lore.kernel.org/r/20230319152740.34551-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 24 Mar 2023 17:53:55 +0000 (18:53 +0100)]
Merge tag 'dt64-cleanup-6.4' of https://git./linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM64 DTS for v6.4
1. Toshiba: white-space fixes.
2. Cavium, Marvell: fix GICv3 ITS node name.
* tag 'dt64-cleanup-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
arm64: dts: cavium: Fix GICv3 ITS nodes
arm64: dts: marvell: armada-ap810: Fix GICv3 ITS node name
arm64: dts: toshiba: adjust whitespace around '='
Link: https://lore.kernel.org/r/20230319152740.34551-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Martin Blumenstingl [Tue, 21 Mar 2023 17:12:13 +0000 (18:12 +0100)]
ARM: dts: meson8m2: mxiii-plus: Enable Bluetooth and WiFi support
The MXIII Plus uses an Ampak AP6330 Bluetooth and WiFi combo chip.
Bluetooth is connected to &uart_A and requires toggling GPIOX_20.
WiFi can be routed to either &sdhc or &sdio. Route WiFi to &sdhc
since &sdio is already connected to the SD card. Additionally WiFi
requires toggling GPIOX_11 and GPIOAO_6 as well as enabling the 32kHz
clock signal.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230321171213.2808460-4-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Martin Blumenstingl [Tue, 21 Mar 2023 17:12:12 +0000 (18:12 +0100)]
ARM: dts: meson8: add the SDXC_A pins
Add the pins for the SDHC MMC controller which connect to the SDIO wifi
on some boards.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230321171213.2808460-3-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Martin Blumenstingl [Tue, 21 Mar 2023 17:12:11 +0000 (18:12 +0100)]
ARM: dts: meson8: add the xtal_32k_out pin
GPIOX_10 can generate a 32768Hz signal when enabling the "xtal_32k_out"
group with the xtal function. This is typically used as LPO clock for
the SDIO wifi chips.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230321171213.2808460-2-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Chunyan Zhang [Mon, 6 Mar 2023 08:57:17 +0000 (16:57 +0800)]
arm64: dts: sprd: Add support for Unisoc's UMS512
Add basic support for Unisoc's UMS512, with this patch,
the board ums512-1h10 can run into console.
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lore.kernel.org/r/20230306085717.420353-1-chunyan.zhang@unisoc.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Krzysztof Kozlowski [Fri, 10 Mar 2023 23:14:20 +0000 (00:14 +0100)]
ARM: dts: ixp4xx: use "okay" for status
"okay" over "ok" is preferred for status property.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230127101832.93789-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230310231420.583121-1-linus.walleij@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Henrik Grimler [Wed, 15 Mar 2023 21:28:14 +0000 (22:28 +0100)]
arm64: dts: exynos: add mmc aliases
Add aliases for eMMC and SD card where applicable, so that
assigned mmc indeces are always the same.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20230315212814.15908-3-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Henrik Grimler [Wed, 15 Mar 2023 21:28:13 +0000 (22:28 +0100)]
arm64: dts: exynos: drop mshc aliases
Previously, the mshc0 alias has been necessary so that
MMC_CAP_1_8V_DDR | MMC_CAP_8_BIT_DATA are set for mshc_0/mmc_0.
However, these capabilities should be described in the device tree so
that we do not have to rely on the alias.
The property mmc-ddr-1_8v replaces MMC_CAP_1_8V_DDR, while bus_width =
<8>, which is already set for all the mshc0/mmc0 nodes, replaces
MMC_CAP_8_BIT_DATA.
Also drop other mshc aliases as they are not needed.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20230315212814.15908-2-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Rob Herring [Wed, 8 Feb 2023 18:55:06 +0000 (12:55 -0600)]
arm64: dts: cavium: Fix GICv3 ITS nodes
The GICv3 ITS is an MSI controller, therefore its node name should be
'msi-controller'. The ITS node is also expected to have '#msi-cells'.
Add it on Thunder as there are no users. Thunder2 uses 'msi-parent', but
Robin says that should be 'msi-map' instead and I'm not sure what's
correct for it.
The unit-addresses of both the ITS and main GIC node on thunder2 are also
wrong, so fix them while we're here.
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230208185506.2305349-1-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Geert Uytterhoeven [Mon, 13 Mar 2023 11:04:21 +0000 (12:04 +0100)]
arm64: dts: renesas: r8a779a0: Update CAN-FD to R-Car Gen4 compatible value
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family. Hence update the compatible property in the CAN-FD device node
to include the family-specific compatible value for R-Car Gen4.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/9823058fa57156e88a084a4a99fc8525af1686ff.1678705389.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 9 Mar 2023 15:30:49 +0000 (16:30 +0100)]
arm64: dts: renesas: ulcb: Add I2C EEPROM for PMIC
Add a device node for the I2C EEPROM which serves as external storage
for the PMIC setup.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b52c6c21a94aa7320ac0c900f7023a5dfca76a29.1678375464.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 9 Mar 2023 15:30:48 +0000 (16:30 +0100)]
arm64: dts: renesas: condor: Add I2C EEPROM for PMIC
Add a device node for the I2C EEPROM which serves as external storage
for the PMIC setup.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/84971f48eca0b696f592a922268af8c150d9bae3.1678375464.git.geert+renesas@glider.be
Geert Uytterhoeven [Thu, 9 Mar 2023 15:30:47 +0000 (16:30 +0100)]
ARM: dts: armadillo800eva: Add I2C EEPROM for MAC address
Add a device node for the M24C01 I2C EEPROM which serves as external
storage for the Ethernet MAC address.
While at it, restore sort order (by unit address) of the devices on the
I2C bus.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/6d402b289fd20125d9f6f6b2a4f239aa1887daa6.1678375464.git.geert+renesas@glider.be
Conor Dooley [Tue, 7 Mar 2023 21:10:54 +0000 (21:10 +0000)]
riscv: dts: microchip: fix the mpfs' mailbox regs
The mailbox on PolarFire SoC should really have three reg properties,
not two. Without splitting into three sections, the system controller's
QSPI cannot be accessed as it sits inside the current first range. The
driver & binding have been adapted to account for both two & three
ranges, so fix the dts too.
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Rob Herring [Tue, 7 Feb 2023 23:47:35 +0000 (17:47 -0600)]
arm64: dts: marvell: armada-ap810: Fix GICv3 ITS node name
The GICv3 ITS is an MSI controller, therefore its node name should be
'msi-controller'.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230207234735.201812-1-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Linus Torvalds [Sun, 12 Mar 2023 23:36:44 +0000 (16:36 -0700)]
Linux 6.3-rc2
Hector Martin [Sat, 11 Mar 2023 14:19:14 +0000 (23:19 +0900)]
wifi: cfg80211: Partial revert "wifi: cfg80211: Fix use after free for wext"
This reverts part of commit
015b8cc5e7c4 ("wifi: cfg80211: Fix use after
free for wext")
This commit broke WPA offload by unconditionally clearing the crypto
modes for non-WEP connections. Drop that part of the patch.
Signed-off-by: Hector Martin <marcan@marcan.st>
Reported-by: Ilya <me@0upti.me>
Reported-and-tested-by: Janne Grunau <j@jannau.net>
Reviewed-by: Eric Curtin <ecurtin@redhat.com>
Fixes:
015b8cc5e7c4 ("wifi: cfg80211: Fix use after free for wext")
Cc: stable@kernel.org
Link: https://lore.kernel.org/linux-wireless/ZAx0TWRBlGfv7pNl@kroah.com/T/#m11e6e0915ab8fa19ce8bc9695ab288c0fe018edf
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 12 Mar 2023 23:15:36 +0000 (16:15 -0700)]
Merge tag 'tpm-v6.3-rc3' of git://git./linux/kernel/git/jarkko/linux-tpmdd
Pull tpm fixes from Jarkko Sakkinen:
"Two additional bug fixes for v6.3"
* tag 'tpm-v6.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/jarkko/linux-tpmdd:
tpm: disable hwrng for fTPM on some AMD designs
tpm/eventlog: Don't abort tpm_read_log on faulty ACPI address
Mario Limonciello [Tue, 28 Feb 2023 02:44:39 +0000 (20:44 -0600)]
tpm: disable hwrng for fTPM on some AMD designs
AMD has issued an advisory indicating that having fTPM enabled in
BIOS can cause "stuttering" in the OS. This issue has been fixed
in newer versions of the fTPM firmware, but it's up to system
designers to decide whether to distribute it.
This issue has existed for a while, but is more prevalent starting
with kernel 6.1 because commit
b006c439d58db ("hwrng: core - start
hwrng kthread also for untrusted sources") started to use the fTPM
for hwrng by default. However, all uses of /dev/hwrng result in
unacceptable stuttering.
So, simply disable registration of the defective hwrng when detecting
these faulty fTPM versions. As this is caused by faulty firmware, it
is plausible that such a problem could also be reproduced by other TPM
interactions, but this hasn't been shown by any user's testing or reports.
It is hypothesized to be triggered more frequently by the use of the RNG
because userspace software will fetch random numbers regularly.
Intentionally continue to register other TPM functionality so that users
that rely upon PCR measurements or any storage of data will still have
access to it. If it's found later that another TPM functionality is
exacerbating this problem a module parameter it can be turned off entirely
and a module parameter can be introduced to allow users who rely upon
fTPM functionality to turn it on even though this problem is present.
Link: https://www.amd.com/en/support/kb/faq/pa-410
Link: https://bugzilla.kernel.org/show_bug.cgi?id=216989
Link: https://lore.kernel.org/all/20230209153120.261904-1-Jason@zx2c4.com/
Fixes:
b006c439d58d ("hwrng: core - start hwrng kthread also for untrusted sources")
Cc: stable@vger.kernel.org
Cc: Jarkko Sakkinen <jarkko@kernel.org>
Cc: Thorsten Leemhuis <regressions@leemhuis.info>
Cc: James Bottomley <James.Bottomley@hansenpartnership.com>
Tested-by: reach622@mailcuk.com
Tested-by: Bell <1138267643@qq.com>
Co-developed-by: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org>
Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
Morten Linderud [Wed, 15 Feb 2023 09:25:52 +0000 (10:25 +0100)]
tpm/eventlog: Don't abort tpm_read_log on faulty ACPI address
tpm_read_log_acpi() should return -ENODEV when no eventlog from the ACPI
table is found. If the firmware vendor includes an invalid log address
we are unable to map from the ACPI memory and tpm_read_log() returns -EIO
which would abort discovery of the eventlog.
Change the return value from -EIO to -ENODEV when acpi_os_map_iomem()
fails to map the event log.
The following hardware was used to test this issue:
Framework Laptop (Pre-production)
BIOS: INSYDE Corp, Revision: 3.2
TPM Device: NTC, Firmware Revision: 7.2
Dump of the faulty ACPI TPM2 table:
[000h 0000 4] Signature : "TPM2" [Trusted Platform Module hardware interface Table]
[004h 0004 4] Table Length :
0000004C
[008h 0008 1] Revision : 04
[009h 0009 1] Checksum : 2B
[00Ah 0010 6] Oem ID : "INSYDE"
[010h 0016 8] Oem Table ID : "TGL-ULT"
[018h 0024 4] Oem Revision :
00000002
[01Ch 0028 4] Asl Compiler ID : "ACPI"
[020h 0032 4] Asl Compiler Revision :
00040000
[024h 0036 2] Platform Class : 0000
[026h 0038 2] Reserved : 0000
[028h 0040 8] Control Address :
0000000000000000
[030h 0048 4] Start Method : 06 [Memory Mapped I/O]
[034h 0052 12] Method Parameters : 00 00 00 00 00 00 00 00 00 00 00 00
[040h 0064 4] Minimum Log Length :
00010000
[044h 0068 8] Log Address :
000000004053D000
Fixes:
0cf577a03f21 ("tpm: Fix handling of missing event log")
Tested-by: Erkki Eilonen <erkki@bearmetal.eu>
Signed-off-by: Morten Linderud <morten@linderud.pw>
Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org>
Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
Krzysztof Kozlowski [Tue, 21 Feb 2023 16:16:53 +0000 (17:16 +0100)]
ARM: dts: exynos: fix MCT compatible in Universal C210
When desired, nodes should be disabled instead of changing their
compatible to a fake one:
exynos4210-universal_c210.dtb: /soc/timer@
10050000: failed to match any schema with compatible: ['none']
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20230221161653.56574-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Fri, 27 Jan 2023 10:18:34 +0000 (11:18 +0100)]
ARM: dts: hisilicon: use "okay" for status
"okay" over "ok" is preferred for status property.
Link: https://lore.kernel.org/r/20230127101834.93818-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>