* fr.po: Update.

From-SVN: r243759

Reuse Doxygen comments for map::erase overloads

* include/bits/stl_map.h (map::erase(iterator)): Add Doxygen markup
to reuse documentation for erase(const_iterator) overload.
* include/bits/stl_multimap.h (multimap::erase(iterator)): Likewise.

From-SVN: r243758

Add assertion to _Rb_tree::erase to check for end iterators

* include/bits/stl_tree.h (_Rb_tree::_M_erase_aux(const_iterator)):
Add assertion for undefined argument.
(_Rb_tree::_M_erase_aux(const_iterator, const_iterator)): Call
_M_erase_aux directly instead of through erase.
(_Rb_tree::_M_erase_aux(const Key&)): Likewise.
* testsuite/23_containers/map/modifiers/erase/end_neg.cc: New test.

From-SVN: r243757

[AArch64] Split X-reg UBFIZ into W-reg LSL when possible

* config/aarch64/aarch64.md: New define_split above bswap<mode>2.

* gcc.target/aarch64/ubfiz_lsl_1.c: New test.

From-SVN: r243756

[AArch64] Split X-reg UBFX into W-reg LSR when possible

* config/aarch64/aarch64.md: New define_split above insv<mode>.

* gcc.target/aarch64/ubfx_lsr_1.c: New test.

From-SVN: r243755

Revert accidentally changed file.

From-SVN: r243754

re PR c/78408 (C loop initial declarations generate wrong code)

PR c/78408
* tree-ssa-ccp.c: Include tree-dfa.h.
(optimize_memcpy): New function.
(pass_fold_builtins::execute): Use it.  Remove useless conditional
break after BUILT_IN_VA_*.

* gcc.dg/pr78408-1.c: New test.
* gcc.dg/pr78408-2.c: New test.

From-SVN: r243753

re PR tree-optimization/78819 (Wrong code with VRP caused by register assertions along default switch labels)

PR tree-optimization/78819
* tree-vrp.c (find_switch_asserts): Return if the insertion limit is 0.
Don't register an assertion if the default case shares a label with
another case.

* gcc.dg/tree-ssa/vrp112.c: New test.

From-SVN: r243746

The negdi2 patterns for ARM and Thumb-2 are duplicated because Thumb-2 doesn't support RSC with an immediate.

The negdi2 patterns for ARM and Thumb-2 are duplicated because Thumb-2
doesn't support RSC with an immediate.  We can however emulate RSC with
zero using a shifted SBC.  If we add this to subsi3_carryin the negdi
patterns can be merged, simplifying things a bit.  This should generate
identical code in all cases.

    gcc/
        * config/arm/arm.md (subsi3_carryin): Add Thumb-2 RSC #0.
        (arm_negdi2) Rename to negdi2_insn, allow on Thumb-2.
        * config/arm/thumb2.md (thumb2_negdi2): Remove pattern.

From-SVN: r243745

Thumb uses a special register allocation order to increase the use of low registers.

Thumb uses a special register allocation order to increase the use of low
registers.  Oddly enough, LR appears before R12, which means that LR must
be saved and restored even if R12 is available.  Swapping R12 and LR means
this simple example now uses R12 as a temporary (just like ARM):

int f(long long a, long long b)
{
  if (a < b) return 1;
  return a + b;
}

    gcc/
* config/arm/arm.c (thumb_core_reg_alloc_order): Swap R12 and R14.

From-SVN: r243744

[ARC] Remove old prof patterns.

gcc/
2016-12-16  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.md (call_prof): Remove.
(call_value_prof): Likewise.
(sibcall_prof): Likewise.
(sibcall_value_prof): Likewise.

From-SVN: r243743

[ARC] Rework code for profiling.

gcc/
2016-12-16  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.h (LINK_SPEC): Tidy up.
(ENDFILE_SPEC): Likewise.
(LIB_SPEC): Likewise.
(STARTFILE_SPEC): Include gcrt0 when profiling.
(FUNCTION_PROFILER): Use __mcount.
* config/arc/arc.opt (mucb-mcount): Remove.
* doc/invoke.texi (ARC): Remove mucb-mcount doc.
* arc/arc-protos.h (arc_profile_call): Remove.
* config/arc/arc.c (write_profile_sections): Likewise.
(arc_profile_call): Likewise.
(unspec_prof_hash): Likewise.
(unspec_prof_htab_eq): Likewise.
(arc_legitimate_constant_p): Remove UNSPEC_PROF.
(arc_reorg): Remove call to write_profile_sections.
* config/arc/arc.md (call): Remove call to arc_profile_call.
(call_value): Likewise.
(sibcall): Likewise.
(sibcall_value): Likewise.
(define_constants): Remove UNSPEC_PROF.

libgcc/
* config.host (arc*-*-linux-uclibc*): Remove libgmon, crtg, and
crtgend.
(arc*-*-elf*): Likewise.
* config/arc/t-arc: Remove old gmon lib targets.
* config/arc/crtg.S: Remove.
* config/arc/crtgend.S: Likewise.
* config/arc/gmon/atomic.h: Likewise.
* config/arc/gmon/auxreg.h: Likewise.
* config/arc/gmon/dcache_linesz.S: Likewise.
* config/arc/gmon/gmon.c: Likewise.
* config/arc/gmon/machine-gmon.h: Likewise.
* config/arc/gmon/mcount.c: Likewise.
* config/arc/gmon/prof-freq-stub.S: Likewise.
* config/arc/gmon/prof-freq.c: Likewise.
* config/arc/gmon/profil.S: Likewise.
* config/arc/gmon/sys/gmon.h: Likewise.
* config/arc/gmon/sys/gmon_out.h: Likewise.
* config/arc/t-arc-newlib: Likewise.
* config/arc/t-arc700-uClibc: Renamed to t-arc-uClibc.

From-SVN: r243742

[ARC] Rework ARC600 64-bit multiplication patterns.

Previously users of mulsidi_600 and umulsidi_600 had to take care of
moving the multiplication result into the final destination themselves
(from the MUL64_OUT_REG register).  This commit converts these two
instruction patterns into insn_and_split patterns that now take the
final destination as an extra operand.  The insn_and_split patterns
generate the multiplication using two new multiplication instruction
patterns, then generate the move of the result from the MUL64_OUT_REG
register into the final destination.

This is a clean up commit, there should be no user visible changes
after this commit.

2016-12-16  Claudiu Zissulescu  <claziss@synopsys.com>

* config/arc/arc.md (mulsidi_600): Change to insn_and_split,
generate new mul64 insn for core multiplication work.
(umulsidi_600): Likewise, but use mulu64 insn.
(mul64): New pattern, content taken from old mulsidi_600 insn
pattern.
(mulu64): Likewise, but using umulsidi_600.
(mulsidi3): Remove move to destination, this is now handled by
mulsidi_600 insn_and_split.
(umulsidi3): Likewise, but using umulsidi_600.

From-SVN: r243741

opt61.adb: New test.

* gnat.dg/opt61.adb: New test.
* gnat.dg/opt61_pkg.ad[sb]: New helper.

From-SVN: r243740

Implement LWG 2769, Redundant const in the return type of any_cast(const any&).

Implement LWG 2769, Redundant const in the return type of
any_cast(const any&).
* include/std/any (_AnyCast): New.
(any_cast(const any&)): Use it and add an explicit cast for return.
(any_cast(any&)): Likewise.
(any_cast(any&&)): Likewise.
* testsuite/20_util/any/misc/any_cast.cc: Add a test for a type
that has an explicit copy constructor.
*testsuite/20_util/any/misc/any_cast_neg.cc: Adjust.

From-SVN: r243739

re PR c++/71694 (store-data race with bitfields and tail-padding in C++)

2016-12-16  Richard Biener  <rguenther@suse.de>

PR c++/71694
* langhooks-def.h (lhd_unit_size_without_reusable_padding): Declare.
(LANG_HOOKS_UNIT_SIZE_WITHOUT_REUSABLE_PADDING): Define.
(LANG_HOOKS_FOR_TYPES_INITIALIZER): Adjust.
* langhooks.h (struct lang_hooks_for_types): Add
unit_size_without_reusable_padding.
* langhooks.c (lhd_unit_size_without_reusable_padding): New.
* stor-layout.c (finish_bitfield_representative): Use
unit_size_without_reusable_padding langhook to decide on the
last representatives size.

cp/
* cp-objcp-common.h (cp_unit_size_without_reusable_padding): Declare.
(LANG_HOOKS_UNIT_SIZE_WITHOUT_REUSABLE_PADDING): Define.
* cp-objcp-common.c (cp_unit_size_without_reusable_padding): New.

* g++.dg/pr71694.C: New testcase.

From-SVN: r243738

re PR middle-end/71632 (hang at -O3 on x86_64-linux-gnu)

2016-12-16  Richard Biener  <rguenther@suse.de>

PR middle-end/71632
* expr.c (expand_cond_expr_using_cmove): Bail out early if
we end up recursing via TER.

* gcc.dg/pr71632.c: New testcase.

From-SVN: r243737

PR bootstrap/78817 - stage2 bootstrap failure in vec.h:1613:5: error: argument 1 null where non-null expected after r243661

gcc/ChangeLog:
* vec.h (vec<T, va_heap, vl_ptr>::safe_grow_cleared): Assert
a pointer is non-null.

From-SVN: r243736

compiler: fix comments + fieldnames to match libgo source

    A couple of the comments in the type descriptor code were out of date
    with respect to the names in libgo/go/runtime/type.go.  Fix up the
    comments and field names to bring them into sync.

    Reviewed-on: https://go-review.googlesource.com/34472

From-SVN: r243735

Daily bump.

From-SVN: r243734

compiler: fix off-by-1 array type len in Type::gc_symbol_constructor

    Array type being built to hold GC var initializer was being created
    with an extra/unneeded slot. Fix up the code to insure that the array
    length matches the length of the initializer list.

    Reviewed-on: https://go-review.googlesource.com/34413

From-SVN: r243731

re PR go/78763 (go1: internal compiler error: in do_get_backend, at go/gofrontend/expressions.cc:8352)

PR go/78763
    compiler: call determine_types even for constant expressions

    We need to call determine_types even for constant expressions, since a
    constant expression may include code like unsafe.Sizeof(0).  Something
    needs to determine the type of the untyped 0, and that should be the
    determine_types pass.

    Implementing that triggered a compiler crash on test/const1.go because
    it permitted some erroneous constants to make it all the way to the
    backend.  Catch that case by checking whether we get a constant
    overflow error, and marking the expression invalid if we do.  This is
    a good change in any case, as previously we reported the same constant
    overflow error multiple times, and now we only report it once.

    Fixes GCC PR 78763.

    Reviewed-on: https://go-review.googlesource.com/34496

From-SVN: r243729

avx512bwintrin.h: Add new k-mask intrinsics.

* config/i386/avx512bwintrin.h: Add new k-mask intrinsics.
* config/i386/avx512dqintrin.h: Ditto.
* config/i386/avx512fintrin.h: Ditto.
* config/i386/i386-builtin.def (__builtin_ia32_kmovb,
__builtin_ia32_kmovd, __builtin_ia32_kmovq): New.
(__builtin_ia32_kmov16): Rename to __builtin_ia32_kmovw.
* config/i386/sse.md (kmov<mskmodesuffix>): New.

testsuite/ChangeLog:

* gcc.target/i386/avx512bw-kmovd-1.c: New test.
* gcc.target/i386/avx512bw-kmovd-2.c: Ditto.
* gcc.target/i386/avx512bw-kmovd-3.c: Ditto.
* gcc.target/i386/avx512bw-kmovd-4.c: Ditto.
* gcc.target/i386/avx512bw-kmovq-1.c: Ditto.
* gcc.target/i386/avx512bw-kmovq-2.c: Ditto.
* gcc.target/i386/avx512bw-kmovq-3.c: Ditto.
* gcc.target/i386/avx512bw-kmovq-4.c: Ditto.
* gcc.target/i386/avx512dq-kmovb-2.c: Ditto.
* gcc.target/i386/avx512dq-kmovb-3.c: Ditto.
* gcc.target/i386/avx512dq-kmovb-4.c: Ditto.
* gcc.target/i386/avx512dq-kmovb-5.c: Ditto.
* gcc.target/i386/avx512f-kmovw-2.c: Ditto.
* gcc.target/i386/avx512f-kmovw-3.c: Ditto.
* gcc.target/i386/avx512f-kmovw-4.c: Ditto.
* gcc.target/i386/avx512f-kmovw-5.c: Ditto.

From-SVN: r243728

i386.md (ffs<mode>2): Generate CCCmode flags register for TARGET_BMI.

* config/i386/i386.md (ffs<mode>2): Generate CCCmode flags register
for TARGET_BMI.
(ffssi2_no_cmove): Ditto.
(*tzcnt<mode>_1_falsedep_1): New insn_and_split pattern.
(*tzcnt<mode>_1_falsedep): New insn pattern.

(LT_ZCNT): New mode iterator.
(lt_zcnt): New mode attribute.
(lt_zcnt_type): New mode attribute.
(<lt_zcnt>_<mode>): Macroize expander from bmi_tzcnt_<mode> and
lzcnt_<mode> using LT_ZCNT mode iterator.
(*<lt_zcnt>_<mode>_falsedep_1): Macroize insn from
*bmi_tzcnt_<mode>_falsedep_1 and *lzcnt_<mode>_falsedep_1
using LT_ZCNT mode iterator.
(*<lt_zcnt>_<mode>_falsedep): Macroize insn from
*bmi_tzcnt_<mode>_falsedep and *lzcnt_<mode>_falsedep
using LT_ZCNT mode iterator.
(*<lt_zcnt>_<mode>): Macroize insn from *bmi_tzcnt_<mode>
and *lzcnt_<mode> using LT_ZCNT mode iterator.
* config/i386/i386-builtin.def (__builtin_ia32_tzcnt_u16)
(__builtin_ia32_tzcnt_u32, __builtin_ia32_tzcnt_u64, __builtin_ctzs):
Update for rename.

From-SVN: r243727

re PR fortran/78798 ([cleanup] some int-valued functions should be bool)

2016-12-15  Janus Weil  <janus@gcc.gnu.org>

PR fortran/78798
* gfortran.h (gfc_compare_derived_types,gfc_compare_types,
gfc_compare_interfaces,gfc_has_vector_subscript): Return bool instead
of int.
* interface.c (compare_components): Ditto.
(gfc_compare_union_types): Rename to compare_union_types, declare as
static, return bool.
(gfc_compare_derived_types): Return bool instead of int.
(gfc_compare_types): Ditto.
(compare_type): Ditto.
(compare_rank): Ditto.
(compare_type_rank): Ditto.
(compare_type_rank_if): Ditto.
(count_types_test): Ditto.
(generic_correspondence): Ditto.
(gfc_compare_interfaces): Ditto.
(check_interface0): Ditto.
(check_interface1): Ditto.
(compare_allocatable): Ditto.
(compare_parameter): Ditto.
(gfc_has_vector_subscript): Ditto.
(compare_actual_formal): Ditto.

From-SVN: r243726

ipa-cp.c (class ipcp_bits_lattice): Formatting fixes.

* ipa-cp.c (class ipcp_bits_lattice): Formatting fixes.
(print_ipcp_constant_value): Likewise.
(ipcp_cloning_candidate_p): Likewise.
(ipcp_bits_lattice::get_value_and_mask): Likewise.
(ipcp_bits_lattice::meet_with_1): Likewise.
(ipcp_bits_lattice::meet_with): Likewise.
(initialize_node_lattices): Likewise.
(ipcp_lattice::add_value): Likewise.
(propagate_vals_accross_pass_through): Renamed to ...
(propagate_vals_across_pass_through): ... this function.
(propagate_vals_accross_ancestor): Renamed to ...
(propagate_vals_across_ancestor): ... this.
(propagate_scalar_accross_jump_function): Renamed to ...
(propagate_scalar_across_jump_function): ... this.
Adjust calls to above functions.
(propagate_context_accross_jump_function): Renamed to ...
(propagate_context_across_jump_function): ... this.
(propagate_bits_accross_jump_function): Renamed to ...
(propagate_bits_accross_jump_function): ... this.  Formatting fixes.
(propagate_vr_accross_jump_function): Renamed to ...
(propagate_vr_across_jump_function): ... this.
(merge_agg_lats_step): Formatting fixes.
(propagate_constants_accross_call): Renamed to ...
(propagate_constants_across_call): ... this.  Adjust calls to above
functions.
(ipa_get_indirect_edge_target_1): Formatting fixes.
(gather_context_independent_values): Likewise.
(estimate_local_effects): Likewise.
(add_all_node_vals_to_toposort): Likewise.
(propagate_constants_topo): Adjust calls to above functions.
(get_replacement_map): Formatting fixes.
(dump_profile_updates): Likewise.
(update_profiling_info): Likewise.
(update_specialized_profile): Likewise.
(create_specialized_node): Likewise.
(find_more_contexts_for_caller_subset): Likewise.
(decide_whether_version_node): Likewise.
(identify_dead_nodes): Likewise.
(ipcp_decision_stage): Likewise.
(ipcp_store_bits_results): Likewise.
(ipcp_store_vr_results): Likewise.
(ipcp_driver): Likewise.

From-SVN: r243725

P0490R0 GB 20: decomposition declaration should commit to tuple interpretation early

P0490R0 GB 20: decomposition declaration should commit to tuple
interpretation early
* decl.c (get_tuple_size): Make static.  If inst is error_mark_node
or non-complete type, return NULL_TREE, otherwise if
lookup_qualified_name fails or doesn't fold into INTEGER_CST, return
error_mark_node.
(get_tuple_element_type, get_tuple_decomp_init): Make static.
(cp_finish_decomp): Pass LOC to get_tuple_size.  If it returns
error_mark_node, complain and fail.

* g++.dg/cpp1z/decomp10.C (f1): Adjust expected diagnostics.

From-SVN: r243724

re PR c++/77585 (g++ incorrectly decides that member function is called without object in generic lambda)

PR c++/77585
* pt.c (instantiate_decl): Push to class scope lambda resides
within when instantiating a generic lambda function.

PR c++/77585
* g++.dg/cpp1y/pr77585.C: New.

From-SVN: r243723

Fix use-after-free lexing unterminated raw strings (PR preprocessor/78811)

gcc/ChangeLog:
PR preprocessor/78680
PR preprocessor/78811
* input.c (struct selftest::lexer_test): Add field
m_implicitly_expect_EOF.
(selftest::lexer_error_sink): New class.
(selftest::lexer_error_sink::s_singleton): New global.
(selftest::lexer_test::lexer_test): Initialize new field
"m_implicitly_expect_EOF".
(selftest::lexer_test::~lexer_test): Conditionalize the
check for the EOF token on the new field.
(selftest::test_lexer_string_locations_raw_string_unterminated):
New function.
(selftest::input_c_tests): Call the new test.

libcpp/ChangeLog:
PR preprocessor/78680
PR preprocessor/78811
* lex.c (_cpp_lex_direct): Only determine the end-location of
the token and build a range for non-reserved start locations.
Do not do it for EOF tokens.

From-SVN: r243721

Using leaf_function_p in a backend is dangerous as it incorrectly returns false...

Using leaf_function_p in a backend is dangerous as it incorrectly returns
false if it is called while in a sequence (for example during prolog/epilog
generation).  Replace all uses with crtl->is_leaf as this is now initialized
early enough in ira.c.  This typically causes no code generation differences
unless there was a bug due to leaf_function_p returning the wrong value.

    gcc/
        * config/arm/arm.h (TARGET_BACKTRACE): Use crtl->is_leaf.
        * config/arm/arm.c (arm_option_check_internal): Improve comment.
        (thumb_force_lr_save): Use crtl->is_leaf.
        (arm_get_frame_offsets): Remove comment.  Use crtl->is_leaf.
        (thumb_far_jump_used_p): Remove comment.
        (arm_frame_pointer_required): Use crtl->is_leaf.

From-SVN: r243720

[arm] Add missing arm-isa.h

From-SVN: r243718

extend.texi: Clean up @xref{...} uses.

* doc/extend.texi: Clean up @xref{...} uses.
* doc/invoke.texi: Likewise.

From-SVN: r243717

[arm] Permit 'auto' in -mfpu

Now we finally have the infrastructure in place we can now derive
details of the FPU from a CPU entry.  This patch enables this for the
existing cores that already have an explicit FPU in their product names.

* arm-fpus.def: Add CNAME field to all FPU definitions.
* genopt.sh: Use explicit enumeration tags for FPU entries.
* arm-tables.opt: Regenerated.
* arm.opt (mfpu): Provide initial value.
* arm-opts.h (enum fpu_type): Build the enumeration from the list of
available FPUs.  Add 'auto' entry on the end.
* arm.c (arm_configure_build_target): Only do explicit configuration
of the FPU features if the selected FPU is not 'auto'.
(arm_option_override): Adjust initialization of arm_fpu_index.
Emit an error if we have a hard float ABI request, but the processor
does not support floating-point.
(arm_option_print): Handle -mfpu=auto.
(arm_valid_target_attribute_rec): Don't permit fpu=auto in pragmas
or function attributes.
(arm_identify_fpu_from_isa): Handle effective soft-float when
the FPU is automatically detected.
* arm-cores.def (arm1136jf-s): Add feature ISA_FP_DBL.
(arm1176jzf-s): Likewise.
(mpcore): Likewise.
(arm1156t2f-s): Likewise.

From-SVN: r243716

[arm] Remove FEATURES field from FPU descriptions

Now that everything uses the new ISA features, we can remove the
FEATURES field from the FPU descriptions, along with all the macros
and definitions associated with it.

* arm-fpus.def (ARM_FPU): Remove features field from all definitions.
* arm.h (arm_fpu_feature_set): Delete typedef.
(FPU_FL_NONE): Delete.
(FPU_FL_NEON): Delete.
(FPU_FL_FP16): Delete.
(FPU_FL_CRYPTO): Delete.
(FPU_FL_DBL): Delete.
(FPU_FL_D32): Delete.
(FPU_FL_VFPv2): Delete.
(FPU_FL_VFPv3): Delete.
(FPU_FL_VFPv4): Delete.
(FPU_FL_VFPv5): Delete.
(FPU_FL_AMRv8): Delete.
(FPU_VFPv2): Delete.
(FPU_VFPv3): Delete.
(FPU_VFPv4): Delete.
(FPU_VFPv5): Delete.
(FPU_ARMv8): Delete.
(FPU_DBL): Delete.
(FPU_D32): Delete.
(FPU_NEON): Delete.
(FPU_CRYPTO): Delete.
(FPU_FP16): Delete.
(arm_fpu_desc): Delete features field.
* arm.c (all_fpus): Don't initialize feature field.

From-SVN: r243715

[arm] Use ISA feature sets for determining inlinability

Now that we can construct the build target isa from the cl_target_options
data we can use this to determine inlinability.  This eliminates the
final remaining use of the FPU features field.

* arm.c (arm_can_inline_p): Use ISA features for determining
inlinability.

From-SVN: r243714

[arm] Use cl_target_options for configuring the active target

It now becomes apparent that it would be better to use the the
cl_target_options as the basis for calling arm_configure_build_target;
it already contains exactly the same fields that we need.  I chose not
to rewrite the earlier patches as that would make the progression of
changes seem less logical than it currently is, with several early
changes having no immediate justification.

* arm-protos.h (arm_configure_build_target): Change second argument
to cl_target_options.
* arm.c (arm_configure_build_target): Likewise.
(arm_option_restore): Update accordingly.
(arm_option_override): Create the target_option_default_node before
calling arm_configure_build_target.  Use it in call of latter.
Resynchronize after all other overrides have been calculated.
(arm_valid_target_attribute_tree): Use the target options for
reconfiguration.  Resynchronize after performing override checks.
* arm-c.c (arm_pragma_target_parse): Use target optiosn from cur_tree
to reconfigure the build target.

From-SVN: r243713

[arm] Use arm_active_target for most FP feature tests

Now that the isa feature bits are all available in arm_active_target
we can use that for most of the feature tests that are needed.

* arm.h (TARGET_VFPD32): Use arm_active_target.
(TARGET_VFP3): Likewise.
(TARGET_VFP5): Likewise.
(TARGET_VFP_SINGLE): Likewise.
(TARGET_VFP_DOUBLE): Likewise.
(TARGET_NEON_FP16): Likewise.
(TARGET_FP16): Likewise.
(TARGET_FMA): Likewise.
(TARGET_FPU_ARMV8): Likewise.
(TARGET_CRYPTO): Likewise.
(TARGET_NEON): Likewise.
(TARGET_FPU_FEATURES): Delete.
* arm.c (arm_option_check_internal): Check for iwmmxt conflict with
Neon using arm_active_target.

From-SVN: r243712

[arm] Eliminate TARGET_FPU_NAME

Rather than assuming a specific fpu name has been selected, we work
out the FPU from the ISA properties.  This is necessary since once we
have default FPUs selected by the processor, there will be no explicit
entry in the table of fpus to refer to.

This also fixes a bug with the code I added recently to permit new
aliases for existing FPU names: the new names cannot be passed to the
assembler since it does not recognize them.  By mapping the ISA
features back to the canonical names we avoid having to teach the
assembler about the new names.

* arm.h (TARGET_FPU_NAME): Delete.
* arm.c (arm_identify_fpu_from_isa): New function.
(arm_declare_function_name): Use it to get the name for the FPU.

From-SVN: r243711

[arm] Initialize fpu capability bits in arm_active_target

Now that we can describe the FPU with the standard ISA bits we need to
initialize them.  However, the FPU settings can be changed with target build
attributes, so we also need to reset them if things change.  This requires
a bit of juggling about with the existing code to ensure that the active
target is reconfigured after each change to the target options.

* arm-protos.h: Include sbitmap.h
(arm_configure_build_target): Make public.
* arm.c (arm_configure_build_target): Now not static.
(arm_valid_target_attribute_rec): Move internal option check to...
(arm_valid_target_attribute_tree0: ... here.  Also reconfingure the
active target.
(arm_override_options_after_change): Call arm_configure_build_target.
(isa_all_fpubits): Renamed from isa_fpubits.
(arm_option_restore): New function.
(TARGET_OPTION_RESTORE): Register it.
(arm_configure_build_target): Initialize the FPU capability bits in
the isa.
(arm_option_override): Move the code that forces the setting of the
FPU option before the call to arm_configure_build_target.
* arm.opt (march): Mark as Save.
(mcpu, mtune): Likewise.
* arm-c.c (arm_pragma_target_parse): Reconfigure the build target
after pragmas change the target options.

From-SVN: r243710

[arm] Add isa features to FPU descriptions

Similar to the new CPU and architecture ISA feature lists, we now add
similar capabilities to each FPU description.  We don't use these yet,
that will come in later patches.  These follow the same style as the
newly modified flag sets, but use slightly different defaults that
more accurately reflect the ISA specifications.

* arm-isa.h (isa_feature): Add bits for VFPv4, FPv5, fp16conv,
fP_dbl, fp_d32 and fp_crypto.
(ISA_ALL_FPU): Add all the new bits.
(ISA_VFPv2, ISA_VFPv3, ISA_VFPv4, ISA_FPv5): New macros.
(ISA_FP_ARMv8, ISA_FP_DBL, ISA_FP_D32, ISA_NEON, ISA_CRYPTO): Likewise.
* arm-fpus.def: Add ISA features to all FPUs.
* arm.h: (arm_fpu_desc): Add new field for ISA bits.
* arm.c (all_fpus): Initialize it.
* arm-tables.opt: Regenerated.

From-SVN: r243709

[arm] Remove FPU rev field

Similar to the main ISA, we convert the FPU revision into a set of feature
bits.  This permits a more complex set of capability relationships to be
expressed more easily.  For now we continue to use the traditional bitmasks.

* arm.h (FPU_FL_VFPv2) New feature bit.
(FPU_FL_VFPv3, FPU_FL_VFPv4, FPU_FL_VFPv5, FPU_FL_ARMv8): Likewise.
(FPU_VFPv2, FPU_VFPv3, FPU_VFPv4, FPU_VFPv5, FPU_ARMv8): New helper
macros.
(FPU_DBL, FPU_D32, FPU_NEON, FPU_CRYPTO, FPU_FP16): Likewise.
(TARGET_FPU_REV): Delete.
(TARGET_VFP3): Use feature bits.
(TARGET_VFP5): Likewise.
(TARGET_FMA): Likewise.
(TARGET_FPU_ARMV8): Likewise.
(struct arm_fpu_desc): Delete rev field.
* arm-fpus.def: Delete REV entry, use new feature bits and macros.
* arm.c (all_fpus): Delete rev field.

From-SVN: r243708

[arm] Eliminate vfp_reg_type

Remove the VFP_REGS field by converting its meanings into flag
attributes.  The new flag attributes build on each other describing
increasing capabilities.  This allows us to do a better job when
inlining functions with differing requiremetns on the fpu environment:
we can now inline A into B if B has at least the same register set
properties as B (previously we required identical register set
properties).

* arm.h (vfp_reg_type): Delete.
(TARGET_FPU_REGS): Delete.
(arm_fpu_desc): Delete regs field.
(FPU_FL_NONE, FPU_FL_NEON, FPU_FL_FP16, FPU_FL_CRYPTO): Use unsigned
values.
(FPU_FL_DBL, FPU_FL_D32): Define.
(TARGET_VFPD32): Use feature test.
(TARGET_VFP_SINGLE): Likewise.
(TARGET_VFP_DOUBLE): Likewise.
* arm-fpus.def: Update all entries for new feature bits.
* arm.c (all_fpus): Update initializer macro.
(arm_can_inline_p): Remove test on fpu regs.

From-SVN: r243707

[arm] Delete unused arm_fp_model

The arm_fp_model enumeration type has only had one useful value since
the FPA support was removed, and it's no-longer used anywhere.  This
patch just cleans that up by removing it.

* arm.h (arm_fp_model): Delete.

From-SVN: r243706

[arm] Remove remaining references to arm feature sets

Nothing uses the old feature sets now, so we can delete them entirely.

* arm-cores.def: Remove FLAGS field from all core definitions.
* arm-arches.def: Likewise.
* arm-opts.h (enum processor_type): Remove FLAGS parameter from
ARM_CORES macro.
(arm_arch_core_flags): Likewise, plus ARM_ARCH macro.
* arm-protos.h (FL_*): Delete.
(arm_feature_set): Delete.
(ARM_FSET_*): Delete.
* arm.c (struct processors): Delete flags field.
(all_cores): Delete FLAGS parameter from macro, don't initialize flags.
(all architectures): Likewise.

From-SVN: r243705

[arm] Rework arm-common to use new feature bits.

This converts the recently added implicit -mthumb support code to use
the new data structures.  Since we have a very simple query and no
initialized copies of the sbitmaps, for now we simply scan the list of
features to look for the one of interest.

* arm-opts.h (struct arm_arch_core_flag): Add new field ISA.
Initialize it.
    (arm_arch_core_flag): Delete flags field.
     (arm_arch_core_flags): Don't initialize flags field.
  * common/config/arm/arm-common.c (check_isa_bits_for): New function.
(arm_target_thumb_only): Use new isa bits arrays.

From-SVN: r243704

[arm] Remove insn_flags.

This patch finishes the job of removing insn_flags and moves the logic
over to using the new data structures.  I've added a new boolean
variable to detect when we have ARMv7ve-like capabilities and thus
have 64-bit atomic operations since that would be a complex query and
expensive to do in full.  It might be better to add a specific bit to
the ISA data structures to indicate this capability directly.

* arm-protos.h (insn_flags): Delete declaration.
(arm_arch7ve): Declare.
* arm.c (insn_flags): Delete.
(arm_arch7ve): New variable.
(arm_selected_cpu): Delete.
(arm_option_check_internal): Use new ISA bitmap.
(arm_option_override_internal): Likewise.
(arm_configure_build_target): Declare arm_selected_cpu locally.
(arm_option_override): Use new ISA bitmap.  Initialize arm_arch7ve.
Rearrange variable intialization by general function.
* arm.h (TARGET_HAVE_LPAE): Use arm_arch7ve.

From-SVN: r243703

[arm] Use arm_active_target when configuring builtins

This patch uses the new ISA data structure to determine which builtins
to add.  It entirely eliminates the need for insn_flags to be a global
variable, but we're about to delete that in the following patches, so
for now we leave it as a global.

* arm-builtins.c: Include sbitmap.h.
(def_mbuiltin): Change first parameter to a flag bit.  Use it to test
available features in the current target.
(struct builtin_description): Change type of feature field.
(IWMMXT_BUILTIN): Use the isa_features types.
(IWMMXT2_BUILTIN): Likewise.
(IWMMXT_BUILTIN2): Likewise.
(IWMMXT2_BUILTIN2): Likewise.
(CRC32_BUILTIN): Likewise.
(CRYPTO_BUILTIN): Likewise.
(iwmmx_builtin): Likewise.
(iwmmx2_builtin): Likewise.
(arm_iwmmxt_builtin): Check for specific feature bits.

From-SVN: r243702

[arm] Add new isa quirk bit for Cortex-M3 ldrd issue.

With the new data structures it is trivial to add a new field and we
aren't (too) limited as to the number we have.  This patch adds a new
bit to describe the need for a particular compiler behaviour
modification: in this case a quirk in the cortex-m3.

* arm-isa.h (enum isa_feature): Add isa_quirk_cm3_ldrd.
(ISA_ALL_QUIRKS): New macro.
* arm-cores.def (cortex-m3): Add isa_quirk_cm3_ldrd to isa feature list.
* arm.c (isa_quirkbits): New feature-list bitmap.
(arm_configure_build_target): Ignore quirk bits when comparing an
architecture feature list with a CPU feature list.
(arm_option_override): Initialize_isa_quirkbits.  If the user has
not specified -m[no-]fix-cortex-m3-ldrd, automatically enable the
feature if isa_quirk_cm3_ldrd appears in the isa feature list.

From-SVN: r243701

[arm] Reduce usage of arm_selected_cpu.

Make more use of the new data structure for initializing existing
variables.

* arm.c (arm_option_override): Use arm_active_target as source of
information for arm_base_arch and arm_arch_name.
* (arm_file_start): Use arm_active_target for core name.

From-SVN: r243700

[arm] Use arm_active_target for architecture and tune

We now start to make more use of the new data structure.  This allows
us to eliminate two of the existing static variables,
arm_selected_arch and arm_selected tune.

* arm.c (arm_selected_tune): Delete static variable.
(arm_selected_arch): Likewise.
(arm_configure_build_target): Declare local versions of arm_selected
target and arm_selected_arch.  Initialize more fields in target
data structure.
(arm_option_override): Use arm_active_target instead of
arm_selected_tune and arm_selected_arch.
(asm_file_start): Use arm_active_target.

From-SVN: r243699

[arm] Introduce arm_active_target.

This patch creates a new data structure for carrying around the data
relating to the current compilation target.  The idea behind this is
that this data structure can be updated to reflect the overall
compilation target as new information is gathered (from command line
options) or architectural extensions.  We will no-longer have to grub
around looking in multiple places for this information.

There are some small behaviour changes around how we handle selecting
a default CPU if thumb or interworking are specified on the command
line and the default CPU does not support thumb, but I believe the
existing code was broken in that respect.  This code will go away once
we obsolete pre-armv4t devices.

* arm-protos.h (arm_build_target): New structure.
(arm_active_target): Declare it.
* arm.c (arm_active_target): New variable.
(bitmap_popcount): New function.
(feature_count): Delete.
(arm_initialize_isa): New function.
isa_fpubits): New variable.
(arm_configure_build_target): New function.
(arm_option_override): Initialize isa_fpubits and arm_active_target.isa.
Use arm_configure_build_target.

From-SVN: r243698

This patch adds the new ISA data structures.

This patch adds the new ISA data structures.  The idea is to use an
sbitmap for carrying these around internally.  We don't make much use
of this yet, but will increasingly migrate over to this in the
following patches.  All cores and architectures currently have both
old and new encodings for now.

For simplicity and clarity we introduce internally the concept of
ARMv7ve.  It doesn't change any visible behaviour.

There's also a bit of tidying up of the various supported cores,
sorting them by profile.

* arm-isa.h: New file.
* arm-protos.h: Include it.
* arm-arches.def: Add new ISA field to all entries.  Drop bogus
armv8.1-a+crc architecture.
* arm-cores.def: Similarly.  Group ARMv8 cores by profile.
* arm-opts.h (enum processor_type): Adjust for new field.
* arm.c (struct processors): New field 'isa_bits'.
(all_cores, all_architectures): Initialize new field.
* arm-tables.opt: Regenerated.
* arm-tune.md: Regenerated.

From-SVN: r243697

We start out by separating the 'tuning flags' in a CPU or architecture...

We start out by separating the 'tuning flags' in a CPU or architecture
specification into a new field in the data structures.  Because there
aren't very many of these (and we'd like to get rid of them entirely,
eventually, moving to entries in the tuning tables), we just use a
simple unsigned word.  This frees up a number of bits in the main
flags data structure, but we don't consolidate them as we'll be
getting rid of them entirely shortly.

There's one small user-visible change, the slow multiply flag is moved
from being treated as an architectural flag to a tuning flag.  This
has two consequences: it's now ignored for architectural matching to a
CPU and specifying a -mtune option will now correctly apply the
multiply performance to the decision as to which sequences to
synthesise.

* arm-arches.def (ARM_ARCH): Add extra field TUNE_FLAGS, move
tuning properties from architectural FLAGS field.
* arm-cores.def (ARM_CORE): Likewise.
* arm-protos.h (TF_LDSCHED, TF_WBUF, TF_CO_PROC): New macros.
(TF_SMALLMUL, TF_STRONG, TF_SCALE, TF_NOMODE32): New macros.
(FL_LDSCHED, FL_STRONG, FL_WBUF, FL_SMALLMUL): Delete.
(FL_TUNE): Remove deleted elements.
(tune_flags): Convert type to unsigned int.
* arm.c (struct processors): Add new field tune_flags.
(all_cores, all_arches): Initialize it.
(arm_option_override): Adapt uses of tune_flags.  Use tune_flags
for deciding when we should have slow multiply operations.

From-SVN: r243696

Fix ChangeLog formatting.

From-SVN: r243695

ssa-fre-55.c: Add -Wno-psabi.

        * gcc.dg/tree-ssa/ssa-fre-55.c: Add -Wno-psabi.
        * gcc.dg/tree-ssa/pr71179.c: Same.

From-SVN: r243694

PR59170 make pretty printers check for singular iterators

PR libstdc++/59170
* python/libstdcxx/v6/printers.py (StdListIteratorPrinter.to_string)
(StdSlistIteratorPrinter.to_string, StdVectorIteratorPrinter.to_string)
(StdRbtreeIteratorPrinter.to_string)
(StdDequeIteratorPrinter.to_string): Add check for value-initialized
iterators.
* testsuite/libstdc++-prettyprinters/simple.cc: Test them.
* testsuite/libstdc++-prettyprinters/simple11.cc: Likewise.

From-SVN: r243692

re PR fortran/78800 ([OOP] ICE in compare_parameter, at fortran/interface.c:2246)

2016-12-15  Janus Weil  <janus@gcc.gnu.org>

PR fortran/78800
* interface.c (compare_allocatable): Avoid additional errors on bad
class declarations.
(compare_parameter): Put the result of gfc_expr_attr into a variable,
in order to avoid calling it multiple times. Exit early on bad class
declarations to avoid ICE.

2016-12-15  Janus Weil  <janus@gcc.gnu.org>

PR fortran/78800
* gfortran.dg/unlimited_polymorphic_27.f90: New test case.

From-SVN: r243691

PR59161 make pretty printers always return strings

PR libstdc++/59161
* python/libstdcxx/v6/printers.py (StdListIteratorPrinter.to_string)
(StdSlistIteratorPrinter.to_string, StdVectorIteratorPrinter.to_string)
(StdRbtreeIteratorPrinter.to_string, StdDequeIteratorPrinter.to_string)
(StdDebugIteratorPrinter.to_string): Return string instead of
gdb.Value.
* testsuite/libstdc++-prettyprinters/59161.cc: New test.

From-SVN: r243690

Tweak formatting and docs for pretty printers

* python/libstdcxx/v6/printers.py (UniquePointerPrinter.to_string):
Remove redundant parentheses.
(RbtreeIterator, StdRbtreeIteratorPrinter): Add docstrings.
(StdForwardListPrinter.to_string): Remove redundant parentheses.
(StdExpOptionalPrinter.to_string): Use string formatting instead of
concatenation.
(StdVariantPrinter.to_string, StdNodeHandlePrinter.to_string)
(TemplateTypePrinter): Adjust whitespace.

From-SVN: r243689

Add GDB XMethods for shared_ptr and unique_ptr<T[]>

* python/libstdcxx/v6/xmethods.py (UniquePtrGetWorker.__init__): Use
correct element type for unique_ptr<T[]>.
(UniquePtrGetWorker._supports, UniquePtrDerefWorker._supports): New
functions to disable unsupported operators for unique_ptr<T[]>.
(UniquePtrSubscriptWorker): New worker for operator[].
(UniquePtrMethodsMatcher.__init__): Register UniquePtrSubscriptWorker.
(UniquePtrMethodsMatcher.match): Call _supports on the chosen worker.
(SharedPtrGetWorker, SharedPtrDerefWorker, SharedPtrSubscriptWorker)
(SharedPtrUseCountWorker, SharedPtrUniqueWorker): New workers.
(SharedPtrMethodsMatcher): New matcher for shared_ptr.
(register_libstdcxx_xmethods): Register SharedPtrMethodsMatcher.
* testsuite/libstdc++-xmethods/unique_ptr.cc: Test arrays.
* testsuite/libstdc++-xmethods/shared_ptr.cc: New test.

From-SVN: r243688

MIPS: Upgrade to R2 for -mmicromips.

gcc/testsuite

* gcc.target/mips/mips.exp (mips-dg-options): Upgrade to R2 for
-mmicromips.

From-SVN: r243687

forwprop-35.c: Use -Wno-psabi everywhere.

* gcc.dg/tree-ssa/forwprop-35.c: Use -Wno-psabi everywhere.
* gcc.dg/torture/pr78515.c: Likewise.
* gcc.dg/pr69634.c: Likewise.

From-SVN: r243686

PR middle-end/78519 - missing warning for sprintf %s with null pointer

gcc/ChangeLog:

PR middle-end/78519
* gimple-ssa-sprintf.c (format_string): Handle null pointers.
(format_directive): Diagnose null pointer arguments.
(pass_sprintf_length::handle_gimple_call): Diagnose null destination
pointers.  Correct location of null format string in diagnostics.

gcc/testsuite/ChangeLog:

PR middle-end/78519
* gcc.dg/tree-ssa/builtin-sprintf-warn-7.c: New test.

From-SVN: r243684

PR c++/78774 - [6/7 Regression] ICE in constexpr string literals and templates

gcc/cp/ChangeLog:

PR c++/78774
* pt.c (convert_template_argument): Avoid assuming operand type
is non-null since that of SCOPE_REF is not.

gcc/testsuite/ChangeLog:

PR c++/78774
* g++.dg/cpp1y/pr78774.C: New test.

From-SVN: r243683

compiler: remove unneeded zero-length slice value init

    Prune away a bit of unnecessary code from the helper routine
    Slice_construction_expression::create_array_val() that was adding
    an extra NULL value to empty slices (no longer needed).

    Reviewed-on: https://go-review.googlesource.com/34410

From-SVN: r243682

Introduce selftest::locate_file

gcc/ChangeLog:
* Makefile.in (SELFTEST_FLAGS): Add path argument to -fself-test.
(s-selftest): Add dependency on the selftests data directory.
* common.opt (fself-test): Rename to...
(fself-test=): ...this, documenting the meaning of the argument.
* selftest-run-tests.c (along): Likewise.
* selftest-run-tests.c: Include "options.h".
(selftest::run_tests): Initialize selftest::path_to_selftest_files
from flag_self_test.
* selftest.c (selftest::path_to_selftest_files): New global.
(selftest::locate_file): New function.
(selftest::test_locate_file): New function.
(selftest_c_tests): Likewise.
(selftest::selftest_c_tests): Call test_locate_file.
* selftest.h (selftest::locate_file): New decl.
(selftest::path_to_selftest_files): New decl.

gcc/testsuite/ChangeLog:
PR target/78213
* gcc.dg/cpp/pr71591.c: Add a fake value for the argument of
-fself-test.
* gcc.dg/pr78213.c: Disable this test.
* selftests/example.txt: New file.

From-SVN: r243681

* es.po: Update.

From-SVN: r243679

Daily bump.

From-SVN: r243678

aarch64-cores.def: Add -1 as the variant to all of the cores.

2016-12-14  Andrew Pinski  <apinski@cavium.com>

        * config/aarch64/aarch64-cores.def: Add -1 as the variant to all
        of the cores.
        (thunderx): Update to include LSE by default.
        (thunderxt88p1): New core.
        (thunderxt88): New core.
        (thunderxt81): New core.
        (thunderxt83): New core.
        * config/aarch64/driver-aarch64.c (struct aarch64_core_data):
        Add variant field.
        (ALL_VARIANTS): New define.
        (AARCH64_CORE): Support VARIANT operand.
        (cpu_data): Likewise.
        (host_detect_local_cpu): Parse variant field of /proc/cpuinfo.
        Combine the arch and single core case and support variant searching.
        * common/config/aarch64/aarch64-common.c (AARCH64_CORE):
        Add VARIANT operand.
        * config/aarch64/aarch64-opts.h (AARCH64_CORE): Likewise.
        * config/aarch64/aarch64.c (AARCH64_CORE): Likewise.
        * config/aarch64/aarch64.h (AARCH64_CORE): Likewise.
        * config/aarch64/aarch64-tune.md: Regenerate.
        * doc/invoke.texi (AARCH64/mtune): Document thunderxt88,
        thunderxt88p1, thunderxt81, thunderxt83 as available options.

From-SVN: r243675

Coding style fixes

2016-12-14  Martin Jambor  <mjambor@suse.cz>

    * omp-offload.c: Fix coding style.
    * omp-expand.c: Likewise.
    * omp-general.c: Likewise.
    * omp-grid.c: Likewise.
    * omp-low.c: Fix coding style of parts touched by the
      previous splitting patch.

From-SVN: r243674

Split omp-low into multiple files

2016-12-14  Martin Jambor  <mjambor@suse.cz>

* omp-general.h: New file.
* omp-general.c: New file.
* omp-expand.h: Likewise.
* omp-expand.c: Likewise.
* omp-offload.h: Likewise.
* omp-offload.c: Likewise.
* omp-grid.c: Likewise.
* omp-grid.c: Likewise.
* omp-low.h: Include omp-general.h and omp-grid.h.  Removed includes
of params.h, symbol-summary.h, lto-section-names.h, cilk.h, tree-eh.h,
ipa-prop.h, tree-cfgcleanup.h, cfgloop.h, except.h, expr.h, stmt.h,
varasm.h, calls.h, explow.h, dojump.h, flags.h, tree-into-ssa.h,
tree-cfg.h, cfganal.h, alias.h, emit-rtl.h, optabs.h, expmed.h,
alloc-pool.h, cfghooks.h, rtl.h and memmodel.h.
(omp_find_combined_for): Declare.
(find_omp_clause): Renamed to omp_find_clause and moved to
omp-general.h.
(free_omp_regions): Renamed to omp_free_regions and moved to
omp-expand.h.
(replace_oacc_fn_attrib): Renamed to oacc_replace_fn_attrib and moved
to omp-general.h.
(set_oacc_fn_attrib): Renamed to oacc_set_fn_attrib and moved to
omp-general.h.
(build_oacc_routine_dims): Renamed to oacc_build_routine_dims and
moved to omp-general.h.
(get_oacc_fn_attrib): Renamed to oacc_get_fn_attrib and moved to
omp-general.h.
(oacc_fn_attrib_kernels_p): Moved to omp-general.h.
(get_oacc_fn_dim_size): Renamed to oacc_get_fn_dim_size and moved to
omp-general.c.
(omp_expand_local): Moved to omp-expand.h.
(make_gimple_omp_edges): Renamed to omp_make_gimple_edges and moved to
omp-expand.h.
(omp_finish_file): Moved to omp-offload.h.
(default_goacc_validate_dims): Renamed to
oacc_default_goacc_validate_dims and moved to omp-offload.h.
(offload_funcs, offload_vars): Moved to omp-offload.h.
* omp-low.c: Include omp-general.h, omp-offload.h and omp-grid.h.
(omp_region): Moved to omp-expand.c.
(omp_for_data_loop): Moved to omp-general.h.
(omp_for_data): Likewise.
(oacc_loop): Moved to omp-offload.c.
(oacc_loop_flags): Moved to omp-general.h.
(offload_funcs, offload_vars): Moved to omp-offload.c.
(root_omp_region): Moved to omp-expand.c.
(omp_any_child_fn_dumped): Likewise.
(find_omp_clause): Renamed to omp_find_clause and moved to
omp-general.c.
(is_combined_parallel): Moved to omp-expand.c.
(is_reference): Renamed to omp_is_reference and and moved to
omp-general.c.
(adjust_for_condition): Renamed to omp_adjust_for_condition and moved
to omp-general.c.
(get_omp_for_step_from_incr): Renamed to omp_get_for_step_from_incr
and moved to omp-general.c.
(extract_omp_for_data): Renamed to omp_extract_for_data and moved to
omp-general.c.
(workshare_safe_to_combine_p): Moved to omp-expand.c.
(omp_adjust_chunk_size): Likewise.
(get_ws_args_for): Likewise.
(get_base_type): Removed.
(dump_omp_region): Moved to omp-expand.c.
(debug_omp_region): Likewise.
(debug_all_omp_regions): Likewise.
(new_omp_region): Likewise.
(free_omp_region_1): Likewise.
(free_omp_regions): Renamed to omp_free_regions and moved to
omp-expand.c.
(find_combined_for): Renamed to omp_find_combined_for, made global.
(build_omp_barrier): Renamed to omp_build_barrier and moved to
omp-general.c.
(omp_max_vf): Moved to omp-general.c.
(omp_max_simt_vf): Likewise.
(gimple_build_cond_empty): Moved to omp-expand.c.
(parallel_needs_hsa_kernel_p): Likewise.
(expand_omp_build_assign): Moved declaration to omp-expand.c.
(expand_parallel_call): Moved to omp-expand.c.
(expand_cilk_for_call): Likewise.
(expand_task_call): Likewise.
(vec2chain): Likewise.
(remove_exit_barrier): Likewise.
(remove_exit_barriers): Likewise.
(optimize_omp_library_calls): Likewise.
(expand_omp_regimplify_p): Likewise.
(expand_omp_build_assign): Likewise.
(expand_omp_taskreg): Likewise.
(oacc_collapse): Likewise.
(expand_oacc_collapse_init): Likewise.
(expand_oacc_collapse_vars): Likewise.
(expand_omp_for_init_counts): Likewise.
(expand_omp_for_init_vars): Likewise.
(extract_omp_for_update_vars): Likewise.
(expand_omp_ordered_source): Likewise.
(expand_omp_ordered_sink): Likewise.
(expand_omp_ordered_source_sink): Likewise.
(expand_omp_for_ordered_loops): Likewise.
(expand_omp_for_generic): Likewise.
(expand_omp_for_static_nochunk): Likewise.
(find_phi_with_arg_on_edge): Likewise.
(expand_omp_for_static_chunk): Likewise.
(expand_cilk_for): Likewise.
(expand_omp_simd): Likewise.
(expand_omp_taskloop_for_outer): Likewise.
(expand_omp_taskloop_for_inner): Likewise.
(expand_oacc_for): Likewise.
(expand_omp_for): Likewise.
(expand_omp_sections): Likewise.
(expand_omp_single): Likewise.
(expand_omp_synch): Likewise.
(expand_omp_atomic_load): Likewise.
(expand_omp_atomic_store): Likewise.
(expand_omp_atomic_fetch_op): Likewise.
(expand_omp_atomic_pipeline): Likewise.
(expand_omp_atomic_mutex): Likewise.
(expand_omp_atomic): Likewise.
(oacc_launch_pack): and moved to omp-general.c, made public.
(OACC_FN_ATTRIB): Likewise.
(replace_oacc_fn_attrib): Renamed to oacc_replace_fn_attrib and moved
to omp-general.c.
(set_oacc_fn_attrib): Renamed to oacc_set_fn_attrib and moved to
omp-general.c.
(build_oacc_routine_dims): Renamed to oacc_build_routine_dims and
moved to omp-general.c.
(get_oacc_fn_attrib): Renamed to oacc_get_fn_attrib and moved to
omp-general.c.
(oacc_fn_attrib_kernels_p): Moved to omp-general.c.
(oacc_fn_attrib_level): Moved to omp-offload.c.
(get_oacc_fn_dim_size): Renamed to oacc_get_fn_dim_size and moved to
omp-general.c.
(get_oacc_ifn_dim_arg): Renamed to oacc_get_ifn_dim_arg and moved to
omp-general.c.
(mark_loops_in_oacc_kernels_region): Moved to omp-expand.c.
(grid_launch_attributes_trees): Likewise.
(grid_attr_trees): Likewise.
(grid_create_kernel_launch_attr_types): Likewise.
(grid_insert_store_range_dim): Likewise.
(grid_get_kernel_launch_attributes): Likewise.
(get_target_argument_identifier_1): Likewise.
(get_target_argument_identifier): Likewise.
(get_target_argument_value): Likewise.
(push_target_argument_according_to_value): Likewise.
(get_target_arguments): Likewise.
(expand_omp_target): Likewise.
(grid_expand_omp_for_loop): Moved to omp-grid.c.
(grid_arg_decl_map): Likewise.
(grid_remap_kernel_arg_accesses): Likewise.
(grid_expand_target_grid_body): Likewise.
(expand_omp): Renamed to omp_expand and moved to omp-expand.c.
(build_omp_regions_1): Moved to omp-expand.c.
(build_omp_regions_root): Likewise.
(omp_expand_local): Likewise.
(build_omp_regions): Likewise.
(execute_expand_omp): Likewise.
(pass_data_expand_omp): Likewise.
(pass_expand_omp): Likewise.
(make_pass_expand_omp): Likewise.
(pass_data_expand_omp_ssa): Likewise.
(pass_expand_omp_ssa): Likewise.
(make_pass_expand_omp_ssa): Likewise.
(grid_lastprivate_predicate): Renamed to
omp_grid_lastprivate_predicate and moved to omp-grid.c, made public.
(grid_prop): Moved to omp-grid.c.
(GRID_MISSED_MSG_PREFIX): Likewise.
(grid_safe_assignment_p): Likewise.
(grid_seq_only_contains_local_assignments): Likewise.
(grid_find_single_omp_among_assignments_1): Likewise.
(grid_find_single_omp_among_assignments): Likewise.
(grid_find_ungridifiable_statement): Likewise.
(grid_parallel_clauses_gridifiable): Likewise.
(grid_inner_loop_gridifiable_p): Likewise.
(grid_dist_follows_simple_pattern): Likewise.
(grid_gfor_follows_tiling_pattern): Likewise.
(grid_call_permissible_in_distribute_p): Likewise.
(grid_handle_call_in_distribute): Likewise.
(grid_dist_follows_tiling_pattern): Likewise.
(grid_target_follows_gridifiable_pattern): Likewise.
(grid_remap_prebody_decls): Likewise.
(grid_var_segment): Likewise.
(grid_mark_variable_segment): Likewise.
(grid_copy_leading_local_assignments): Likewise.
(grid_process_grid_body): Likewise.
(grid_eliminate_combined_simd_part): Likewise.
(grid_mark_tiling_loops): Likewise.
(grid_mark_tiling_parallels_and_loops): Likewise.
(grid_process_kernel_body_copy): Likewise.
(grid_attempt_target_gridification): Likewise.
(grid_gridify_all_targets_stmt): Likewise.
(grid_gridify_all_targets): Renamed to omp_grid_gridify_all_targets
and moved to omp-grid.c, made public.
(make_gimple_omp_edges): Renamed to omp_make_gimple_edges and moved to
omp-expand.c.
(add_decls_addresses_to_decl_constructor): Moved to omp-offload.c.
(omp_finish_file): Likewise.
(oacc_thread_numbers): Likewise.
(oacc_xform_loop): Likewise.
(oacc_default_dims, oacc_min_dims): Likewise.
(oacc_parse_default_dims): Likewise.
(oacc_validate_dims): Likewise.
(new_oacc_loop_raw): Likewise.
(new_oacc_loop_outer): Likewise.
(new_oacc_loop): Likewise.
(new_oacc_loop_routine): Likewise.
(finish_oacc_loop): Likewise.
(free_oacc_loop): Likewise.
(dump_oacc_loop_part): Likewise.
(dump_oacc_loop): Likewise.
(debug_oacc_loop): Likewise.
(oacc_loop_discover_walk): Likewise.
(oacc_loop_sibling_nreverse): Likewise.
(oacc_loop_discovery): Likewise.
(oacc_loop_xform_head_tail): Likewise.
(oacc_loop_xform_loop): Likewise.
(oacc_loop_process): Likewise.
(oacc_loop_fixed_partitions): Likewise.
(oacc_loop_auto_partitions): Likewise.
(oacc_loop_partition): Likewise.
(default_goacc_fork_join): Likewise.
(default_goacc_reduction): Likewise.
(execute_oacc_device_lower): Likewise.
(default_goacc_validate_dims): Likewise.
(default_goacc_dim_limit): Likewise.
(pass_data_oacc_device_lower): Likewise.
(pass_oacc_device_lower): Likewise.
(make_pass_oacc_device_lower): Likewise.
(execute_omp_device_lower): Likewise.
(pass_data_omp_device_lower): Likewise.
(pass_omp_device_lower): Likewise.
(make_pass_omp_device_lower): Likewise.
(pass_data_omp_target_link): Likewise.
(pass_omp_target_link): Likewise.
(find_link_var_op): Likewise.
(pass_omp_target_link::execute): Likewise.
(make_pass_omp_target_link): Likewise.

* Makefile.in (OBJS): Added omp-offload.o, omp-expand.o, omp-general.o
and omp-grid.o.
(GTFILES): Added omp-offload.h, omp-offload.c and omp-expand.c, removed
omp-low.h.
* gimple-fold.c: Include omp-general.h instead of omp-low.h.
(fold_internal_goacc_dim): Adjusted calls to
get_oacc_ifn_dim_arg and get_oacc_fn_dim_size to use their new names.
* gimplify.c: Include omp-low.h.
(omp_notice_variable): Adjust the call to get_oacc_fn_attrib to use
its new name.
(gimplify_omp_task): Adjusted calls to find_omp_clause to use its new
name.
(gimplify_omp_for): Likewise.
* lto-cgraph.c: Include omp-offload.h instead of omp-low.h.
* toplev.c: Include omp-offload.h instead of omp-low.h.
* tree-cfg.c: Include omp-general.h instead of omp-low.h.  Also
include omp-expand.h.
(make_edges_bb): Adjusted the call to make_gimple_omp_edges to use its
new name.
(make_edges): Adjust the call to free_omp_regions to use its new name.
* tree-parloops.c: Include omp-general.h.
(create_parallel_loop): Adjusted the call to set_oacc_fn_attrib to use
its new name.
(parallelize_loops): Adjusted the call to get_oacc_fn_attrib to use
its new name.
* tree-ssa-loop.c: Include omp-general.h instead of omp-low.h.
(gate_oacc_kernels): Adjusted the call to get_oacc_fn_attrib to use
its new name.
* tree-vrp.c: Include omp-general.h instead of omp-low.h.
(extract_range_basic): Adjusted calls to get_oacc_ifn_dim_arg and
get_oacc_fn_dim_size to use their new names.
* varpool.c: Include omp-offload.h instead of omp-low.h.
* gengtype.c (open_base_files): Replace omp-low.h with omp-offload.h in
ifiles.
* config/nvptx/nvptx.c: Include omp-general.c.
(nvptx_expand_call): Adjusted the call to get_oacc_fn_attrib to use
its new name.
(nvptx_reorg): Likewise.
(nvptx_record_offload_symbol): Likewise.

gcc/c-family:
* c-omp.c: Include omp-general.h instead of omp-low.h.
(c_finish_oacc_wait): Adjusted call to find_omp_clause to use its new
name.

gcc/c/
* c-parser.c: Include omp-general.h and omp-offload.h instead of
omp-low.h.
(c_finish_oacc_routine): Adjusted call to
get_oacc_fn_attrib, build_oacc_routine_dims and replace_oacc_fn_attrib
to use their new names.
(c_parser_oacc_enter_exit_data): Adjusted call to find_omp_clause to
use its new name.
(c_parser_oacc_update): Likewise.
(c_parser_omp_simd): Likewise.
(c_parser_omp_target_update): Likewise.
* c-typeck.c: Include omp-general.h instead of omp-low.h.
(c_finish_omp_cancel): Adjusted call to find_omp_clause to use its new
name.
(c_finish_omp_cancellation_point): Likewise.
* gimple-parser.c: Do not include omp-low.h

gcc/cp/
* parser.c: Include omp-general.h and omp-offload.h instead of
omp-low.h.
(cp_parser_omp_simd): Adjusted calls to find_omp_clause to use its new
name.
(cp_parser_omp_target_update): Likewise.
(cp_parser_oacc_declare): Likewise.
(cp_parser_oacc_enter_exit_data): Likewise.
(cp_parser_oacc_update): Likewise.
(cp_finalize_oacc_routine): Adjusted call to get_oacc_fn_attrib,
build_oacc_routine_dims and replace_oacc_fn_attrib to use their new
names.
* semantics.c: Include omp-general insteda of omp-low.h.
(finish_omp_for): Adjusted calls to find_omp_clause to use its new
name.
(finish_omp_cancel): Likewise.
(finish_omp_cancellation_point): Likewise.

fortran/
* trans-openmp.c: Include omp-general.h.

From-SVN: r243673

PR middle-end/78786 - GCC hangs/out of memory calling sprintf with large precision

gcc/ChangeLog:

PR middle-end/78786
* gimple-ssa-sprintf.c (target_dir_max): New macro.
(get_mpfr_format_length): New function.
(format_integer): Use HOST_WIDE_INT instead of int.
(format_floating_max): Same.
(format_floating): Call get_mpfr_format_length.
(format_directive): Use target_dir_max.

gcc/testsuite/ChangeLog:

PR middle-end/78786
* gcc.dg/tree-ssa/builtin-sprintf-warn-7.c: New test.

From-SVN: r243672

re PR target/78791 (ACATS cxf2001 failure)

PR target/78791
* config/i386/i386.h (enum ix86_stack_slot): Add SLOT_STV_TEMP.
* config/i386/i386.c (dimode_scalar_chain::make_vector_copies,
dimode_scalar_chain::convert_reg): Use SLOT_STV_TEMP instead of
SLOT_TEMP.

* gcc.c-torture/execute/pr78791.c: New test.
* gcc.target/i386/pr78791.c: New test.

From-SVN: r243671

stl_tree.h (_Rb_tree_impl(const _Key_compare&, const _Node_allocator&): Restore before C++11 mode.

2016-12-14  François Dumont  <fdumont@gcc.gnu.org>

* include/bits/stl_tree.h
(_Rb_tree_impl(const _Key_compare&, const _Node_allocator&): Restore
before C++11 mode.

From-SVN: r243670

re PR c++/72775 (internal compiler error: in finish_expr_stmt, at cp/semantics.c:677)

PR c++/72775
* init.c (perform_member_init): Diagnose member initializer for
flexible array member.

* g++.dg/ext/flexary12.C: Adjust dg-error.
* g++.dg/ext/flexary20.C: New.
* g++.dg/ext/flexary21.C: New.

From-SVN: r243669

re PR target/59874 (Missing builtin (__builtin_clzs) when compiling with g++)

PR target/59874
* config/i386/i386-builtin.def: Add __builtin_clzs and __builtin_ctzs.
(ix86_fold_builtin): Handle IX86_BUILTIN_CTZS and IX86_BUILTIN_CLZS.
* config/i386/i386.md (*ctzhi2): New insn_and_split pattern.
(*clzhi2): Ditto.

testsuite/ChangeLog

PR target/59874
* gcc.target/i386/pr59874-1.c: New test.
* gcc.target/i386/pr59874-2.c: Ditto.

From-SVN: r243668

pr78515.c: Add -Wno-psabi for AIX.

        * gcc.dg/torture/pr78515.c: Add -Wno-psabi for AIX.
        * gcc.dg/tree-ssa/forwprop-35.c: Add -Wno-psabi for AIX.
        * gcc.dg/pr69634.c: Add -Wno-psabi for AIX.

From-SVN: r243666

re PR debug/77844 (Compilation of simple C++ example exhaust memory)

PR debug/77844
* valtrack.c: Include rtl-iter.h.
(struct rtx_subst_pair): Add insn field.
(propagate_for_debug_subst): If pair->to contains at least 2
regs, create a DEBUG_INSN with a debug temp before pair->insn
and replace from with the debug temp instead of pair->to.
(propagate_for_debug): Initialize p.insn.
* combine.c (insn_uid_check): New inline function.
(INSN_COST, LOG_LINKS): Use it instead of INSN_UID.
(find_single_use, combine_instructions,
cant_combine_insn_p, try_combine): Use NONDEBUG_INSN_P instead of
INSN_P.

* g++.dg/opt/pr77844.C: New test.

From-SVN: r243662

PR c/78673 - sprintf missing attribute nonnull on destination argument

PR c/78673 - sprintf missing attribute nonnull on destination argument
PR c/17308 - nonnull attribute not as useful as it could be

gcc/ChangeLog:

PR c/17308
* builtin-attrs.def (ATTR_NONNULL_1_1, ATTR_NONNULL_1_2): Defined.
(ATTR_NONNULL_1_3, ATTR_NONNULL_1_4, ATTR_NONNULL_1_5): Same.
(ATTR_NOTHROW_NONNULL_1_1, ATTR_NOTHROW_NONNULL_1_2): Same.
(ATTR_NOTHROW_NONNULL_1_3, ATTR_NOTHROW_NONNULL_1_4): Same.
(ATTR_NOTHROW_NONNULL_1_5): Same.
(ATTR_NONNULL_1_FORMAT_PRINTF_1_2): Same.
(ATTR_NONNULL_1_FORMAT_PRINTF_2_0): Same.
(ATTR_NONNULL_1_FORMAT_PRINTF_2_3): Same.
(ATTR_NONNULL_1_FORMAT_PRINTF_3_0): Same.
(ATTR_NONNULL_1_FORMAT_PRINTF_3_4): Same.
(ATTR_NONNULL_1_FORMAT_PRINTF_4_0): Same.
(ATTR_NONNULL_1_FORMAT_PRINTF_4_5): Same.
* builtins.c (validate_arg): Add argument.  Treat null pointers
passed to nonnull arguments as invalid.
(validate_arglist): Same.
* builtins.def (fprintf, fprintf_unlocked): Add nonnull attribute.
(printf, printf_unlocked, sprintf. vfprintf, vsprintf): Same.
(__sprintf_chk, __vsprintf_chk, __fprintf_chk, __vfprintf_chk): Same.
* calls.c (get_nonnull_ags, maybe_warn_null_arg): New functions.
(initialize_argument_information): Diagnose null pointers passed to
arguments declared nonnull.
* calls.h (get_nonnull_args): Declared.

gcc/c-family/ChangeLog:

PR c/17308
* c-common.c (check_nonnull_arg): Disable when optimization
is enabled.

gcc/testsuite/ChangeLog:

PR c/17308
* gcc.dg/builtins-nonnull.c: New test.
* gcc.dg/nonnull-4.c: New test.

From-SVN: r243661

re PR c++/78701 (ICE: unexpected expression N of kind template_parm_index)

PR c++/78701
* pt.c (type_unification_real): Check tsubst arg doesn't have
remaining template parms before converting it.

PR c++/78701
* g++.dg/cpp0x/pr78701.C: New.

From-SVN: r243657

re PR c++/69481 (ICE with C++11 alias using with templates)

PR c++/69481
* cp-tree.h (TYPE_TEMPLATE_INFO_MAYBE_ALIAS): Always use
TYPE_ALIAS_TEMPLATE_INFO for aliases.

From-SVN: r243656

rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions.

[gcc]
2016-12-14  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (rs6000_split_vec_extract_var): On ISA
3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract
instructions.
* config/rs6000/vsx.md (VSr2): Add IEEE 128-bit floating point
type constraint registers.
(VSr3): Likewise.
(FL_CONV): New mode iterator for binary floating types that have a
direct conversion from 64-bit integer to floating point.
(vsx_extract_<mode>_p9): Add support for the ISA 3.0/power9
VEXTU{B,H,W}{L,R}X extract instructions.
(vsx_extract_<mode>_p9 splitter): Add splitter to load up the
extract byte position into the GPR if we are using the
VEXTU{B,H,W}{L,R}X extract instructions.
(vsx_extract_<mode>_di_p9): Support extracts to GPRs.
(vsx_extract_<mode>_store_p9): Support extracting to GPRs so that
we can use reg+offset address instructions.
(vsx_extract_<mode>_var): Support extracts to GPRs.
(vsx_extract_<VSX_EXTRACT_I:mode>_<SDI:mode>_var): New combiner
insn to combine vector extracts with zero_extend.
(vsx_ext_<VSX_EXTRACT_I:VS_scalar>_fl_<FL_CONV:mode>): Optimize
extracting a small integer vector element and converting it to a
floating point type.
(vsx_ext_<VSX_EXTRACT_I:VS_scalar>_ufl_<FL_CONV:mode>): Likewise.
(UNSPEC_XXEXTRACTUW): New unspec.
(UNSPEC_XXINSERTW): Likewise.
(vextract4b): Add support for the vec_vextract4b built-in
function.
(vextract4b_internal): Likewise.
(vinsert4b): Add support for the vec_insert4b built-in function.
Include both a version that inserts element 1 from a V4SI object
and one that inserts a DI object.
(vinsert4b_internal): Likewise.
(vinsert4b_di): Likewise.
(vinsert4b_di_internal): Likewise.
* config/rs6000/predicates.md (const_0_to_11_operand): New
predicate, match 0..11.
* config/rs6000/rs6000-builtin.def (BU_P9V_VSX_3): Set built-in
type to ternary, not binary.
(BU_P9V_64BIT_VSX_3): Likewise.
(P9V_BUILTIN_VEXTRACT4B): Add support for vec_vinsert4b and
vec_extract4b non-overloaded built-in functions.
(P9V_BUILTIN_VINSERT4B): Likewise.
(P9V_BUILTIN_VINSERT4B_DI): Likewise.
(P9V_BUILTIN_VEC_VEXTULX): Move to section that adds 2 operand ISA
3.0 built-in functions.
(P9V_BUILTIN_VEC_VEXTURX): Likewise.
(P9V_BUILTIN_VEC_VEXTRACT4B): Add support for overloaded
vec_insert4b and vec_extract4 built-in functions.
(P9V_BUILTIN_VEC_VINSERT4B): Likewise.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
overloaded support for vec_vinsert4b and vec_extract4b.
* config/rs6000/rs6000.c (altivec_expand_builtin): Add checks for
the vec_insert4b and vec_extract4b byte number being a constant in
the range 0..11.
* config/rs6000/altivec.h (vec_vinsert4b): Support vec_vinsert4b
and vec_extract4b built-in functions.
* doc/extend.doc (PowerPC VSX built-in functions): Document
vec_insert4b and vec_extract4b.

[gcc/testsuite]
2016-12-14  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc/testsuite/gcc.target/powerpc/vec-extract.h: If DO_TRACE is
defined, add tracing of the various extracts to stderr.  Add
support for tests that convert the result to another type.
* gcc/testsuite/gcc.target/powerpc/vec-extract-v2df.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/vec-extract-v4sf.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/vec-extract-v4si-df.c: Add new
tests that do an extract and then convert the values double.
* gcc/testsuite/gcc.target/powerpc/vec-extract-v4siu-df.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu-df.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/vec-extract-v16qi-df.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/vec-extract-v8hiu-df.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/vec-extract-v8hi-df.c: Likewise.
* gcc.target/powerpc/p9-extract-1.c: Update test to check for
VEXTU{B,H,W}{L,R}X instructions being generated by default instead
of VEXTRACTU{B,H} and XXEXTRACTUW.
* gcc.target/powerpc/p9-extract-3.c: New test for combination of
vec_extract and convert to floating point.
* gcc.target/powerpc/p9-vinsert4b-1.c: New test for vec_vinsert4b
and vec_extract4b.
* gcc.target/powerpc/p9-vinsert4b-2.c: Likewise.

From-SVN: r243653

Make printers use singular noun for a single element

* python/libstdcxx/v6/printers.py (num_elements): New function.
(StdMapPrinter.to_string, StdSetPrinter.to_string)
(StdDequePrinter.to_string, Tr1UnorderedSetPrinter.to_string)
(Tr1UnorderedMapPrinter.to_string): Use num_elements.
* testsuite/libstdc++-prettyprinters/cxx11.cc: Adjust expected results
to use singular noun when there is only one element.
* testsuite/libstdc++-prettyprinters/debug.cc: Likewise.
* testsuite/libstdc++-prettyprinters/debug_cxx11.cc: Likewise.
* testsuite/libstdc++-prettyprinters/simple.cc: Likewise.
* testsuite/libstdc++-prettyprinters/simple11.cc: Likewise.
* testsuite/libstdc++-prettyprinters/tr1.cc: Likewise.

From-SVN: r243652

Make printers detect invalid debug mode iterators

PR libstdc++/59170
* python/libstdcxx/v6/printers.py (StdDebugIteratorPrinter): Use
_M_sequence and _M_version to detect invalid iterators.
* testsuite/libstdc++-prettyprinters/debug.cc: Test debug mode vector
and test invalid iterators.
* testsuite/libstdc++-prettyprinters/debug_cxx11.cc: New test.

From-SVN: r243650

MIPS: Remove redundant dg-skip-if from mips16-attributes.c.

gcc/testsuite

* gcc.target/mips/mips16-attributes.c: Remove dg-skip-if for
-mmicromips.

From-SVN: r243649

re PR fortran/78780 ([Coarray] ICE in conv_caf_send, at fortran/trans-intrinsic.c:1936)

gcc/testsuite/ChangeLog:

2016-12-14  Andre Vehreschild  <vehre@gcc.gnu.org>

PR fortran/78780
* gfortran.dg/coarray/alloc_comp_5.f90: New test.
* gfortran.dg/coarray_42.f90: New test.

gcc/fortran/ChangeLog:

2016-12-14  Andre Vehreschild  <vehre@gcc.gnu.org>

PR fortran/78780
* trans-expr.c (gfc_trans_assignment_1): Improve check whether detour
caf-runtime routines is needed.

From-SVN: r243648

re PR fortran/78672 (Gfortran test suite failures with a sanitized compiler)

gcc/fortran/ChangeLog:

2016-12-14  Andre Vehreschild  <vehre@gcc.gnu.org>

PR fortran/78672
* array.c (gfc_find_array_ref): Add flag to return NULL when no ref is
found instead of erroring out.
* data.c (gfc_assign_data_value): Only constant expressions are valid
for initializers.
* gfortran.h: Reflect change of gfc_find_array_ref's signature.
* interface.c (compare_actual_formal): Access the non-elemental
array-ref.  Prevent taking a REF_COMPONENT for a REF_ARRAY.  Correct
indentation.
* module.c (load_omp_udrs): Clear typespec before reading into it.
* trans-decl.c (gfc_build_qualified_array): Prevent accessing the array
when it is a coarray.
* trans-expr.c (gfc_conv_cst_int_power): Use wi::abs()-function instead
of crutch preventing sanitizer's bickering here.
* trans-stmt.c (gfc_trans_deallocate): Only get data-component when it
is a descriptor-array here.

From-SVN: r243647

re PR target/78796 (TLS fails to link on aarch64 with -mcmodel=large)

PR target/78796
* gcc.dg/tls/pr78796.c: New test.

From-SVN: r243645

re PR tree-optimization/78731 (Possible bug with switch when optimization is turned on.)

2016-12-14  Richard Biener  <rguenther@suse.de>

PR tree-optimization/78731
* gcc.dg/torture/pr78731.c: New testcase.

From-SVN: r243644

Print 2 digits after decimal delimiter for BB frequencies

* gimple-pretty-print.c (dump_probability): New function.
(dump_edge_probability): Use the function.
(dump_gimple_label): Likewise.
(dump_gimple_bb_header): Likewise.
* gcc.dg/tree-ssa/20040703-1.c: Update scanned pattern.
* gcc.dg/tree-ssa/dump-2.c: Likewise.

From-SVN: r243643

Enhance analyze_brprob script

* analyze_brprob.py: Add new column to output and new sorting
option. Fix coding style to not exceed 80 characters.
* analyze_brprob_spec.py: Add new sorting
option. Fix coding style to not exceed 80 characters.

From-SVN: r243640

MIPS: Force assembly output for msa-builtins-err.c.

gcc/testsuite

* gcc.target/mips/msa-builtins-err.c (dg-options): Add
-ffat-lto-objects option.

From-SVN: r243639

tree-ssa-strlen.c (fold_strstr_to_memcmp): New function.

2016-12-14  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
    Jakub Jelinek  <jakub@redhat.com>

* tree-ssa-strlen.c (fold_strstr_to_memcmp): New function.
(strlen_optimize_stmt): Call fold_strstr_to_memcmp.

testsuite/
* gcc.dg/strlenopt-30.c: New test-case.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r243633

lra-constraints.c (process_address_1): Do not attempt to decompose addresses for MEMs that satisfy fixed-form constraints.

* lra-constraints.c (process_address_1): Do not attempt to decompose
addresses for MEMs that satisfy fixed-form constraints.

From-SVN: r243632

re PR tree-optimization/78788 (ICE (segfault) on s390x-linux-gnu)

2016-12-14  Richard Biener  <rguenther@suse.de>

PR tree-optimization/78788
* tree-vrp.c (set_value_range): Allow [-INF(OVF), +INF(OVF)].
(set_and_canonicalize_value_range): Do not drop the above to
VARYING.

* gcc.dg/torture/pr78788.c: New testcase.

From-SVN: r243631

Daily bump.

From-SVN: r243629

re PR c++/69481 (ICE with C++11 alias using with templates)

cp/
PR c++/69481
* cp-tree.h (TYPE_TEMPLATE_INFO): Remove alias type checking.
(TYPE_ALIAS_TEMPLATE_INFO): New.
(TYPE_TEMPLATE_INFO_MAYBE_ALIAS): New.  Use those macros.
* error.c (dump_alias_template_specialization): Adjust.
* pt.c (maybe_process_partial_specialization)
iterative_has_template_arg, find_parameter_packs_r,
alias_template_specialization_p, dependent_alias_template_spec_p,
get_underlying_template, lookup_template_class_1, unify): Adjust
template using decl access.

testsuite/
PR c++/69481
* g++.dg/cpp0x/pr69481.C: New.
(--This line, and those below, will be ignored--

M    gcc/testsuite/ChangeLog
A    gcc/testsuite/g++.dg/cpp0x/pr69481.C
M    gcc/cp/cp-tree.h
M    gcc/cp/error.c
M    gcc/cp/ChangeLog
M    gcc/cp/pt.c

From-SVN: r243624

rs600.c (rs6000_builtin_vectorization_cost): Adjust unaligned load cost.

2016-12-13  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

* config/rs6000/rs600.c (rs6000_builtin_vectorization_cost):
Adjust unaligned load cost.

From-SVN: r243623

re PR fortran/78798 ([cleanup] some int-valued functions should be bool)

2016-12-13  Janus Weil  <janus@gcc.gnu.org>

PR fortran/78798
* gfortran.h (gfc_is_constant_expr, gfc_is_formal_arg,
gfc_is_compile_time_shape): Return bool instead of int.
* array.c (gfc_is_compile_time_shape): Ditto.
* expr.c (gfc_is_constant_expr): Ditto.
* resolve.c (gfc_is_formal_arg): Ditto. Make formal_arg_flag bool.

From-SVN: r243621

libgo: fixes for Solaris build

    Don't put m[0-4] in runtime.inc.

    Pass -mclear-hwcap to the linker if supported.

    From Rainer Orth.

    Reviewed-on: https://go-review.googlesource.com/34331

From-SVN: r243619