platform/upstream/llvm.git
2 years ago[CMake][Fuchsia] Install static libuwind
Petr Hosek [Wed, 6 Jul 2022 17:08:26 +0000 (17:08 +0000)]
[CMake][Fuchsia] Install static libuwind

This can now be used with -static-libgcc.

Differential Revision: https://reviews.llvm.org/D129218

2 years ago[LTO][ELF] Add selective --save-temps= option
Jin Xin Ng [Wed, 1 Jun 2022 17:46:55 +0000 (10:46 -0700)]
[LTO][ELF] Add selective --save-temps= option

Allows specific “temps” to be saved, instead of the current all-or-nothing nature of --save-temps. Multiple of these “temps” can be saved by specifying the argument multiple times.

Differential Revision: https://reviews.llvm.org/D127778

2 years ago[Clang][OpenMP] Enable floating-point operation for `atomic compare` series
Shilei Tian [Wed, 6 Jul 2022 17:05:00 +0000 (13:05 -0400)]
[Clang][OpenMP] Enable floating-point operation for `atomic compare` series

D127041 introduced the support for `fmax` and `fmin` such that we can also reprent
`atomic compare` and `atomic compare capture` with `atomicrmw` instruction. This
patch simply lifts the limitation we set before.

Depend on D127041.

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D127042

2 years ago[X86] LowerShift - lower some shuffles directly to X86ISD::PSHUFLW nodes.
Simon Pilgrim [Wed, 6 Jul 2022 17:00:21 +0000 (18:00 +0100)]
[X86] LowerShift - lower some shuffles directly to X86ISD::PSHUFLW nodes.

These are expected to lower to X86ISD::PSHUFLW but we were seeing some regressions in D129150 because it'd managed to exploit the masking of the shift amounts to create unintended clear masks instead.

2 years ago[libc++] Implement ranges::remove{, _if}
Nikolas Klauser [Wed, 6 Jul 2022 12:03:00 +0000 (14:03 +0200)]
[libc++] Implement ranges::remove{, _if}

Reviewed By: var-const, #libc

Spies: huixie90, sstefan1, libcxx-commits, mgorny

Differential Revision: https://reviews.llvm.org/D128618

2 years ago[RISCV] Autogen a vectorizer test for ease of update
Philip Reames [Wed, 6 Jul 2022 16:26:10 +0000 (09:26 -0700)]
[RISCV] Autogen a vectorizer test for ease of update

2 years ago[clangd] Fix missing key function in PreambleThrottler
Sam McCall [Wed, 6 Jul 2022 16:27:02 +0000 (18:27 +0200)]
[clangd] Fix missing key function in PreambleThrottler

2 years ago[AArch64][SVE] Zero other lanes when doing OR reduction on unpacked predicate using...
Sander de Smalen [Wed, 6 Jul 2022 15:59:24 +0000 (15:59 +0000)]
[AArch64][SVE] Zero other lanes when doing OR reduction on unpacked predicate using ptest.

When the predicate vector is unpacked, we cannot assume anything about the
values in the other lanes. We have to make sure we use the correct
predicate where we know that the other lanes have been zeroed.

Reviewed By: RosieSumpter

Differential Revision: https://reviews.llvm.org/D129081

2 years ago[JITLink][RISCV] Ignore R_RISCV_RELAX and check R_RISCV_ALIGN
Jonas Hahnfeld [Tue, 5 Jul 2022 20:36:22 +0000 (22:36 +0200)]
[JITLink][RISCV] Ignore R_RISCV_RELAX and check R_RISCV_ALIGN

It is fine to not implement and ignore linker relaxation for now, but
we need to check the alignment. Luckily, an alignment of only 2 bytes
is the most common case when interpreting C++ code in clang-repl, and
already guaranteed by the length of compressed instructions.

Differential Revision: https://reviews.llvm.org/D129159

2 years ago[LV] Remove unnecessary memory checks from recurrence test
Florian Hahn [Wed, 6 Jul 2022 16:08:06 +0000 (09:08 -0700)]
[LV] Remove unnecessary memory checks from recurrence test

The tests are focused on code-gen for first-order recurrences. There are
plenty of tests specifically for runtime check generation. Using noalias
to avoid runtime checks slightly simplifies the test output and ensures
the checks focus on the relevant bits and ensures the checks focus on
the relevant bits and ensures the checks focus on the relevant bits and
ensures the checks focus on the relevant bits.

2 years ago[RISCV] Add test coverage for vectorizer tailfolding
Philip Reames [Wed, 6 Jul 2022 16:05:27 +0000 (09:05 -0700)]
[RISCV] Add test coverage for vectorizer tailfolding

As can be seen in the check lines, we have a lot of work to do.

2 years ago[stackmaps] Start legalizing live variable operands
Edd Barrett [Fri, 17 Jun 2022 12:20:03 +0000 (13:20 +0100)]
[stackmaps] Start legalizing live variable operands

Prior to this change, live variable operands passed to
`llvm.experimental.stackmap` would be emitted directly to target nodes,
meaning that they don't get legalised. The upshot of this is that LLVM
may crash when encountering illegally typed target nodes.

e.g. https://github.com/llvm/llvm-project/issues/21657

This change introduces a platform independent stackmap DAG node whose
operands are legalised as per usual, thus avoiding aforementioned
crashes.

Note that some kinds of argument are still not handled properly, namely
vectors, structs, and large integers, like i128s. These will need to be
addressed in follow-up changes.

Note also that this does not change the behaviour of
`llvm.experimental.patchpoint`. A follow up change will do the same for
this intrinsic.

Differential review:
https://reviews.llvm.org/D125680

2 years ago[Clang] Add a warning on invalid UTF-8 in comments.
Corentin Jabot [Fri, 17 Jun 2022 14:23:41 +0000 (16:23 +0200)]
[Clang] Add a warning on invalid UTF-8 in comments.

Introduce an off-by default `-Winvalid-utf8` warning
that detects invalid UTF-8 code units sequences in comments.

Invalid UTF-8 in other places is already diagnosed,
as that cannot appear in identifiers and other grammar constructs.

The warning is off by default as its likely to be somewhat disruptive
otherwise.

This warning allows clang to conform to the yet-to be approved WG21
"P2295R5 Support for UTF-8 as a portable source file encoding"
paper.

Reviewed By: aaron.ballman, #clang-language-wg

Differential Revision: https://reviews.llvm.org/D128059

2 years ago[AArch64] Add support for various operations on nxv1i1 types.
Sander de Smalen [Wed, 6 Jul 2022 15:00:38 +0000 (15:00 +0000)]
[AArch64] Add support for various operations on nxv1i1 types.

The supported operations are:
* Logical operations (and, or, xor, bic)
* Logical reductions (and, or, xor, [us]min, [us]max)
* Conversions to/from svbool_t
* Predicate count (CNTP)

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D128835

2 years ago[AArch64] NFC: Fix name mangling in sve-insert-vector.ll
Sander de Smalen [Wed, 6 Jul 2022 14:59:45 +0000 (14:59 +0000)]
[AArch64] NFC: Fix name mangling in sve-insert-vector.ll

2 years ago[IndVars] Regenerate test checks (NFC)
Nikita Popov [Wed, 6 Jul 2022 15:13:12 +0000 (17:13 +0200)]
[IndVars] Regenerate test checks (NFC)

2 years ago[MLIR][Presburger] Support lexicographic max/min union of two PWMAFunction
Groverkss [Wed, 6 Jul 2022 15:08:15 +0000 (16:08 +0100)]
[MLIR][Presburger] Support lexicographic max/min union of two PWMAFunction

This patch implements a lexicographic max/min union of two PWMAFunctions.

The lexmax/lexmin union of two functions is defined as a function defined on
the union of the input domains of both functions, such that when only one of the
functions are defined, it outputs the same as that function, and if both are
defined, it outputs the lexmax/lexmin of the two outputs. On points where
neither function is defined, the union is not defined either.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D128829

2 years ago[Debugify] Port verify-debuginfo-preserve to NewPM
Nikola Tesic [Wed, 6 Jul 2022 12:26:36 +0000 (14:26 +0200)]
[Debugify] Port verify-debuginfo-preserve to NewPM

Debugify in OriginalDebugInfo mode, introduced with D82545,
runs only with legacy PassManager.

This patch enables this utility for the NewPM.

Differential Revision: https://reviews.llvm.org/D115351

2 years ago[LLVM] Add the support for fmax and fmin in atomicrmw instruction
Shilei Tian [Wed, 6 Jul 2022 14:57:24 +0000 (10:57 -0400)]
[LLVM] Add the support for fmax and fmin in atomicrmw instruction

This patch adds the support for `fmax` and `fmin` operations in `atomicrmw`
instruction. For now (at least in this patch), the instruction will be expanded
to CAS loop. There are already a couple of targets supporting the feature. I'll
create another patch(es) to enable them accordingly.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D127041

2 years ago[gn build] Port 08e4fe6c6196
LLVM GN Syncbot [Wed, 6 Jul 2022 14:24:15 +0000 (14:24 +0000)]
[gn build] Port 08e4fe6c6196

2 years ago[LICM] Check opt output in test (NFC)
Nikita Popov [Wed, 6 Jul 2022 14:21:05 +0000 (16:21 +0200)]
[LICM] Check opt output in test (NFC)

Check what the test actually produces, not just that it doesn't
crash.

2 years ago[X86] Add RDPRU instruction
Paul Robinson [Thu, 30 Jun 2022 20:23:41 +0000 (13:23 -0700)]
[X86] Add RDPRU instruction

Add support for the RDPRU instruction on Zen2 processors.

User-facing features:

- Clang option -m[no-]rdpru to enable/disable the feature
- Support is implicit for znver2/znver3 processors
- Preprocessor symbol __RDPRU__ to indicate support
- Header rdpruintrin.h to define intrinsics
- "rdpru" mnemonic supported for assembler code

Internal features:

- Clang builtin __builtin_ia32_rdpru
- IR intrinsic @llvm.x86.rdpru

Differential Revision: https://reviews.llvm.org/D128934

2 years ago[Clang][NFC] fix typo
Corentin Jabot [Wed, 6 Jul 2022 14:04:16 +0000 (16:04 +0200)]
[Clang][NFC] fix typo

2 years ago[AMDGPU][GFX1030][DOC][NFC] Update assembler syntax description
Dmitry Preobrazhensky [Mon, 27 Jun 2022 16:55:07 +0000 (19:55 +0300)]
[AMDGPU][GFX1030][DOC][NFC] Update assembler syntax description

Summary of changes:
- Update MUBUF lds syntax (see https://reviews.llvm.org/D124485).
- Add v_cvt_pkrtz_f16_f32_dpp, v_cvt_pkrtz_f16_f32_sdwa.
- Update SMEM syntax (see https://reviews.llvm.org/D127314).
- Enable op_sel for v_add_nc_u16, v_sub_nc_u16 (see https://reviews.llvm.org/D123594).
- Minor bug fixing and improvements.

2 years ago[WebAssembly][NFC] Consolidate TargetRegisterClass=>COPY opcode conversion into a...
Alex Bradbury [Wed, 6 Jul 2022 13:43:49 +0000 (14:43 +0100)]
[WebAssembly][NFC] Consolidate TargetRegisterClass=>COPY opcode conversion into a single helper

Previously WebAssemblyCFGStackify, WebAssemblyInstrInfo, and
WebAssemblyPeephole all had equivalent logic for this. Move it into a
common helper in WebAssemblyUtilities.

2 years ago[SimplifyCFG] Don't split predecessors of callbr terminator
Nikita Popov [Wed, 6 Jul 2022 13:36:45 +0000 (15:36 +0200)]
[SimplifyCFG] Don't split predecessors of callbr terminator

This addresses the assertion failure reported in
https://reviews.llvm.org/D124159#3631240.

I believe that this limitation in SplitBlockPredecessors is not
actually necessary (because unlike with indirectbr, callbr is
restricted in a way that does allow updating successors), but for
now fix the assertion failure the same way we do everywhere else,
by also skipping callbr.

2 years ago[clangd] Fix tests after ed0e20d5e8c5d6c679d2c
Sam McCall [Wed, 6 Jul 2022 13:21:59 +0000 (15:21 +0200)]
[clangd] Fix tests after ed0e20d5e8c5d6c679d2c

2 years ago[NFC] Add a TODO comment to apply nounwind attribute in all GPU modes.
Alexey Bader [Wed, 6 Jul 2022 13:15:17 +0000 (06:15 -0700)]
[NFC] Add a TODO comment to apply nounwind attribute in all GPU modes.

2 years ago[pseudo] Define recovery strategy as grammar extension.
Sam McCall [Tue, 5 Jul 2022 20:14:52 +0000 (22:14 +0200)]
[pseudo] Define recovery strategy as grammar extension.

Differential Revision: https://reviews.llvm.org/D129158

2 years ago[clangd] Support external throttler for preamble builds
Sam McCall [Tue, 5 Jul 2022 00:33:04 +0000 (02:33 +0200)]
[clangd] Support external throttler for preamble builds

Building preambles is the most resource-intensive thing clangd does, driving
peak RAM and sustained CPU usage.

In a hosted environment where multiple clangd instances are packed into the same
container, it's useful to be able to limit the *aggregate* resource peaks.

Differential Revision: https://reviews.llvm.org/D129100

2 years ago[WebAssembly][NFC] Reuse the regClassToValType helper in WebAssemblyMCInstLower
Alex Bradbury [Wed, 6 Jul 2022 12:56:10 +0000 (13:56 +0100)]
[WebAssembly][NFC] Reuse the regClassToValType helper in WebAssemblyMCInstLower

There's no need for WebAssemblyMCInstLower to carry its own functionally
equivalent implementation.

2 years ago[tbaa] Handle base classes in struct tbaa
Bruno De Fraine [Wed, 6 Jul 2022 12:36:14 +0000 (14:36 +0200)]
[tbaa] Handle base classes in struct tbaa

This is a fix for the miscompilation reported in https://github.com/llvm/llvm-project/issues/55384

Not adding a new test case since existing test cases already cover base classes (including new-struct-path tbaa).

Reviewed By: jeroen.dobbelaere

Differential Revision: https://reviews.llvm.org/D126956

2 years ago[mlir][OpenMP] Add if clause to OpenMP simd construct
Dominik Adamski [Thu, 30 Jun 2022 14:50:03 +0000 (09:50 -0500)]
[mlir][OpenMP] Add if clause to OpenMP simd construct

This patch adds if clause to OpenMP TableGen for simd construct.

Reviewed By: peixin

Differential Revision: https://reviews.llvm.org/D128940

Signed-off-by: Dominik Adamski <dominik.adamski@amd.com>
2 years ago[lldb][AArch64] Use "+all" feature for the disassembler
David Spickett [Tue, 5 Jul 2022 13:25:35 +0000 (13:25 +0000)]
[lldb][AArch64] Use "+all" feature for the disassembler

The "+all" feature name was added in https://reviews.llvm.org/D128029.

This feature means we don't have to generate a list of features
or use a base architecture feature.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D129177

2 years ago[libc++] default-construct moved-from test-iterators
Nikolas Klauser [Mon, 4 Jul 2022 20:43:50 +0000 (22:43 +0200)]
[libc++] default-construct moved-from test-iterators

This way we ensure that we don't use-after-move the iterators.

Reviewed By: Mordante, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D129044

2 years ago[libc++] Prefer __has_builtin for detecting compiler-provided type_traits
Nikolas Klauser [Mon, 4 Jul 2022 01:27:58 +0000 (03:27 +0200)]
[libc++] Prefer __has_builtin for detecting compiler-provided type_traits

Both clang and GCC support using `__has_builtin` for detecting compiler-provided type_traits. Use it instead of `__has_keyword` or `__has_feature` to remove special-casing for GCC-provided builtins

Reviewed By: ldionne, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D129056

2 years ago[ORC][ORC_RT][AArch64] Implement TLS descriptor in ELFNixPlatform.
Sunho Kim [Wed, 6 Jul 2022 11:12:22 +0000 (20:12 +0900)]
[ORC][ORC_RT][AArch64] Implement TLS descriptor in ELFNixPlatform.

Implements TLS descriptor relocations in JITLink ELF/AARCH64 backend and support the relevant runtime functions in ELFNixPlatform.

Unlike traditional TLS model, TLS descriptor model requires linker to return the "offset" from thread pointer via relocaiton not the actual pointer to thread local variable. There is no public libc api for adding new allocations to TLS block dynamically which thread pointer points to. So, we support this by taking delta from thread base pointer to the actual thread local variable in our allocated section.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D128601

2 years ago[MIPS] Resolve issues in building ASAN for N32 ABI
Dimitrije Milosevic [Wed, 6 Jul 2022 10:24:58 +0000 (12:24 +0200)]
[MIPS] Resolve issues in building ASAN for N32 ABI

Building the compiler-rt's AddressSanitizer for
the n32 MIPS ABI currently fails, due to a few reasons:

    - defined(__mips64), which is set solely based on
    the architecture type (32-bit/64-bit), was still used
    in some places. Therefore, defined(__mips64) is swapped
    with SANITIZER_MIPS64, which takes the ABI into account
    as well - defined(__mips64) && _MIPS_SIM == ABI64.
    - The n32 ABI still uses 64-bit *Linux* system calls,
    even though the word size is 32 bits.
    - After the transition to canonical system calls (D124212),
    the n32 ABI still didn't use them, even though they
    are supported.

Differential Revision: https://reviews.llvm.org/D127098

2 years ago[MIPS] Fix the ASAN shadow offset hook for the N32 ABI
Dimitrije Milosevic [Wed, 6 Jul 2022 10:22:04 +0000 (12:22 +0200)]
[MIPS] Fix the ASAN shadow offset hook for the N32 ABI

Currently, LLVM doesn't have the correct shadow offset
mapping for the n32 ABI.
This patch introduces the correct shadow offset value
for the n32 ABI - 1ULL << 29.

Differential Revision: https://reviews.llvm.org/D127096

2 years ago[mlir] Define proper DenseMapInfo for Interfaces
Markus Böck [Wed, 6 Jul 2022 10:27:44 +0000 (12:27 +0200)]
[mlir] Define proper DenseMapInfo for Interfaces

Prior to this patch, using any kind of interface (op interface, attr interface, type interface) as the key of a llvm::DenseSet, llvm::DenseMap or other related containers, leads to invalid pointer dereferences, despite compiling.

The gist of the problem is that a llvm::DenseMapInfo specialization for the base type (aka one of Operation*, Type or Attribute) are selected when using an interface as a key, which uses getFromOpaquePointer with invalid pointer addresses to construct instances for the empty key and tombstone key values. The interface is then constructed with this invalid base type and an attempt is made to lookup the implementation in the interface map, which then dereferences the invalid pointer address. (For more details and the exact call chain involved see the GitHub issue below)

The current workaround is to use the more generic base type (eg. instead of DenseSet<FunctionOpInterface>, DenseSet<Operation*>), but this is strictly worse from a code perspective (doesn't enforce the invariant, code is less self documenting, having to insert casts etc).

This patch fixes that issue by defining a DenseMapInfo specialization of Interface subclasses which uses a new constructor to construct an instance without querying a concept. That allows getEmptyKey and getTombstoneKey to construct an interface with invalid pointer values.

Fixes https://github.com/llvm/llvm-project/issues/54908

Differential Revision: https://reviews.llvm.org/D129038

2 years ago[AMDGPU] Move all -global-isel RUN lines into main test file
Jay Foad [Wed, 6 Jul 2022 10:00:07 +0000 (11:00 +0100)]
[AMDGPU] Move all -global-isel RUN lines into main test file

This test previously had some -global-isel RUN lines, but others
were in a separate test file in GlobalISel/.

2 years ago[LoongArch] Add codegen support for division operations
Weining Lu [Wed, 6 Jul 2022 09:46:10 +0000 (17:46 +0800)]
[LoongArch] Add codegen support for division operations

These operations include sdiv/udiv/srem/urem.

As the ISA [https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_div_wudu_mod_wudu]
described, when the divisor is 0, the result can be any value, but no
exception will be triggered. Unlike gcc, which by default emit code
that checks divide-by-zero after the division or modulus instruction,
we only emit this check when the `-loongarch-check-zero-division`
option is passed.

Differential Revision: https://reviews.llvm.org/D128572

2 years ago[AMDGPU] Add a MIR test for D127781
Jay Foad [Wed, 6 Jul 2022 09:48:30 +0000 (10:48 +0100)]
[AMDGPU] Add a MIR test for D127781

2 years ago[LoongArch] Add LoongArch support to update_llc_test_checks
wanglei [Wed, 6 Jul 2022 07:58:13 +0000 (15:58 +0800)]
[LoongArch] Add LoongArch support to update_llc_test_checks

Add LoongArch assembly scrubbing and triple support to update_llc_test_checks.

Depends on D128432

Reviewed By: MaskRay, xen0n

Differential Revision: https://reviews.llvm.org/D128433

2 years ago[lldb] Stop passing both i386 and i686 in parallel as architectures on Windows
Martin Storsjö [Thu, 23 Jun 2022 11:19:47 +0000 (14:19 +0300)]
[lldb] Stop passing both i386 and i686 in parallel as architectures on Windows

When an object file returns multiple architectures, it is treated
as a fat binary - which really isn't the case of i386 vs i686 where
the object file actually has one architecture.

This allows getting rid of hardcoded architecture triples in
PlatformWindows.

The parallel i386 and i686 architecture strings stem from
5e6f45201f0b62c1e7a24fc396f3ea6e10dc880d / D7120 and
ad587ae4ca143d388c0ec4ef2faa1b5eddedbf67 / D4658.

Differential Revision: https://reviews.llvm.org/D128617

2 years ago[ValueTracking] Accept Instruction in isSafeToSpeculativelyExecute() (NFC)
Nikita Popov [Wed, 6 Jul 2022 08:42:09 +0000 (10:42 +0200)]
[ValueTracking] Accept Instruction in isSafeToSpeculativelyExecute() (NFC)

As constant expressions can no longer trap, it only makes sense to
call isSafeToSpeculativelyExecute on Instructions, so limit the
API to accept only them, rather than general Operators or Values.

2 years ago[Docs] Add release note for ARM's new -mframe-chain option
Lucas Prates [Mon, 4 Jul 2022 15:17:31 +0000 (16:17 +0100)]
[Docs] Add release note for ARM's new -mframe-chain option

This adds a release note entry for the new -mframe-chain option
introduced on D125094.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D129085

2 years ago[InstCombine] remove useless insertelement
Chenbing Zheng [Wed, 6 Jul 2022 09:03:14 +0000 (17:03 +0800)]
[InstCombine] remove useless insertelement

extractelement (bitcast (insertelement (Vec, b)), a) ->
extractelement (bitcast (Vec), a)

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D128890

2 years ago[NFC][AMDGPU] Cleanup the SIOptimizeExecMasking pass.
Thomas Symalla [Mon, 4 Jul 2022 15:23:50 +0000 (17:23 +0200)]
[NFC][AMDGPU] Cleanup the SIOptimizeExecMasking pass.

This patch removes a bit of code duplication and
moves the v_cmpx optimization out of the
runOnMachineFunction pass.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D129086

2 years ago[SelectionDAGISel] Drop unused variable (NFC)
Nikita Popov [Wed, 6 Jul 2022 08:46:13 +0000 (10:46 +0200)]
[SelectionDAGISel] Drop unused variable (NFC)

2 years ago[LoopVectorizationLegality] Drop unused variable (NFC)
Nikita Popov [Wed, 6 Jul 2022 08:42:49 +0000 (10:42 +0200)]
[LoopVectorizationLegality] Drop unused variable (NFC)

2 years ago[llvm][AArch64] Fix "+all" feature for sysreg aliases
David Spickett [Tue, 5 Jul 2022 16:14:24 +0000 (16:14 +0000)]
[llvm][AArch64] Fix "+all" feature for sysreg aliases

For example the predres extension adds one instruction that
is a sys alias. Previously this wasn't disassembled properly
with "+all".

This was because a check for "+all" was added to haveFeatures
in AArch64SysReg but not in SysAlias.

Reviewed By: MaskRay, lenary

Differential Revision: https://reviews.llvm.org/D129147

2 years ago[IR] Remove Constant::canTrap() (NFC)
Nikita Popov [Wed, 6 Jul 2022 08:29:47 +0000 (10:29 +0200)]
[IR] Remove Constant::canTrap() (NFC)

As integer div/rem constant expressions are no longer supported,
constants can no longer trap and are always safe to speculate.
Remove the Constant::canTrap() method and its usages.

2 years ago[ConstExpr] Remove div/rem constant expressions
Nikita Popov [Mon, 4 Jul 2022 14:26:51 +0000 (16:26 +0200)]
[ConstExpr] Remove div/rem constant expressions

D128820 stopped creating div/rem constant expressions by default;
this patch removes support for them entirely.

The getUDiv(), getExactUDiv(), getSDiv(), getExactSDiv(), getURem()
and getSRem() on ConstantExpr are removed, and ConstantExpr::get()
now only accepts binary operators for which
ConstantExpr::isSupportedBinOp() returns true. Uses of these methods
may be replaced either by corresponding IRBuilder methods, or
ConstantFoldBinaryOpOperands (if a constant result is required).

On the C API side, LLVMConstUDiv, LLVMConstExactUDiv, LLVMConstSDiv,
LLVMConstExactSDiv, LLVMConstURem and LLVMConstSRem are removed and
corresponding LLVMBuild methods should be used.

Importantly, this also means that constant expressions can no longer
trap! This patch still keeps the canTrap() method to minimize diff --
I plan to drop it in a separate NFC patch.

Differential Revision: https://reviews.llvm.org/D129148

2 years ago[ConstFold] Salvage some div/rem folding test (NFC)
Nikita Popov [Wed, 6 Jul 2022 08:01:17 +0000 (10:01 +0200)]
[ConstFold] Salvage some div/rem folding test (NFC)

The div/rem constant expressions are going away in D129148. Convert
some tests to use InstSimplify instead, to show that the constant
folding still happens.

2 years ago[LoongArch] Implement prologue/epilogue insertion
wanglei [Wed, 6 Jul 2022 07:44:10 +0000 (15:44 +0800)]
[LoongArch] Implement prologue/epilogue insertion

Differential Revision: https://reviews.llvm.org/D128432

2 years ago[PowerPC] Simplify test for PR33636 (NFC)
Nikita Popov [Wed, 6 Jul 2022 07:45:01 +0000 (09:45 +0200)]
[PowerPC] Simplify test for PR33636 (NFC)

There was a lot of unnecessary code here. Add the -O0 flag to
avoid using constant expressions, otherwise it may get folded
away during EarlyCSE.

Verified that this test fails prior to the fixing commit.

2 years ago[LoongArch] Support lowering FrameIndex
wanglei [Wed, 6 Jul 2022 07:27:46 +0000 (15:27 +0800)]
[LoongArch] Support lowering FrameIndex

Ensure callee-saved registers are accessed relative to the stackpointer.

Differential Revision: https://reviews.llvm.org/D128430

2 years ago[mlir][Bazel] Fix Bazel build after a2158374ba1a6f81f4cce3eb54d0bc44f3ab75e0
Adrian Kuegel [Wed, 6 Jul 2022 06:47:21 +0000 (08:47 +0200)]
[mlir][Bazel] Fix Bazel build after a2158374ba1a6f81f4cce3eb54d0bc44f3ab75e0

2 years ago[ELF] Optimize getInputSections. NFC
Fangrui Song [Wed, 6 Jul 2022 06:31:09 +0000 (23:31 -0700)]
[ELF] Optimize getInputSections. NFC

In the majority of cases (e.g. orphan sections), an OutputSection has at most
one InputSectionDescription (isd). By changing the return type to
ArrayRef<InputSection *> we can just reference the isd->sections. For
OutputSections with more than one InputSectionDescription we use a caller
provided SmallVector to copy the elements as before.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D129111

2 years ago[AMDGPU] Additional liveness tests for si-optimize-exec-masking-pre-ra
Carl Ritson [Wed, 6 Jul 2022 05:03:49 +0000 (14:03 +0900)]
[AMDGPU] Additional liveness tests for si-optimize-exec-masking-pre-ra

Merge tests and fixes from D128110 and D128315 on top of already
committed D128800.

Original author: arsenm

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D128882

2 years ago[BOLT] Change mutex implementation
Elvina Yakubova [Wed, 6 Jul 2022 05:19:22 +0000 (08:19 +0300)]
[BOLT] Change mutex implementation

Changed acquire implemetaion to __atomic_test_and_set() and release
to __atomic_clear() so it eliminates inline asm usage and is arch
independent.

Elvina Yakubova,
Advanced Software Technology Lab, Huawei

Reviewers: yota9, maksfb, rafauler

Differential Revision: https://reviews.llvm.org/D129162

2 years ago[WebAssembly][NFC] Refactor table handling in WebAssembly::wasmSymbolSetType
Alex Bradbury [Wed, 6 Jul 2022 04:16:25 +0000 (05:16 +0100)]
[WebAssembly][NFC] Refactor table handling in WebAssembly::wasmSymbolSetType

Use the isExternRefType and isFuncRefType helpers rather than
reimplementing that logic in this function (which acts as a blocker to
work to prototype alternative IR-level representations of reference
types).

This relands 8ccc7e0aa461 (which had compilation errors).

2 years agoRevert "[WebAssembly][NFC] Refactor table handling in WebAssembly::wasmSymbolSetType"
Alex Bradbury [Wed, 6 Jul 2022 04:07:22 +0000 (05:07 +0100)]
Revert "[WebAssembly][NFC] Refactor table handling in WebAssembly::wasmSymbolSetType"

This reverts commit 8ccc7e0aa461350bce02d70669c11f4a5e300ee7.

Wrong version of the patch was pushed.

2 years ago[WebAssembly][NFC] Refactor table handling in WebAssembly::wasmSymbolSetType
Alex Bradbury [Wed, 6 Jul 2022 03:54:13 +0000 (04:54 +0100)]
[WebAssembly][NFC] Refactor table handling in WebAssembly::wasmSymbolSetType

Use the isExternRefType and isFuncRefType helpers rather than
reimplementing that logic in this function (which acts as a blocker to
work to prototype alternative IR-level representations of reference
types).

2 years ago[mlir][Vector] Fold InsertOp(SplatOp(X), SplatOp(X)) to SplatOp(X).
jacquesguan [Fri, 1 Jul 2022 08:02:28 +0000 (16:02 +0800)]
[mlir][Vector] Fold InsertOp(SplatOp(X), SplatOp(X)) to SplatOp(X).

This patch folds InsertOp(SplatOp(X), SplatOp(X)) to SplatOp(X).

Differential Revision: https://reviews.llvm.org/D129058

2 years ago[Clang][unittests] Silence trucation warning with MSVC 2022
Alexandre Ganea [Wed, 6 Jul 2022 00:27:53 +0000 (20:27 -0400)]
[Clang][unittests] Silence trucation warning with MSVC 2022

Differential Revision: https://reviews.llvm.org/D129152

2 years ago[Clang] Silence warning when building with MSVC 2022
Alexandre Ganea [Tue, 5 Jul 2022 16:40:22 +0000 (12:40 -0400)]
[Clang] Silence warning when building with MSVC 2022

Previously, the warning seen:

[22/95] Building CXX object tools\clang\lib\StaticAnalyzer\Checker...bj.clangStaticAnalyzerCheckers.dir\NoReturnFunctionChecker.cpp.objC:\git\llvm-project\clang\lib\StaticAnalyzer\Checkers\NoReturnFunctionChecker.cpp(149): warning C4305: 'if': truncation from 'size_t' to 'bool'
C:\git\llvm-project\clang\include\clang/Analysis/SelectorExtras.h(28): note: see reference to function template instantiation 'clang::Selector clang::getKeywordSelector<const char,const char,const char,const char>(clang::ASTContext &,const char *,const char *,const char *,const char *)' being compiled
C:\git\llvm-project\clang\lib\StaticAnalyzer\Checkers\NoReturnFunctionChecker.cpp(125): note: see reference to function template instantiation 'void clang::lazyInitKeywordSelector<const char,const char,const char,const char>(clang::Selector &,clang::ASTContext &,const char *,const char *,const char *,const char *)' being compiled

2 years ago[mlir] Silence warnings when building with Clang ToT
Alexandre Ganea [Tue, 5 Jul 2022 16:15:36 +0000 (12:15 -0400)]
[mlir] Silence warnings when building with Clang ToT

Previously, these warnings were seen:

[6599/7564] Building native mlir-pdll...
[270/278] Building CXX object tools/mlir/lib/Tools/PDLL/CodeGen/CMakeFiles/obj.MLIRPDLLCodeGen.dir/CPPGen.cpp.obj
In file included from C:/git/llvm-project/mlir/lib/Tools/PDLL/CodeGen/CPPGen.cpp:20:
C:/git/llvm-project/mlir/include\mlir/Tools/PDLL/ODS/Operation.h(202,16): warning: unqualified friend declaration referring to type outside of the nearest enclosing namespace is a Microsoft extension; add a nested name specifier [-Wmicrosoft-unqualified-friend]
  friend class Dialect;
               ^
               ::mlir::
1 warning generated.

[278/278] Linking CXX executable bin\mlir-pdll.exe
[6857/7564] Building CXX object tools/mlir/unittests/ExecutionEngine/CMakeFiles/MLIRExecutionEngineTests.dir/Invoke.cpp.obj
In file included from C:/git/llvm-project/mlir/unittests/ExecutionEngine/Invoke.cpp:20:
C:/git/llvm-project/mlir/include\mlir/ExecutionEngine/MemRefUtils.h(104,27): warning: shift count >= width of type [-Wshift-count-overflow]
  assert(sizeof(T) < (1ul << 32) && "Elemental type overflows");
                          ^  ~~
C:\Program Files (x86)\Windows Kits\10\include\10.0.22000.0\ucrt\assert.h(40,17): note: expanded from macro 'assert'
            (!!(expression)) ||                                                              \
                ^~~~~~~~~~
1 warning generated.

2 years agoAllow non-variadic functions to be attributed with `__attribute__((format))`
Félix Cloutier [Tue, 7 Jun 2022 22:45:07 +0000 (15:45 -0700)]
Allow non-variadic functions to be attributed with `__attribute__((format))`

Clang only allows you to use __attribute__((format)) on variadic functions. There are legit use cases for __attribute__((format)) on non-variadic functions, such as:

(1) variadic templates

```c++
template<typename… Args>
void print(const char *fmt, Args… &&args) __attribute__((format(1, 2))); // error: format attribute requires variadic function
```

(2) functions which take fixed arguments and a custom format:

```c++
void print_number_string(const char *fmt, unsigned number, const char *string) __attribute__((format(1, 2)));
// ^error: format attribute requires variadic function

void foo(void) {
    print_number_string(“%08x %s\n”, 0xdeadbeef, “hello”);
    print_number_string(“%d %s”, 0xcafebabe, “bar”);
}
```

This change allows Clang users to attach __attribute__((format)) to non-variadic functions, including functions with C++ variadic templates. It replaces the error with a GCC compatibility warning and improves the type checker to ensure that received arrays are treated like pointers (this is a possibility in C++ since references to template types can bind to arrays).

Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D112579
rdar://84629099

2 years ago[Sanitizer][Darwin] Fix log-path_test.cpp
Julian Lettner [Tue, 5 Jul 2022 23:27:11 +0000 (16:27 -0700)]
[Sanitizer][Darwin] Fix log-path_test.cpp

In my previous change [1], I added log output that made a test that
expected "no output" fail.  The easiest solution is to only print the
new hint/warning when we at least ask for `verbosity=1`.

[1] https://reviews.llvm.org/D128936

Radar-Id: rdar://96437354

2 years ago[lldb/Core] Fix finite progress event reporting
Med Ismail Bennani [Tue, 5 Jul 2022 23:25:23 +0000 (16:25 -0700)]
[lldb/Core] Fix finite progress event reporting

This patch should fix event handling for finite progress reports.

Previously, the event handler would get stuck when receiving a finite
progress report, and stop displaying upcoming reports.
This was due to the fact that we were checking if the progress event was
completed by calling `GetCompleted` but returns the completion amount
instead of saying whether it's completed.

That caused the current event id to remain the same, preventing all the
following progress reports to be shown to the user.

This patch also adds some logging to facilitate debugging progress events.

rdar://91788326

Differential Revision: https://reviews.llvm.org/D128768

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2 years ago[RISCV] Add more SHXADD patterns where the input is (and (shl/shr X, C2), C1)
Craig Topper [Tue, 5 Jul 2022 23:01:41 +0000 (16:01 -0700)]
[RISCV] Add more SHXADD patterns where the input is (and (shl/shr X, C2), C1)

It might be possible to rewrite (and (shl/shr X, C2), C1) in a way
that gives us a left shift that can be folded into a SHXADD.

2 years ago[mlir:Parser] Don't use strings for the "ugly" form of Attribute/Type syntax
River Riddle [Tue, 5 Jul 2022 23:20:30 +0000 (16:20 -0700)]
[mlir:Parser] Don't use strings for the "ugly" form of Attribute/Type syntax

This commit refactors the syntax of "ugly" attribute/type formats to not use
strings for wrapping. This means that moving forward attirbutes and type formats
will always need to be in some recognizable form, i.e. if they use incompatible
characters they will need to manually wrap those in a string, the framework will
no longer do it automatically.

This has the benefit of greatly simplifying how parsing attributes/types work, given
that we currently rely on some extremely complicated nested parser logic which is
quite problematic for a myriad of reasons; unecessary complexity(we create a nested
source manager/lexer/etc.), diagnostic locations can be off/wrong given string escaping,
etc.

Differential Revision: https://reviews.llvm.org/D118505

2 years ago[OpenMP] add 4 custom APIs supporting MSVC OMP codegen
Vadim Paretsky [Tue, 5 Jul 2022 22:20:32 +0000 (17:20 -0500)]
[OpenMP] add 4 custom APIs supporting MSVC OMP codegen

This check-in adds 4 APIs to support MSVC, specifically:

* 3 APIs (__kmpc_sections_init, __kmpc_next_section,
   __kmpc_end_sections) to support the dynamic scheduling of OMP sections.
* 1 API (__kmpc_copyprivate_light, a light-weight version of
  __kmpc_copyrprivate) to support the OMP single copyprivate clause.

Differential Revision: https://reviews.llvm.org/D128403

2 years ago[AArch64][GlobalISel] Add support for sret demotion.
Amara Emerson [Mon, 4 Jul 2022 23:43:56 +0000 (16:43 -0700)]
[AArch64][GlobalISel] Add support for sret demotion.

To do this, we need to implement a target hook and make a minor change to the
call lowering to demote arguments to sret if they can't be handled by the
calling conventions.

Fixes issue 56295

Differential Revision: https://reviews.llvm.org/D129098

2 years agoFix running orc-rt tests with LLVM_BUILD_EXTERNAL_COMPILER_RT (again).
Lang Hames [Tue, 5 Jul 2022 22:01:15 +0000 (15:01 -0700)]
Fix running orc-rt tests with LLVM_BUILD_EXTERNAL_COMPILER_RT (again).

Add missing dependency on lli when building compiler-rt with
LLVM_BUILD_EXTERNAL_COMPILER_RT. Previously we would non-deterministically fail
the tests due to the missing binary.

This is essentially identical to 0e5ea403e8d, which added an earlier dependence
on llvm-jitlink.

rdar://96467892

2 years ago[RISCV][Driver] Add libm linking to `RISCVToolchain` for C++
Anton Afanasyev [Fri, 1 Jul 2022 14:17:59 +0000 (17:17 +0300)]
[RISCV][Driver] Add libm linking to `RISCVToolchain` for C++

GCC automatically links math library by adding `-lm` to linker command
line, since C++ runtime `libstdc++` requires libm, so add it to
`RISCVToochain` as well.

Differential Revision: https://reviews.llvm.org/D129065

2 years ago[LLDB] Remove TestLoadUnload.py Arm/Linux Xfail decorator
Muhammad Omair Javaid [Tue, 5 Jul 2022 21:39:49 +0000 (01:39 +0400)]
[LLDB] Remove TestLoadUnload.py Arm/Linux Xfail decorator

This is a follow up on my last commit where one of the decorator was
left unremoved.

This patch removes Xfail decorator from TestLoadUnload.py as it is now
passing on Arm/Linux buildbot.

2 years ago[NFC][HLSL] Add tests for vector alias. Remove dead code.
Chris Bieneman [Tue, 5 Jul 2022 20:38:06 +0000 (15:38 -0500)]
[NFC][HLSL] Add tests for vector alias. Remove dead code.

Based on feedback from @Aaron.Ballman.

Remove the unused static ID char (can re-add it later if needed).

Add test to cover some invalid HLSL vector instantations ensuring
that the appropriate error messages are generated.

2 years ago[LLDB] Remove TestLoadUnload.py Arm/Linux Xfail decorator
Muhammad Omair Javaid [Tue, 5 Jul 2022 21:13:54 +0000 (01:13 +0400)]
[LLDB] Remove TestLoadUnload.py Arm/Linux Xfail decorator

This patch removes Xfail decorator from TestLoadUnload.py as it is now
passing on Arm/Linux buildbot.

2 years ago[clang-tools-extra] Fix a link in ReleaseNotes.rst
Dmitri Gribenko [Tue, 5 Jul 2022 21:08:28 +0000 (23:08 +0200)]
[clang-tools-extra] Fix a link in ReleaseNotes.rst

2 years ago[gn build] Port 05130a6ba7d9
LLVM GN Syncbot [Tue, 5 Jul 2022 21:04:41 +0000 (21:04 +0000)]
[gn build] Port 05130a6ba7d9

2 years agonew clang-tidy checker for assignments within condition clause of if statement
Dmitri Gribenko [Tue, 5 Jul 2022 20:48:53 +0000 (22:48 +0200)]
new clang-tidy checker for assignments within condition clause of if statement

new clang-tidy checker for assignments within the condition clause of an 'if' statement.

Reviewed By: gribozavr2

Differential Revision: https://reviews.llvm.org/D127114

2 years ago[RISCV] Add more SHXADD tests. NFC
Craig Topper [Tue, 5 Jul 2022 20:04:19 +0000 (13:04 -0700)]
[RISCV] Add more SHXADD tests. NFC

2 years ago[RISCV] Use a switch statement in PreprocessISelDAG. NFC
Craig Topper [Tue, 5 Jul 2022 18:58:03 +0000 (11:58 -0700)]
[RISCV] Use a switch statement in PreprocessISelDAG. NFC

This should make it easier to add more peepholes in the future.

2 years ago[RISCV] Update PreprocessISelDAG to use RemoveDeadNodes.
Craig Topper [Tue, 5 Jul 2022 16:37:58 +0000 (09:37 -0700)]
[RISCV] Update PreprocessISelDAG to use RemoveDeadNodes.

Instead of deleting nodes as we go, delete all dead nodes if a
change is made. This allows adding peepholes that might make
multiple nodes dead.

2 years ago[PowerPC] PPCTLSDynamicCall does not preserve LiveIntervals
Jay Foad [Thu, 23 Jun 2022 10:28:02 +0000 (11:28 +0100)]
[PowerPC] PPCTLSDynamicCall does not preserve LiveIntervals

According to D127731, PPCTLSDynamicCall does not preserve
LiveIntervals, so stop claiming that it does and remove the code
that tried to repair them. NFCI.

Differential Revision: https://reviews.llvm.org/D128421

2 years ago[AMDGPU] NFC. Add a test of the error message for assembling global_atomic_cmpswap_x2
Joe Nash [Tue, 5 Jul 2022 18:15:07 +0000 (14:15 -0400)]
[AMDGPU] NFC. Add a test of the error message for assembling global_atomic_cmpswap_x2

2 years ago[Libomptarget][NFC] Make Libomptarget use the LLVM naming convention
Joseph Huber [Fri, 1 Jul 2022 15:48:15 +0000 (11:48 -0400)]
[Libomptarget][NFC] Make Libomptarget use the LLVM naming convention

Libomptarget grew out of a project that was originally not in LLVM. As
we develop libomptarget this has led to an increasingly large clash
between the naming conventions used. This patch fixes most of the
variable names that did not confrom to the LLVM standard, that is
`VariableName` for variables and `functionName` for functions.

This patch was primarily done using my editor's linting messages, if
there are any issues I missed arising from the automation let me know.

Reviewed By: saiislam

Differential Revision: https://reviews.llvm.org/D128997

2 years ago[pseudo] Add error-recovery framework & brace-based recovery
Sam McCall [Wed, 29 Jun 2022 11:48:00 +0000 (13:48 +0200)]
[pseudo] Add error-recovery framework & brace-based recovery

The idea is:

- a parse failure is detected when all heads die when trying to shift the next token
- we can recover by choosing a nonterminal we're partway through parsing, and
  determining where it ends through nonlocal means (e.g. matching brackets)
- we can find candidates by walking up the stack from the (ex-)heads
- the token range is defined using heuristics attached to grammar rules
- the unparsed region is represented in the forest by an Opaque node

This patch has the core GLR functionality.
It does not allow recovery heuristics to be attached as extensions to
the grammar, but rather infers a brace-based heuristic.

Expected followups:

- make recovery heuristics grammar extensions (depends on D127448)
- add recovery to our grammar for bracketed constructs and sequence nodes
- change the structure of our augmented `_ := start` rules to eliminate some
  special-cases in glrParse.
- (if I can work out how): avoid some spurious recovery cases described in comments

(Previously mistakenly committed as a0f4c10ae227a62c2a63611e64eba83f0ff0f577)

Differential Revision: https://reviews.llvm.org/D128486

2 years ago[InstCombine] avoid conflict between CHECK prefix and value name in test file; NFC
Sanjay Patel [Tue, 5 Jul 2022 17:35:47 +0000 (13:35 -0400)]
[InstCombine] avoid conflict between CHECK prefix and value name in test file; NFC

Tests can fail if a value name (%sqrt becomes SQRT) and that is the same as the RUN prefix.

2 years ago[InstCombine] add tests for sqrt libcalls; NFC
Sanjay Patel [Tue, 5 Jul 2022 13:44:29 +0000 (09:44 -0400)]
[InstCombine] add tests for sqrt libcalls; NFC

2 years ago[SimplifyCFG] Skip hoisting common instructions that return token type
Yuanfang Chen [Tue, 5 Jul 2022 17:56:19 +0000 (10:56 -0700)]
[SimplifyCFG] Skip hoisting common instructions that return token type

By LangRef, hoisting token-returning instructions obsures the origin
so it should be skipped. Found this issue while investigating a
CoroSplit pass crash.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D129025

2 years ago[mlir][tblgen] Consistently use `$_ctxt` instead of `$_ctx`
Markus Böck [Tue, 5 Jul 2022 18:04:50 +0000 (20:04 +0200)]
[mlir][tblgen] Consistently use `$_ctxt` instead of `$_ctx`

With the exceptions of AttrOrTypeParameter and DerivedAttr, all of MLIR consistently uses $_ctxt as the substitute variable for the MLIRContext in TableGen C++ code.
Usually this does not matter unless one where to reuse some code in multiple fields but it is still needlessly inconsistent and prone to error.

This patch fixes that by consistently using _$ctxt everywhere.

Differential Revision: https://reviews.llvm.org/D129153

2 years ago[LinkerWrapper] Add AMDGPU specific options to the LLD invocation
Joseph Huber [Thu, 30 Jun 2022 15:41:38 +0000 (11:41 -0400)]
[LinkerWrapper] Add AMDGPU specific options to the LLD invocation

We use LLD to perform AMDGPU linking. This linker accepts some arguments
through the `-plugin-opt` facilities. These options match what `Clang`
will output when given the same input.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D128923

2 years ago[llvm-lib] Ignore /NODEFAULTLIB flag
Pengxuan Zheng [Sat, 2 Jul 2022 02:23:03 +0000 (19:23 -0700)]
[llvm-lib] Ignore /NODEFAULTLIB flag

It doesn't look like there is anything llvm-lib needs to handle based on
Microsoft's description of the flag.

https://docs.microsoft.com/en-us/cpp/build/reference/managing-a-library?view=msvc-170

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D129032

2 years agoRevert "[lldb/test] Don't use preexec_fn for launching inferiors"
Jonas Devlieghere [Tue, 5 Jul 2022 17:12:57 +0000 (10:12 -0700)]
Revert "[lldb/test] Don't use preexec_fn for launching inferiors"

This reverts commit b15b1421bc9a11b318b65b489e5fd58dd917db1f because it
breaks GreenDragon [1]. The bot has been red for several days, so
reverting to green while I take a look.

[1] https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/45012/

2 years ago[analyzer] Fix assertion in simplifySymbolCast
Gabor Marton [Wed, 1 Jun 2022 14:29:51 +0000 (16:29 +0200)]
[analyzer] Fix assertion in simplifySymbolCast

Depends on D128068.
Added a new test code that fails an assertion in the baseline.
That is because `getAPSIntType` works only with integral types.

Differential Revision: https://reviews.llvm.org/D126779

2 years ago[analyzer] Do not emit redundant SymbolCasts
Gabor Marton [Fri, 17 Jun 2022 16:19:55 +0000 (18:19 +0200)]
[analyzer] Do not emit redundant SymbolCasts

In `RegionStore::getBinding` we call `evalCast` unconditionally to align
the stored value's type to the one that is being queried. However, the
stored type might be the same, so we may end up having redundant
`SymbolCasts` emitted.

The solution is to check whether the `to` and `from` type are the same
in `makeNonLoc`.

Note, we can't just do type equivalence check at the beginning of `evalCast`
because when `evalCast` is called from `getBinding` then the original type
(`OriginalTy`) is not set, so one operand is missing for the comparison. In
`evalCastSubKind(nonloc::SymbolVal)` when the original type is not set,
we get the `from` type via `SymbolVal::getType()`.

Differential Revision: https://reviews.llvm.org/D128068