Stephen Boyd [Mon, 21 Dec 2020 01:17:25 +0000 (17:17 -0800)]
Merge branches 'clk-amlogic', 'clk-rockchip', 'clk-of', 'clk-freescale' and 'clk-unused' into clk-next
- Replace clk-provider.h with of_clk.h when possible
* clk-amlogic:
clk: meson: g12a: add MIPI DSI Host Pixel Clock
dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings
clk: meson: enable building as modules
clk: meson: Kconfig: fix dependency for G12A
clk: meson: axg: add MIPI DSI Host clock
clk: meson: axg: add Video Clocks
dt-bindings: clk: axg-clkc: add MIPI DSI Host clock binding
dt-bindings: clk: axg-clkc: add Video Clocks
* clk-rockchip:
clk: rockchip: fix i2s gate bits on rk3066 and rk3188
clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks
clk: rockchip: Remove redundant null check before clk_prepare_enable
clk: rockchip: Add appropriate arch dependencies
* clk-of:
xtensa: Replace <linux/clk-provider.h> by <linux/of_clk.h>
sh: boards: Replace <linux/clk-provider.h> by <linux/of_clk.h>
* clk-freescale:
clk: fsl-flexspi: new driver
dt-bindings: clock: document the fsl-flexspi-clk device
clk: divider: add devm_clk_hw_register_divider_table()
clk: qoriq: provide constants for the type
clk: fsl-sai: use devm_clk_hw_register_composite_pdata()
clk: composite: add devm_clk_hw_register_composite_pdata()
clk: fsl-sai: fix memory leak
clk: qoriq: Add platform dependencies
* clk-unused:
clk: scpi: mark scpi_clk_match as maybe unused
clk: pwm: drop of_match_ptr from of_device_id table
Stephen Boyd [Mon, 21 Dec 2020 01:17:01 +0000 (17:17 -0800)]
Merge branches 'clk-doc', 'clk-qcom', 'clk-simplify', 'clk-hw', 'clk-renesas' and 'clk-samsung' into clk-next
- Camera clks on Qualcomm SC7180 SoCs
- GCC and RPMh clks on Qualcomm SDX55 SoCs
- RPMh clks on Qualcomm SM8350 SoCs
- LPASS clks on Qualcomm SM8250 SoCs
- Add devm variant of clk_notifier_register()
- Add clk_hw_get_clk() to generate a struct clk from a struct clk_hw
* clk-doc:
clk: fix a kernel-doc markup
* clk-qcom: (27 commits)
clk: qcom: rpmh: add support for SM8350 rpmh clocks
dt-bindings: clock: Add RPMHCC bindings for SM8350
clk: qcom: lpasscc: Introduce pm autosuspend for SC7180
clk: qcom: gcc-sc7180: Add 50 MHz clock rate for SDC2
clk: qcom: gcc-sc7180: Use floor ops for sdcc clks
clk: qcom: Add GDSC support for SDX55 GCC
dt-bindings: clock: Add GDSC in SDX55 GCC
clk: qcom: Add support for SDX55 RPMh clocks
dt-bindings: clock: Introduce RPMHCC bindings for SDX55
clk: qcom: Add SDX55 GCC support
dt-bindings: clock: Add SDX55 GCC clock bindings
clk: qcom: Kconfig: Fix spelling mistake "dyanmic" -> "dynamic"
clk: qcom: rpmh: Add CE clock on sdm845.
dt-bindings: clock: Add entry for crypto engine RPMH clock resource
clk: qcom: dispcc-sm8250: handle MMCX power domain
clk: qcom: camcc-sc7180: Use runtime PM ops instead of clk ones
clk: qcom: lpass-sc7180: Clean up on error in lpass_sc7180_init()
clk: qcom: Add support to LPASS AON_CC Glitch Free Mux clocks
clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks
dt-bindings: clock: Add support for LPASS Always ON Controller
...
* clk-simplify:
clk: remove unneeded dead-store initialization
* clk-hw:
clk: meson: g12: use devm variant to register notifiers
clk: add devm variant of clk_notifier_register
clk: meson: g12: drop use of __clk_lookup()
clk: add api to get clk consumer from clk_hw
clk: avoid devm_clk_release name clash
* clk-renesas:
dt-bindings: clock: renesas: rcar-usb2-clock-sel: Convert bindings to json-schema
clk: renesas: sh73a0: Stop using __raw_*() I/O accessors
clk: renesas: r8a774c0: Add RPC clocks
clk: renesas: r8a779a0: Fix R and OSC clocks
clk: renesas: cpg-mssr: fix kerneldoc of cpg_mssr_priv
clk: renesas: rcar-usb2-clock-sel: Replace devm_reset_control_array_get()
clk: renesas: r8a774b1: Add RPC clocks
clk: renesas: r8a774a1: Add RPC clocks
clk: renesas: r8a779a0: Add VIN clocks
clk: renesas: r8a779a0: Add CSI4[0-3] clocks
MAINTAINERS: Update git repo for Renesas clock drivers
clk: renesas: r8a779a0: Make rcar_r8a779a0_cpg_clk_register() static
clk: renesas: rcar-gen3: Remove stp_ck handling for SDHI
* clk-samsung:
clk: samsung: Prevent potential endless loop in the PLL ops
clk: samsung: Allow compile testing of Exynos, S3C64xx and S5Pv210
Stephen Boyd [Thu, 10 Dec 2020 20:59:43 +0000 (12:59 -0800)]
Merge tag 'renesas-clk-for-v5.11-tag3' of git://git./linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Update git repo branch for Renesas clock drivers
- Add camera (CSI) and video-in (VIN) clocks on R-Car V3U
- Add RPC (QSPI/HyperFLASH) clocks on RZ/G2M, RZ/G2N, and RZ/G2E
- Stop using __raw_*() I/O accessors
- One more conversion of DT bindings to json-schema
- Minor fixes and improvements
* tag 'renesas-clk-for-v5.11-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
dt-bindings: clock: renesas: rcar-usb2-clock-sel: Convert bindings to json-schema
clk: renesas: sh73a0: Stop using __raw_*() I/O accessors
clk: renesas: r8a774c0: Add RPC clocks
clk: renesas: r8a779a0: Fix R and OSC clocks
clk: renesas: cpg-mssr: fix kerneldoc of cpg_mssr_priv
clk: renesas: rcar-usb2-clock-sel: Replace devm_reset_control_array_get()
clk: renesas: r8a774b1: Add RPC clocks
clk: renesas: r8a774a1: Add RPC clocks
clk: renesas: r8a779a0: Add VIN clocks
clk: renesas: r8a779a0: Add CSI4[0-3] clocks
MAINTAINERS: Update git repo for Renesas clock drivers
clk: renesas: r8a779a0: Make rcar_r8a779a0_cpg_clk_register() static
clk: renesas: rcar-gen3: Remove stp_ck handling for SDHI
Vinod Koul [Tue, 8 Dec 2020 06:46:59 +0000 (12:16 +0530)]
clk: qcom: rpmh: add support for SM8350 rpmh clocks
This adds the RPMH clocks present in SM8350 SoC
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20201208064702.3654324-3-vkoul@kernel.org
[sboyd@kernel.org: Move sdx55 to the right place]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Vinod Koul [Tue, 8 Dec 2020 06:46:58 +0000 (12:16 +0530)]
dt-bindings: clock: Add RPMHCC bindings for SM8350
Add bindings and update documentation for clock rpmh driver on SM8350.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20201208064702.3654324-2-vkoul@kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Taniya Das [Fri, 20 Nov 2020 16:40:17 +0000 (22:10 +0530)]
clk: qcom: lpasscc: Introduce pm autosuspend for SC7180
The LPASSCC driver's suspend/resume is invoked multiple number of times
and thus allow the device to autosuspend for 500ms.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1605890417-721-1-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Douglas Anderson [Thu, 10 Dec 2020 18:22:39 +0000 (10:22 -0800)]
clk: qcom: gcc-sc7180: Add 50 MHz clock rate for SDC2
50 MHz is an incredibly common clock rate for SD cards to run at.
It's "high speed" mode in SD (not very fast these days, but it used to
be) or:
#define HIGH_SPEED_MAX_DTR
50000000
If we don't support this then older "high speed" cards can only run at
25 MHz or at half their normal speed. There doesn't seem to be any
reason to skip this clock rate, so add it.
Fixes:
17269568f726 ("clk: qcom: Add Global Clock controller (GCC) driver for SC7180")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20201210102234.2.I26dcc0cee374f5571d9929c9985f463773167e68@changeid
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Douglas Anderson [Thu, 10 Dec 2020 18:22:38 +0000 (10:22 -0800)]
clk: qcom: gcc-sc7180: Use floor ops for sdcc clks
I would repeat the same commit message that was in commit
5e4b7e82d497
("clk: qcom: gcc-sdm845: Use floor ops for sdcc clks") but it seems
silly to do so when you could just go read that commit.
NOTE: this is actually extra terrible because we're missing the 50 MHz
rate in the table (see the next patch AKA ("clk: qcom: gcc-sc7180: Add
50 MHz clock rate for SDC2")). That means then when you run an older
SD card it'll try to clock it at 100 MHz when it's only specced to run
at 50 MHz max. As you can probably guess that doesn't work super
well.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Fixes:
17269568f726 ("clk: qcom: Add Global Clock controller (GCC) driver for SC7180")
Link: https://lore.kernel.org/r/20201210102234.1.I096779f219625148900fc984dd0084ed1ba87c7f@changeid
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Krzysztof Kozlowski [Tue, 3 Nov 2020 16:24:35 +0000 (17:24 +0100)]
clk: scpi: mark scpi_clk_match as maybe unused
The scpi_clk_match (struct of_device_id) is referenced only with
CONFIG_OF builds thus mark it as __maybe_unused:
drivers/clk/clk-scpi.c:132:34: warning:
‘scpi_clk_match’ defined but not used [-Wunused-const-variable=]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201103162435.13689-8-krzk@kernel.org
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Krzysztof Kozlowski [Tue, 3 Nov 2020 16:24:28 +0000 (17:24 +0100)]
clk: pwm: drop of_match_ptr from of_device_id table
The driver can match only via the DT table so the table should be always
used and the of_match_ptr does not have any sense (this also allows ACPI
matching via PRP0001, even though it might be not relevant here). This
fixes compile warning (!CONFIG_OF && !CONFIG_MODULES):
drivers/clk/clk-pwm.c:139:34: warning:
‘clk_pwm_dt_ids’ defined but not used [-Wunused-const-variable=]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201103162435.13689-1-krzk@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Yoshihiro Shimoda [Thu, 5 Nov 2020 02:32:04 +0000 (11:32 +0900)]
dt-bindings: clock: renesas: rcar-usb2-clock-sel: Convert bindings to json-schema
Convert Renesas R-Car USB 2.0 clock selector bindings documentation
to json-schema.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1604543524-31482-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Geert Uytterhoeven [Thu, 19 Nov 2020 12:50:53 +0000 (13:50 +0100)]
clk: renesas: sh73a0: Stop using __raw_*() I/O accessors
There is no reason to keep on using the __raw_{read,write}l() I/O
accessors in Renesas ARM driver code. Switch to using the plain
{read,write}l() I/O accessors, to have a chance that this works on
big-endian.
Suggested-by: Arnd Bergmann <arnd@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20201119125053.4065746-1-geert+renesas@glider.be
Lad Prabhakar [Mon, 16 Nov 2020 10:10:02 +0000 (10:10 +0000)]
clk: renesas: r8a774c0: Add RPC clocks
Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
as well as the RPC-IF module clock, in the RZ/G2E (R8A774C0) CPG/MSSR
driver.
Add new clk type CLK_TYPE_GEN3_E3_RPCSRC to register rpcsrc as a fixed
clock on R-Car Gen3 E3 (and also RZ/G2E which is identical to E3 SoC),
parent and the divider is set based on the register value CPG_RPCCKCR[4:3]
which has been set prior to booting the kernel.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20201116101002.5986-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Mon, 9 Nov 2020 15:26:14 +0000 (16:26 +0100)]
clk: renesas: r8a779a0: Fix R and OSC clocks
The R-Car V3U clock driver defines the R and OSC clocks using R-Car Gen3
clock types. However, The R-Car V3U clock driver does not use the R-Car
Gen3 clock driver core, hence registering the R and OSC clocks fails:
renesas-cpg-mssr
e6150000.clock-controller: Failed to register core clock osc: -22
renesas-cpg-mssr
e6150000.clock-controller: Failed to register core clock r: -22
Fix this by introducing clock definition macros specific to R-Car V3U.
Note that rcar_r8a779a0_cpg_clk_register() already handled the related
clock types. Drop the now unneeded include of rcar-gen3-cpg.h.
Fixes:
17bcc8035d2d19fc ("clk: renesas: cpg-mssr: Add support for R-Car V3U")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201109152614.2465483-1-geert+renesas@glider.be
Krzysztof Kozlowski [Tue, 3 Nov 2020 16:24:34 +0000 (17:24 +0100)]
clk: renesas: cpg-mssr: fix kerneldoc of cpg_mssr_priv
The struct cpg_mssr_priv missed proper formatting:
drivers/clk/renesas/renesas-cpg-mssr.c:142: warning:
cannot understand function prototype: 'struct cpg_mssr_priv '
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201103162435.13689-7-krzk@kernel.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yejune Deng [Tue, 3 Nov 2020 03:44:53 +0000 (11:44 +0800)]
clk: renesas: rcar-usb2-clock-sel: Replace devm_reset_control_array_get()
devm_reset_control_array_get_shared() looks more readable
Signed-off-by: Yejune Deng <yejune.deng@gmail.com>
Link: https://lore.kernel.org/r/1604375093-6451-1-git-send-email-yejune.deng@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Biju Das [Fri, 16 Oct 2020 12:17:08 +0000 (13:17 +0100)]
clk: renesas: r8a774b1: Add RPC clocks
Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
as well as the RPC-IF module clock, in the RZ/G2N (R8A774B1) CPG/MSSR
driver.
Inspired by commit
94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20201016121709.8447-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Biju Das [Fri, 16 Oct 2020 12:17:07 +0000 (13:17 +0100)]
clk: renesas: r8a774a1: Add RPC clocks
Describe the RPCSRC internal clock and the RPC[D2] clocks derived from it,
as well as the RPC-IF module clock, in the RZ/G2M (R8A774A1) CPG/MSSR
driver.
Inspired by commit
94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20201016121709.8447-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Jacopo Mondi [Fri, 16 Oct 2020 11:11:56 +0000 (13:11 +0200)]
clk: renesas: r8a779a0: Add VIN clocks
Add definitions of the VIN instance clocks for R-Car V3U.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20201016111158.17521-5-jacopo+renesas@jmondi.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Jacopo Mondi [Fri, 16 Oct 2020 11:11:53 +0000 (13:11 +0200)]
clk: renesas: r8a779a0: Add CSI4[0-3] clocks
Add definitions of the CSI-2 receiver clocks for R-Car V3U.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20201016111158.17521-2-jacopo+renesas@jmondi.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Fri, 25 Sep 2020 11:07:13 +0000 (13:07 +0200)]
MAINTAINERS: Update git repo for Renesas clock drivers
Align the clock branch name with other renesas-* branches pulled by
subsystem maintainers.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200925110713.2652-1-geert+renesas@glider.be
Geert Uytterhoeven [Thu, 24 Sep 2020 11:18:08 +0000 (13:18 +0200)]
clk: renesas: r8a779a0: Make rcar_r8a779a0_cpg_clk_register() static
When compiling with clang:
drivers/clk/renesas/r8a779a0-cpg-mssr.c:156:21: warning: no previous prototype for function 'rcar_r8a779a0_cpg_clk_register' [-Wmissing-prototypes]
struct clk * __init rcar_r8a779a0_cpg_clk_register(struct device *dev,
^
drivers/clk/renesas/r8a779a0-cpg-mssr.c:156:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
struct clk * __init rcar_r8a779a0_cpg_clk_register(struct device *dev,
^
static
Similarly, with sparse:
drivers/clk/renesas/r8a779a0-cpg-mssr.c:156:12: warning: symbol 'rcar_r8a779a0_cpg_clk_register' was not declared. Should it be static?
There are no users of rcar_r8a779a0_cpg_clk_register() outside this
file, so it should be static.
Fixes:
17bcc8035d2d19fc ("clk: renesas: cpg-mssr: Add support for R-Car V3U")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200924111808.15358-1-geert+renesas@glider.be
Manivannan Sadhasivam [Thu, 26 Nov 2020 07:28:44 +0000 (12:58 +0530)]
clk: qcom: Add GDSC support for SDX55 GCC
Add GDSC support to control the power supply of power domains in SDX55
GCC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201126072844.35370-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Manivannan Sadhasivam [Thu, 26 Nov 2020 07:28:43 +0000 (12:58 +0530)]
dt-bindings: clock: Add GDSC in SDX55 GCC
Add GDSC instances in SDX55 GCC block.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201126072844.35370-6-manivannan.sadhasivam@linaro.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Manivannan Sadhasivam [Thu, 26 Nov 2020 07:28:42 +0000 (12:58 +0530)]
clk: qcom: Add support for SDX55 RPMh clocks
Add support for following clocks maintained by RPMh in SDX55 SoCs.
* BI TCXO
* RF_CLK1
* RF_CLK1_AO
* RF_CLK2
* RF_CLK2_AO
* QPIC (Qualcomm Technologies, Inc. Parallel Interface Controller)
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201126072844.35370-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Vinod Koul [Thu, 26 Nov 2020 07:28:41 +0000 (12:58 +0530)]
dt-bindings: clock: Introduce RPMHCC bindings for SDX55
Add compatible for SDX55 RPMHCC and DT include.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201126072844.35370-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Naveen Yadav [Thu, 26 Nov 2020 07:28:40 +0000 (12:58 +0530)]
clk: qcom: Add SDX55 GCC support
Add Global Clock Controller (GCC) support for SDX55 SoCs from Qualcomm.
Signed-off-by: Naveen Yadav <naveenky@codeaurora.org>
[mani: converted to parent_data, commented critical clocks, cleanups]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20201126072844.35370-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Vinod Koul [Thu, 26 Nov 2020 07:28:39 +0000 (12:58 +0530)]
dt-bindings: clock: Add SDX55 GCC clock bindings
Add device tree bindings for global clock controller on SDX55 SoCs.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201126072844.35370-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Michael Walle [Sun, 8 Nov 2020 18:51:11 +0000 (19:51 +0100)]
clk: fsl-flexspi: new driver
Add support for the FlexSPI clock on Freescale Layerscape SoCs. The
clock is a simple divider based one and is located inside the device
configuration space (DCFG).
This will allow switching the SCK frequencies for the FlexSPI interface
on the LS1028A and the LX2160A.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20201108185113.31377-8-michael@walle.cc
[sboyd@kernel.org: Drop modalias, add module table]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Michael Walle [Sun, 8 Nov 2020 18:51:10 +0000 (19:51 +0100)]
dt-bindings: clock: document the fsl-flexspi-clk device
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201108185113.31377-7-michael@walle.cc
[sboyd@kernel.org: DT bindings aren't drivers]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Michael Walle [Sun, 8 Nov 2020 18:51:09 +0000 (19:51 +0100)]
clk: divider: add devm_clk_hw_register_divider_table()
This will simplify drivers which would only unregister the clk in their
remove() op.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20201108185113.31377-6-michael@walle.cc
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Michael Walle [Sun, 8 Nov 2020 18:51:07 +0000 (19:51 +0100)]
clk: qoriq: provide constants for the type
To avoid future mistakes in the device tree for the clockgen module, add
constants for the clockgen subtype as well as a macro for the PLL
divider.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201108185113.31377-4-michael@walle.cc
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Michael Walle [Thu, 5 Nov 2020 19:27:46 +0000 (20:27 +0100)]
clk: fsl-sai: use devm_clk_hw_register_composite_pdata()
Simplify the driver by using that helper and drop the remove() function.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20201105192746.19564-4-michael@walle.cc
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Michael Walle [Thu, 5 Nov 2020 19:27:45 +0000 (20:27 +0100)]
clk: composite: add devm_clk_hw_register_composite_pdata()
This will simplify drivers which would only unregister the clk in their
remove() op.
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20201105192746.19564-3-michael@walle.cc
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Michael Walle [Thu, 5 Nov 2020 19:27:44 +0000 (20:27 +0100)]
clk: fsl-sai: fix memory leak
If the device is removed we don't unregister the composite clock. Fix
that.
Fixes:
9cd10205227c ("clk: fsl-sai: new driver")
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20201105192746.19564-2-michael@walle.cc
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Geert Uytterhoeven [Tue, 10 Nov 2020 15:47:50 +0000 (16:47 +0100)]
clk: qoriq: Add platform dependencies
The Freescale QorIQ clock controller is only present on Freescale E500MC
and Layerscape SoCs. Add platform dependencies to the CLK_QORIQ config
symbol, to avoid asking the user about it when configuring a kernel
without E500MC or Layerscape support.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Li Yang <leoyang.li@nxp.com>
Link: https://lore.kernel.org/r/20201110154750.3285411-1-geert+renesas@glider.be
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Geert Uytterhoeven [Tue, 10 Nov 2020 15:51:17 +0000 (16:51 +0100)]
xtensa: Replace <linux/clk-provider.h> by <linux/of_clk.h>
The Xtensa time code is not a clock provider, and just needs to call
of_clk_init().
Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Link: https://lore.kernel.org/r/20201110155117.3286247-1-geert+renesas@glider.be
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Geert Uytterhoeven [Tue, 10 Nov 2020 15:50:29 +0000 (16:50 +0100)]
sh: boards: Replace <linux/clk-provider.h> by <linux/of_clk.h>
The SuperH/J2 DT platform code is not a clock provider, and just needs
to call of_clk_init().
Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20201110155029.3286090-1-geert+renesas@glider.be
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Mon, 7 Dec 2020 21:26:51 +0000 (13:26 -0800)]
Merge tag 'v5.11-rockchip-clk-1' of git://git./linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull Rockchip clk driver updates from Heiko Stuebner:
Added arch-dependencies for the newly added per-soc config symbols,
an unneeded redundancy removed and making i2s actually work on the
rk3066.
* tag 'v5.11-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: fix i2s gate bits on rk3066 and rk3188
clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks
clk: rockchip: Remove redundant null check before clk_prepare_enable
clk: rockchip: Add appropriate arch dependencies
Stephen Boyd [Mon, 7 Dec 2020 21:24:15 +0000 (13:24 -0800)]
Merge tag 'clk-meson-v5.11-1' of https://github.com/BayLibre/clk-meson into clk-amlogic
Pull Amlogic clk driver updates from Jerome Brunet:
- Add MIPI DSI clocks for axg and g12
- Make it possible to build controllers as modules
- Fix Video PLL clock dependency
* tag 'clk-meson-v5.11-1' of https://github.com/BayLibre/clk-meson:
clk: meson: g12a: add MIPI DSI Host Pixel Clock
dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings
clk: meson: enable building as modules
clk: meson: Kconfig: fix dependency for G12A
clk: meson: axg: add MIPI DSI Host clock
clk: meson: axg: add Video Clocks
dt-bindings: clk: axg-clkc: add MIPI DSI Host clock binding
dt-bindings: clk: axg-clkc: add Video Clocks
clk: meson: g12: use devm variant to register notifiers
clk: add devm variant of clk_notifier_register
clk: meson: g12: drop use of __clk_lookup()
clk: add api to get clk consumer from clk_hw
clk: avoid devm_clk_release name clash
Stephen Boyd [Sat, 5 Dec 2020 06:27:22 +0000 (22:27 -0800)]
Merge tag 'clk-v5.11-samsung' of https://git./linux/kernel/git/snawrocki/clk into clk-samsung
Pull Samsung clk driver updates from Sylwester Nawrocki:
- Correction of Kconfig dependencies for better compile test coverage
- Refactoring of the PLL clocks driver
* tag 'clk-v5.11-samsung' of https://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
clk: samsung: Prevent potential endless loop in the PLL ops
clk: samsung: Allow compile testing of Exynos, S3C64xx and S5Pv210
Johan Jonker [Wed, 18 Nov 2020 13:58:17 +0000 (14:58 +0100)]
clk: rockchip: fix i2s gate bits on rk3066 and rk3188
The Rockchip PX2/RK3066 uses these bits in CRU_CLKGATE7_CON:
hclk_i2s_8ch_gate_en bit 4 (dtsi: i2s0)
hclk_i2s0_2ch_gate_en bit 2 (dtsi: i2s1)
hclk_i2s1_2ch_gate_en bit 3 (dtsi: i2s2)
The Rockchip PX3/RK3188 uses this bit in CRU_CLKGATE7_CON:
hclk_i2s_2ch_gate_en bit 2 (dtsi: i2s0)
The bits got somehow mixed up in the clk-rk3188.c file.
The labels in the dtsi files are not suppose to change.
The sclk and hclk names should match for
"trace_event=clk_disable,clk_enable",
so remove GATE HCLK_I2S0 from the common clock tree and
fix the bits in the rk3066 and rk3188 clock tree.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201118135822.9582-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Johan Jonker [Wed, 18 Nov 2020 13:58:16 +0000 (14:58 +0100)]
clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks
Add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks,
so that the parent COMPOSITE_FRACMUX and COMPOSITE_NOMUX
also update.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201118135822.9582-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Xu Wang [Fri, 27 Nov 2020 09:05:51 +0000 (09:05 +0000)]
clk: rockchip: Remove redundant null check before clk_prepare_enable
Because clk_prepare_enable() already checked NULL clock parameter,
so the additional check is unnecessary, just remove it.
Signed-off-by: Xu Wang <vulab@iscas.ac.cn>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20201127090551.50254-1-vulab@iscas.ac.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Colin Ian King [Thu, 26 Nov 2020 23:24:00 +0000 (23:24 +0000)]
clk: qcom: Kconfig: Fix spelling mistake "dyanmic" -> "dynamic"
There is a spelling mistake in the Kconfig help text. Fix it.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20201126232400.15011-1-colin.king@canonical.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Neil Armstrong [Thu, 26 Nov 2020 14:16:00 +0000 (15:16 +0100)]
clk: meson: g12a: add MIPI DSI Host Pixel Clock
This adds the MIPI DSI Host Pixel Clock, unlike AXG, the pixel clock can be different
from the VPU ENCL output clock to feed the DSI Host controller with a different clock rate.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201126141600.2084586-3-narmstrong@baylibre.com
Jerome Brunet [Thu, 26 Nov 2020 14:25:12 +0000 (15:25 +0100)]
Merge branch 'v5.11/headers' into v5.11/drivers
Neil Armstrong [Thu, 26 Nov 2020 14:15:59 +0000 (15:15 +0100)]
dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings
This adds the MIPI DSI Host Pixel Clock bindings.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201126141600.2084586-2-narmstrong@baylibre.com
Thara Gopinath [Thu, 19 Nov 2020 15:52:29 +0000 (10:52 -0500)]
clk: qcom: rpmh: Add CE clock on sdm845.
Qualcomm CE clock resource that is managed by BCM is required
by crypto driver to access the core clock.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
Link: https://lore.kernel.org/r/20201119155233.3974286-3-thara.gopinath@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Thara Gopinath [Thu, 19 Nov 2020 15:52:28 +0000 (10:52 -0500)]
dt-bindings: clock: Add entry for crypto engine RPMH clock resource
Add clock id forc CE clock resource which is required to bring up the
crypto engine on sdm845.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
Link: https://lore.kernel.org/r/20201119155233.3974286-2-thara.gopinath@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Sylwester Nawrocki [Fri, 20 Nov 2020 15:57:31 +0000 (16:57 +0100)]
clk: samsung: Prevent potential endless loop in the PLL ops
The PLL status polling loops in the set_rate callbacks of some PLLs
have no timeout detection and may become endless loops when something
goes wrong with the PLL.
For some PLLs there is already the ktime API based timeout detection,
but it will not work in all conditions when .set_rate gets called.
In particular, before the clocksource is initialized or when the
timekeeping is suspended.
This patch adds a common helper with the PLL status bit polling and
timeout detection. For conditions where the timekeeping API should not
be used a simple readl_relaxed/cpu_relax() busy loop is added with the
iterations limit derived from measurements of readl_relaxed() execution
time for various PLL types and Exynos SoCs variants.
Actual PLL lock time depends on the P divider value, the VCO frequency
and a constant PLL type specific LOCK_FACTOR and can be calculated as
lock_time = Pdiv * LOCK_FACTOR / VCO_freq
For the ktime API use cases a common timeout value of 20 ms is applied
for all the PLLs with an assumption that maximum possible value of Pdiv
is 64, maximum possible LOCK_FACTOR value is 3000 and minimum VCO
frequency is 24 MHz.
Link: https://lore.kernel.org/r/20201120155731.26898-1-s.nawrocki@samsung.com
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Krzysztof Kozlowski [Thu, 19 Nov 2020 16:45:09 +0000 (17:45 +0100)]
clk: samsung: Allow compile testing of Exynos, S3C64xx and S5Pv210
So far all Exynos, S3C64xx and S5Pv210 clock units were selected by
respective SOC/ARCH Kconfig option. On a kernel built for selected
SoCs, this allowed to build only limited set of matching clock drivers.
However compile testing was not possible in such case as Makefile object
depends on SOC/ARCH option.
Add separate Kconfig options for each of them to be able to compile
test.
Link: https://lore.kernel.org/r/20201119164509.754851-1-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Kevin Hilman [Wed, 18 Nov 2020 19:14:05 +0000 (11:14 -0800)]
clk: meson: enable building as modules
Make it possible to build all clk drivers as modules, but default
remains built-in.
No functional changes.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20201118191405.36798-1-khilman@baylibre.com
Kevin Hilman [Wed, 18 Nov 2020 19:09:30 +0000 (11:09 -0800)]
clk: meson: Kconfig: fix dependency for G12A
When building only G12A, ensure that VID_PLL_DIV clock driver is
selected, otherwise results in this build error:
ERROR: modpost: "meson_vid_pll_div_ro_ops" [drivers/clk/meson/g12a.ko] undefined!
Fixes:
085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller")
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201118190930.34352-1-khilman@baylibre.com
Neil Armstrong [Tue, 15 Sep 2020 12:45:53 +0000 (14:45 +0200)]
clk: meson: axg: add MIPI DSI Host clock
This adds the MIPI DSI Host clock, used to measure the signal timings
(ENC VSYNC or DW-MIPI-DSI eDPI timings).
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20200915124553.8056-5-narmstrong@baylibre.com
Neil Armstrong [Tue, 15 Sep 2020 12:45:52 +0000 (14:45 +0200)]
clk: meson: axg: add Video Clocks
Add the clocks entries used in the video clock path, the clock path is
doubled to permit having different synchronized clocks for different parts
of the video pipeline.
The AXG only has a single ENCL CTS clock and even if VCLK exist along
VCLK2, only VCLK2 is used since it clocks the MIPI DSI IP directly.
All dividers are flagged with CLK_GET_RATE_NOCACHE, and all gates are
flagged with CLK_IGNORE_UNUSED since they are currently directly handled by
the Meson DRM Driver. Once the DRM Driver is fully migrated to using the
Common Clock Framework to handle the video clock tree, the
CLK_GET_RATE_NOCACHE and CLK_IGNORE_UNUSED will be dropped.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20200915124553.8056-4-narmstrong@baylibre.com
Jerome Brunet [Mon, 23 Nov 2020 08:07:51 +0000 (09:07 +0100)]
Merge branch 'v5.11/headers' into integ
Neil Armstrong [Tue, 15 Sep 2020 12:45:51 +0000 (14:45 +0200)]
dt-bindings: clk: axg-clkc: add MIPI DSI Host clock binding
Add the clock ID for the MIPI DSI Host clock.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200915124553.8056-3-narmstrong@baylibre.com
Neil Armstrong [Tue, 15 Sep 2020 12:45:50 +0000 (14:45 +0200)]
dt-bindings: clk: axg-clkc: add Video Clocks
Add clock IDs for the video clocks.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200915124553.8056-2-narmstrong@baylibre.com
Dmitry Baryshkov [Fri, 23 Oct 2020 13:19:25 +0000 (16:19 +0300)]
clk: qcom: dispcc-sm8250: handle MMCX power domain
On SM8250 MMCX power domain is required to access MMDS_GDSC registers.
This power domain is expressed as mmcx-supply regulator property. Use
this regulator as MDSS_GDSC supply.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201023131925.334864-6-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Jerome Brunet [Wed, 21 Oct 2020 16:38:47 +0000 (18:38 +0200)]
clk: meson: g12: use devm variant to register notifiers
Until now, nothing was done to unregister the dvfs clock notifiers of the
Amlogic g12 SoC family. This is not great but this driver was not really
expected to be unloaded. With the ongoing effort to build everything as
module for this platform, this needs to be cleanly handled.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201021163847.595189-3-jbrunet@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Jerome Brunet [Wed, 21 Oct 2020 16:38:46 +0000 (18:38 +0200)]
clk: add devm variant of clk_notifier_register
Add a memory managed variant of clk_notifier_register() to make life easier
on clock consumers using notifiers
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201021163847.595189-2-jbrunet@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Jerome Brunet [Wed, 21 Oct 2020 16:21:47 +0000 (18:21 +0200)]
clk: meson: g12: drop use of __clk_lookup()
g12 clock controller used __clk_lookup() to get struct clk from a
struct clk_hw. This type of hack is no longer required as CCF now provides
the necessary functions to get this.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201021162147.563655-4-jbrunet@baylibre.com
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Jerome Brunet [Wed, 21 Oct 2020 16:21:46 +0000 (18:21 +0200)]
clk: add api to get clk consumer from clk_hw
clk_register() is deprecated. Using 'clk' member of struct clk_hw is
discouraged. With this constraint, it is difficult for driver to
register clocks using the clk_hw API and then use the clock with
the consumer API
This adds a simple helper, clk_hw_get_clk(), to get a struct clk from
a struct clk_hw. Like other clk_get() variant, each call to this helper
must be balanced with a call to clk_put(). To make life easier on the
consumers, a memory managed version is provided as well.
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201021162147.563655-3-jbrunet@baylibre.com
Tested-by: Kevin Hilman <khilman@baylibre.com>
[sboyd@kernel.org: Fix kernel-doc]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Jerome Brunet [Wed, 21 Oct 2020 16:21:45 +0000 (18:21 +0200)]
clk: avoid devm_clk_release name clash
In clk-devres.c, devm_clk_release() is used to call clk_put() memory
managed clock. In clk.c the same name, in a different scope is used to call
clk_unregister().
As it stands, it is not really a problem but it does not readability,
especially if we need to call clk_put() on managed clock in clk.c
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201021162147.563655-2-jbrunet@baylibre.com
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Lukas Bulwahn [Fri, 6 Nov 2020 09:48:20 +0000 (10:48 +0100)]
clk: remove unneeded dead-store initialization
make clang-analyzer on x86_64 defconfig caught my attention with:
drivers/clk/clk.c:423:19:
warning: Value stored to 'parent' during its initialization is never read
[clang-analyzer-deadcode.DeadStores]
struct clk_core *parent = ERR_PTR(-ENOENT);
^
Commit
fc0c209c147f ("clk: Allow parents to be specified without string
names") introduced clk_core_fill_parent_index() with this unneeded
dead-store initialization.
So, simply remove this unneeded dead-store initialization to make
clang-analyzer happy.
As compilers will detect this unneeded assignment and optimize this anyway,
the resulting object code is identical before and after this change.
No functional change. No change to object code.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Link: https://lore.kernel.org/r/20201106094820.30167-1-lukas.bulwahn@gmail.com
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Sat, 14 Nov 2020 17:44:08 +0000 (09:44 -0800)]
clk: qcom: camcc-sc7180: Use runtime PM ops instead of clk ones
Let's call pm_runtime_get() here instead of calling the PM clk APIs
directly. This avoids a compilation problem on CONFIG_PM=n where the
pm_clk_runtime_{resume,suspend}() functions don't exist and covers the
intent, i.e. enable the clks for this device so we can program PLL
settings.
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Nathan Chancellor <natechancellor@gmail.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Taniya Das <tdas@codeaurora.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Fixes:
15d09e830bbc ("clk: qcom: camcc: Add camera clock controller driver for SC7180")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20201114174408.579047-1-sboyd@kernel.org
Dan Carpenter [Fri, 13 Nov 2020 10:14:19 +0000 (13:14 +0300)]
clk: qcom: lpass-sc7180: Clean up on error in lpass_sc7180_init()
Clean up the first driver if the second driver can't be registered.
Fixes:
4ee9fe3e292b ("clk: qcom: lpass-sc7180: Disentangle the two clock devices")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20201113101419.GC168908@mwanda
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Srinivas Kandagatla [Mon, 26 Oct 2020 12:02:21 +0000 (12:02 +0000)]
clk: qcom: Add support to LPASS AON_CC Glitch Free Mux clocks
LPASS Always ON Clock controller has one GFM mux to control VA
and TX clocks to codec macro on LPASS.
This patch adds support to this mux.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20201026120221.18984-5-srinivas.kandagatla@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Srinivas Kandagatla [Mon, 26 Oct 2020 12:02:20 +0000 (12:02 +0000)]
clk: qcom: Add support to LPASS AUDIO_CC Glitch Free Mux clocks
GFM Muxes in AUDIO_CC control clocks to LPASS WSA and RX Codec Macros.
This patch adds support to these muxes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20201026120221.18984-4-srinivas.kandagatla@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Srinivas Kandagatla [Mon, 26 Oct 2020 12:02:19 +0000 (12:02 +0000)]
dt-bindings: clock: Add support for LPASS Always ON Controller
Always ON Clock controller is a block inside LPASS which controls
1 Glitch free muxes to LPASS codec Macros.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20201026120221.18984-3-srinivas.kandagatla@linaro.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Srinivas Kandagatla [Mon, 26 Oct 2020 12:02:18 +0000 (12:02 +0000)]
dt-bindings: clock: Add support for LPASS Audio Clock Controller
Audio Clock controller is a block inside LPASS which controls
2 Glitch free muxes to LPASS codec Macros.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20201026120221.18984-2-srinivas.kandagatla@linaro.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Douglas Anderson [Mon, 19 Oct 2020 22:49:35 +0000 (15:49 -0700)]
clk: qcom: lpass-sc7180: Disentangle the two clock devices
The sc7180 lpass clock driver manages two different devices. These
two devices were tangled together, using one probe and a lookup to
figure out the real probe. I think it's cleaner to really separate
the probe for these two devices since they're really different things,
just both managed by the same driver.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20201019154857.v5.2.I75c409497d4dea9daefa53ec5f93824081c4ecbe@changeid
Reviewed-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Douglas Anderson [Mon, 19 Oct 2020 22:49:34 +0000 (15:49 -0700)]
clk: qcom: lpasscc-sc7810: Use devm in probe
Let's convert the lpass clock control driver to use devm. This is a
few more lines of code, but it will be useful in a later patch which
disentangles the two devices handled by this driver.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20201019154857.v5.1.I4567b5e7e17bbb15ef063d447cb83fd43746cb18@changeid
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Taniya Das [Fri, 16 Oct 2020 18:43:35 +0000 (00:13 +0530)]
clk: qcom: camcc: Add camera clock controller driver for SC7180
Add support for the camera clock controller found on SC7180 based devices.
This would allow camera drivers to probe and control their clocks.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1602873815-1677-5-git-send-email-tdas@codeaurora.org
[sboyd@kernel.org: Mark hw array static, add UL to big vco numbers]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Taniya Das [Fri, 16 Oct 2020 18:43:34 +0000 (00:13 +0530)]
dt-bindings: clock: Add YAML schemas for the QCOM Camera clock bindings.
The Camera Subsystem clock provider have a bunch of generic properties
that are needed in a device tree. Add a YAML schemas for those.
Add clock ids for camera clocks which are required to bring the camera
subsystem out of reset.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1602873815-1677-4-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Taniya Das [Fri, 16 Oct 2020 18:43:33 +0000 (00:13 +0530)]
clk: qcom: clk-alpha-pll: Add support for controlling Agera PLLs
Add programming sequence support for managing the Agera PLLs.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1602873815-1677-3-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Taniya Das [Fri, 16 Oct 2020 18:43:32 +0000 (00:13 +0530)]
clk: qcom: clk-alpha-pll: Add support for helper functions
Introduce clk_alpha_pll_write_config and alpha_pll_check_rate_margin
helper functions to be across PLL configure functions and PLL set rate
functions.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1602873815-1677-2-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Mauro Carvalho Chehab [Fri, 23 Oct 2020 16:33:25 +0000 (18:33 +0200)]
clk: fix a kernel-doc markup
clk_get_duty_cycle -> clk_get_scaled_duty_cycle
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/b2336f3f3cdfe6e1a2d3a7a056ab7ccc7a81b945.1603469755.git.mchehab+huawei@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Robin Murphy [Mon, 26 Oct 2020 11:17:20 +0000 (11:17 +0000)]
clk: rockchip: Add appropriate arch dependencies
There's no point offering support for 32-bit platforms to users
configuring a 64-bit kernel - and vice-versa - unless they are
explicitly interested in compile-testing.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/72abb0f794b8ed77e274e8ee21c22e0bd3223dfd.1603710913.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Wolfram Sang [Tue, 22 Sep 2020 12:00:36 +0000 (14:00 +0200)]
clk: renesas: rcar-gen3: Remove stp_ck handling for SDHI
There is no case (and none foreseen) where we would need to disable the
SDn clock. So, for simplicity, remove its handling.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20200922120036.10298-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Linus Torvalds [Sun, 25 Oct 2020 22:14:11 +0000 (15:14 -0700)]
Linux 5.10-rc1
Joe Perches [Thu, 22 Oct 2020 02:36:07 +0000 (19:36 -0700)]
treewide: Convert macro and uses of __section(foo) to __section("foo")
Use a more generic form for __section that requires quotes to avoid
complications with clang and gcc differences.
Remove the quote operator # from compiler_attributes.h __section macro.
Convert all unquoted __section(foo) uses to quoted __section("foo").
Also convert __attribute__((section("foo"))) uses to __section("foo")
even if the __attribute__ has multiple list entry forms.
Conversion done using the script at:
https://lore.kernel.org/lkml/
75393e5ddc272dc7403de74d645e6c6e0f4e70eb.camel@perches.com/2-convert_section.pl
Signed-off-by: Joe Perches <joe@perches.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@gooogle.com>
Reviewed-by: Miguel Ojeda <ojeda@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Rasmus Villemoes [Sat, 24 Oct 2020 01:04:26 +0000 (03:04 +0200)]
kernel/sys.c: fix prototype of prctl_get_tid_address()
tid_addr is not a "pointer to (pointer to int in userspace)"; it is in
fact a "pointer to (pointer to int in userspace) in userspace". So
sparse rightfully complains about passing a kernel pointer to
put_user().
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Eric Biggers [Fri, 23 Oct 2020 23:27:16 +0000 (16:27 -0700)]
mm: remove kzfree() compatibility definition
Commit
453431a54934 ("mm, treewide: rename kzfree() to
kfree_sensitive()") renamed kzfree() to kfree_sensitive(),
but it left a compatibility definition of kzfree() to avoid
being too disruptive.
Since then a few more instances of kzfree() have slipped in.
Just get rid of them and remove the compatibility definition
once and for all.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Joe Perches [Sat, 24 Oct 2020 23:59:04 +0000 (16:59 -0700)]
checkpatch: enable GIT_DIR environment use to set git repository location
If set, use the environment variable GIT_DIR to change the default .git
location of the kernel git tree.
If GIT_DIR is unset, keep using the current ".git" default.
Link: https://lkml.kernel.org/r/c5e23b45562373d632fccb8bc04e563abba4dd1d.camel@perches.com
Signed-off-by: Joe Perches <joe@perches.com>
Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sun, 25 Oct 2020 18:28:49 +0000 (11:28 -0700)]
Merge tag 'timers-urgent-2020-10-25' of git://git./linux/kernel/git/tip/tip
Pull timer fixes from Thomas Gleixner:
"A time namespace fix and a matching selftest. The futex absolute
timeouts which are based on CLOCK_MONOTONIC require time namespace
corrected. This was missed in the original time namesapce support"
* tag 'timers-urgent-2020-10-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
selftests/timens: Add a test for futex()
futex: Adjust absolute futex timeouts with per time namespace offset
Linus Torvalds [Sun, 25 Oct 2020 18:25:16 +0000 (11:25 -0700)]
Merge tag 'sched-urgent-2020-10-25' of git://git./linux/kernel/git/tip/tip
Pull scheduler fixes from Thomas Gleixner:
"Two scheduler fixes:
- A trivial build fix for sched_feat() to compile correctly with
CONFIG_JUMP_LABEL=n
- Replace a zero lenght array with a flexible array"
* tag 'sched-urgent-2020-10-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
sched/features: Fix !CONFIG_JUMP_LABEL case
sched: Replace zero-length array with flexible-array
Linus Torvalds [Sun, 25 Oct 2020 18:22:59 +0000 (11:22 -0700)]
Merge tag 'perf-urgent-2020-10-25' of git://git./linux/kernel/git/tip/tip
Pull perf fix from Thomas Gleixner:
"A single fix to compute the field offset of the SNOOPX bit in the data
source bitmask of perf events correctly"
* tag 'perf-urgent-2020-10-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf: correct SNOOPX field offset
Linus Torvalds [Sun, 25 Oct 2020 18:14:54 +0000 (11:14 -0700)]
Merge tag 'locking-urgent-2020-10-25' of git://git./linux/kernel/git/tip/tip
Pull locking fix from Thomas Gleixner:
"Just a trivial fix for kernel-doc warnings"
* tag 'locking-urgent-2020-10-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
locking/seqlocks: Fix kernel-doc warnings
Linus Torvalds [Sun, 25 Oct 2020 18:12:31 +0000 (11:12 -0700)]
Merge tag 'ntb-5.10' of git://github.com/jonmason/ntb
Pull NTB fixes from Jon Mason.
* tag 'ntb-5.10' of git://github.com/jonmason/ntb:
NTB: Use struct_size() helper in devm_kzalloc()
ntb: intel: Fix memleak in intel_ntb_pci_probe
NTB: hw: amd: fix an issue about leak system resources
Linus Torvalds [Sun, 25 Oct 2020 18:10:23 +0000 (11:10 -0700)]
Merge branch 'i2c/for-5.10' of git://git./linux/kernel/git/wsa/linux
Pull i2c fix from Wolfram Sang:
"Regression fix for rc1 and stable kernels as well"
* 'i2c/for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: core: Restore acpi_walk_dep_device_list() getting called after registering the ACPI i2c devs
Linus Torvalds [Sun, 25 Oct 2020 18:05:04 +0000 (11:05 -0700)]
Merge tag '5.10-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6
Pull more cifs updates from Steve French:
"Add support for stat of various special file types (WSL reparse points
for char, block, fifo)"
* tag '5.10-rc-smb3-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6:
cifs: update internal module version number
smb3: add some missing definitions from MS-FSCC
smb3: remove two unused variables
smb3: add support for stat of WSL reparse points for special file types
Linus Torvalds [Sun, 25 Oct 2020 17:59:34 +0000 (10:59 -0700)]
Merge branch 'parisc-5.10-2' of git://git./linux/kernel/git/deller/parisc-linux
Pull more parisc updates from Helge Deller:
- During this merge window O_NONBLOCK was changed to become
000200000,
but we missed that the syscalls timerfd_create(), signalfd4(),
eventfd2(), pipe2(), inotify_init1() and userfaultfd() do a strict
bit-wise check of the flags parameter.
To provide backward compatibility with existing userspace we
introduce parisc specific wrappers for those syscalls which filter
out the old O_NONBLOCK value and replaces it with the new one.
- Prevent HIL bus driver to get stuck when keyboard or mouse isn't
attached
- Improve error return codes when setting rtc time
- Minor documentation fix in pata_ns87415.c
* 'parisc-5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
ata: pata_ns87415.c: Document support on parisc with superio chip
parisc: Add wrapper syscalls to fix O_NONBLOCK flag usage
hil/parisc: Disable HIL driver when it gets stuck
parisc: Improve error return codes when setting rtc time
Linus Torvalds [Sun, 25 Oct 2020 17:55:35 +0000 (10:55 -0700)]
Merge tag 'for-linus-5.10b-rc1c-tag' of git://git./linux/kernel/git/xen/tip
Pull more xen updates from Juergen Gross:
- a series for the Xen pv block drivers adding module parameters for
better control of resource usge
- a cleanup series for the Xen event driver
* tag 'for-linus-5.10b-rc1c-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
Documentation: add xen.fifo_events kernel parameter description
xen/events: unmask a fifo event channel only if it was masked
xen/events: only register debug interrupt for 2-level events
xen/events: make struct irq_info private to events_base.c
xen: remove no longer used functions
xen-blkfront: Apply changed parameter name to the document
xen-blkfront: add a parameter for disabling of persistent grants
xen-blkback: add a parameter for disabling of persistent grants
Linus Torvalds [Sun, 25 Oct 2020 17:45:26 +0000 (10:45 -0700)]
Merge tag 'safesetid-5.10' of git://github.com/micah-morton/linux
Pull SafeSetID updates from Micah Morton:
"The changes are mostly contained to within the SafeSetID LSM, with the
exception of a few 1-line changes to change some ns_capable() calls to
ns_capable_setid() -- causing a flag (CAP_OPT_INSETID) to be set that
is examined by SafeSetID code and nothing else in the kernel.
The changes to SafeSetID internally allow for setting up GID
transition security policies, as already existed for UIDs"
* tag 'safesetid-5.10' of git://github.com/micah-morton/linux:
LSM: SafeSetID: Fix warnings reported by test bot
LSM: SafeSetID: Add GID security policy handling
LSM: Signal to SafeSetID when setting group IDs
Linus Torvalds [Sun, 25 Oct 2020 17:40:08 +0000 (10:40 -0700)]
Merge tag '
20201024-v4-5.10' of git://git./linux/kernel/git/wtarreau/prandom
Pull random32 updates from Willy Tarreau:
"Make prandom_u32() less predictable.
This is the cleanup of the latest series of prandom_u32
experimentations consisting in using SipHash instead of Tausworthe to
produce the randoms used by the network stack.
The changes to the files were kept minimal, and the controversial
commit that used to take noise from the fast_pool (
f227e3ec3b5c) was
reverted. Instead, a dedicated "net_rand_noise" per_cpu variable is
fed from various sources of activities (networking, scheduling) to
perturb the SipHash state using fast, non-trivially predictable data,
instead of keeping it fully deterministic. The goal is essentially to
make any occasional memory leakage or brute-force attempt useless.
The resulting code was verified to be very slightly faster on x86_64
than what is was with the controversial commit above, though this
remains barely above measurement noise. It was also tested on i386 and
arm, and build- tested only on arm64"
Link: https://lore.kernel.org/netdev/20200808152628.GA27941@SDF.ORG/
* tag '
20201024-v4-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/wtarreau/prandom:
random32: add a selftest for the prandom32 code
random32: add noise from network and scheduling activity
random32: make prandom_u32() output unpredictable
Hans de Goede [Wed, 14 Oct 2020 14:41:58 +0000 (16:41 +0200)]
i2c: core: Restore acpi_walk_dep_device_list() getting called after registering the ACPI i2c devs
Commit
21653a4181ff ("i2c: core: Call i2c_acpi_install_space_handler()
before i2c_acpi_register_devices()")'s intention was to only move the
acpi_install_address_space_handler() call to the point before where
the ACPI declared i2c-children of the adapter where instantiated by
i2c_acpi_register_devices().
But i2c_acpi_install_space_handler() had a call to
acpi_walk_dep_device_list() hidden (that is I missed it) at the end
of it, so as an unwanted side-effect now acpi_walk_dep_device_list()
was also being called before i2c_acpi_register_devices().
Move the acpi_walk_dep_device_list() call to the end of
i2c_acpi_register_devices(), so that it is once again called *after*
the i2c_client-s hanging of the adapter have been created.
This fixes the Microsoft Surface Go 2 hanging at boot.
Fixes:
21653a4181ff ("i2c: core: Call i2c_acpi_install_space_handler() before i2c_acpi_register_devices()")
Link: https://bugzilla.kernel.org/show_bug.cgi?id=209627
Reported-by: Rainer Finke <rainer@finke.cc>
Reported-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Suggested-by: Maximilian Luz <luzmaximilian@gmail.com>
Tested-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Linus Torvalds [Sat, 24 Oct 2020 19:46:42 +0000 (12:46 -0700)]
Merge tag 'block-5.10-2020-10-24' of git://git.kernel.dk/linux-block
Pull block fixes from Jens Axboe:
- NVMe pull request from Christoph
- rdma error handling fixes (Chao Leng)
- fc error handling and reconnect fixes (James Smart)
- fix the qid displace when tracing ioctl command (Keith Busch)
- don't use BLK_MQ_REQ_NOWAIT for passthru (Chaitanya Kulkarni)
- fix MTDT for passthru (Logan Gunthorpe)
- blacklist Write Same on more devices (Kai-Heng Feng)
- fix an uninitialized work struct (zhenwei pi)"
- lightnvm out-of-bounds fix (Colin)
- SG allocation leak fix (Doug)
- rnbd fixes (Gioh, Guoqing, Jack)
- zone error translation fixes (Keith)
- kerneldoc markup fix (Mauro)
- zram lockdep fix (Peter)
- Kill unused io_context members (Yufen)
- NUMA memory allocation cleanup (Xianting)
- NBD config wakeup fix (Xiubo)
* tag 'block-5.10-2020-10-24' of git://git.kernel.dk/linux-block: (27 commits)
block: blk-mq: fix a kernel-doc markup
nvme-fc: shorten reconnect delay if possible for FC
nvme-fc: wait for queues to freeze before calling update_hr_hw_queues
nvme-fc: fix error loop in create_hw_io_queues
nvme-fc: fix io timeout to abort I/O
null_blk: use zone status for max active/open
nvmet: don't use BLK_MQ_REQ_NOWAIT for passthru
nvmet: cleanup nvmet_passthru_map_sg()
nvmet: limit passthru MTDS by BIO_MAX_PAGES
nvmet: fix uninitialized work for zero kato
nvme-pci: disable Write Zeroes on Sandisk Skyhawk
nvme: use queuedata for nvme_req_qid
nvme-rdma: fix crash due to incorrect cqe
nvme-rdma: fix crash when connect rejected
block: remove unused members for io_context
blk-mq: remove the calling of local_memory_node()
zram: Fix __zram_bvec_{read,write}() locking order
skd_main: remove unused including <linux/version.h>
sgl_alloc_order: fix memory leak
lightnvm: fix out-of-bounds write to array devices->info[]
...
Linus Torvalds [Sat, 24 Oct 2020 19:40:18 +0000 (12:40 -0700)]
Merge tag 'io_uring-5.10-2020-10-24' of git://git.kernel.dk/linux-block
Pull io_uring fixes from Jens Axboe:
- fsize was missed in previous unification of work flags
- Few fixes cleaning up the flags unification creds cases (Pavel)
- Fix NUMA affinities for completely unplugged/replugged node for io-wq
- Two fallout fixes from the set_fs changes. One local to io_uring, one
for the splice entry point that io_uring uses.
- Linked timeout fixes (Pavel)
- Removal of ->flush() ->files work-around that we don't need anymore
with referenced files (Pavel)
- Various cleanups (Pavel)
* tag 'io_uring-5.10-2020-10-24' of git://git.kernel.dk/linux-block:
splice: change exported internal do_splice() helper to take kernel offset
io_uring: make loop_rw_iter() use original user supplied pointers
io_uring: remove req cancel in ->flush()
io-wq: re-set NUMA node affinities if CPUs come online
io_uring: don't reuse linked_timeout
io_uring: unify fsize with def->work_flags
io_uring: fix racy REQ_F_LINK_TIMEOUT clearing
io_uring: do poll's hash_node init in common code
io_uring: inline io_poll_task_handler()
io_uring: remove extra ->file check in poll prep
io_uring: make cached_cq_overflow non atomic_t
io_uring: inline io_fail_links()
io_uring: kill ref get/drop in personality init
io_uring: flags-based creds init in queue