GCC Administrator [Wed, 24 Oct 2018 00:16:54 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r265448
Jeff Law [Tue, 23 Oct 2018 22:51:25 +0000 (16:51 -0600)]
h8300.c (h8300_expand_prologue): Fix stm generation for H8/S.
* config/h8300/h8300.c (h8300_expand_prologue): Fix stm generation
for H8/S.
From-SVN: r265444
Iain Buclaw [Tue, 23 Oct 2018 21:42:23 +0000 (21:42 +0000)]
MAINTAINERS (Write After Approval): Remove myself.
2018-10-23 Iain Buclaw <ibuclaw@gdcproject.org>
* MAINTAINERS (Write After Approval): Remove myself.
From-SVN: r265442
Iain Buclaw [Tue, 23 Oct 2018 21:04:51 +0000 (21:04 +0000)]
MAINTAINERS: Add myself as D front-end and libphobos maintainer.
2018-10-23 Iain Buclaw <ibuclaw@gdcproject.org>
* MAINTAINERS: Add myself as D front-end and libphobos maintainer.
From-SVN: r265441
Ian Lance Taylor [Tue, 23 Oct 2018 19:02:29 +0000 (19:02 +0000)]
re PR go/87661 (libgo bootstrap failure on arm-linux-gnueabihf (redefinition of constants))
PR go/87661
runtime: remove unused armArch, hwcap and hardDiv
After CL 140057 these are only written but never read in gccgo.
Reviewed-on: https://go-review.googlesource.com/c/141077
From-SVN: r265439
Jakub Jelinek [Tue, 23 Oct 2018 16:25:09 +0000 (18:25 +0200)]
lambda-this3.C: Limit dg-bogus directives to c++17_down only.
* g++.dg/cpp2a/lambda-this3.C: Limit dg-bogus directives to c++17_down
only. Add expected warnings and messages for c++2a.
From-SVN: r265430
Jonathan Wakely [Tue, 23 Oct 2018 13:10:26 +0000 (14:10 +0100)]
PR libstdc++/87704 fix unique_ptr(nullptr_t) constructors
Using a delegating constructor to implement these constructors means
that they instantiate the destructor, which requires the element_type to
be complete. In C++11 and C++14 they were specified to be delegating,
but that was changed as part of LWG 2801 so in C++17 they don't require
a complete type (as was intended all along).
PR libstdc++/87704
* include/bits/unique_ptr.h (unique_ptr::unique_ptr(nullptr_t)): Do
not delegate to default constructor.
(unique_ptr<T[], D>::unique_ptr(nullptr_t)): Likewise.
* testsuite/20_util/unique_ptr/cons/incomplete.cc: New test.
From-SVN: r265423
Richard Biener [Tue, 23 Oct 2018 11:37:52 +0000 (11:37 +0000)]
tree-vrp.c (add_assert_info): Guard dump_printf with dump_enabled_p.
2018-10-23 Richard Biener <rguenther@suse.de>
* tree-vrp.c (add_assert_info): Guard dump_printf with
dump_enabled_p.
* gimple-ssa-evrp-analyze.c
(evrp_range_analyzer::record_ranges_from_incoming_edge):
Use value_range::ignore_equivs_equal_p.
From-SVN: r265422
Richard Biener [Tue, 23 Oct 2018 11:34:56 +0000 (11:34 +0000)]
re PR tree-optimization/87105 (Autovectorization [X86, SSE2, AVX2, DoublePrecision])
2018-10-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/87105
PR tree-optimization/87608
* passes.def (pass_all_early_optimizations): Add early phi-opt
after dce.
* tree-ssa-phiopt.c (value_replacement): Ignore NOPs and predicts in
addition to debug stmts.
(tree_ssa_phiopt_worker): Add early_p argument, do only min/max
and abs replacement early.
* tree-cfg.c (gimple_empty_block_p): Likewise.
* g++.dg/tree-ssa/phiopt-1.C: New testcase.
g++.dg/vect/slp-pr87105.cc: Likewise.
* g++.dg/tree-ssa/pr21463.C: Scan phiopt2 because this testcase
relies on phiprop run before.
* g++.dg/tree-ssa/pr30738.C: Likewise.
* g++.dg/tree-ssa/pr57380.C: Likewise.
* gcc.dg/tree-ssa/pr84859.c: Likewise.
* gcc.dg/tree-ssa/pr45397.c: Scan phiopt2 because phiopt1 is
confused by copies in the IL left by EVRP.
* gcc.dg/tree-ssa/phi-opt-5.c: Likewise, this time confused
by predictors.
* gcc.dg/tree-ssa/phi-opt-12.c: Scan phiopt2.
* gcc.dg/pr24574.c: Likewise.
* g++.dg/tree-ssa/pr86544.C: Scan phiopt4.
From-SVN: r265421
Richard Earnshaw [Tue, 23 Oct 2018 10:19:15 +0000 (10:19 +0000)]
[arm] Update default CPUs during configure
There are a couple of places in config.gcc where the default CPU is
still arm6, but that was removed as a supported CPU earlier this year.
This patch fixes those entries.
The default CPU for configurations that do not explicitly set a
default is now arm7tdmi (so assumes thumb is available). Given that
StrongArm is on the deprecated list, this is a better default than we
had previously.
For NetBSD the default is StrongArm; this is the only remaining port
that uses the old ABI and really still carries support for non-thumb
based targets.
PR target/86383
* config.gcc (arm*-*-netbsdelf*): Default to StrongARM if no CPU
specified to configure.
(arm*-*-*): Use ARM7TDMI as the target CPU if no default provided.
From-SVN: r265420
Richard Biener [Tue, 23 Oct 2018 09:36:13 +0000 (09:36 +0000)]
re PR tree-optimization/87700 (Compile time hog w/ -O1)
2018-10-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/87700
* tree-ssa-copy.c (set_copy_of_val): Fix change detection logic.
* gcc.dg/torture/pr87700.c: New testcase.
From-SVN: r265418
Jakub Jelinek [Tue, 23 Oct 2018 09:25:57 +0000 (11:25 +0200)]
re PR target/87674 (AVX512: incorrect intrinsic signature)
PR target/87674
* config/i386/avx512vlintrin.h (_mm_mask_mullo_epi32): Change type of
second argument from __mmask16 to __mmask8.
* config/i386/avx512vlbwintrin.h (_mm_mask_packus_epi32,
_mm_mask_packs_epi32): Likewise.
* config/i386/avx512pfintrin.h (_mm512_mask_prefetch_i64scatter_ps):
Likewise.
(_mm512_mask_prefetch_i64scatter_pd): Likewise. Formatting fix.
From-SVN: r265416
Richard Biener [Tue, 23 Oct 2018 09:17:29 +0000 (09:17 +0000)]
tree-vect-stmts.c (vect_analyze_stmt): Fix typo in comment.
2018-10-23 Richard Biener <rguenther@suse.de>
* tree-vect-stmts.c (vect_analyze_stmt): Fix typo in comment.
From-SVN: r265415
Richard Biener [Tue, 23 Oct 2018 08:58:39 +0000 (08:58 +0000)]
re PR tree-optimization/86144 (GCC is not generating vector math calls to svml/acml functions)
2018-10-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/86144
* tree-vect-stmts.c (vect_analyze_stmt): Prefer -mveclibabi
over simd attribute.
From-SVN: r265414
Richard Biener [Tue, 23 Oct 2018 08:51:20 +0000 (08:51 +0000)]
re PR tree-optimization/87693 (ICE in thread_around_empty_blocks, at tree-ssa-threadedge.c:984)
2018-10-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/87693
* tree-ssa-threadedge.c (thread_around_empty_blocks): Handle
the case we do not find the taken edge.
* gcc.dg/torture/pr87693.c: New testcase.
From-SVN: r265413
Paul Thomas [Tue, 23 Oct 2018 08:27:14 +0000 (08:27 +0000)]
re PR fortran/85603 (ICE with character array substring assignment)
2018-10-23 Paul Thomas <pault@gcc.gnu.org>
PR fortran/85603
* frontend-passes.c (get_len_call): New function to generate a
call to intrinsic LEN.
(create_var): Use this to make length expressions for variable
rhs string lengths.
Clean up some white space issues.
2018-10-23 Paul Thomas <pault@gcc.gnu.org>
PR fortran/85603
* gfortran.dg/deferred_character_23.f90 : Check reallocation is
occurring as it should and a regression caused by version 1 of
this patch.
From-SVN: r265412
Ian Lance Taylor [Tue, 23 Oct 2018 02:46:41 +0000 (02:46 +0000)]
compiler: export indexed type data, read unexported types lazily
Introduce a new "types" command to the export data to record the
number of types and the size of their export data. It is immediately
followed by new "type" commands that can be indexed. Parse all the
exported types immediately so that we register them, but parse other
type data only as needed.
Reviewed-on: https://go-review.googlesource.com/c/143022
From-SVN: r265409
GCC Administrator [Tue, 23 Oct 2018 00:17:04 +0000 (00:17 +0000)]
Daily bump.
From-SVN: r265408
Paul Koning [Mon, 22 Oct 2018 23:51:05 +0000 (19:51 -0400)]
symtab.c (symtab_node::increase_alignment): Correct max alignment check.
* symtab.c (symtab_node::increase_alignment): Correct max
alignment check.
From-SVN: r265404
Yury Gribov [Mon, 22 Oct 2018 20:26:32 +0000 (20:26 +0000)]
re PR tree-optimization/87633 (ice in compare_range_wit h_value, at vr-values.c:1702)
2018-10-22 Yury Gribov <tetra2005@gmail.com>
gcc/
PR tree-optimization/87633
* match.pd: Do not generate unordered integer comparisons.
gcc/testsuite/
PR tree-optimization/87633
* g++.dg/pr87633.C: New test.
From-SVN: r265399
Segher Boessenkool [Mon, 22 Oct 2018 20:23:39 +0000 (22:23 +0200)]
combine: Do not combine moves from hard registers
On most targets every function starts with moves from the parameter
passing (hard) registers into pseudos. Similarly, after every call
there is a move from the return register into a pseudo. These moves
usually combine with later instructions (leaving pretty much the same
instruction, just with a hard reg instead of a pseudo).
This isn't a good idea. Register allocation can get rid of unnecessary
moves just fine, and moving the parameter passing registers into many
later instructions tends to prevent good register allocation. This
patch disallows combining moves from a hard (non-fixed) register.
This also avoid the problem mentioned in PR87600 #c3 (combining hard
registers into inline assembler is problematic).
Because the register move can often be combined with other instructions
*itself*, for example for setting some condition code, this patch adds
extra copies via new pseudos after every copy-from-hard-reg.
On some targets this reduces average code size. On others it increases
it a bit, 0.1% or 0.2% or so. (I tested this on all *-linux targets).
PR rtl-optimization/87600
* combine.c: Add include of expr.h.
(cant_combine_insn_p): Do not combine moves from any hard non-fixed
register to a pseudo.
(make_more_copies): New function, add a copy to a new pseudo after
the moves from hard registers into pseudos.
(rest_of_handle_combine): Declare rebuild_jump_labels_after_combine
later. Call make_more_copies.
From-SVN: r265398
Marek Polacek [Mon, 22 Oct 2018 20:01:56 +0000 (20:01 +0000)]
re PR testsuite/87694 (problem in g++.dg/concepts/memfun-err.C starting with r263343)
PR testsuite/87694
* g++.dg/concepts/memfun-err.C: Make it a compile test.
From-SVN: r265397
Andrew Stubbs [Mon, 22 Oct 2018 14:23:37 +0000 (14:23 +0000)]
Don't double-count early-clobber matches.
Given a pattern with a number of operands:
(match_operand 0 "" "=&v")
(match_operand 1 "" " v0")
(match_operand 2 "" " v0")
(match_operand 3 "" " v0")
GCC will currently increment "reject" once, for operand 0, and then decrement
it once for each of the other operands, ending with reject == -2 and an
assertion failure. If there's a conflict then it might try to decrement reject
yet again.
Incidentally, what these patterns are trying to achieve is an allocation in
which operand 0 may match one of the other operands, but may not partially
overlap any of them. Ideally there'd be a better way to do this.
In any case, it will affect any pattern in which multiple operands may (or
must) match an early-clobber operand.
The patch only allows a reject-- when one has not already occurred, for that
operand.
2018-10-22 Andrew Stubbs <ams@codesourcery.com>
gcc/
* lra-constraints.c (process_alt_operands): New local array,
matching_early_clobber. Check matching_early_clobber before
decrementing reject, and set matching_early_clobber after.
From-SVN: r265393
Segher Boessenkool [Mon, 22 Oct 2018 14:03:22 +0000 (16:03 +0200)]
rs6000: Handle print_operand_address for unexpected RTL (PR87598)
As the PR shows, the user can force this to be called on at least some
RTL that is not a valid address. Most targets treat this as if the
user knows best; let's do the same.
PR target/87598
* config/rs6000/rs6000.c (print_operand_address): For unexpected RTL
call output_addr_const and hope for the best.
From-SVN: r265392
Richard Biener [Mon, 22 Oct 2018 13:57:47 +0000 (13:57 +0000)]
2018-10-22 Richard Biener <rguenther@suse.de>
* gimple-ssa-evrp-analyze.c
(evrp_range_analyzer::record_ranges_from_incoming_edge): Be
smarter about what ranges to use.
* tree-vrp.c (add_assert_info): Dump here.
(register_edge_assert_for_2): Instead of here at multiple but
not all places.
* gcc.dg/tree-ssa/evrp12.c: New testcase.
* gcc.dg/predict-6.c: Adjust.
* gcc.dg/tree-ssa/vrp33.c: Disable EVRP.
* gcc.dg/tree-ssa/vrp02.c: Likewise.
* gcc.dg/tree-ssa/cunroll-9.c: Likewise.
From-SVN: r265391
Steven Bosscher [Mon, 22 Oct 2018 13:54:23 +0000 (13:54 +0000)]
re PR middle-end/63155 (memory hog)
2018-10-22 Steven Bosscher <steven@gcc.gnu.org>
Richard Biener <rguenther@suse.de>
* bitmap.h: Update data structure documentation, including a
description of bitmap views as either linked-lists or splay trees.
(struct bitmap_element_def): Update comments for splay tree bitmaps.
(struct bitmap_head_def): Likewise.
(bitmap_list_view, bitmap_tree_view): New prototypes.
(bitmap_initialize_stat): Initialize a bitmap_head's indx and
tree_form fields.
(bmp_iter_set_init): Assert the iterated bitmaps are in list form.
(bmp_iter_and_init, bmp_iter_and_compl_init): Likewise.
* bitmap.c (bitmap_elem_to_freelist): Unregister overhead of a
released bitmap element here.
(bitmap_element_free): Remove.
(bitmap_elt_clear_from): Work on splay tree bitmaps.
(bitmap_list_link_element): Renamed from bitmap_element_link. Move
this function similar ones such that linked-list bitmap implementation
functions are grouped.
(bitmap_list_unlink_element): Renamed from bitmap_element_unlink,
and moved for grouping.
(bitmap_list_insert_element_after): Renamed from
bitmap_elt_insert_after, and moved for grouping.
(bitmap_list_find_element): New function spliced from bitmap_find_bit.
(bitmap_tree_link_left, bitmap_tree_link_right,
bitmap_tree_rotate_left, bitmap_tree_rotate_right, bitmap_tree_splay,
bitmap_tree_link_element, bitmap_tree_unlink_element,
bitmap_tree_find_element): New functions for splay-tree bitmap
implementation.
(bitmap_element_link, bitmap_element_unlink, bitmap_elt_insert_after):
Renamed and moved, see above entries.
(bitmap_tree_listify_from): New function to convert part of a splay
tree bitmap to a linked-list bitmap.
(bitmap_list_view): Convert a splay tree bitmap to linked-list form.
(bitmap_tree_view): Convert a linked-list bitmap to splay tree form.
(bitmap_find_bit): Remove.
(bitmap_clear, bitmap_clear_bit, bitmap_set_bit,
bitmap_single_bit_set_p, bitmap_first_set_bit, bitmap_last_set_bit):
Handle splay tree bitmaps.
(bitmap_copy, bitmap_count_bits, bitmap_and, bitmap_and_into,
bitmap_elt_copy, bitmap_and_compl, bitmap_and_compl_into,
bitmap_compl_and_into, bitmap_elt_ior, bitmap_ior, bitmap_ior_into,
bitmap_xor, bitmap_xor_into, bitmap_equal_p, bitmap_intersect_p,
bitmap_intersect_compl_p, bitmap_ior_and_compl,
bitmap_ior_and_compl_into, bitmap_set_range, bitmap_clear_range,
bitmap_hash): Reject trying to act on splay tree bitmaps. Make
corresponding changes to use linked-list specific bitmap_element
manipulation functions as applicable for efficiency.
(bitmap_tree_to_vec): New function.
(debug_bitmap_elt_file): New function split out from ...
(debug_bitmap_file): ... here. Handle splay tree bitmaps.
(bitmap_print): Likewise.
PR tree-optimization/63155
* tree-ssa-propagate.c (ssa_prop_init): Use tree-view for the
SSA edge worklists.
* tree-ssa-coalesce.c (coalesce_ssa_name): Populate used_in_copies
in tree-view.
From-SVN: r265390
William Schmidt [Mon, 22 Oct 2018 13:38:32 +0000 (13:38 +0000)]
Index...
Index: gcc/config/rs6000/emmintrin.h
===================================================================
--- gcc/config/rs6000/emmintrin.h (revision 265318)
+++ gcc/config/rs6000/emmintrin.h (working copy)
@@ -85,7 +85,7 @@ typedef double __m128d __attribute__ ((__vector_si
typedef long long __m128i_u __attribute__ ((__vector_size__ (16), __may_alias__, __aligned__ (1)));
typedef double __m128d_u __attribute__ ((__vector_size__ (16), __may_alias__, __aligned__ (1)));
-/* Define two value permute mask */
+/* Define two value permute mask. */
#define _MM_SHUFFLE2(x,y) (((x) << 1) | (y))
/* Create a vector with element 0 as F and the rest zero. */
@@ -201,7 +201,7 @@ _mm_store_pd (double *__P, __m128d __A)
extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_storeu_pd (double *__P, __m128d __A)
{
- *(__m128d *)__P = __A;
+ *(__m128d_u *)__P = __A;
}
/* Stores the lower DPFP value. */
@@ -2175,7 +2175,7 @@ _mm_maskmoveu_si128 (__m128i __A, __m128i __B, cha
{
__v2du hibit = { 0x7f7f7f7f7f7f7f7fUL, 0x7f7f7f7f7f7f7f7fUL};
__v16qu mask, tmp;
- __m128i *p = (__m128i*)__C;
+ __m128i_u *p = (__m128i_u*)__C;
tmp = (__v16qu)_mm_loadu_si128(p);
mask = (__v16qu)vec_cmpgt ((__v16qu)__B, (__v16qu)hibit);
Index: gcc/config/rs6000/xmmintrin.h
===================================================================
--- gcc/config/rs6000/xmmintrin.h (revision 265318)
+++ gcc/config/rs6000/xmmintrin.h (working copy)
@@ -85,6 +85,10 @@
vector types, and their scalar components. */
typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
+/* Unaligned version of the same type. */
+typedef float __m128_u __attribute__ ((__vector_size__ (16), __may_alias__,
+ __aligned__ (1)));
+
/* Internal data types for implementing the intrinsics. */
typedef float __v4sf __attribute__ ((__vector_size__ (16)));
@@ -172,7 +176,7 @@ _mm_store_ps (float *__P, __m128 __A)
extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_storeu_ps (float *__P, __m128 __A)
{
- *(__m128 *)__P = __A;
+ *(__m128_u *)__P = __A;
}
/* Store four SPFP values in reverse order. The address must be aligned. */
From-SVN: r265389
Martin Liska [Mon, 22 Oct 2018 13:09:33 +0000 (15:09 +0200)]
Revert r263947.
2018-10-22 Martin Liska <mliska@suse.cz>
PR tree-optimization/87686
Revert
2018-08-29 Martin Liska <mliska@suse.cz>
* tree-switch-conversion.c (switch_conversion::expand):
Strenghten assumption about gswitch statements.
2018-10-22 Martin Liska <mliska@suse.cz>
PR tree-optimization/87686
* g++.dg/tree-ssa/pr87686.C: New test.
From-SVN: r265388
Jakub Jelinek [Mon, 22 Oct 2018 12:25:39 +0000 (14:25 +0200)]
Iterate -std=c++-* in i386.exp.
2018-10-22 Jakub Jelinek <jakub@redhat.com>
* g++.target/i386/i386.exp: Use g++-dg-runtest to iterate
properly -std= options.
From-SVN: r265387
Martin Liska [Mon, 22 Oct 2018 12:04:16 +0000 (14:04 +0200)]
Simplify comparison of attrs in IPA ICF.
2018-10-22 Martin Liska <mliska@suse.cz>
* ipa-icf.c (sem_item::compare_attributes): Remove.
(sem_item::compare_referenced_symbol_properties): Use
attribute_list_equal instead.
(sem_function::equals_wpa): Likewise.
* ipa-icf.h: Remove compare_attributes.
From-SVN: r265386
Richard Biener [Mon, 22 Oct 2018 11:33:48 +0000 (11:33 +0000)]
scop-4.c: Avoid out-of-bound access.
2018-10-22 Richard Biener <rguenther@suse.de>
* gcc.dg/graphite/scop-4.c: Avoid out-of-bound access.
From-SVN: r265385
Eric Botcazou [Mon, 22 Oct 2018 11:03:17 +0000 (11:03 +0000)]
utils.c (unchecked_convert): Use local variables for the biased and reverse SSO attributes of both types.
* gcc-interface/utils.c (unchecked_convert): Use local variables for
the biased and reverse SSO attributes of both types.
Further extend the processing of integral types in the presence of
reverse SSO to all scalar types.
From-SVN: r265381
Eric Botcazou [Mon, 22 Oct 2018 10:43:20 +0000 (10:43 +0000)]
trans.c (Pragma_to_gnu): Use a simple memory constraint in all cases.
* gcc-interface/trans.c (Pragma_to_gnu) <Pragma_Inspection_Point>: Use
a simple memory constraint in all cases.
* gcc-interface/lang-specs.h: Bump copyright year.
From-SVN: r265378
Eric Botcazou [Mon, 22 Oct 2018 10:29:57 +0000 (10:29 +0000)]
warn19.ad[sb]: New test.
* gnat.dg/warn19.ad[sb]: New test.
* gnat.dg/warn19_pkg.ads: New helper.
From-SVN: r265377
Richard Biener [Mon, 22 Oct 2018 10:25:28 +0000 (10:25 +0000)]
re PR c/87682 (gcc/mem-stats.h:172: possible broken comparison operator ?)
2018-10-22 Richard Biener <rguenther@suse.de>
PR middle-end/87682
* mem-stats.h (mem_usage::operator==): Fix pasto.
From-SVN: r265376
Richard Biener [Mon, 22 Oct 2018 10:22:48 +0000 (10:22 +0000)]
re PR bootstrap/87640 (internal compiler error: in check, at tree-vrp.c:155)
2018-10-22 Richard Biener <rguenther@suse.de>
PR tree-optimization/87640
* tree-vrp.c (set_value_range_with_overflow): Decompose
incomplete result.
(extract_range_from_binary_expr_1): Adjust.
* gcc.dg/torture/pr87640.c: New testcase.
From-SVN: r265375
Ilya Leoshkevich [Mon, 22 Oct 2018 08:39:18 +0000 (08:39 +0000)]
S/390: Add the forgotten test for r265371
The test is part of the originally posted change
(https://gcc.gnu.org/ml/gcc-patches/2018-10/msg01173.html), but was
forgotten during svn commit.
From-SVN: r265373
Martin Jambor [Mon, 22 Oct 2018 08:27:50 +0000 (10:27 +0200)]
Add a fun parameter to three stmt_could_throw... functions
This long patch only does one simple thing, adds an explicit function
parameter to predicates stmt_could_throw_p, stmt_can_throw_external
and stmt_can_throw_internal.
My motivation was ability to use stmt_can_throw_external in IPA
analysis phase without the need to push cfun. As I have discovered,
we were already doing that in cgraph.c, which this patch avoids as
well. In the process, I had to add a struct function parameter to
stmt_could_throw_p and decided to also change the interface of
stmt_can_throw_internal just for the sake of some minimal consistency.
In the process I have discovered that calling method
cgraph_node::create_version_clone_with_body (used by ipa-split,
ipa-sra, OMP simd and multiple_target) leads to calls of
stmt_can_throw_external with NULL cfun. I have worked around this by
making stmt_can_throw_external and stmt_could_throw_p gracefully
accept NULL and just be pessimistic in that case. The problem with
fixing this in a better way is that struct function for the clone is
created after cloning edges where we attempt to push the yet not
existing cfun, and moving it before would require a bit of surgery in
tree-inline.c. A slightly hackish but simpler fix might be to
explicitely pass the "old" function to symbol_table::create_edge
because it should be just as good at that moment. In any event, that
is a topic for another patch.
I believe that currently we incorrectly use cfun in
maybe_clean_eh_stmt_fn and maybe_duplicate_eh_stmt_fn, both in
tree-eh.c, and so I have fixed these cases too. The bulk of other
changes is just mechanical adding of cfun to all users.
Bootstrapped and tested on x86_64-linux (also with extra NULLing and
restoring cfun to double check it is not used in a place I missed), OK
for trunk?
Thanks,
Martin
2018-10-22 Martin Jambor <mjambor@suse.cz>
* tree-eh.h (stmt_could_throw_p): Add function parameter.
(stmt_can_throw_external): Likewise.
(stmt_can_throw_internal): Likewise.
* tree-eh.c (lower_eh_constructs_2): Pass cfun to stmt_could_throw_p.
(lower_eh_constructs_2): Likewise.
(stmt_could_throw_p): Add fun parameter, use it instead of cfun.
(stmt_can_throw_external): Likewise.
(stmt_can_throw_internal): Likewise.
(maybe_clean_eh_stmt_fn): Pass cfun to stmt_could_throw_p.
(maybe_clean_or_replace_eh_stmt): Pass cfun to stmt_could_throw_p.
(maybe_duplicate_eh_stmt_fn): Pass new_fun to stmt_could_throw_p.
(maybe_duplicate_eh_stmt): Pass cfun to stmt_could_throw_p.
(pass_lower_eh_dispatch::execute): Pass cfun to
stmt_can_throw_external.
(cleanup_empty_eh): Likewise.
(verify_eh_edges): Pass cfun to stmt_could_throw_p.
* cgraph.c (cgraph_edge::set_call_stmt): Pass a function to
stmt_can_throw_external instead of pushing it to cfun.
(symbol_table::create_edge): Likewise.
* gimple-fold.c (fold_builtin_atomic_compare_exchange): Pass cfun to
stmt_can_throw_internal.
* gimple-ssa-evrp.c (evrp_dom_walker::before_dom_children): Pass cfun
to stmt_could_throw_p.
* gimple-ssa-store-merging.c (handled_load): Pass cfun to
stmt_can_throw_internal.
(pass_store_merging::execute): Likewise.
* gimple-ssa-strength-reduction.c
(find_candidates_dom_walker::before_dom_children): Pass cfun to
stmt_could_throw_p.
* gimplify-me.c (gimple_regimplify_operands): Pass cfun to
stmt_can_throw_internal.
* ipa-pure-const.c (check_call): Pass cfun to stmt_could_throw_p and
to stmt_can_throw_external.
(check_stmt): Pass cfun to stmt_could_throw_p.
(check_stmt): Pass cfun to stmt_can_throw_external.
(pass_nothrow::execute): Likewise.
* trans-mem.c (expand_call_tm): Pass cfun to stmt_can_throw_internal.
* tree-cfg.c (is_ctrl_altering_stmt): Pass cfun to
stmt_can_throw_internal.
(verify_gimple_in_cfg): Pass cfun to stmt_could_throw_p.
(stmt_can_terminate_bb_p): Pass cfun to stmt_can_throw_external.
(gimple_purge_dead_eh_edges): Pass cfun to stmt_can_throw_internal.
* tree-complex.c (expand_complex_libcall): Pass cfun to
stmt_could_throw_p and to stmt_can_throw_internal.
(expand_complex_multiplication): Pass cfun to stmt_can_throw_internal.
* tree-inline.c (copy_edges_for_bb): Likewise.
(maybe_move_debug_stmts_to_successors): Likewise.
* tree-outof-ssa.c (ssa_is_replaceable_p): Pass cfun to
stmt_could_throw_p.
* tree-parloops.c (oacc_entry_exit_ok_1): Likewise.
* tree-sra.c (scan_function): Pass cfun to stmt_can_throw_external.
* tree-ssa-alias.c (stmt_kills_ref_p): Pass cfun to
stmt_can_throw_internal.
* tree-ssa-ccp.c (optimize_atomic_bit_test_and): Likewise.
* tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Pass cfun to
stmt_could_throw_p.
(mark_aliased_reaching_defs_necessary_1): Pass cfun to
stmt_can_throw_internal.
* tree-ssa-forwprop.c (pass_forwprop::execute): Likewise.
* tree-ssa-loop-im.c (movement_possibility): Pass cfun to
stmt_could_throw_p.
* tree-ssa-loop-ivopts.c (find_givs_in_stmt_scev): Likewise.
(add_autoinc_candidates): Pass cfun to stmt_can_throw_internal.
* tree-ssa-math-opts.c (pass_cse_reciprocals::execute): Likewise.
(convert_mult_to_fma_1): Likewise.
(convert_to_divmod): Likewise.
* tree-ssa-phiprop.c (propagate_with_phi): Likewise.
* tree-ssa-pre.c (compute_avail): Pass cfun to stmt_could_throw_p.
* tree-ssa-propagate.c
(substitute_and_fold_dom_walker::before_dom_children): Likewise.
* tree-ssa-reassoc.c (suitable_cond_bb): Likewise.
(maybe_optimize_range_tests): Likewise.
(linearize_expr_tree): Likewise.
(reassociate_bb): Likewise.
* tree-ssa-sccvn.c (copy_reference_ops_from_call): Likewise.
* tree-ssa-scopedtables.c (hashable_expr_equal_p): Likewise.
* tree-ssa-strlen.c (adjust_last_stmt): Likewise.
(handle_char_store): Likewise.
* tree-vect-data-refs.c (vect_find_stmt_data_reference): Pass cfun to
stmt_can_throw_internal.
* tree-vect-patterns.c (check_bool_pattern): Pass cfun to
stmt_could_throw_p.
* tree-vect-stmts.c (vect_finish_stmt_generation_1): Likewise.
(vectorizable_call): Pass cfun to stmt_can_throw_internal.
(vectorizable_simd_clone_call): Likewise.
* value-prof.c (gimple_ic): Pass cfun to stmt_could_throw_p.
(gimple_stringop_fixed_value): Likewise.
From-SVN: r265372
Ilya Leoshkevich [Mon, 22 Oct 2018 08:21:03 +0000 (08:21 +0000)]
S/390: Make "b" constraint match literal pool references
Improves the code generation by getting rid of redundant LAs, as seen
in the following example:
- la %r1,0(%r13)
- lg %r4,0(%r1)
+ lg %r4,0(%r13)
Also allows to proceed with the merge of movdi_64 and movdi_larl.
Currently LRA decides to spill literal pool references back to the
literal pool, because it preliminarily chooses alternatives with
CT_MEMORY constraints without calling
satisfies_memory_constraint_p (). Later on it notices that the
constraint is wrong and fixes it by spilling. The constraint in this
case is "b", and the operand is a literal pool reference. There is
no reason to reject them. The current behavior was introduced,
apparently unintentionally, by
https://gcc.gnu.org/ml/gcc-patches/2010-09/msg00812.html
The patch affects a little bit more than mentioned in the subject,
because it changes s390_loadrelative_operand_p (), which is called not
only for checking the "b" constraint. However, the only caller for
which it should really not accept literal pool references is
s390_check_qrst_address (), so it was changed to explicitly do so.
gcc/ChangeLog:
2018-10-22 Ilya Leoshkevich <iii@linux.ibm.com>
* config/s390/s390.c (s390_loadrelative_operand_p): Accept
literal pool references.
(s390_check_qrst_address): Adapt to the new behavior of
s390_loadrelative_operand_p ().
gcc/testsuite/ChangeLog:
2018-10-22 Ilya Leoshkevich <iii@linux.ibm.com>
* gcc.target/s390/litpool-int.c: New test.
From-SVN: r265371
H.J. Lu [Mon, 22 Oct 2018 07:35:48 +0000 (07:35 +0000)]
i386: Enable AVX512 memory broadcast for INT andnot
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for INT andnot operations.
gcc/
PR target/72782
* config/i386/sse.md (*andnot<mode>3_bcst): New.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512f-andn-di-zmm-1.c: New test.
* gcc.target/i386/avx512f-andn-si-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-andn-si-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-andn-si-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-andn-si-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-andn-si-zmm-5.c: Likewise.
* gcc.target/i386/avx512vl-andn-si-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-andn-si-ymm-1.c: Likewise.
From-SVN: r265370
H.J. Lu [Mon, 22 Oct 2018 07:29:03 +0000 (07:29 +0000)]
i386: Enable AVX512 memory broadcast for INT logic
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for INT logic operations.
gcc/
PR target/72782
* config/i386/sse.md (*<code><mode>3_bcst): New.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512f-and-di-zmm-1.c: New test.
* gcc.target/i386/avx512f-and-si-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-and-si-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-and-si-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-and-si-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-and-si-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-and-si-zmm-6.c: Likewise.
* gcc.target/i386/avx512f-or-di-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-or-si-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-or-si-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-or-si-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-or-si-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-or-si-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-or-si-zmm-6.c: Likewise.
* gcc.target/i386/avx512f-xor-di-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-xor-si-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-xor-si-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-xor-si-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-xor-si-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-xor-si-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-xor-si-zmm-6.c: Likewise.
* gcc.target/i386/avx512vl-and-si-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-and-si-ymm-1.c: Likewise.
* gcc.target/i386/avx512vl-or-si-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-or-si-ymm-1.c: Likewise.
* gcc.target/i386/avx512vl-xor-si-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-xor-si-ymm-1.c: Likewise.
From-SVN: r265369
H.J. Lu [Mon, 22 Oct 2018 07:25:51 +0000 (07:25 +0000)]
i386: Enable AVX512 memory broadcast for INT add
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for INT add operations.
gcc/
PR target/72782
* config/i386/sse.md (avx512bcst): Updated for V4SI, V2DI, V8SI,
V4DI, V16SI and V8DI.
(*sub<mode>3<mask_name>_bcst): New.
(*add<mode>3<mask_name>_bcst): Likewise.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512f-add-di-zmm-1.c: New test.
* gcc.target/i386/avx512f-add-si-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-6.c: Likewise.
* gcc.target/i386/avx512f-sub-di-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-5.c: Likewise.
* gcc.target/i386/avx512vl-add-si-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-add-si-ymm-1.c: Likewise.
* gcc.target/i386/avx512vl-sub-si-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-sub-si-ymm-1.c: Likewise.
From-SVN: r265368
GCC Administrator [Mon, 22 Oct 2018 00:17:02 +0000 (00:17 +0000)]
Daily bump.
From-SVN: r265366
William Schmidt [Sun, 21 Oct 2018 23:30:51 +0000 (23:30 +0000)]
emmintrin.h (_mm_movemask_pd): Replace __vector __m64 with __vector unsigned long long for compatibility.
2018-10-21 Bill Schmidt <wschmidt@linux.ibm.com>
Jinsong Ji <jji@us.ibm.com>
* config/rs6000/emmintrin.h (_mm_movemask_pd): Replace __vector
__m64 with __vector unsigned long long for compatibility.
(_mm_movemask_epi8): Likewise.
* config/rs6000/xmmintrin.h (_mm_cvtps_pi32): Likewise.
(_mm_cvttps_pi32): Likewise.
(_mm_cvtpi32_ps): Likewise.
(_mm_cvtps_pi16): Likewise.
(_mm_loadh_pi): Likewise.
(_mm_storeh_pi): Likewise.
(_mm_movehl_ps): Likewise.
(_mm_movelh_ps): Likewise.
(_mm_loadl_pi): Likewise.
(_mm_storel_pi): Likewise.
(_mm_movemask_ps): Likewise.
(_mm_shuffle_pi16): Likewise.
From-SVN: r265362
H.J. Lu [Sun, 21 Oct 2018 20:38:27 +0000 (13:38 -0700)]
Move testsuite ChangeLog entries to testsuite/ChangeLog
From-SVN: r265360
H.J. Lu [Sun, 21 Oct 2018 20:30:06 +0000 (20:30 +0000)]
i386: Update AVX512 FMSUB/FNMADD/FNMSUB tests
Update AVX512 tests to test the newly added FMSUB, FNMADD and FNMSUB
builtin functions.
PR target/72782
* gcc.target/i386/avx-1.c (__builtin_ia32_vfmsubpd512_mask): New.
(__builtin_ia32_vfmsubpd512_maskz): Likewise.
(__builtin_ia32_vfmsubps512_mask): Likewise.
(__builtin_ia32_vfmsubps512_maskz): Likewise.
(__builtin_ia32_vfnmaddpd512_mask3): Likewise.
(__builtin_ia32_vfnmaddpd512_maskz): Likewise.
(__builtin_ia32_vfnmaddps512_mask3): Likewise.
(__builtin_ia32_vfnmaddps512_maskz): Likewise.
(__builtin_ia32_vfnmsubpd512_maskz): Likewise.
(__builtin_ia32_vfnmsubps512_maskz): Likewise.
* testsuite/gcc.target/i386/sse-13.c
(__builtin_ia32_vfmsubpd512_mask): Likewise.
(__builtin_ia32_vfmsubpd512_maskz): Likewise.
(__builtin_ia32_vfmsubps512_mask): Likewise.
(__builtin_ia32_vfmsubps512_maskz): Likewise.
(__builtin_ia32_vfnmaddpd512_mask3): Likewise.
(__builtin_ia32_vfnmaddpd512_maskz): Likewise.
(__builtin_ia32_vfnmaddps512_mask3): Likewise.
(__builtin_ia32_vfnmaddps512_maskz): Likewise.
(__builtin_ia32_vfnmsubpd512_maskz): Likewise.
(__builtin_ia32_vfnmsubps512_maskz): Likewise.
* testsuite/gcc.target/i386/sse-23.c
(__builtin_ia32_vfmsubpd512_mask): Likewise.
(__builtin_ia32_vfmsubpd512_maskz): Likewise.
(__builtin_ia32_vfmsubps512_mask): Likewise.
(__builtin_ia32_vfmsubps512_maskz): Likewise.
(__builtin_ia32_vfnmaddpd512_mask3): Likewise.
(__builtin_ia32_vfnmaddpd512_maskz): Likewise.
(__builtin_ia32_vfnmaddps512_mask3): Likewise.
(__builtin_ia32_vfnmaddps512_maskz): Likewise.
(__builtin_ia32_vfnmsubpd512_maskz): Likewise.
(__builtin_ia32_vfnmsubps512_maskz): Likewise.
From-SVN: r265359
H.J. Lu [Sun, 21 Oct 2018 20:28:56 +0000 (20:28 +0000)]
i386: Enable AVX512 memory broadcast for FNMSUB
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FNMSUB operations. In order to
support AVX512 memory broadcast for FNMSUB, FNMSUB builtin functions are
also added, instead of passing the negated value to FMA builtin functions.
gcc/
PR target/72782
* config/i386/avx512fintrin.h (_mm512_fnmsub_round_pd): Use
__builtin_ia32_vfnmsubpd512_mask.
(_mm512_mask_fnmsub_round_pd): Likewise.
(_mm512_fnmsub_pd): Likewise.
(_mm512_mask_fnmsub_pd): Likewise.
(_mm512_maskz_fnmsub_round_pd): Use
__builtin_ia32_vfnmsubpd512_maskz.
(_mm512_maskz_fnmsub_pd): Likewise.
(_mm512_fnmsub_round_ps): Use __builtin_ia32_vfnmsubps512_mask.
(_mm512_mask_fnmsub_round_ps): Likewise.
(_mm512_fnmsub_ps): Likewise.
(_mm512_mask_fnmsub_ps): Likewise.
(_mm512_maskz_fnmsub_round_ps): Use
__builtin_ia32_vfnmsubps512_maskz.
(_mm512_maskz_fnmsub_ps): Likewise.
* config/i386/avx512vlintrin.h (_mm256_mask_fnmsub_pd): Use
__builtin_ia32_vfnmsubpd256_mask.
(_mm256_maskz_fnmsub_pd): Use __builtin_ia32_vfnmsubpd256_maskz.
(_mm_mask_fnmsub_pd): Use __builtin_ia32_vfmaddpd128_mask
(_mm_maskz_fnmsub_pd): Use __builtin_ia32_vfnmsubpd128_maskz.
(_mm256_mask_fnmsub_ps): Use __builtin_ia32_vfnmsubps256_mask.
(_mm256_mask_fnmsub_ps): Use __builtin_ia32_vfnmsubps256_mask.
(_mm256_maskz_fnmsub_ps): Use __builtin_ia32_vfnmsubps256_maskz.
(_mm_mask_fnmsub_ps): Use __builtin_ia32_vfnmsubps128_mask.
(_mm_maskz_fnmsub_ps): Use __builtin_ia32_vfnmsubps128_maskz.
* config/i386/fmaintrin.h (_mm_fnmsub_pd): Use
__builtin_ia32_vfnmsubpd.
(_mm256_fnmsub_pd): Use __builtin_ia32_vfnmsubpd256.
(_mm_fnmsub_ps): Use __builtin_ia32_vfnmsubps.
(_mm256_fnmsub_ps): Use __builtin_ia32_vfnmsubps256.
(_mm_fnmsub_sd): Use __builtin_ia32_vfnmsubsd3.
(_mm_fnmsub_ss): Use __builtin_ia32_vfnmsubss3.
* config/i386/i386-builtin.def: Add
__builtin_ia32_vfnmsubpd256_mask,
__builtin_ia32_vfnmsubpd256_maskz,
__builtin_ia32_vfnmsubpd128_mask,
__builtin_ia32_vfnmsubpd128_maskz,
__builtin_ia32_vfnmsubps256_mask,
__builtin_ia32_vfnmsubps256_maskz,
__builtin_ia32_vfnmsubps128_mask,
__builtin_ia32_vfnmsubps128_maskz,
__builtin_ia32_vfnmsubpd512_mask,
__builtin_ia32_vfnmsubpd512_maskz,
__builtin_ia32_vfnmsubps512_mask,
__builtin_ia32_vfnmsubps512_maskz, __builtin_ia32_vfnmsubss3,
__builtin_ia32_vfnmsubsd3, __builtin_ia32_vfnmsubps,
__builtin_ia32_vfnmsubpd, __builtin_ia32_vfnmsubps256 and.
__builtin_ia32_vfnmsubpd256.
* config/i386/sse.md (fma4i_fnmsub_<mode>): New.
(<avx512>_fnmsub_<mode>_maskz<round_expand_name>): Likewise.
(*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1):
Likewise.
(*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_2):
Likewise.
(*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_3):
Likewise.
(fmai_vmfnmsub_<mode><round_name>): Likewise.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512f-fnmsub-df-zmm-1.c: New test.
* gcc.target/i386/avx512f-fnmsub-sf-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-fnmsub-sf-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-fnmsub-sf-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-fnmsub-sf-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-fnmsub-sf-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-fnmsub-sf-zmm-6.c: Likewise.
* gcc.target/i386/avx512f-fnmsub-sf-zmm-7.c: Likewise.
* gcc.target/i386/avx512f-fnmsub-sf-zmm-8.c: Likewise.
* gcc.target/i386/avx512vl-fnmsub-sf-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-fnmsub-sf-ymm-1.c: Likewise.
From-SVN: r265358
H.J. Lu [Sun, 21 Oct 2018 20:27:09 +0000 (20:27 +0000)]
i386: Enable AVX512 memory broadcast for FNMADD
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FNMADD operations. In order to
support AVX512 memory broadcast for FNMADD, FNMADD builtin functions are
also added, instead of passing the negated value to FMA builtin functions.
gcc/
PR target/72782
* config/i386/avx512fintrin.h (_mm512_fnmadd_round_pd): Use
__builtin_ia32_vfnmaddpd512_mask.
(_mm512_mask_fnmadd_round_pd): Likewise.
(_mm512_fnmadd_pd): Likewise.
(_mm512_mask_fnmadd_pd): Likewise.
(_mm512_maskz_fnmadd_round_pd): Use
__builtin_ia32_vfnmaddpd512_maskz.
(_mm512_maskz_fnmadd_pd): Likewise.
(_mm512_fnmadd_round_ps): Use __builtin_ia32_vfnmaddps512_mask.
(_mm512_mask_fnmadd_round_ps): Likewise.
(_mm512_fnmadd_ps): Likewise.
(_mm512_mask_fnmadd_ps): Likewise.
(_mm512_maskz_fnmadd_round_ps): Use
__builtin_ia32_vfnmaddps512_maskz.
(_mm512_maskz_fnmadd_ps): Likewise.
* config/i386/avx512vlintrin.h (_mm256_mask_fnmadd_pd): Use
__builtin_ia32_vfnmaddpd256_mask.
(_mm256_maskz_fnmadd_pd): Use __builtin_ia32_vfnmaddpd256_maskz.
(_mm_mask_fnmadd_pd): Use __builtin_ia32_vfmaddpd128_mask
(_mm_maskz_fnmadd_pd): Use __builtin_ia32_vfnmaddpd128_maskz.
(_mm256_mask_fnmadd_ps): Use __builtin_ia32_vfnmaddps256_mask.
(_mm256_mask_fnmadd_ps): Use __builtin_ia32_vfnmaddps256_mask.
(_mm256_maskz_fnmadd_ps): Use __builtin_ia32_vfnmaddps256_maskz.
(_mm_mask_fnmadd_ps): Use __builtin_ia32_vfnmaddps128_mask.
(_mm_maskz_fnmadd_ps): Use __builtin_ia32_vfnmaddps128_maskz.
* config/i386/fmaintrin.h (_mm_fnmadd_pd): Use
__builtin_ia32_vfnmaddpd.
(_mm256_fnmadd_pd): Use __builtin_ia32_vfnmaddpd256.
(_mm_fnmadd_ps): Use __builtin_ia32_vfnmaddps.
(_mm256_fnmadd_ps): Use __builtin_ia32_vfnmaddps256.
(_mm_fnmadd_sd): Use __builtin_ia32_vfnmaddsd3.
(_mm_fnmadd_ss): Use __builtin_ia32_vfnmaddss3.
* config/i386/i386-builtin.def: Add
__builtin_ia32_vfnmaddpd256_mask,
__builtin_ia32_vfnmaddpd256_maskz,
__builtin_ia32_vfnmaddpd128_mask,
__builtin_ia32_vfnmaddpd128_maskz,
__builtin_ia32_vfnmaddps256_mask,
__builtin_ia32_vfnmaddps256_maskz,
__builtin_ia32_vfnmaddps128_mask,
__builtin_ia32_vfnmaddps128_maskz,
__builtin_ia32_vfnmaddpd512_mask,
__builtin_ia32_vfnmaddpd512_maskz,
__builtin_ia32_vfnmaddps512_mask,
__builtin_ia32_vfnmaddps512_maskz, __builtin_ia32_vfnmaddss3,
__builtin_ia32_vfnmaddsd3, __builtin_ia32_vfnmaddps,
__builtin_ia32_vfnmaddpd, __builtin_ia32_vfnmaddps256 and.
__builtin_ia32_vfnmaddpd256.
* config/i386/sse.md (fma4i_fnmadd_<mode>): New.
(<avx512>_fnmadd_<mode>_maskz<round_expand_name>): Likewise.
(*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1):
Likewise.
(*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_2):
Likewise.
(*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_3):
Likewise.
(fmai_vmfnmadd_<mode><round_name>): Likewise.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512f-fnmadd-df-zmm-1.c: New test.
* gcc.target/i386/avx512f-fnmadd-sf-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-fnmadd-sf-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-fnmadd-sf-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-fnmadd-sf-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-fnmadd-sf-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-fnmadd-sf-zmm-6.c: Likewise.
* gcc.target/i386/avx512f-fnmadd-sf-zmm-7.c: Likewise.
* gcc.target/i386/avx512f-fnmadd-sf-zmm-8.c: Likewise.
* gcc.target/i386/avx512vl-fnmadd-sf-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-fnmadd-sf-ymm-1.c: Likewise.
From-SVN: r265357
H.J. Lu [Sun, 21 Oct 2018 20:24:50 +0000 (20:24 +0000)]
Enable AVX512 memory broadcast for FMSUB
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FMSUB operations. In order to
support AVX512 memory broadcast for FMSUB, FMSUB builtin functions are
also added, instead of passing the negated value to FMA builtin functions.
gcc/
PR target/72782
* config/i386/avx512fintrin.h (_mm512_fmsub_round_pd): Use
__builtin_ia32_vfmsubpd512_mask.
(_mm512_mask_fmsub_round_pd): Likewise.
(_mm512_fmsub_pd): Likewise.
(_mm512_mask_fmsub_pd): Likewise.
(_mm512_maskz_fmsub_round_pd): Use
__builtin_ia32_vfmsubpd512_maskz.
(_mm512_maskz_fmsub_pd): Likewise.
(_mm512_fmsub_round_ps): Use __builtin_ia32_vfmsubps512_mask.
(_mm512_mask_fmsub_round_ps): Likewise.
(_mm512_fmsub_ps): Likewise.
(_mm512_mask_fmsub_ps): Likewise.
(_mm512_maskz_fmsub_round_ps): Use
__builtin_ia32_vfmsubps512_maskz.
(_mm512_maskz_fmsub_ps): Likewise.
* config/i386/avx512vlintrin.h (_mm256_mask_fmsub_pd): Use
__builtin_ia32_vfmsubpd256_mask.
(_mm256_maskz_fmsub_pd): Use __builtin_ia32_vfmsubpd256_maskz.
(_mm_mask_fmsub_pd): Use __builtin_ia32_vfmaddpd128_mask
(_mm_maskz_fmsub_pd): Use __builtin_ia32_vfmsubpd128_maskz.
(_mm256_mask_fmsub_ps): Use __builtin_ia32_vfmsubps256_mask.
(_mm256_mask_fmsub_ps): Use __builtin_ia32_vfmsubps256_mask.
(_mm256_maskz_fmsub_ps): Use __builtin_ia32_vfmsubps256_maskz.
(_mm_mask_fmsub_ps): Use __builtin_ia32_vfmsubps128_mask.
(_mm_maskz_fmsub_ps): Use __builtin_ia32_vfmsubps128_maskz.
* config/i386/fmaintrin.h (_mm_fmsub_pd): Use
__builtin_ia32_vfmsubpd.
(_mm256_fmsub_pd): Use __builtin_ia32_vfmsubpd256.
(_mm_fmsub_ps): Use __builtin_ia32_vfmsubps.
(_mm256_fmsub_ps): Use __builtin_ia32_vfmsubps256.
(_mm_fmsub_sd): Use __builtin_ia32_vfmsubsd3.
(_mm_fmsub_ss): Use __builtin_ia32_vfmsubss3.
* config/i386/i386-builtin.def: Add
__builtin_ia32_vfmsubpd256_mask,
__builtin_ia32_vfmsubpd256_maskz,
__builtin_ia32_vfmsubpd128_mask,
__builtin_ia32_vfmsubpd128_maskz,
__builtin_ia32_vfmsubps256_mask,
__builtin_ia32_vfmsubps256_maskz,
__builtin_ia32_vfmsubps128_mask,
__builtin_ia32_vfmsubps128_maskz,
__builtin_ia32_vfmsubpd512_mask,
__builtin_ia32_vfmsubpd512_maskz,
__builtin_ia32_vfmsubps512_mask,
__builtin_ia32_vfmsubps512_maskz, __builtin_ia32_vfmsubss3,
__builtin_ia32_vfmsubsd3, __builtin_ia32_vfmsubps,
__builtin_ia32_vfmsubpd, __builtin_ia32_vfmsubps256 and.
__builtin_ia32_vfmsubpd256.
* config/i386/sse.md (fma4i_fmsub_<mode>): New.
(<avx512>_fmsub_<mode>_maskz<round_expand_name>): Likewise.
(*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1):
Likewise.
(*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_2):
Likewise.
(*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_3):
Likewise.
(fmai_vmfmsub_<mode><round_name>): Likewise.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512f-fmsub-df-zmm-1.c: New test.
* gcc.target/i386/avx512f-fmsub-sf-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-fmsub-sf-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-fmsub-sf-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-fmsub-sf-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-fmsub-sf-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-fmsub-sf-zmm-6.c: Likewise.
* gcc.target/i386/avx512f-fmsub-sf-zmm-7.c: Likewise.
* gcc.target/i386/avx512f-fmsub-sf-zmm-8.c: Likewise.
* gcc.target/i386/avx512vl-fmsub-sf-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-fmsub-sf-ymm-1.c: Likewise.
From-SVN: r265356
Paul Thomas [Sun, 21 Oct 2018 17:32:06 +0000 (17:32 +0000)]
re PR fortran/71880 (pointer to allocatable character)
2018-10-21 Paul Thomas <pault@gcc.gnu.org>
PR fortran/71880
* trans-expr.c (gfc_trans_pointer_assignment): Set the string
length for array valued deferred length lhs.
2018-10-21 Paul Thomas <pault@gcc.gnu.org>
PR fortran/71880
* gfortran.dg/deferred_character_31.f90 : New test.
From-SVN: r265353
H.J. Lu [Sun, 21 Oct 2018 10:46:48 +0000 (10:46 +0000)]
i386: Update FP add/sub with AVX512 memory broadcast
* config/i386/sse.md (*<plusminus_insn><mode>3<mask_name>_bcst_1):
Remove plus. Renamed to ...
(*sub<mode>3<mask_name>_bcst): This.
(*add<mode>3<mask_name>_bcst_2): Renamede to ...
(*add<mode>3<mask_name>_bcst): This.
From-SVN: r265352
H.J. Lu [Sun, 21 Oct 2018 10:35:36 +0000 (10:35 +0000)]
i386: Enable AVX512 memory broadcast for FP mul
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FP mul operations.
gcc/
PR target/72782
* config/i386/sse.md (*mul<mode>3<mask_name>_bcst): New.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512f-mul-df-zmm-1.c: New test.
* gcc.target/i386/avx512f-mul-sf-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-mul-sf-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-mul-sf-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-mul-sf-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-mul-sf-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-mul-sf-zmm-6.c: Likewise.
* gcc.target/i386/avx512vl-mul-sf-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-mul-sf-ymm-1.c: Likewise.
From-SVN: r265351
H.J. Lu [Sun, 21 Oct 2018 10:23:58 +0000 (10:23 +0000)]
i386: Add missing AVX512VL or/xor intrinsics
gcc/
PR target/87662
* i386/avx512vlintrin.h (_mm256_or_epi32): New.
(_mm_or_epi32): Likewise.
(_mm256_xor_epi32): Likewise.
(_mm_xor_epi32): Likewise.
(_mm256_or_epi64): Likewise.
(_mm_or_epi64): Likewise.
(_mm256_xor_epi64): Likewise.
(_mm_xor_epi64): Likewise.
gcc/testsuite/
PR target/87662
* gcc.target/i386/pr87662.c
From-SVN: r265350
GCC Administrator [Sun, 21 Oct 2018 00:16:34 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r265349
H.J. Lu [Sat, 20 Oct 2018 20:41:10 +0000 (20:41 +0000)]
i386: Enable AVX512 memory broadcast for FP div
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FP div operations.
gcc/
PR target/72782
* config/i386/sse.md (*<avx512>_div<mode>3<mask_name>_bcst): New.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512f-div-df-zmm-1.c: New test.
* gcc.target/i386/avx512f-div-sf-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-div-sf-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-div-sf-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-div-sf-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-div-sf-zmm-5.c: Likewise.
* gcc.target/i386/avx512vl-div-sf-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-div-sf-ymm-1.c: Likewise.
From-SVN: r265345
François Dumont [Sat, 20 Oct 2018 20:00:45 +0000 (20:00 +0000)]
testsuite_containers.h (forward_members_unordered<>::forward_members_unordered (const value_type&)): Add local_iterator pre and post increment checks.
2018-10-20 François Dumont <fdumont@gcc.gnu.org>
* testsuite/util/testsuite_containers.h
(forward_members_unordered<>::forward_members_unordered
(const value_type&)): Add local_iterator pre and post increment checks.
* config/abi/pre/gnu.ver: Add GLIBCXX_3.4.26 new symbol.
From-SVN: r265344
Marek Polacek [Sat, 20 Oct 2018 17:21:19 +0000 (17:21 +0000)]
*.C: Use target c++17 instead of explicit dg-options.
* g++.dg/*.C: Use target c++17 instead of explicit dg-options.
* lib/g++-dg.exp: Don't test C++11 by default. Add C++17 to
the list of default stds to test.
From-SVN: r265343
Jakub Jelinek [Sat, 20 Oct 2018 08:58:00 +0000 (10:58 +0200)]
re PR middle-end/87647 (ICE on valid code in decode_addr_const, at varasm.c:2958)
PR middle-end/87647
* varasm.c (decode_addr_const): Handle COMPOUND_LITERAL_EXPR.
* gcc.c-torture/compile/pr87647.c: New test.
From-SVN: r265341
Andreas Schwab [Sat, 20 Oct 2018 07:29:15 +0000 (07:29 +0000)]
* doc/ux.texi: Move @section directly after @node.
From-SVN: r265340
GCC Administrator [Sat, 20 Oct 2018 00:17:03 +0000 (00:17 +0000)]
Daily bump.
From-SVN: r265339
Jakub Jelinek [Fri, 19 Oct 2018 22:52:06 +0000 (00:52 +0200)]
re PR middle-end/85488 (segmentation fault when compiling code using the ordered(n) clause in OpenMP 4.5)
PR middle-end/85488
PR middle-end/87649
* omp-low.c (check_omp_nesting_restrictions): Diagnose ordered without
depend closely nested inside of loop with ordered clause with
a parameter.
* c-c++-common/gomp/doacross-2.c: New test.
* c-c++-common/gomp/sink-3.c: Expect another error during error
recovery.
From-SVN: r265335
Jonathan Wakely [Fri, 19 Oct 2018 21:50:15 +0000 (22:50 +0100)]
Skip tests for GNU extensions when testing with strict mode
Tests for the implicit allocator rebinding extension will fail if the
extension is disabled, so skip them.
* testsuite/23_containers/array/requirements/explicit_instantiation/
3.cc: Skip test when compiled with a -std=c++NN strict mode.
* testsuite/23_containers/deque/requirements/explicit_instantiation/
3.cc: Likewise.
* testsuite/23_containers/forward_list/requirements/
explicit_instantiation/3.cc: Likewise.
* testsuite/23_containers/list/requirements/explicit_instantiation/
3.cc: Likewise.
* testsuite/23_containers/map/requirements/explicit_instantiation/
3.cc: Likewise.
* testsuite/23_containers/multimap/requirements/explicit_instantiation/
3.cc: Likewise.
* testsuite/23_containers/multiset/requirements/explicit_instantiation/
3.cc: Likewise.
* testsuite/23_containers/set/requirements/explicit_instantiation/
3.cc: Likewise.
* testsuite/23_containers/unordered_map/requirements/
explicit_instantiation/3.cc: Likewise.
* testsuite/23_containers/unordered_multimap/requirements/
explicit_instantiation/3.cc: Likewise.
* testsuite/23_containers/unordered_multiset/requirements/
explicit_instantiation/3.cc: Likewise.
* testsuite/23_containers/unordered_set/requirements/
explicit_instantiation/3.cc: Likewise.
* testsuite/23_containers/vector/ext_pointer/explicit_instantiation/
3.cc: Likewise.
* testsuite/23_containers/vector/requirements/explicit_instantiation/
3.cc: Likewise.
From-SVN: r265334
Jonathan Wakely [Fri, 19 Oct 2018 21:50:03 +0000 (22:50 +0100)]
Fix testsuite failures due to extra errors in strict dialects
When __STRICT_ANSI__ is defined the incorrect allocators used in these
tests also trigger and additional static assertion. Prune those extra
errors so that the tests don't fail when built with strict dialects.
* testsuite/23_containers/deque/48101_neg.cc: Prune additional errors
printed when __STRICT_ANSI__ is defined.
* testsuite/23_containers/forward_list/48101_neg.cc: Likewise.
* testsuite/23_containers/list/48101_neg.cc: Likewise.
* testsuite/23_containers/multiset/48101_neg.cc: Likewise.
* testsuite/23_containers/set/48101_neg.cc: Likewise.
* testsuite/23_containers/unordered_multiset/48101_neg.cc: Likewise.
* testsuite/23_containers/unordered_set/48101_neg.cc: Likewise.
* testsuite/23_containers/vector/48101_neg.cc: Likewise.
From-SVN: r265333
Jonathan Wakely [Fri, 19 Oct 2018 21:49:49 +0000 (22:49 +0100)]
Conditionally disable tests of non-standard extensions
These tests include uses of the extension to allow allocators with the
wrong value_type in containers. Skip those parts of the tests when
__STRICT_ANIS__ is defined.
* testsuite/23_containers/forward_list/requirements/
explicit_instantiation/5.cc [__STRICT_ANSI__]: Don't test non-standard
extension.
* testsuite/23_containers/list/requirements/explicit_instantiation/
5.cc [__STRICT_ANSI__]: Likewise.
* testsuite/23_containers/map/requirements/explicit_instantiation/5.cc
[__STRICT_ANSI__]: Likewise.
* testsuite/23_containers/multimap/requirements/explicit_instantiation/
5.cc [__STRICT_ANSI__]: Likewise.
* testsuite/23_containers/multiset/requirements/explicit_instantiation/
5.cc [__STRICT_ANSI__]: Likewise.
* testsuite/23_containers/set/requirements/explicit_instantiation/5.cc
[__STRICT_ANSI__]: Likewise.
* testsuite/23_containers/unordered_map/requirements/debug_container.cc
[__STRICT_ANSI__]: Likewise.
* testsuite/23_containers/unordered_map/requirements/
explicit_instantiation/5.cc [__STRICT_ANSI__]: Likewise.
* testsuite/23_containers/unordered_multimap/requirements/
explicit_instantiation/5.cc [__STRICT_ANSI__]: Likewise.
* testsuite/23_containers/unordered_multiset/requirements/
explicit_instantiation/5.cc [__STRICT_ANSI__]: Likewise.
* testsuite/23_containers/unordered_set/requirements/
explicit_instantiation/5.cc [__STRICT_ANSI__]: Likewise.
From-SVN: r265332
Jonathan Wakely [Fri, 19 Oct 2018 21:49:40 +0000 (22:49 +0100)]
Fix tests that use allocators with incorrect value types
As a GNU extension we allow containers to be instantiated with
allocators that use a different value type from the container, and
automatically rebind the allocator to the correct type. This extension
is disabled in strict modes (when __STRICT_ANSI__ is defined, i.e.
-std=c++NN dialects). These testcases unintentionally rely on the
extension and so fail for strict modes.
Tests which intentionally make use of the extension will still fail in
strict dialects, but will be addressed in a later change.
* testsuite/20_util/scoped_allocator/1.cc: Use allocator with correct
value type for the container.
* testsuite/23_containers/forward_list/cons/14.cc: Likewise.
* testsuite/23_containers/map/56613.cc: Likewise.
* testsuite/23_containers/unordered_map/55043.cc: Likewise.
* testsuite/23_containers/unordered_map/allocator/copy.cc: Likewise.
* testsuite/23_containers/unordered_map/allocator/copy_assign.cc:
Likewise.
* testsuite/23_containers/unordered_map/allocator/minimal.cc:
Likewise.
* testsuite/23_containers/unordered_map/allocator/move.cc: Likewise.
* testsuite/23_containers/unordered_map/allocator/move_assign.cc:
Likewise.
* testsuite/23_containers/unordered_map/allocator/noexcept.cc:
Likewise.
* testsuite/23_containers/unordered_map/cons/81891.cc: Likewise.
* testsuite/23_containers/unordered_map/requirements/exception/
basic.cc: Likewise.
* testsuite/23_containers/unordered_map/requirements/exception/
generation_prohibited.cc: Likewise.
* testsuite/23_containers/unordered_map/requirements/exception/
propagation_consistent.cc: Likewise.
* testsuite/23_containers/unordered_multimap/55043.cc: Likewise.
* testsuite/23_containers/unordered_multimap/allocator/copy.cc:
Likewise.
* testsuite/23_containers/unordered_multimap/allocator/copy_assign.cc:
Likewise.
* testsuite/23_containers/unordered_multimap/allocator/minimal.cc:
Likewise.
* testsuite/23_containers/unordered_multimap/allocator/move.cc:
Likewise.
* testsuite/23_containers/unordered_multimap/allocator/move_assign.cc:
Likewise.
* testsuite/23_containers/unordered_multimap/allocator/noexcept.cc:
Likewise.
* testsuite/23_containers/unordered_multimap/requirements/exception/
basic.cc: Likewise.
* testsuite/23_containers/unordered_multimap/requirements/exception/
generation_prohibited.cc: Likewise.
* testsuite/23_containers/unordered_multimap/requirements/exception/
propagation_consistent.cc: Likewise.
* testsuite/23_containers/unordered_multimap/requirements/
explicit_instantiation/5.cc: Likewise.
* testsuite/ext/malloc_allocator/sanity.cc: Likewise.
From-SVN: r265331
Jonathan Wakely [Fri, 19 Oct 2018 21:49:32 +0000 (22:49 +0100)]
Disable tests that only pass for GNU dialects
The airy and hypergeometric functions are non-standard extensions and
are only defined for -std=gnu++NN dialects, not -std=c++NN ones.
* ext/special_functions/airy_ai/check_nan.cc: Skip test for
non-standard extension when a strict -std=c++NN dialect is used.
* ext/special_functions/airy_ai/check_value.cc: Likewise.
* ext/special_functions/airy_ai/compile.cc: Likewise.
* ext/special_functions/airy_bi/check_nan.cc: Likewise.
* ext/special_functions/airy_bi/check_value.cc: Likewise.
* ext/special_functions/airy_bi/compile.cc: Likewise.
* ext/special_functions/conf_hyperg/check_nan.cc: Likewise.
* ext/special_functions/conf_hyperg/check_value.cc: Likewise.
* ext/special_functions/conf_hyperg/compile.cc: Likewise.
* ext/special_functions/hyperg/check_nan.cc: Likewise.
* ext/special_functions/hyperg/check_value.cc: Likewise.
* ext/special_functions/hyperg/compile.cc: Likewise.
From-SVN: r265330
Jonathan Wakely [Fri, 19 Oct 2018 21:49:19 +0000 (22:49 +0100)]
Remove duplicate tests
These tests originally existed to check the containers in C++11 mode,
when the default was C++98 mode. Now that the default is C++14 (and we
run most tests for all modes) it serves no purpose to have two copies of
the tests when neither is explicitly using -std=gnu++98 anyway.
* testsuite/23_containers/list/requirements/explicit_instantiation/
5_c++0x.cc: Remove redundant test that is functionally identical to
the 5.cc test.
* testsuite/23_containers/map/requirements/explicit_instantiation/
5_c++0x.cc: Likewise.
* testsuite/23_containers/multimap/requirements/explicit_instantiation/
5_c++0x.cc: Likewise.
* testsuite/23_containers/multiset/requirements/explicit_instantiation/
5_c++0x.cc: Likewise.
* testsuite/23_containers/set/requirements/explicit_instantiation/
5_c++0x.cc: Likewise.
From-SVN: r265329
David Malcolm [Fri, 19 Oct 2018 19:50:02 +0000 (19:50 +0000)]
gccint.texi: add user experience guidelines
gcc/ChangeLog:
* Makefile.in (TEXI_GCCINT_FILES): Add ux.texi.
* doc/gccint.texi: Include ux.texi and use it in top-level menu.
* doc/ux.texi: New file.
From-SVN: r265322
Ian Lance Taylor [Fri, 19 Oct 2018 19:43:47 +0000 (19:43 +0000)]
compiler: don't export any functions with special names
This keeps init functions from appearing in the export data. Checking
for special names in general means that we don't need to check
specifically for nested functions or thunks, which have special names.
Reviewed-on: https://go-review.googlesource.com/c/143237
From-SVN: r265321
William Schmidt [Fri, 19 Oct 2018 18:28:11 +0000 (18:28 +0000)]
re PR tree-optimization/87473 (ICE in create_add_on_incoming_edge, at gimple-ssa-strength-reduction.c:2344)
[gcc]
2018-10-19 Bill Schmidt <wschmidt@linux.ibm.com>
PR tree-optimization/87473
* gimple-ssa-strength-reduction.c (record_phi_increments_1): For
phi arguments identical to the base expression of the phi
candidate, record a phi-adjust increment of zero minus the index
expression of the hidden basis.
(phi_incr_cost_1): For phi arguments identical to the base
expression of the phi candidate, the difference to compare against
the increment is zero minus the index expression of the hidden
basis, and there is no potential savings from replacing the (phi)
statement.
(ncd_with_phi): For phi arguments identical to the base expression
of the phi candidate, the difference to compare against the
increment is zero minus the index expression of the hidden basis.
(all_phi_incrs_profitable_1): For phi arguments identical to the
base expression of the phi candidate, the increment to be checked
for profitability is zero minus the index expression of the hidden
basis.
[gcc/testsuite]
2018-10-19 Bill Schmidt <wschmidt@linux.ibm.com>
PR tree-optimization/87473
* gcc.c-torture/compile/pr87473.c: New file.
From-SVN: r265319
Segher Boessenkool [Fri, 19 Oct 2018 15:40:57 +0000 (17:40 +0200)]
rs6000: Put CR0 first in REG_ALLOC_ORDER
IRA and LRA prefer to use CR7 (which is first in REG_ALLOC_ORDER) over
CR0, although the latter often is cheaper ("x" vs. "y" constraints).
We should figure out why this is and fix it; but until that is done,
this patch makes CR0 the first allocated register: it improves the
current code, and it is required for later patches to be effective.
(It changes two testcases to no longer look at what CR field is
allocated).
* config/rs6000/rs6000.h (REG_ALLOC_ORDER): Move 68 (that is, CR0) to
be the first CR field allocated.
gcc/testsuite/
* gcc.target/powerpc/safe-indirect-jump-2.c: Do not check assigned CR
field number.
* gcc.target/powerpc/safe-indirect-jump-3.c: Ditto.
From-SVN: r265318
Richard Biener [Fri, 19 Oct 2018 14:28:43 +0000 (14:28 +0000)]
re PR tree-optimization/87645 (gcc hangs up on vr_values::vrp_visit_assignment_or_call)
2018-10-19 Richard Biener <rguenther@suse.de>
PR middle-end/87645
* gcc.dg/torture/pr87645.c: New testcase.
From-SVN: r265317
Richard Biener [Fri, 19 Oct 2018 14:27:57 +0000 (14:27 +0000)]
re PR tree-optimization/87657 (SLP ICE in libgfortran matmul_i2_vanilla)
2018-10-19 Richard Biener <rguenther@suse.de>
PR target/87657
* config/i386/i386.c (ix86_builtin_vectorization_cost): Use
TYPE_VECTOR_SUBPARTS and avoid relying on vector mode.
* gcc.target/i386/pr87657.c: New testcase.
From-SVN: r265316
Jonathan Wakely [Fri, 19 Oct 2018 13:46:24 +0000 (14:46 +0100)]
Fix compilation error with _GLIBCXX_PARALLEL
* include/bits/regex_executor.tcc (_Backref_matcher::_M_apply): Use
_GLIBCXX_STD_A to refer to normal mode algorithms.
* testsuite/28_regex/headers/regex/parallel_mode.cc: New test.
* testsuite/28_regex/headers/regex/std_c++0x_neg.cc: Remove empty
whitespace.
From-SVN: r265314
Jonathan Wakely [Fri, 19 Oct 2018 13:37:05 +0000 (14:37 +0100)]
Fix testsuite failures in Debug Mode
This fixes the following testsuite failures on ia32 when compiled with
-D_GLIBCXX_DEBUG:
FAIL: 23_containers/map/modifiers/erase/dr130-linkage-check.cc
FAIL: 23_containers/multimap/modifiers/erase/dr130-linkage-check.cc
FAIL: 23_containers/multiset/modifiers/erase/dr130-linkage-check.cc
FAIL: 23_containers/set/modifiers/erase/dr130-linkage-check.cc
The normal mode containers already use the abi-tag to mangle these
overloads differently, but the debug mode versions weren't fixed.
* include/debug/map.h (map::erase(iterator)): Add abi-tag so that
C++11 version mangles differently from incompatible C++98 version.
* include/debug/multimap.h (multimap::erase(iterator)): Likewise.
* include/debug/multiset.h (multiset::erase(iterator))
(multiset::erase(const_iterator, const_iterator)): Likewise.
* include/debug/set.h (set::erase(iterator))
(multiset::erase(const_iterator, const_iterator)): Likewise.
From-SVN: r265313
Eric Botcazou [Fri, 19 Oct 2018 10:06:40 +0000 (10:06 +0000)]
Fix oversight in previous commit
From-SVN: r265312
H.J. Lu [Fri, 19 Oct 2018 09:13:34 +0000 (09:13 +0000)]
i386: Enable AVX512 memory broadcast for FP add
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FP add operations.
gcc/
PR target/72782
* config/i386/sse.md
(*<plusminus_insn><mode>3<mask_name>_bcst_1): New.
(*add<mode>3<mask_name>_bcst_2): Likewise.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512-binop-1.h: New file.
* gcc.target/i386/avx512-binop-2.h: Likewise.
* gcc.target/i386/avx512-binop-3.h: Likewise.
* gcc.target/i386/avx512-binop-4.h: Likewise.
* gcc.target/i386/avx512-binop-5.h: Likewise.
* gcc.target/i386/avx512-binop-6.h: Likewise.
* gcc.target/i386/avx512f-add-df-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-add-sf-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-add-sf-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-add-sf-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-add-sf-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-add-sf-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-add-sf-zmm-6.c: Likewise.
* gcc.target/i386/avx512f-sub-df-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-sub-sf-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-sub-sf-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-sub-sf-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-sub-sf-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-sub-sf-zmm-5.c: Likewise.
* gcc.target/i386/avx512vl-add-sf-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-add-sf-ymm-1.c: Likewise.
* gcc.target/i386/avx512vl-sub-sf-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-sub-sf-ymm-1.c: Likewise.
From-SVN: r265311
H.J. Lu [Fri, 19 Oct 2018 08:56:37 +0000 (08:56 +0000)]
i386: Use register_operand in AVX512 FMA with memory broadcast
Use "register_operand" in AVX512 FMA with memory broadcast when only
registers are allowed.
* config/i386/sse.md
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1):
Replace nonimmediate_operand with register_operand.
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2):
Likewise.
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3):
Likewise.
From-SVN: r265310
Ilya Leoshkevich [Fri, 19 Oct 2018 08:33:52 +0000 (08:33 +0000)]
lra: fix spill_hard_reg_in_range clobber check
FROM..TO range might contain NOTE_INSN_DELETED insns, for which the
corresponding entries in lra_insn_recog_data[] are NULLs. Example from
the problematic code from PR87596:
(note 148 154 68 7 NOTE_INSN_DELETED)
lra_insn_recog_data[] is used directly only when the insn in question
is taken from insn_bitmap, which is not the case here. In other
situations lra_get_insn_recog_data () guarded by INSN_P () or other
stricter predicate are used. So we need to do this here as well.
A tiny detail worth noting: I put the INSN_P () check before the
insn_bitmap check, because I believe that insn_bitmap can contain only
real insns anyway.
gcc/ChangeLog:
2018-10-19 Ilya Leoshkevich <iii@linux.ibm.com>
PR rtl-optimization/87596
* lra-constraints.c (spill_hard_reg_in_range): Use INSN_P () +
lra_get_insn_recog_data () instead of lra_insn_recog_data[]
for instructions in FROM..TO range.
gcc/testsuite/ChangeLog:
2018-10-19 Ilya Leoshkevich <iii@linux.ibm.com>
PR rtl-optimization/87596
* gcc.target/i386/pr87596.c: New test.
From-SVN: r265306
Eric Botcazou [Fri, 19 Oct 2018 07:17:20 +0000 (07:17 +0000)]
cfgexpand.c (expand_one_var): Use specific wording in error message for non-local frame variables.
* cfgexpand.c (expand_one_var): Use specific wording in error message
for non-local frame variables.
* stor-layout.c (layout_decl): Do not issue a warning for them.
From-SVN: r265305
Robin Dapp [Fri, 19 Oct 2018 06:25:30 +0000 (06:25 +0000)]
Reset insn priority after inc/ref replacement
This patch recomputes the insn priority when a replacement for one of its
dependent insns is applied.
gcc/ChangeLog:
* haifa-sched.c (priority): Add force_recompute parameter.
(apply_replacement): Call priority () with force_recompute = true.
(restore_pattern): Likewise.
From-SVN: r265304
GCC Administrator [Fri, 19 Oct 2018 00:17:06 +0000 (00:17 +0000)]
Daily bump.
From-SVN: r265303
Ian Lance Taylor [Thu, 18 Oct 2018 23:26:20 +0000 (23:26 +0000)]
compiler: add COMPARE_ALIASES flag for type compare and hash
Normally aliases compare as identical to the underlying type. Add a
COMPARE_ALIASES flag to let them compare (and hash) differently. This
will be used by later patches in this series.
Reviewed-on: https://go-review.googlesource.com/c/143021
From-SVN: r265297
Ian Lance Taylor [Thu, 18 Oct 2018 23:22:01 +0000 (23:22 +0000)]
compiler: list indirect imports separately in export data
Previously when export data referred to a type that was not defined in
a directly imported package, we would write the package name as
additional information in the type's export data. That approach
required all type information to be read in order. This patch changes
the compiler to find all references to indirectly imported packages,
and write them out as an indirectimport line in the import data. This
will permit us to read exported type data out of order.
The type traversal used to find indirect imports is a little more
complicated than necessary in preparation for later patches in this
series.
Reviewed-on: https://go-review.googlesource.com/c/143020
From-SVN: r265296
Ian Lance Taylor [Thu, 18 Oct 2018 23:05:32 +0000 (23:05 +0000)]
Remove ChangeLog entry for changes in gofrontend that were reverted.
From-SVN: r265295
Ian Lance Taylor [Thu, 18 Oct 2018 23:02:27 +0000 (23:02 +0000)]
Revert SVN revision 264561, incorrectly committed directly to the GCC
repo rather than to the master repo.
From-SVN: r265294
Ian Lance Taylor [Thu, 18 Oct 2018 22:55:34 +0000 (22:55 +0000)]
compiler: rewrite Type::are_identical to use flags
A single flags parameter replaces the Cmp_tags and errors_are_identical
parameters. The existing behavior is unchanged.
This is a simplification step for future work that will add a new flag.
Reviewed-on: https://go-review.googlesource.com/c/143019
From-SVN: r265293
H.J. Lu [Thu, 18 Oct 2018 21:29:55 +0000 (21:29 +0000)]
Limit mask of vec_merge to HOST_BITS_PER_WIDE_INT
Since mask of vec_merge is in HOST_WIDE_INT, HOST_BITS_PER_WIDE_INT is
the maximum number of vector elements.
* simplify-rtx.c (simplify_subreg): Limit mask of vec_merge to
HOST_BITS_PER_WIDE_INT.
(test_vector_ops_duplicate): Likewise.
From-SVN: r265290
H.J. Lu [Thu, 18 Oct 2018 20:38:41 +0000 (20:38 +0000)]
i386: Enable AVX512 memory broadcast for FMA
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FMA operations.
gcc/
PR target/72782
* config/i386/sse.md (VF_AVX512): New.
(avx512bcst): Likewise.
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1):
Likewise.
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2):
Likewise.
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3):
Likewise.
gcc/testsuite/
PR target/72782
* gcc.target/i386/avx512-fma-1.h: New file.
* gcc.target/i386/avx512-fma-2.h: Likewise.
* gcc.target/i386/avx512-fma-3.h: Likewise.
* gcc.target/i386/avx512-fma-4.h: Likewise.
* gcc.target/i386/avx512-fma-5.h: Likewise.
* gcc.target/i386/avx512-fma-6.h: Likewise.
* gcc.target/i386/avx512-fma-7.h: Likewise.
* gcc.target/i386/avx512-fma-8.h: Likewise.
* gcc.target/i386/avx512f-fmadd-df-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-fmadd-sf-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-fmadd-sf-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-fmadd-sf-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-fmadd-sf-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-fmadd-sf-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-fmadd-sf-zmm-6.c: Likewise.
* gcc.target/i386/avx512f-fmadd-sf-zmm-7.c: Likewise.
* gcc.target/i386/avx512f-fmadd-sf-zmm-8.c: Likewise.
* gcc.target/i386/avx512vl-fmadd-sf-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-fmadd-sf-ymm-1.c: Likewise.
From-SVN: r265288
Jonathan Wakely [Thu, 18 Oct 2018 20:04:55 +0000 (21:04 +0100)]
Fix tests that fail when built with different options
* testsuite/20_util/duration/cons/2.cc: Add -ffloat-store to fix
failure when compiled without optimisation.
* testsuite/ext/profile/mutex_extensions_neg.cc: Prune additional
errors caused by C++17 std::pmr alias templates.
From-SVN: r265287
Jonathan Wakely [Thu, 18 Oct 2018 19:57:25 +0000 (20:57 +0100)]
PR libstdc++/87642 handle multibyte thousands separators from libc
If a locale's THOUSANDS_SEP or MON_THOUSANDS_SEP string is not a
single character we either need to narrow it to a single char or
ignore it (and therefore disable digit grouping for that facet).
PR libstdc++/87642
* config/locale/gnu/monetary_members.cc
(moneypunct<char, true>::_M_initialize_moneypunct): Use
__narrow_multibyte_chars to convert multibyte thousands separators
to a single char.
* config/locale/gnu/numeric_members.cc
(numpunct<char>::_M_initialize_numpunct): Likewise.
(__narrow_multibyte_chars): New function.
From-SVN: r265286
Ian Lance Taylor [Thu, 18 Oct 2018 19:35:46 +0000 (19:35 +0000)]
compiler: drop semicolons in export data
The export data, which is approximately readable and looks something
like Go, was first implemented back when Go still used semicolons.
Drop the semicolons, to make it look slightly more Go like and make it
slightly smaller.
This updates the compiler and the gccgoimporter package.
This introduces a new version of the export data. There are going to
be more changes to the export data, so this version is still subject
to change.
Reviewed-on: https://go-review.googlesource.com/c/143018
From-SVN: r265284
Tobias Burnus [Thu, 18 Oct 2018 19:35:34 +0000 (21:35 +0200)]
Fix (re)alloc of polymorphic arrays
PR fortran/87625
* trans-array.c (gfc_is_reallocatable_lhs): Detect allocatable
polymorphic arrays.
PR fortran/87625
* gfortran.dg/realloc_on_assign_31.f90: New file.
From-SVN: r265283
Paul Koning [Thu, 18 Oct 2018 18:01:15 +0000 (14:01 -0400)]
udivmodsi4.c (__udivmodsi4): Rename to conform to coding standard.
* udivmodsi4.c (__udivmodsi4): Rename to conform to coding
standard.
* divmod.c: Update references to __udivmodsi4.
* udivmod.c: Ditto.
* udivhi3.c: New file.
* udivmodhi4.c: New file.
* config/pdp11/t-pdp11 (LIB2ADD): Add the new files.
From-SVN: r265277
Jonathan Wakely [Thu, 18 Oct 2018 17:43:00 +0000 (18:43 +0100)]
Improve -dumpversion and -dumpfullversion documentation
* doc/invoke.texi (-dumpversion): Improve grammar.
(-dumpfullversion): Make more consistent with -dumpversion.
From-SVN: r265276
Uros Bizjak [Thu, 18 Oct 2018 16:49:20 +0000 (18:49 +0200)]
i386.c (ix86_emit_fp_unordered_jump): Set JUMP_LABEL to the jump insn.
* config/i386/i386.c (ix86_emit_fp_unordered_jump):
Set JUMP_LABEL to the jump insn.
(ix86_emit_i387_log1p): Use ix86_expand_branch to expand branch.
Predict emitted jump and add label to jump insn.
From-SVN: r265274
David Malcolm [Thu, 18 Oct 2018 16:09:56 +0000 (16:09 +0000)]
Fix missing entry to gcc/ada/ChangeLog for r265240
From-SVN: r265272
David Malcolm [Thu, 18 Oct 2018 15:44:39 +0000 (15:44 +0000)]
Fix ICE in substring-handling building 502.gcc_r (PR 87562)
In r264887 I broke the build of 502.gcc_r due to an ICE.
The ICE occurs when generating a location for an sprintf warning within
a string literal, where the sprintf call is in a macro.
The root cause is a bug in the original commit of substring locations
(r239175). get_substring_ranges_for_loc has code to handle the case
where the string literal is in a very long source line that exceeds the
length that the current linemap can represent: the start of the token
is in one line map, but then another line map is started, and the end
of the token is in the new linemap. get_substring_ranges_for_loc handles
this by using the linemap of the end-point when building location_t
values within the string. When extracting the linemap for the endpoint
in r239175 I erroneously used LRK_MACRO_EXPANSION_POINT, which should
have instead been LRK_SPELLING_LOCATION.
I believe this bug was dormant due to rejecting macro locations earlier
in the function, but in r264887 I allowed some macro locations in order
to deal with locations coming from the C++ lexer, and this uncovered
the bug: if a string literal was defined in a macro, locations within
the string literal would be looked up using the linemap of the expansion
point of the macro, rather than of the spelling point. This would lead
to garbage location_t values, and, depending on the precise line numbers
of the two locations, an assertion failure (which was causing the build
failure in 502.gcc_r).
This patch fixes the bug by using LRK_SPELLING_LOCATION, and adds some
bulletproofing to the "two linemaps" case.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu
(g++.sum gained 5 PASS results; gcc.sum gained 3 PASS results).
I also verified that this fixes the build of 502.gcc_r.
gcc/ChangeLog:
PR tree-optimization/87562
* input.c (get_substring_ranges_for_loc): Use
LRK_SPELLING_LOCATION rather than LRK_MACRO_EXPANSION_POINT when
getting the linemap for the endpoint. Verify that it's either
in the same linemap as the start point's spelling location, or
at least in the same file.
gcc/testsuite/ChangeLog:
PR tree-optimization/87562
* c-c++-common/substring-location-PR-87562-1-a.h: New file.
* c-c++-common/substring-location-PR-87562-1-b.h: New file.
* c-c++-common/substring-location-PR-87562-1.c: New test.
* gcc.dg/plugin/diagnostic-test-string-literals-1.c: Add test for
PR 87562.
* gcc.dg/plugin/pr87562-a.h: New file.
* gcc.dg/plugin/pr87562-b.h: New file.
From-SVN: r265271
Jonathan Wakely [Thu, 18 Oct 2018 15:38:50 +0000 (16:38 +0100)]
PR libstdc++/87641 correctly initialize accumulator in valarray::sum()
Use the value of the first element as the initial value of the
__valarray_sum accumulator. Value-initialization might not create the
additive identity for the value type.
Make a similar change to __valarray_product even though it's only ever
used internally with a value_type of size_t.
PR libstdc++/87641
* include/bits/valarray_array.h (__valarray_sum): Use first element
to initialize accumulator instead of value-initializing it.
(__valarray_product<_Tp>): Move to ...
* src/c++98/valarray.cc (__valarray_product<_Tp>): Here. Use first
element to initialize accumulator.
(__valarray_product(const valarray<size_t>&)): Remove const_cast made
unnecessary by LWG 389.
* testsuite/26_numerics/valarray/87641.cc: New test.
From-SVN: r265270
Richard Biener [Thu, 18 Oct 2018 14:31:29 +0000 (14:31 +0000)]
i386.c (ix86_builtin_vectorization_cost): Do not feed width-specific load/store costs through ix86_vec_cost.
2018-10-18 Richard Biener <rguenther@suse.de>
* config/i386/i386.c (ix86_builtin_vectorization_cost): Do not
feed width-specific load/store costs through ix86_vec_cost.
* config/i386/x86-tune-costs.h (athlon_cost): Adjust.
(k8_cost): Likewise.
(bdver_cost): Likewise.
(znver1_cost): Likewise.
(btver1_cost): Likewise.
(btver2_cost): Likewise.
From-SVN: r265268
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