LiDongjin [Tue, 18 Oct 2022 15:28:34 +0000 (23:28 +0800)]
[LoopVectorize] Fix crash on "Cannot dereference end iterator!"(PR56627)
Check hasOneUser before user_back().
Differential Revision: https://reviews.llvm.org/D136227
Nikita Popov [Thu, 3 Nov 2022 09:54:16 +0000 (10:54 +0100)]
[InstCombine] Perform memset -> load forwarding
InstCombine does some basic store to load forwarding. One case it
currently misses is the case where the store is actually a memset.
This patch adds support for this case. This is a minimal
implementation that only handles a load at the memset base address,
without an offset.
GVN is already capable of performing this optimization. Having it
in InstCombine can help with phase ordering issues, similar to the
existing store to load forwarding.
Differential Revision: https://reviews.llvm.org/D137323
Nikita Popov [Thu, 3 Nov 2022 14:46:23 +0000 (15:46 +0100)]
[SimplifyCFG] Add tests for block speculation with assumes (NFC)
zhijian [Thu, 3 Nov 2022 14:36:44 +0000 (10:36 -0400)]
[XCOFF] change the decoding of External symbol's function auxiliary entry in XCOFF32 for llvm-readobj
Summary:
llvm-readobj decide whether to decode the external symbol's function auxiliary entry based on whether symbol is function or not currently. But the XCOFFSymbolRef::isFunction() do not work properly when -ffunction-sections is enabled. we will not decode the function auxiliary entry based on the XCOFFSymbolRef::isFunction()
we will decode the function auxiliary entry based on following:
According to the https://www.ibm.com/docs/en/aix/7.2?topic=formats-xcoff-object-file-format#XCOFF__c0f91ad419jbau
In XCOFF32, there are only "one csect Auxiliary Entry" and "a function auxiliary symbol table entry" for the C_EXT, C_WEAKEXT, and C_HIDEXT Symbols. and By convention, the csect auxiliary entry in an XCOFF32 file must be the last auxiliary entry for any external symbol that has more than one auxiliary entry( that means for the C_EXT, C_WEAKEXT, and C_HIDEXT Symbols. if there more than one auxiliary Entries. we look the last one as csect auxiliary entry. and others auxiliary entries as function entries).
Reviewers: Hubert Tong, James Henderson
Differential Revision: https://reviews.llvm.org/D136950
Nikita Popov [Wed, 2 Nov 2022 10:25:42 +0000 (11:25 +0100)]
[CVP] Simplify comparisons without constant operand
CVP currently only tries to simplify comparisons if there is a
constant operand. However, even if both are non-constant, we may
be able to determine the result of the comparison based on range
information.
IPSCCP is already capable of doing this, but because it runs very
early, it may miss some cases.
Differential Revision: https://reviews.llvm.org/D137253
bipmis [Thu, 3 Nov 2022 14:32:07 +0000 (14:32 +0000)]
[AggressiveInstCombine] Avoid load merge/widen if stores are present b/w loads
This patch is to address the test cases in which the load has to be inserted at a right point. This happens when there is a store b/w the loads.
This patch reverts the loads merge in all cases when stores are present b/w loads and will eventually be replaced with proper fix and test cases.
Differential Revision: https://reviews.llvm.org/D137333
Jan Sjodin [Wed, 2 Nov 2022 14:18:48 +0000 (10:18 -0400)]
[OpenMP][OMPIRBuilder] Migrate createOffloadEntriesAndInfoMetadata from clang to OpenMPIRBuilder
This patch moves the createOffloadEntriesAndInfoMetadata to OpenMPIRBuilder,
the createOffloadEntry helper function. The clang specific error handling is
invoked using a callback. This code will also be used by flang in the future.
Aaron Ballman [Thu, 3 Nov 2022 14:14:30 +0000 (10:14 -0400)]
Silence a "not all control paths return" MSVC warning; NFC
Nikita Popov [Thu, 3 Nov 2022 12:16:24 +0000 (13:16 +0100)]
[SimplifyCFG] Use range based for loop (NFC)
Stefan Gränitz [Thu, 3 Nov 2022 14:02:11 +0000 (15:02 +0100)]
[JITLink] Fix check-line in Windows X86 COFF COMDAT test
This test caught my attention because it's the only one in JITLink that XFAILs. Running it in isolation showed that the output doesn't meet the CHECK-LINES, i.e. the block address didn't match:
```
error: CHECK-NEXT: expected string not found in input
CHECK-NEXT: block 0xfff02000 size = 0x00000001, align = 16, alignment-offset = 0
<stdin>:22:2: note: possible intended match here
block 0xfff01000 size = 0x00000001, align = 16, alignment-offset = 0
```
Though, that doesn't appear to be the reason the test XFAILs. What we really want to check here is that llvm-jitlink doesn't fail with a duplicate section error yet.
In order to avoid issues like this in the future we can match a placeholder to check for some valid address within the slab (64Kb == last 4 digits).
The patch also drops the duplicate -noexec argument, removes an empty RUN-line, fixes indentation and adds a newline at EOF.
Reviewed By: sunho
Differential Revision: https://reviews.llvm.org/D137148
OCHyams [Thu, 3 Nov 2022 13:46:00 +0000 (13:46 +0000)]
Revert "[Assignment Tracking][3/*] Add DIAssignID metadata boilerplate"
This reverts commit
c285df77e9b78f971f9cd9d025248c20b030cc2a.
A sanitizer bot found an issue:
https://lab.llvm.org/buildbot/#/builders/5/builds/28809/steps/13/logs/stdio
Michael Buch [Wed, 2 Nov 2022 17:18:57 +0000 (10:18 -0700)]
[lldb][Test] Make TestFrameFormatNameWithArgs.test more compatible across platforms
On Linux the `std::function` behaved differently to that on Darwin.
This patch removes usage of `std::function` in the test but attempts
to retain the test-coverage. We mainly want function types appearing
in the template argument and function argument lists.
Also add a `char const*` overload to one of the test functions to
cover the "format function argument using ValueObject formatter" code-path.
Differential Revision: https://reviews.llvm.org/D137272
Stefan Pintilie [Wed, 2 Nov 2022 14:55:54 +0000 (09:55 -0500)]
[PowerPC] Add new DMR register classes to Future CPU.
A new register class as well as a number of related subregisters are being added
to Future CPU. These registers are Dense Math Registers (DMR) and are 1024 bits
long. These regsiters can also be used in consecutive pairs which leads to a
register that is 2048 bits.
This patch also adds 7 new instructions that use these registers. More
instructions will be added in future patches.
Reviewed By: amyk, saghir
Differential Revision: https://reviews.llvm.org/D136366
Nikita Popov [Thu, 3 Nov 2022 12:08:14 +0000 (13:08 +0100)]
[SimplifyCFG] Extract code for tracking ephemeral values (NFC)
To allow reusing this in more places in SimplifyCFG.
Haojian Wu [Thu, 3 Nov 2022 12:57:46 +0000 (13:57 +0100)]
Remove an unused local variable, NFC.
Alexey Bataev [Thu, 3 Nov 2022 12:30:41 +0000 (05:30 -0700)]
[SLP]Fix write after bounds.
Need to use comma instead of + symbol to prevent writing after bounds.
Alexey Bataev [Wed, 2 Nov 2022 21:29:24 +0000 (14:29 -0700)]
[SLP][NFC]Formatting and reduce number of iterations, NFC.
Aaron Ballman [Thu, 3 Nov 2022 12:27:56 +0000 (08:27 -0400)]
[C++20] Diagnose invalid and reserved module names
[module.unit]p1 specifies that module and import are invalid components
of a module name, that module names cannot contain reserved
identifiers, and that std followed by zero or more digits is reserved.
The first issue (module and import pseudo-keywords) requires a
diagnostic, the second issue (use of reserved identifiers) does not
require a diagnostic. We diagnose both the same -- the code is ill-
formed unless the module declaration is in a system "header". This
allows STL implementations to use the reserved module names while
preventing users from stealing them out from under us.
Differential Revision: https://reviews.llvm.org/D136953
bipmis [Thu, 3 Nov 2022 12:28:24 +0000 (12:28 +0000)]
Add another test which breaks the load insert point
Corentin Jabot [Tue, 1 Nov 2022 16:37:06 +0000 (17:37 +0100)]
[Clang] Implement CWG2358 Explicit capture of value
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D137172
Florian Hahn [Thu, 3 Nov 2022 12:20:23 +0000 (12:20 +0000)]
[ConstraintElim] Use ConstantInt::getTrue to create constants (NFC).
Use existing ConstantInt::getTrue/getFalse functionality instead of
custom getScalarConstOrSplat as suggested by @nikic.
Mats Petersson [Fri, 2 Sep 2022 09:18:12 +0000 (10:18 +0100)]
[Flang][Driver]Add datalayout before doing LLVM-IR transformation
The earlier available datalyaout allows MLIR to LLVM-IR transformation
to use the datalayout for decisions, such as comparing sizes for
different types of integers.
This should solve https://github.com/llvm/llvm-project/issues/57230
Reviewed By: awarzynski, vzakhari
Differential Revision: https://reviews.llvm.org/D133568
Yusuke Kadowaki [Thu, 3 Nov 2022 12:10:48 +0000 (13:10 +0100)]
[clang-format][NFC] Fix document of AlignTrailingComments
The documentation of the patch https://reviews.llvm.org/D132131 looks
disorganized on the website
https://clang.llvm.org/docs/ClangFormatStyleOptions.html.
This patch tries to fix that.
Differential Revision: https://reviews.llvm.org/D137075
Björn Schäpers [Mon, 24 Oct 2022 19:21:31 +0000 (21:21 +0200)]
[clang-format] Don't misannotate in CTor init list
They were annotated with TrailingAnnotation, which they are not. And
that resulted in some quirky formatting in some cases.
Differential Revision: https://reviews.llvm.org/D136635
Björn Schäpers [Thu, 13 Oct 2022 21:19:16 +0000 (23:19 +0200)]
[clang-format] Fix lambda formatting in conditional
Without the patch UnwrappedLineFormatter::analyzeSolutionSpace just ran
out of possible formattings and would put everything just on one line.
The problem was that the the line break was forbidden, but putting the
conditional colon on the same line is also forbidden.
Differential Revision: https://reviews.llvm.org/D135918
OCHyams [Thu, 3 Nov 2022 09:50:31 +0000 (09:50 +0000)]
[Assignment Tracking][3/*] Add DIAssignID metadata boilerplate
The Assignment Tracking debug-info feature is outlined in this RFC:
https://discourse.llvm.org/t/
rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir
Add the DIAssignID metadata attachment boilerplate. Includes a textual-bitcode
roundtrip test and tests that the verifier and parser catch badly formed IR.
This piece of metadata links together stores (used as an attachment) and the
yet-to-be-added llvm.dbg.assign debug intrinsic (used as an operand).
Reviewed By: jmorse
Differential Revision: https://reviews.llvm.org/D132222
Valery Pykhtin [Thu, 27 Oct 2022 12:38:00 +0000 (14:38 +0200)]
[AMDGPU] Fix GCNDownwardRPTracker::advanceBeforeNext at the end of MBB
The problem with GCNDownwardRPTracker::advanceBeforeNext is that it doesn't allow to get register pressure
after the last instruction in a MBB.
However when we track RP through the boundary of a MBB we need the state that is after the last instruction
of the MBB and before the first instruction of the successor MBB. Currently we stop traking RP in the state
'at' the last instruction of the MBB which is incorrect.
This patch fixes 27 lit tests with EXPENSIVE_CHECKS enabled.
Reviewed By: rampitec, arsenm
Differential Revision: https://reviews.llvm.org/D136927
Tom Eccles [Mon, 17 Oct 2022 17:16:24 +0000 (17:16 +0000)]
[flang] Add -f[no-]honor-infinities and -menable-no-infs
Only add the option processing and store the result. No attributes are
added to FIR yet.
This patch follows Clang in forwarding -fno-honor-infinities as
-menable-no-infs.
Reviewed By: kiranchandramohan awarzynski vzakhari
Differential Revision: https://reviews.llvm.org/D137072
Nikita Popov [Thu, 3 Nov 2022 09:55:30 +0000 (10:55 +0100)]
[InstCombine] Add more memset->load forwarding tests (NFC)
Simi Pallipurath [Fri, 28 Oct 2022 15:06:00 +0000 (16:06 +0100)]
[AArch64] Add support for the Cortex-A715 CPU
Cortex-A715 is an Armv9-A AArch64 CPU.
This patch introduces support for Cortex-A715.
Technical Reference Manual: https://developer.arm.com/documentation/101590/latest.
Reviewed By: vhscampos
Differential Revision: https://reviews.llvm.org/D136957
Nikita Popov [Thu, 3 Nov 2022 09:20:38 +0000 (10:20 +0100)]
[InstCombine] Add tests for memset -> load forward with offset (NFC)
Nikita Popov [Thu, 3 Nov 2022 09:15:10 +0000 (10:15 +0100)]
[InstCombine] Add tests for memset -> load forwarding (NFC)
We currently only forward store -> load, but could do the same
for memset as well.
Nikita Popov [Thu, 3 Nov 2022 08:56:29 +0000 (09:56 +0100)]
[CVP] Add vector icmp test (NFC)
Caroline Concatto [Thu, 3 Nov 2022 08:30:09 +0000 (08:30 +0000)]
[AArch64] SME2 -Fix failing buildbots because of warning
This patch is to solve this:
https://lab.llvm.org/buildbot#builders/36/builds/26801
Created by this patch:
a20112a74cb34f
[AArch64]SME2 instructions that use ZTO operand
Kristina Bessonova [Thu, 3 Nov 2022 08:27:10 +0000 (10:27 +0200)]
[DebugInfo][Metadata] Make AllEnumTypes holding TrackingMDNodeRef
Having AllEnumtypes to be a vector of TrackingMDNodeRef makes it possible
to reflect changes in metadata in the vector if they took place before DIBuilder
being finalized.
Otherwise, we end up with heap-use-after-free because AllEnumTypes contains
metadata that no longer valid.
Consider a case where we have a class containing a definition of a enum,
so this enum has the class as a scope. For some reason (doesn't matter for
the current issue), we create a temporary debug metadata for this class, and
then resolve it while finalizing CGDebugInfo.
In the case of collision during uniqifying the temporary, we then need
to replace its uses with a new pointer. If a temporary's user is unique
(this is the enum mentioned above), we may need re-uniquefying it,
which may return a new pointer in the case of another collision.
If so, the pointer we stored in AllEnumTypes vector become dangling.
Making AllEnumTypes hodling TrackingMDNodeRef should solve this problem
(see debug-info-enum-metadata-collision.cpp test for details).
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D137067
Jannik Silvanus [Wed, 2 Nov 2022 15:51:01 +0000 (16:51 +0100)]
[llvm-diff] Precommit: Add loop test case with forward reference
Diffing phi nodes was recently added to llvm-diff.
However, there currently is a limitation where equivalent values
cannot be detected as such, leading to false positive diff reports.
If a phi node refers a value defined in a basic block dominated by
the current basic block, for example a phi node in a loop header referring
a value defined in the loop body, we cannot prove equivalence of the referred
values, because the basic block containing the variable definition has
not yet been processed.
This commit adds a test case showing this behavior, serving as a precommit
for an upcoming fix of the above.
Differential Revision: https://reviews.llvm.org/D137262
Pierre van Houtryve [Fri, 21 Oct 2022 11:23:55 +0000 (11:23 +0000)]
[GISel] Add (fsub +-0.0, X) -> fneg combine
Allows for better matching of VOP3 mods.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D136442
Peter Waller [Thu, 3 Nov 2022 07:56:03 +0000 (07:56 +0000)]
Revert "[InstCombine] Remove redundant splats in InstCombineVectorOps"
This reverts commit
957eed0b1af2cb88edafe1ff2643a38165c67a40.
Peter Waller [Wed, 2 Nov 2022 10:19:34 +0000 (10:19 +0000)]
[AArch64] Install arm_neon_sve_bridge.h
arm_neon_sve_bridge.h is not generated, so the rules which ensure the
generated files get copied into the installation prefix don't apply to
this one.
Add it to the aarch64_only_files set instead, which ensures it ends up
both in the build directory and the installation directory.
Tested with build targets `clang-resource-headers` and
`install-clang-resource-headers`.
Differential Revision: https://reviews.llvm.org/D137239
Serge Pavlov [Thu, 3 Nov 2022 05:26:49 +0000 (12:26 +0700)]
[Clang] Check for response file existence prior to check for recursion
As now errors in file operation are handled, check for file existence
must be done prior to check for recursion, otherwise reported errors are
misleading.
Differential Revision: https://reviews.llvm.org/D136090
Caroline Concatto [Fri, 28 Oct 2022 14:51:20 +0000 (15:51 +0100)]
[AArch64]SME2 instructions that use ZTO operand
This patch adds the assembly/disassembly for the following instructions:
ZERO (ZT0): Zero ZT0.
LDR (ZT0): Load ZT0 register.
STR (ZT0): Store ZT0 register.
MOVT (scalar to ZT0): Move 8 bytes from general-purpose register to ZT0.
(ZT0 to scalar): Move 8 bytes from ZT0 to general-purpose register.
Consecutive:
LUTI2 (single): Lookup table read with 2-bit indexes.
(two registers): Lookup table read with 2-bit indexes.
(four registers): Lookup table read with 2-bit indexes.
LUTI4 (single): Lookup table read with 4-bit indexes.
(two registers): Lookup table read with 4-bit indexes.
(four registers): Lookup table read with 4-bit indexes.
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09
This patch also adds a new register class and operand for zt0
and a another index operand uimm3s8
Differential Revision: https://reviews.llvm.org/D136088
Adrian Kuegel [Thu, 3 Nov 2022 07:12:19 +0000 (08:12 +0100)]
[mlir][Bazel] Add mlir-translate as data for dialect tests.
Ye Luo [Thu, 3 Nov 2022 05:01:51 +0000 (00:01 -0500)]
Revert "[AAPointerInfo] refactor how offsets and Access objects are tracked"
This reverts commit
b756096b0cbef0918394851644649b3c28a886e2.
See regression https://github.com/llvm/llvm-project/issues/58774
Slava Zakharin [Tue, 1 Nov 2022 22:12:43 +0000 (15:12 -0700)]
[NFC][flang] Lowering options clean-up.
This change-set defines the LoweringOptions the same way
other options are defined in Flang.
Differential Revision: https://reviews.llvm.org/D137207
wanglei [Thu, 3 Nov 2022 03:10:41 +0000 (11:10 +0800)]
[LoongArch] Fix codegen for [su]itofp instructions
This patch fixes codegen for `[su]itofp` instructions.
In LoongArch, a legal int-to-float conversion is done in two steps:
1. Move the data from `GPR` to `FPR`. (FRLen >= GRLen)
2. Conversion in `FPR`. (the data in `FPR` is treated as a signed value)
Based on the above features, when the type's BitWidth meets the
requirements, all `SINT_TO_FP` are legal, all `UINT_TO_FP` are expand
and lowered to libcall when appropriate.
The only special case is, LoongArch64 with `+f,-d` features. At this
point, custom processing is required for `[SU]INT_TO_FP`. Of course, we
can also ignore it and use libcall directly.
Differential Revision: https://reviews.llvm.org/D136916
Phoebe Wang [Thu, 3 Nov 2022 02:39:31 +0000 (10:39 +0800)]
[X86] Remove `IntrArgMemOnly` from cmpccxadd intrinsics
CMPSXADD will modify memory, so we can't use `IntrArgMemOnly` here.
Found it during review D137250.
Xi Ruoyao [Thu, 3 Nov 2022 03:07:53 +0000 (11:07 +0800)]
[sanitizer] Fix vfork interception on loongarch64
Fix a brown paper bag error made by me in D129418. I didn't set
ASAN_INTERCEPT_VFORK correctly for loongarch64, but created an all-zero
object for __interception::real_vfork. This caused anything calling
vfork() to die instantly.
Fix this issue by setting ASAN_INTERCEPT_VFORK and remove the bad
all-zero definition. Other ports have an all-zero common definition but
we don't need it at least for now.
And, enable ASAN vfork test for loongarch64 to prevent regression in the
future.
Differential Revision: https://reviews.llvm.org/D137160
Youling Tang [Thu, 3 Nov 2022 03:03:37 +0000 (11:03 +0800)]
[asan] Use proper shadow offset for loongarch64 in instrumentation passes
Instrumentation passes now use the proper shadow offset. There will be many
asan test failures without this patch. For example:
```
$ ./lib/asan/tests/LOONGARCH64LinuxConfig/Asan-loongarch64-calls-Test
AddressSanitizer:DEADLYSIGNAL
=================================================================
==651209==ERROR: AddressSanitizer: SEGV on unknown address 0x1ffffe2dfa9b (pc 0x5555585e151c bp 0x7ffffb9ec070 sp 0x7ffffb9ebfd0 T0)
==651209==The signal is caused by a UNKNOWN memory access.
```
Before the patch:
```
$ make check-asan
Testing Time: 36.13s
Unsupported : 205
Passed : 83
Expectedly Failed: 1
Failed : 239
```
After the patch:
```
$ make check-asan
Testing Time: 58.98s
Unsupported : 205
Passed : 421
Expectedly Failed: 1
Failed : 89
```
Differential Revision: https://reviews.llvm.org/D137013
Fangrui Song [Thu, 3 Nov 2022 02:21:33 +0000 (19:21 -0700)]
[asan] Default to -fsanitize-address-use-odr-indicator for non-Windows
This enables odr indicators on all platforms and private aliases on non-Windows.
Note that GCC also uses private aliases: this fixes bogus
`The following global variable is not properly aligned.` errors for interposed global variables
Fix https://github.com/google/sanitizers/issues/398
Fix https://github.com/google/sanitizers/issues/1017
Fix https://github.com/llvm/llvm-project/issues/36893 (we can restore D46665)
Global variables of non-hasExactDefinition() linkages (i.e.
linkonce/linkonce_odr/weak/weak_odr/common/external_weak) are not instrumented.
If an instrumented variable gets interposed to an uninstrumented variable due to
symbol interposition (e.g. in issue 36893, _ZTS1A in foo.so is resolved to _ZTS1A in
the executable), there may be a bogus error.
With private aliases, the register code will not resolve to a definition in
another module, and thus prevent the issue.
Cons: minor size increase. This is mainly due to extra `__odr_asan_gen_*` symbols.
(ELF) In addition, in relocatable files private aliases replace some relocations
referencing global symbols with .L symbols and may introduce some STT_SECTION symbols.
For lld, with -g0, the size increase is 0.07~0.09% for many configurations I
have tested: -O0, -O1, -O2, -O3, -O2 -ffunction-sections -fdata-sections
-Wl,--gc-sections. With -g1 or above, the size increase ratio will be even smaller.
This patch obsoletes D92078.
Don't migrate Windows for now: the static data member of a specialization
`std::num_put<char>::id` is a weak symbol, as well as its ODR indicator.
Unfortunately, link.exe (and lld without -lldmingw) generally doesn't support
duplicate weak definitions (weak symbols in different TUs likely pick different
defined external symbols and conflict).
Differential Revision: https://reviews.llvm.org/D137227
Peixin-Qiao [Thu, 3 Nov 2022 01:00:52 +0000 (09:00 +0800)]
[flang][RFC] Add lowering design for procdure pointers
This document aims to give insights at the representation of procdure
pointers in FIR.
Reviewed By: PeteSteinfeld, jeanPerier, kiranchandramohan
Differential Revision: https://reviews.llvm.org/D136840
Matt Arsenault [Wed, 2 Nov 2022 23:13:12 +0000 (16:13 -0700)]
LangRef: Fix typo in backtick placement
Alex Brachet [Thu, 3 Nov 2022 00:12:10 +0000 (00:12 +0000)]
[Driver] Don't preprocess source files when reproducing linker crashes
It's not necessary to redo the source file preprocessing for reproducing linker
crashes because we must have successfully created the object file by this point.
Skip this step, and also don't report the preprocessed source file or create
the clang invocation shell script. The latter is no longer sensible without the
preprocessed source, or helpful given the linker reproducer will have it's own
shell script.
Differential Revision: https://reviews.llvm.org/D137289
Florian Hahn [Wed, 2 Nov 2022 23:57:06 +0000 (23:57 +0000)]
[ConstraintElimination] Skip compares with scalable vector types.
Materializing scalable vectors with boolean values is not implemented
yet. Skip those cases for now and leave a TODO.
Yuanfang Chen [Wed, 2 Nov 2022 18:54:19 +0000 (11:54 -0700)]
[Clang] follow-up D128745, remove ClangABICompat checks
Per discussions in D128745, remove ClangABICompat checks for implementations
of DR692/DR1395/DR1432. This is a potentially breaking changes, so the release
note is updated accordingly.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D136120
Matt Arsenault [Sat, 29 Oct 2022 19:52:24 +0000 (12:52 -0700)]
SPARC: Register null target streamer
Fixes null dereference in emitFunctionBodyStart for 64-bit
Matt Arsenault [Wed, 2 Nov 2022 21:29:14 +0000 (14:29 -0700)]
WebAssembly: Remove unnecessary set check
The empty set will be default constructed if this wasn't
in the map already.
Matt Arsenault [Wed, 2 Nov 2022 20:44:57 +0000 (13:44 -0700)]
WebAssembly: Move exception handling code together
Matt Arsenault [Wed, 2 Nov 2022 20:17:30 +0000 (13:17 -0700)]
FunctionLoweringInfo: Use TLI member instead of finding it
electriclilies [Wed, 2 Nov 2022 22:56:28 +0000 (15:56 -0700)]
[mlir] Add call_intrinsic op to LLVMIIR
The call_intrinsic op allows us to call LLVM intrinsics from the LLVMDialect without implementing a new op every time.
Reviewed By: lattner, rriddle
Differential Revision: https://reviews.llvm.org/D137187
Siva Chandra Reddy [Wed, 2 Nov 2022 20:19:04 +0000 (20:19 +0000)]
[libc] Add implementation of ungetc.
A bug in the file read logic has also been fixed along the way. Parts
of the ungetc tests will fail without that bug fixed.
Reviewed By: michaelrj
Differential Revision: https://reviews.llvm.org/D137286
David Green [Wed, 2 Nov 2022 22:34:05 +0000 (22:34 +0000)]
[ARM] Fix vector ule zero lowering
The instruction icmp ule <4 x i32> %0, zeroinitializer will usually be
simplified to icmp eq <4 x i32> %0, zeroinitializer. It is not
guaranteed though, and the code for lowering vector compares could pick
the wrong form of the instruction if this happened. I've tried to make
the code more explicit about the supported conditions.
This fixes NEON being unable to select VCMPZ with HS conditions, and
fixes some incorrect MVE patterns.
Fixes #58514.
Differential Revision: https://reviews.llvm.org/D136447
Ryan Prichard [Wed, 2 Nov 2022 21:55:56 +0000 (14:55 -0700)]
[libc++][Android] strong_order_long_double.verify.cpp: disable on i686
This target (as well as 32-bit ARM Android) have sizeof(long double)
equal to sizeof(double).
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D137135
Ryan Prichard [Wed, 2 Nov 2022 21:53:51 +0000 (14:53 -0700)]
[libc++][Android] XFAIL aligned_alloc and timespec_get tests
Mark tests XFAIL that use APIs that are unsupported on old versions of
Android:
- aligned_alloc isn't available until API 28.
- timespec_get isn't available until API 29.
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D137134
Jennifer Yu [Tue, 1 Nov 2022 21:46:12 +0000 (14:46 -0700)]
[OPENMP]Initial support for error directive.
Differential Revision: https://reviews.llvm.org/D137209
Kirill Stoimenov [Wed, 2 Nov 2022 20:58:36 +0000 (20:58 +0000)]
[Sanitizers] Modified __aarch64__ to use the 64 bit version of the allocator.
This change will switch SizeClassAllocator32 to SizeClassAllocator64 on ARM. This might potentially affect ARM platforms with 39-bit address space. This addresses [[ https://github.com/google/sanitizers/issues/703 | issues/703 ]], but unlike [[ https://reviews.llvm.org/D60243 | D60243 ]] it defaults to 64 bit allocator.
Reviewed By: vitalybuka, MaskRay
Differential Revision: https://reviews.llvm.org/D137136
Mark de Wever [Wed, 2 Nov 2022 18:43:53 +0000 (19:43 +0100)]
[libc++][test] Fixes transitive includes.
These were accidentally set to generating in
243da90ea5357c1ca324f714ea4813dc9029af27
Reviewed By: #libc, philnik
Differential Revision: https://reviews.llvm.org/D137278
LLVM GN Syncbot [Wed, 2 Nov 2022 21:01:56 +0000 (21:01 +0000)]
[gn build] Port
cf239c2f1777
yijiagu [Wed, 2 Nov 2022 20:51:48 +0000 (13:51 -0700)]
[mlir] Remove eliminateBlockingAwaitOps option in AsyncToAsyncRuntime pass
Remove the eliminateBlockingAwaitOps option in AsyncToAsyncRuntime pass
Today the AsyncToAsyncRuntime pass does two things: one is converting normal funcs with async ops to coroutine cfg; the other is lowering high level async operations to async.coro and async.runtime operations. This patch removes the converting step from AsyncToAsyncRuntime pass.
In the next step we will create a new asyncfication pass for converting normal funcs to the newly added async.func operation.
Reviewed By: ezhulenev
Differential Revision: https://reviews.llvm.org/D137282
Félix Cloutier [Fri, 9 Sep 2022 21:08:19 +0000 (14:08 -0700)]
[NFC] Make format() more amenable to format attributes
This change modifies the implementation of the format() function
so that vendor forks committed to building with compilers that
support __attribute__((format)) on non-variadic functions can
check the format() function with it.
rdar://
84571523
Craig Topper [Wed, 2 Nov 2022 20:09:52 +0000 (13:09 -0700)]
[RISCV] Prevent autovectorization using vscale with Zvl32b.
RVVBitsPerBlock is 64. If VLen==32, VLen/RVVBitsPerBlock is 0.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D137280
Alex Lorenz [Wed, 2 Nov 2022 20:40:52 +0000 (13:40 -0700)]
[clang][pp] only __is_target_environment(unknown) should match unknown target triple environment
Sanjay Patel [Wed, 2 Nov 2022 19:55:51 +0000 (15:55 -0400)]
[VectorCombine] add tests for load+shuffle and update to typeless ptr; NFC
Jonathan Peyton [Tue, 1 Nov 2022 17:29:17 +0000 (12:29 -0500)]
[OpenMP][libomp] Fix disabled affinity
Fix setting affinity type and topology method when affinity is disabled
and fix places that were not taking into account that affinity can be
explicitly disabled by putting proper KMP_AFFINITY_CAPABLE() check.
Differential Revision: https://reviews.llvm.org/D137176
Owen Pan [Sun, 30 Oct 2022 23:45:00 +0000 (16:45 -0700)]
[clang-format] Don't skip #else/#elif of #if 0
Fixes #58188.
Differential Revision: https://reviews.llvm.org/D137052
Joseph Huber [Wed, 2 Nov 2022 20:28:50 +0000 (15:28 -0500)]
Revert "[Attributor][NFCI] Move MemIntrinsic handling into the initializer"
This was causing failures when optimizing codes with complex numbers.
Revert until a fix can be implemented.
This reverts commit
7fdf3564c04075d3e6be2d9540e5a6f1e084be9f.
Joseph Huber [Tue, 1 Nov 2022 18:16:47 +0000 (18:16 +0000)]
[LinkerWrapper] report on missing libraries
The linker wrapper does its own library searching for static archives
that can contain device code. The device linking phases happen before
the host linking phases so that we can generate the necessary
registration code and link it in with the rest of the code. Previously,
If a library containing needed device code was not found the execution
would continue silently until it failed with undefined symbols. This
patch allows the linker wrapper to perform its own check beforehand to
catch these errors.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D137180
Martin Storsjö [Mon, 31 Oct 2022 10:18:21 +0000 (12:18 +0200)]
[clang] Fix inline builtin functions of an __asm__ renamed function with symbol prefixes
If a function is renamed with `__asm__`, the name provided is the
exact symbol name, without any extra implicit symbol prefixes.
If the target does use symbol prefixes, the IR level symbol gets
an `\01` prefix to indicate that it's a literal symbol name to be
taken as is.
When a builtin function is specialized by providing an inline
version of it, that inline function is named `<funcname>.inline`.
When the base function has been renamed due to `__asm__`, the inline
function ends up named `<asmname>.inline`. Up to this point,
things did work as expected before.
However, for targets with symbol prefixes, one codepath that produced
the combined name `<asmname>.inline` used the mangled `asmname` with
`\01` prefix, while others didn't. This patch fixes this.
This fixes the combination of asm renamed builtin function, with
inline override of the function, on any target with symbol
prefixes (such as i386 windows and any Darwin target).
Differential Revision: https://reviews.llvm.org/D137073
Craig Topper [Wed, 2 Nov 2022 16:18:41 +0000 (09:18 -0700)]
[RISCV] Move RVVBitsPerBlock to TargetParser.h so we can use it in clang. NFC
Differential Revision: https://reviews.llvm.org/D137266
Philip Reames [Wed, 2 Nov 2022 20:00:35 +0000 (13:00 -0700)]
[LV][RISCV] Add test showing poor choice of VF for short loop
Dan Gohman [Tue, 18 Oct 2022 18:10:19 +0000 (11:10 -0700)]
[wasm-ld] Update supported features in the generic CPU configuration
Accompanying https://reviews.llvm.org/D125728, this updates LLVM
Codegen's "generic" CPU to enable the same new features.
Differential Revision: https://reviews.llvm.org/D125729
Valentin Clement [Wed, 2 Nov 2022 19:47:19 +0000 (20:47 +0100)]
[flang][NFC] Fix typo in filename
Valentin Clement [Wed, 2 Nov 2022 19:46:09 +0000 (20:46 +0100)]
[flang] Fix for polymoprhic pointer component
Fix path that generates MutableBox for
pointer component.
Reviewed By: PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D137270
Slava Zakharin [Wed, 2 Nov 2022 18:42:46 +0000 (11:42 -0700)]
[mlir][llvmir] Support FastmathFlags for LLVM intrinsic operations.
This is required for D126305 code to propagate fastmath attributes
for Arith operations that are converted to LLVM IR intrinsics
operations.
LLVM IR intrinsic operations are using custom assembly format now
to avoid printing {fastmathFlags = #llvm.fastmath<none>}, which
is too verbose.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D136225
Nikolas Klauser [Tue, 9 Aug 2022 11:17:30 +0000 (13:17 +0200)]
[libc++] Implement P2438R2 (std::string::substr() &&)
This doesn't affect our ABI because `std::string::substr()` isn't in the dylib and the mangling of `substr() const` and `substr() const&` are different.
Reviewed By: ldionne, Mordante, var-const, avogelsgesang, #libc
Spies: arphaman, huixie90, libcxx-commits
Differential Revision: https://reviews.llvm.org/D131668
Augie Fackler [Wed, 2 Nov 2022 16:29:24 +0000 (12:29 -0400)]
[bolt] update bazel rules for
f71d32a0eea4
Differential Revision: https://reviews.llvm.org/D137281
Akash Banerjee [Thu, 27 Oct 2022 18:45:26 +0000 (19:45 +0100)]
[OpenMP][OpenMPIRBuilder] Migrate loadOffloadInfoMetadata from clang to OMPIRbuilder
This patch moves the implementation of the loadOffloadInfoMetadata to the OMPIRbuilder.
Differential Revision: https://reviews.llvm.org/D136872
Tom Praschan [Mon, 31 Oct 2022 20:36:18 +0000 (21:36 +0100)]
[clangd] Add scoped enum constants to all-scopes-completion
This was originally part of https://reviews.llvm.org/D136925, but we decided to move it to a separate patch.
In case it turns out to be controversial, it can be reverted more easily.
Differential Revision: https://reviews.llvm.org/D137104
yijiagu [Wed, 2 Nov 2022 18:27:26 +0000 (11:27 -0700)]
Add Async Function to the Async Dialect
Add Async Function to the Async Dialect
Today `async.execute` operation semantics requires attached region to be executed in a thread managed by the runtime, and always returns an `!async.token` result. We need to model async functions that are not necessarily executed in a runtime-managed threads, but eventually lowered to llvm coroutines.
Example:
```
async.func @foo(%arg0: !async.value<f32>) -> !async.token {
%0 = async.await %arg0: !async.value<f32>
"do_something_with_f32"(%0)
return
}
```
If `arg0` is available this function will be executed in the caller thread. If it's not available it will be suspended and resumed later later on a thread managed by the async runtime. Currently this is not representable with `async.execute` operations.
The longer term goal is to make async dialect more like https://github.com/lewissbaker/cppcoro to be able to represent structured host concurrency in MLIR.
(1) Add async.func, async.call, and async.return operations in Async Dialect
Reviewed By: ezhulenev, rriddle
Differential Revision: https://reviews.llvm.org/D137189
Aaron Ballman [Wed, 2 Nov 2022 18:32:47 +0000 (14:32 -0400)]
Fix LLVM sphinx build bot
This should address the issue found in:
https://lab.llvm.org/buildbot/#/builders/30/builds/27824
Julian Lettner [Wed, 2 Nov 2022 18:21:34 +0000 (11:21 -0700)]
[TSan] Adjust `TSAN_RTL_CFLAGS` before it gets copied
Add `COMPILER_RT_LIBDISPATCH_CFLAGS` to `TSAN_RTL_CFLAGS` before it gets
duplicated to `TSAN_RTL_DYNAMIC_CFLAGS` so both versions have the
necessary flags.
Reviewed By: wrotki, rsundahl
Differential Revision: https://reviews.llvm.org/D137183
Florian Hahn [Wed, 2 Nov 2022 18:13:34 +0000 (18:13 +0000)]
[ConstraintElimination] Generate true/false vectors for vector cmps.
This fixes crashes when vector compares can be simplified to true/false.
Hanhan Wang [Wed, 2 Nov 2022 18:02:48 +0000 (11:02 -0700)]
[mlir][linalg] Add support for vectorizing convs that have different types.
Reviewed By: dcaballe
Differential Revision: https://reviews.llvm.org/D137208
James Y Knight [Wed, 2 Nov 2022 16:29:42 +0000 (12:29 -0400)]
[llvm-tblgen] NFC: Small code refactor in DecoderEmitter.
Extracts part of populateInstruction into a separate
addOneOperandFields function.
Jan Svoboda [Wed, 2 Nov 2022 17:57:24 +0000 (10:57 -0700)]
Revert "[cmake][msvc] Enable standards-conforming preprocessor"
This reverts commit
12d8e7c6ade55bba241259312e3e4bdcf6aeab81.
The Windows MLIR buildbot started failing with:
C:\Program Files (x86)\Windows Kits\10\include\10.0.19041.0\um\winbase.h(9531): error C2220: the following warning is treated as an error
C:\Program Files (x86)\Windows Kits\10\include\10.0.19041.0\um\winbase.h(9531): warning C5105: macro expansion producing 'defined' has undefined behavior
C:\Program Files (x86)\Windows Kits\10\include\10.0.19041.0\um\winbase.h(9531): note: to simplify migration, consider the temporary use of /Wv:18 flag with the version of the compiler with which you used to build without warnings
Matt Arsenault [Wed, 2 Nov 2022 17:39:50 +0000 (10:39 -0700)]
llvm-reduce: Require x86 to run file ouput test
The MIR test somewhat depends on target support.
Matt Arsenault [Wed, 2 Nov 2022 17:38:29 +0000 (10:38 -0700)]
AMDGPU: Directly pass Function to mayUseAGPRs
This was taking the MachineFunction, but only inspecting the
underlying IR.
Arthur Eubanks [Sun, 30 Oct 2022 16:52:20 +0000 (09:52 -0700)]
[NewPM][Pipeline] Add PipelineTuningOption to set inliner threshold
The legacy PM allowed you to set a custom inliner threshold via
builder.Inliner = llvm::createFunctionInliningPass(inline_threshold);
This allows the same thing to be done with the new PM optimization pipelines.
Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D137038
Arthur Eubanks [Mon, 24 Oct 2022 17:45:51 +0000 (10:45 -0700)]
[docs][NewPM] Move pass plugin documentation into existing new PM docs
Reviewed By: awarzynski, asbirlea
Differential Revision: https://reviews.llvm.org/D136626
Arthur Eubanks [Sun, 23 Oct 2022 19:02:59 +0000 (12:02 -0700)]
[opt] Add -p alias for -passes
See [1] for background.
Some people have complained that `opt -passes=instcombine` is a lot more typing than `opt -instcombine`.
As a compromise that nobody has objected to in [1], allow `opt -p instcombine`.
[1] https://discourse.llvm.org/t/rfc-legacy-opt-pass-syntax-with-new-pass-manager/65863
Reviewed By: bjope, asbirlea
Differential Revision: https://reviews.llvm.org/D136616
Alex Langford [Mon, 31 Oct 2022 21:50:04 +0000 (14:50 -0700)]
[lldb] Add information on type systems to statistics dump command
Context: I plan on using this change primarily downstream in the apple
fork of llvm to track swift module loading time.
Reviewed By: clayborg, tschuett
Differential Revision: https://reviews.llvm.org/D137191