Simon Glass [Thu, 1 Jan 2015 23:18:02 +0000 (16:18 -0700)]
x86: ivybridge: Only run the Video BIOS when video is enabled
This takes about about 700ms on link when running natively and 900ms when
running using the emulator. It is a waste of time if video is not enabled,
so don't bother running the video BIOS in that case.
We could add a command to run the video BIOS later when needed, but this is
not considered at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 1 Jan 2015 23:18:01 +0000 (16:18 -0700)]
x86: video: Add debug option to time the BIOS copy
This can be very slow - typically 80ms even on a fast machine since it uses
the SPI flash to read the data. Add an option to display the time taken.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 1 Jan 2015 23:18:00 +0000 (16:18 -0700)]
x86: pci: Don't return a vesa mode when there is not video
If the video has not been set up, we should not return a success code. This
can be detected by seeing if any of the variables are non-zero.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 1 Jan 2015 23:17:59 +0000 (16:17 -0700)]
x86: video: Add a debug() to display the frame buffer address
Provide a way to display this address when booting.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 1 Jan 2015 23:17:56 +0000 (16:17 -0700)]
x86: Correct ifdtool microcode calculation
This currently assumes that U-Boot resides at the start of ROM. Update
it to remove this assumption.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 1 Jan 2015 23:17:55 +0000 (16:17 -0700)]
x86: Drop RAMTOP Kconfig
We don't need this in U-Boot since we calculate it based on available memory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 1 Jan 2015 23:17:54 +0000 (16:17 -0700)]
x86: Correct XIP_ROM_SIZE
This should default to the size of the ROM for faster execution before
relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 31 Dec 2014 08:05:14 +0000 (16:05 +0800)]
x86: crownbay: Add pci devices in the dts file
The Topcliff PCH has 4 UART devices integrated (Device 10, Funciton
1/2/3/4). Add the corresponding device nodes in the crownbay.dts per
Open Firmware PCI bus bindings.
Also a comment block is added for the 'stdout-path' property in the
chosen node, mentioning that by default the legacy superio serial
port (io addr 0x3f8) is still used on Crown Bay as the console port.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 31 Dec 2014 08:05:13 +0000 (16:05 +0800)]
x86: Use ePAPR defined properties for x86-uart
Use ePAPR defined properties for x86-uart: clock-frequency and
current-speed. Assign the value of clock-frequency in device tree
to plat->clock of x86-uart instead of using hardcoded number.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 31 Dec 2014 08:05:12 +0000 (16:05 +0800)]
serial: ns16550: Support ns16550 compatible pci uart devices
There are many pci uart devices which are ns16550 compatible. We can
describe them in the board dts file and use it as the U-Boot serial
console as specified in the chosen node 'stdout-path' property.
Those pci uart devices can have their register be memory-mapped, or
i/o-mapped. The driver will try to use the memory-mapped register if
the reg property in the node has an entry to describe the memory-mapped
register, otherwise i/o-mapped register will be used.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 31 Dec 2014 08:05:11 +0000 (16:05 +0800)]
fdt: Add several apis to decode pci device node
This commit adds several APIs to decode PCI device node according to
the Open Firmware PCI bus bindings, including:
- fdtdec_get_pci_addr() for encoded pci address
- fdtdec_get_pci_vendev() for vendor id and device id
- fdtdec_get_pci_bdf() for pci device bdf triplet
- fdtdec_get_pci_bar32() for pci device register bar
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(Include <pci.h> in fdtdec.h and adjust tegra to fix build error)
Bin Meng [Tue, 30 Dec 2014 08:02:05 +0000 (16:02 +0800)]
x86: Simplify the fsp hob access functions
Remove the troublesome union hob_pointers so that some annoying casts
are no longer needed in those hob access routines. This also improves
the readability.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Tue, 30 Dec 2014 14:53:21 +0000 (22:53 +0800)]
pci: Make pci apis usable before relocation
Introduce a gd->hose to save the pci hose in the early phase so that
apis in drivers/pci/pci.c can be used before relocation. Architecture
codes need assign a valid gd->hose in the early phase.
Some variables are declared as static so change them to be either
stack variable or global data member so that they can be used before
relocation, except the 'indent' used by CONFIG_PCI_SCAN_SHOW which
just affects some print format.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Tue, 30 Dec 2014 14:53:20 +0000 (22:53 +0800)]
x86: Support pci bus scan in the early phase
On x86, some peripherals on pci buses need to be accessed in the
early phase (eg: pci uart) with a valid pci memory/io address,
thus scan the pci bus and do the corresponding resource allocation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Tue, 30 Dec 2014 14:53:19 +0000 (22:53 +0800)]
x86: Add missing DECLARE_GLOBAL_DATA_PTR for pci.c
arch/x86/cpu/pci.c has access to the U-Boot global data thus
DECLARE_GLOBAL_DATA_PTR is needed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 24 Dec 2014 05:06:39 +0000 (13:06 +0800)]
x86: Clean up the board dts files
This commits cleans up the board dts files.
- Correct the serial port register size to 8
- Remove the misleading status = "disabled" statement in the
serial.dtsi
- Move the inclusion of skeleton.dtsi from serial.dtsi to board
dts files
- Let the board dts file define stdout-path in the chosen node
- Remove device nodes in board dts files thar are duplicated to
skeleton.dtsi
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 24 Dec 2014 05:06:38 +0000 (13:06 +0800)]
x86: Rename coreboot.dsti to serial.dtsi
The name of coreboot.dtsi is misleading, as it actually describes
the legacy serial port device node.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 24 Dec 2014 05:06:37 +0000 (13:06 +0800)]
x86: Remove alex.dts in arch/x86/dts
No board is using alex.dts, so remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 12 Jan 2015 14:39:08 +0000 (09:39 -0500)]
Prepare v2015.01
Signed-off-by: Tom Rini <trini@ti.com>
Pali Rohár [Thu, 8 Jan 2015 09:11:40 +0000 (10:11 +0100)]
Nokia RX-51: Do not call secure PPA routine on non secure devices
Since commit
41623c91b09a0c865fab41acdaff30f060f29ad6 u-boot running in qemu is
crashing in function do_omap3_emu_romcode_call(). RX-51 board uses this function
for Cortex-A8 errata 430973 workaround (Set IBE bit in ACR) which is needed only
on real secure device and not in qemu.
This board patch just disable calling secure PPA routine on non secure devices.
Qemu implements GP device and with this patch u-boot is working in qemu again.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Peter Tyser [Fri, 9 Jan 2015 21:42:51 +0000 (15:42 -0600)]
powerpc: xes: Add maintainer
Add Peter Tyser as the maintainer of Extreme Engineering Solutions products.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
John Schmoller [Fri, 9 Jan 2015 21:42:50 +0000 (15:42 -0600)]
powerpc: xes: Convert to generic board
Convert Extreme Engineering Solutions products to use generic board
support.
Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Masahiro Yamada [Fri, 19 Dec 2014 05:27:13 +0000 (14:27 +0900)]
ARM: remove redudant information from Kconfig files
- "string" type for SYS_* is defined in arch/Kconfig
- SYS_CPU "armv7" has been replaced with "select CPU_V7"
- SYS_SOC "tegra124" is already defined in tegra124/Kconfig
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Masahiro Yamada [Fri, 19 Dec 2014 05:20:58 +0000 (14:20 +0900)]
omap: beagle_x15: add MAINTAINERS
Commit
1e4ad74b875f (beagle_x15: add board support for Beagle x15)
missed to add board/ti/beagle_x15/MAINTAINERS.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Felipe Balbi <balbi@ti.com>
Masahiro Yamada [Fri, 19 Dec 2014 05:19:07 +0000 (14:19 +0900)]
stv0991: record defconfig ownership in MAINTAINERS
This commit fixes warnings reported by tools/genboardscfg.py.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
Stefan Herbrechtsmeier [Sun, 28 Dec 2014 13:09:51 +0000 (14:09 +0100)]
ARM: kirkwood: dns325: Add generic board support
Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Stefan Herbrechtsmeier [Sun, 28 Dec 2014 13:09:50 +0000 (14:09 +0100)]
Change e-mail address of Stefan Herbrechtsmeier
Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Kevin Hilman [Mon, 15 Dec 2014 20:07:52 +0000 (12:07 -0800)]
common/board_f.c: fix compile error when tracing disabled
When CONFIG_TRACE is disabled, linking fails with:
common/built-in.o:(.data.init_sequence_f+0x8): undefined reference to `trace_early_init'
To fix, wrap trace init calls with #ifdef CONFIG_TRACE.
While at it, remove the static inline version of the init call from
trace.h as suggested by Simon Glass, since it doesnt work.
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Andreas Bießmann [Fri, 24 Oct 2014 21:25:52 +0000 (23:25 +0200)]
tools/kwbimage.c: fix parser error handling
The two error checks for image_boot_mode_id and image_nand_ecc_mode_id where
wrong and would never fail, fix that!
This was detected by Apple's clang compiler:
---8<---
HOSTCC tools/kwbimage.o
tools/kwbimage.c:553:20: warning: comparison of unsigned expression < 0 is always false [-Wtautological-compare]
if (el->bootfrom < 0) {
~~~~~~~~~~~~ ^ ~
tools/kwbimage.c:571:23: warning: comparison of unsigned expression < 0 is always false [-Wtautological-compare]
if (el->nandeccmode < 0) {
~~~~~~~~~~~~~~~ ^ ~
2 warnings generated.
--->8---
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-By: Jeroen Hofstee <jeroen@myspectrum.nl>
Bo Shen [Thu, 8 Jan 2015 07:20:13 +0000 (15:20 +0800)]
ARM: atmel: sama5d3xek: fix the LCD parameters
Remove unused vsync parameter, and correct the include file.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Bo Shen [Thu, 8 Jan 2015 07:20:12 +0000 (15:20 +0800)]
ARM: atmel: sama5d4xek: fix the LCD parameters
Remove unused vsync parameter, and correct the include file.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Bo Shen [Thu, 8 Jan 2015 07:20:11 +0000 (15:20 +0800)]
ARM: atmel: sama5d4 xplained: fix the LCD parameters
Correct the LCD pixel clock, remove unused vsync parameter,
and also correct the include file.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Łukasz Majewski [Fri, 21 Nov 2014 08:22:43 +0000 (09:22 +0100)]
fix: tools: kwbimage.c: Initialize headersz to suppress warning
When building with my toolchain (4.8.2):
CROSS_COMPILE=/home/lukma/work/ptxdist/toolchains/arm/OSELAS.Toolchain-2013.12.0/arm-v7a-linux-gnueabi/gcc-4.8.2-glibc-2.18-binutils-2.24-kernel-3.12-sanitized/bin/arm-v7a-linux-gnueabi-
I see following WARNING:
tools/kwbimage.c: In function "kwbimage_set_header":
tools/kwbimage.c:803:8: warning: "headersz" may be used uninitialized in this function [-Wmaybe-uninitialized]
memcpy(ptr, image, headersz);
^
This fix aims to suppress it.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tom Rini [Sat, 10 Jan 2015 18:27:27 +0000 (13:27 -0500)]
Merge git://git.denx.de/u-boot-nand-flash
Alexey Brodkin [Mon, 29 Dec 2014 12:42:57 +0000 (15:42 +0300)]
arc: introduce "mdbtrick" target
MetaWare debugger (MDB) is still used as a primary tool for interaction
with target via JTAG. Moreover some very advanced features are not yet
implemented in GDB for ARC (and not sure if they will be implemnted
sometime soon given complexity and rare need for those features for
common user).
So if we're talking about development process when U-Boot is loaded in
target memory not by low-level boot-loader but manually through JTAG
chances are high developer uses MDB for it.
But MDB doesn't support PIE (position-independent executable) - it will
refuse to even start - that means no chance to load elf contents on
target.
Then the only way to load U-Boot in MDB is to fake it by:
1. Reset PIE flag in ELF header
This is simpe - on attempt to open elf MDB checks header and if it
doesn't match its expectation refuces to use provided elf.
2. Strip all debug information from elf
If (1) is done then MDB will open elf but on parsing of elf's debug
info it will refuse to process due to debug info it cannot understand
(symbols with PIE relocation).
Even though it could be done manually (I got it documented quite a while
ago here http://www.denx.de/wiki/U-Boot/ARCNotes) having this automated
way is very convenient. User may build U-Boot that will be loaded on
target via MDB saying "make mdbtrick".
Then if we now apply the manipulation MDB will happily start and will
load all required sections into the target.
Indeed there will be no source-level debug info available. But still MDB
will do its work on showing disassembly, global symbols, registers,
accessing low-level debug facilities etc.
As a summary - this is a pretty dirty hack but it simplifies life a lot
for us ARc developers.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Masahiro Yamada [Fri, 26 Dec 2014 13:20:58 +0000 (22:20 +0900)]
mtd: nand: do not scan BBT after scrub
Currently, "nand scrub" runs chip->scan_bbt at the end of
nand_erase_opts() even if NAND_SKIP_BBTSCAN flag is set.
It violates the intention of NAND_SKIP_BBTSCAN.
Move NAND_SKIP_BBTSCAN flag check to nand_block_checkbad() so that
chip->scan_bbt() is never run if NAND_SKIP_BBTSCAN is set.
Also, unset NAND_BBT_SCANNED flag instead of running chip->scan_bbt()
right after scrub. We can be lazier here because the BBT is scanned
at the next call of nand_block_checkbad().
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Scott Wood <scottwood@freescale.com>
Masahiro Yamada [Fri, 26 Dec 2014 13:20:57 +0000 (22:20 +0900)]
mtd: nand: Mark the BBT as scanned prior to calling scan_bbt again
Commit
35c204d8a9d0 (nand: reinstate lazy bad block scanning)
broke NAND_BBT_USE_FLASH feature.
Its git-log claimed that it reinstated the change as by commit
fb49454b1b6c ("nand: reinstate lazy bad block scanning"), but it moved
"chip->options |= NAND_BBT_SCANNED" below "chip->scan_bbt(mtd);".
It causes recursion if scan_bbt does not find a flash based BBT
and tries to write one, and the attempt to erase the BBT area
causes a bad block check.
Reinstate commit
ff49ea8977b5 (NAND: Mark the BBT as scanned prior to
calling scan_bbt.).
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Rostislav Lisovy <lisovy@merica.cz>
Cc: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Masahiro Yamada [Tue, 16 Dec 2014 06:36:33 +0000 (15:36 +0900)]
mtd: nand: revive "nand scrub" command
Since commit
ff94bc40af34 (mtd, ubi, ubifs: resync with Linux-3.14),
the "nand scrub" command has not been working.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
Stefan Agner [Thu, 8 Jan 2015 17:18:25 +0000 (18:18 +0100)]
arm: vf610: fix boot from SD-card
Boot from SD-card (and probably also from NAND) was broken since
commit
d6d07a9bec ("arm: vf610: add NAND support for vf610twr").
It looks like the increased size of U-Boot lead to a situation
where the boot ROM overwrote its own stack/heap while loading
U-Boot from the SD-card to the SRAM. However, U-Boot worked fine
when loaded through USB serial loader directly into SRAM. It
looks like loading from SD-card uses other stack/heap location
then the serial loader (or maybe no stack or heap at all).
This fix moves U-Boot to gfxRAM, which is 512kB in size and is not
used by the boot ROM nor the SD-card loader of it.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Stefan Agner [Thu, 18 Dec 2014 17:10:33 +0000 (18:10 +0100)]
arm: build arch memset/memcpy in Thumb2 mode
Resynchronize memcpy/memset with kernel 3.17 and build them in
Thumb2 mode (unified syntax). Those assembler files can be built
and linked in ARM mode too, however when calling them from Thumb2
built code, the stack got corrupted and the copy did not succeed
(the exact details have not been traced back). However, the Linux
kernel builds those files in Thumb2 mode. Hence U-Boot should
build them in Thumb2 mode too when CONFIG_SYS_THUMB_BUILD is set.
To build the files without warning, some assembler instructions
had to be replaced with their UAL compliant variant (thanks
Jeroen for this input).
To build the file in Thumb2 mode the implicit-it=always option need
to be set to generate Thumb2 compliant IT instructions where needed.
We add this option to the general AFLAGS when building for Thumb2.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Tom Rini [Thu, 8 Jan 2015 18:50:38 +0000 (13:50 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
Fabio Estevam [Tue, 6 Jan 2015 15:06:48 +0000 (13:06 -0200)]
mx25: Fix boot hang by avoiding vector relocation
Since commit
3ff46cc42b9d73d0 ("arm: relocate the exception vectors") mx25pdk
hangs like this:
CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: WDOG
Board: MX25PDK
I2C: ready
DRAM: 64 MiB
(hangs)
Add a specific relocate_vectors macro that skips the vector relocation, as the
i.MX25 SoC does not provide RAM at the high vectors address (0xFFFF0000), and
(0x00000000) maps to ROM.
This allows mx25 to boot again.
Acked-By: Bill Pringlemeir <bpringlemeir@nbsps.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Peng Fan [Thu, 8 Jan 2015 02:40:21 +0000 (10:40 +0800)]
imx:mx6sxsabresd support qspi AHB read
Add CONFIG_SYS_FSL_QSPI_AHB in header file to enable AHB in driver.
In order to count the time, add CONFIG_CMD_TIME.
Using AHB read can improve the the read speed about 30%.
AHB read:
=> time sf read 0x8f800000 0 100000
SF: 1048576 bytes @ 0x0 Read: OK
time: 0.174 seconds
=> time sf read 0x8f800000 1000000 100000
SF: 1048576 bytes @ 0x1000000 Read: OK
time: 0.174 seconds
IP read:
=> time sf read 0x8f800000 0 100000
SF: 1048576 bytes @ 0x0 Read: OK
time: 0.227 seconds
=> time sf read 0x8f800000 1000000 100000
SF: 1048576 bytes @ 0x1000000 Read: OK
time: 0.227 seconds
Note:
Quad read is not supported in driver, now. In my side, using AHB and Quad read
can achieve about 16MB/s. Anyway, I have plan to reimplement the driver using
DTB and DM, then make the code cleaner and more feature can be added.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Peng Fan [Thu, 8 Jan 2015 02:40:20 +0000 (10:40 +0800)]
qspi:fsl implement AHB read
The QSPI controller in i.MX 6SoloX and Vybrid supports reading data using
IP register and AHB bus.
The original driver only supports reading data from IP interface. The IC
team suggests to use AHB read which is faster then IP read. Using AHB read,
we can directly memcpy, a "missed" access to the buffer will cause the
controller to clear the buffer and use the SEQID stored in bfgencr register
to initiate a read from flash device.
Since AHB bus is 64 bit width, we can not set MCR register using 32bit. In
order to minimize code change, redefine QSPI_MCR_END_CFD_LE to 64bit Little
endian but not 32bit Little endia.
Introduce a new configuration option CONFIG_SYS_FSL_QSPI_AHB. If want to
use AHB read, just define CONFIG_SYS_FSL_QSPI_AHB. If not, just ignore it.
Actually if Vybrid is migrated to use AHB read, this option can be removed and
IP read function can be discared. The reason to introduce this option
is that only i.MX SOC is tested in my side, no Vybrid platform for me.
In spi_setup_slave, the original piece code to set AHB is deleted, since
Vybrid platform does not use this to intiate AHB read. Instead, add
qspi_init_ahb_read function if defined CONFIG_SYS_FSL_QSPI_AHB.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Jeremiah Mahler [Wed, 7 Jan 2015 00:40:28 +0000 (16:40 -0800)]
doc: fix spelling errors in am335x/README
Fix several spelling errors and replace the invalid word
"architectured" with "designed".
Signed-off-by: Jeremiah Mahler <jmmahler@gmail.com>
Fabio Estevam [Tue, 6 Jan 2015 16:10:05 +0000 (14:10 -0200)]
mx25: Remove empty line after printing the reset cause
Currently there is an unneeded empty line after printing the reset cause:
U-Boot 2015.01-rc4-00080-g0551a93 (Jan 06 2015 - 13:04:19)
CPU: Freescale i.MX25 rev1.2 at 399 MHz
Reset cause: POR
Board: MX25PDK
I2C: ready
DRAM: 64 MiB
MMC: FSL_SDHC: 0
Remove the extra "\n" when printing the reset cause.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Peng Fan [Tue, 6 Jan 2015 06:12:51 +0000 (14:12 +0800)]
i2c:mxc fix array size of i2c_data
We should not hardcode array size of i2c_data to 3. To CONFIG_FSL_LSCH3,
there are 4 i2c interface, but not 3. So the size of i2c_data array should
be calculated using "ARRAY_SIZE(i2c_bases)".
To avoid compile error, move i2c_bases before sram_data structure which
contains i2c_data array.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Luka Perkov [Wed, 7 Jan 2015 23:32:06 +0000 (23:32 +0000)]
MAINTAINERS: add me as a co-maintainer of KIRKWOOD
Signed-off-by: Luka Perkov <luka.perkov@sartura.hr>
CC: Prafulla Wadaskar <prafulla@marvell.com>
CC: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Luka Perkov [Wed, 7 Jan 2015 23:32:36 +0000 (23:32 +0000)]
doc/gitmail-rc: fix whitespaces
Signed-off-by: Luka Perkov <luka.perkov@sartura.hr>
Maxime Ripard [Thu, 8 Jan 2015 11:26:44 +0000 (12:26 +0100)]
gpt: Fix the protective MBR partition size
According to the UEFI Spec (Table 16, section 5.2.3 of the version 2.4 Errata
B), the protective MBR partition record size must be set to the size of the
disk minus one, in LBAs.
However, the current code was setting the size as the total number of LBAs on
the disk, resulting in an off-by-one error.
This confused the AM335x ROM code, and will probably confuse other tools as
well.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Bill Pringlemeir [Wed, 7 Jan 2015 15:34:15 +0000 (10:34 -0500)]
scripts: fix binutils-version.sh for 'as' without a package.
Commit
73c25753 fixed the common issue that binutil packages (tool/organization
that packaged or built the bin-utils) are included in brackets and this may
falsely be recognized as a version. However, some tools do not provide a
'package' and previously we add the 'Gnu assembler..' to the version.
Strip out the '(package version text)' and then look for a ##.## string.
Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Masahiro Yamada [Tue, 6 Jan 2015 05:28:16 +0000 (14:28 +0900)]
ARM: UniPhier: add UART initialization routine for low-level debug
The low-level debugging functions are useful to debug the early boot
stage where the full UART driver is not available.
UniPhier SoCs need to initialize the UART port 0 to use this feature.
The initialization routine is called at the very entry of the
lowlevel_init().
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Tue, 6 Jan 2015 05:20:04 +0000 (14:20 +0900)]
ARM: UniPhier: enable output of system bus
For NAND boot on PH1-LD4, PH1-sLD8, and some other SoCs,
the output of the system bus is disabled by default.
It must be enabled by software to have access to the system bus.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Tue, 6 Jan 2015 05:18:57 +0000 (14:18 +0900)]
ARM: UniPhier: fix SRAM size on support card
The max size of available memories on slot0 and slot1 is 32MB because
- EA[25] signal is not output on the save-pin mode which is
used PH1-LD4 or later SoCs.
- EA[25] signal is not connected by the limitation (or bug?) of
the PLD logic of DCC support card.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Axel Lin [Thu, 8 Jan 2015 01:47:22 +0000 (09:47 +0800)]
spi: ftssp010_spi: Simplify code flow in ftssp010_[wait|wait_tx|wait_rx]
No functional change, just simplify the code a bit.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Masahiro Yamada [Wed, 26 Nov 2014 09:42:31 +0000 (18:42 +0900)]
Kconfig: move EXPERT option under "General setup" menu
Make it a sub-menu of "General setup" like Linux Kernel.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Axel Lin [Wed, 7 Jan 2015 01:54:56 +0000 (09:54 +0800)]
spi: cadence_qspi: Fix checking return value of fdt_first_subnode()
fdt_first_subnode() returns -FDT_ERR_NOTFOUND if no subnode found.
0 is supposed to be a valid offset returns from fdt_first_subnode().
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Peng Fan [Sun, 4 Jan 2015 09:07:15 +0000 (17:07 +0800)]
mx6sxsabresd: support qspi flash bigger than 16MB
mx6sxsabresd revb board uses 32MB qspi flash, reva board uses 16MB qspi
flash. Currently, the default supported platform is revb board.
If want to configure for reva board, just define CONFIG_MX6SX_SABRESD_REVA
in mx6sxsabresd.h to support reva qspi flashes whose size is 16MB.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Peng Fan [Sun, 4 Jan 2015 09:07:14 +0000 (17:07 +0800)]
spi:fsl-quadspi support bank register read write
To support bigger than 16MB size qspi flashes, spi framework uses bank
switch to access higher bank or lower bank.
In this patch, QSPI_CMD_BRRD, QSPI_CMD_BRWR, QSPI_CMD_WREAR, QSPI_CMD_RDEAR
is initialized in LUT register with related pad and length configuration.
qspi_op_pp is originally for page programming, this patch reuses this function
for bank register switch and renamed it with qspi_op_write.
Since bank or EAR register is only 1 byte length, however original qspi_op_pp
or now renamed qspi_op_write only support 4 bytes lenght as the access unit,
this will trigger data abort exception when access EAR or bank register.
This is because upper framework passes a 1 bytes pointer to qspi_op_write,
however qspi_op_write treat it as an int pointer. This patch fixes this for
accessing EAR or bank register.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Marek Vasut [Wed, 31 Dec 2014 19:14:56 +0000 (20:14 +0100)]
dt: socfpga: Replace num-chipselect with num-cs
This optional DT property is called 'num-cs', so repair the misnomers.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Tom Rini [Tue, 6 Jan 2015 15:48:32 +0000 (10:48 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Tue, 6 Jan 2015 15:44:47 +0000 (10:44 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc
Marek Vasut [Wed, 31 Dec 2014 19:14:55 +0000 (20:14 +0100)]
dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi
Linux now also contains SPI driver, yet the name is 'snps,dw-apb-ssi'.
Fix the naming before we have to support both names.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Hans de Goede [Mon, 5 Jan 2015 15:41:49 +0000 (16:41 +0100)]
sunxi: axp221: Fix using the wrong register address for ALDO2
This fixes us never programming ALDO2, and programming the ALDO2 voltage
into ALDo1.
Reported-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Axel Lin [Tue, 6 Jan 2015 00:08:25 +0000 (08:08 +0800)]
spi: designware_spi: Fix detecting FIFO depth
Current code tries to find the highest valid fifo depth by checking the value
it wrote to DW_SPI_TXFLTR. There are a few problems in current code:
1) There is an off-by-one in dws->fifo_len setting because it assumes the latest
register write fails so the latest valid value should be fifo - 1.
2) We know the depth could be from 2 to 256 from HW spec, so it is not necessary
to test fifo == 257. In the case fifo is 257, it means the latest valid
setting is fifo = 256. So after the for loop iteration, we should check
fifo == 2 case instead of fifo == 257 if detecting the FIFO depth fails.
This patch fixes above issues.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Guillaume GARDET [Tue, 16 Dec 2014 11:00:44 +0000 (12:00 +0100)]
spl: mmc: Fix raw boot mode (related to commit
4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f)
As reported by Robert Nelson, commit
4c5bbc2328a24f5e1ee990c9a9527e48e5fb3b5f
may break MMC RAW boot mode.
This patch fixes the check path to fix MMC Raw boot mode.
Tested raw boot mode and FS boot mode on a pandaboard (rev. A3).
Reported-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Gerald Kerma [Sat, 13 Dec 2014 20:35:36 +0000 (21:35 +0100)]
MVEBUMMC : REMOVE unnecessary delay from init
Remove unnessecary delay from mvebu_mmc_initialize
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Gerald Kerma [Sat, 13 Dec 2014 20:35:35 +0000 (21:35 +0100)]
MVEBUMMC : CLEAN code
Clean mvebu_mmc_send_cmd
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Gerald Kerma [Sat, 13 Dec 2014 20:35:34 +0000 (21:35 +0100)]
MVEBUMMC : REMOVE unnecessary delays
Remove delays in mvebu_mmc_set_bus and mvebu_mmc_set_clk
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Gerald Kerma [Sat, 13 Dec 2014 20:35:33 +0000 (21:35 +0100)]
MVEBUMMC : FIX debug strings
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Gerald Kerma [Sat, 13 Dec 2014 20:35:32 +0000 (21:35 +0100)]
MVEBUMMC : Speed up access time
Get about 40x faster access on SHEEVAPLUG MMC
Fix some SD type compatibility
Changes in v3:
- fix the HW_STATE (from linux mvsdio)
- review delays and timeouts
Changes in v2:
- increase number of loops
- remove initial delay
Changes in v1:
- review all loops, delays and timeouts
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Gerald Kerma [Sat, 13 Dec 2014 20:35:31 +0000 (21:35 +0100)]
MVEBUMMC : Change copyright date
Signed-off-by: Gérald Kerma <drEagle@doukki.net>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Tom Rini [Tue, 6 Jan 2015 02:14:04 +0000 (21:14 -0500)]
spl_sata.c: Add <scsi.h>
We need <scsi.h> for scsi_scan().
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Tue, 6 Jan 2015 01:00:25 +0000 (20:00 -0500)]
Merge branch 'misc' of git://git.denx.de/u-boot-x86
Sjoerd Simons [Thu, 27 Nov 2014 15:34:08 +0000 (16:34 +0100)]
cros-ec-keyboard: Synchronize DT binding from linux
The ChromeOS EC keyboard is used by various different chromebooks. Peach
pi being the third board in the u-boot tree to use it (snow and peach
pit the other two). Rather then embedding the same big DT node in the
peach-pi DT again, copy the dtsi snippit & bindings documentation from
linux and include it in all 3 boards.
This slightly changes the dt bindings in u-boot:
* google,key-rows becomes keypad,num-rows
* google,key-colums becomes keypad,num-colums
* google,repeat-delay-ms and google,repeat-rate-ms are no longer used
and replaced by hardcoded values (similar to tegra kbc)
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Thu, 18 Dec 2014 11:00:26 +0000 (20:00 +0900)]
i2c_eeprom: include <linux/err.h> to fix build error
drivers/misc/i2c_eeprom.c fails to build unless CONFIG_FIT_SIGNATURE
is defined.
CC drivers/misc/i2c_eeprom.o
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_read':
drivers/misc/i2c_eeprom.c:15:10: error: 'ENODEV' undeclared
(first use in this function)
drivers/misc/i2c_eeprom.c:15:10: note: each undeclared identifier
is reported only once for each function it appears in
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_write':
drivers/misc/i2c_eeprom.c:21:10: error: 'ENODEV' undeclared
(first use in this function)
drivers/misc/i2c_eeprom.c:22:1: warning: control reaches end of
non-void function [-Wreturn-type]
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_read':
drivers/misc/i2c_eeprom.c:16:1: warning: control reaches end of
non-void function [-Wreturn-type]
make[2]: *** [drivers/misc/i2c_eeprom.o] Error 1
make[1]: *** [drivers/misc] Error 2
make: *** [drivers] Error 2
By the way, Sandbox (enabling CONFIG_FIT_SIGNATURE) is luckily
working depending on it.
Sandbox includes include/asm-generic/errno.h
from include/errno.h
from include/u-boot/rsa-checksum.h
from include/image.h
from include/common.h
from drivers/misc/i2c_eeprom.c
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 19 Dec 2014 05:16:44 +0000 (14:16 +0900)]
dm: README: recommend u-boot.dtb to try driver-model on sandbox
To enjoy driver-model on sandbox, using device tree is recommended.
While we are here, change sandbox_config to sandbox_defconfig too.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Sonic Zhang [Wed, 10 Dec 2014 10:20:53 +0000 (18:20 +0800)]
memmove_wd: copy chunk down from big address if parameter to is larger than from
When watchdog is enabled, memmove_wd() always copy chunk up from small address.
This damanges overlapped memory data if destination address is smaller than
source address.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Simon Glass <sjg@chromium.org>
Guido Martínez [Fri, 2 Jan 2015 17:49:10 +0000 (14:49 -0300)]
mtd: nand: omap_gpmc: fix error handling
"err" was an unsigned variable, causing negative error codes to turn
into positive values, which are interpreted as an amount of succesfully
corrected bitflips (and thus not an error).
In particular, this resulted in that if the elm reports uncorrectable
errors (-EBADMSG), the MTD layer (and UBI) falsely succeeded.
Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
Reviewed-by: Stefan Roese <sr@denx.de>
David Büchi [Tue, 16 Dec 2014 10:09:31 +0000 (10:09 +0000)]
powerpc/cm5200: migrate to generic board
Signed-off-by: David Buechi <david.buechi@bbv.ch>
Jeremiah Mahler [Mon, 5 Jan 2015 02:56:50 +0000 (18:56 -0800)]
doc: fix grammatical errors in README
Fix various spelling and grammatical errors in the README.
Signed-off-by: Jeremiah Mahler <jmmahler@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Karicheri, Muralidharan [Tue, 9 Dec 2014 19:32:26 +0000 (14:32 -0500)]
keystone: set default pci mode to root complex
pci ports are used as root complex in Linux. So set this as default
in u-boot for keystone devices
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Felipe Balbi [Wed, 10 Dec 2014 20:16:15 +0000 (14:16 -0600)]
beagle_x15: enable NFS command
NFS is useful for loading zImage and dts through
NFS export. It saves us from running two services
for loading files over the network (tftp and nfs).
Signed-off-by: Felipe Balbi <balbi@ti.com>
Dmitry Lifshitz [Mon, 15 Dec 2014 14:02:59 +0000 (16:02 +0200)]
omap5: cm-t54: add sata support
Add configs required for SATA support on CM-T54 board.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
Dmitry Lifshitz [Mon, 15 Dec 2014 14:02:58 +0000 (16:02 +0200)]
arm: omap: reset sata on boot
On OMAP platforms (like OMAP5) Linux kernel fails to detect a SATA
device if it is used by U-Boot.
It happens because U-Boot does not reset SATA controller before boot.
Reset the controller on OS boot so that Linux will have a clean state
to work with.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
Dmitry Lifshitz [Mon, 15 Dec 2014 14:02:57 +0000 (16:02 +0200)]
OMAP5+: sata/scsi: implement scsi_bus_reset()
Implement missing scsi_bus_reset() for SCSI subsystem commands
on OMAP platforms.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
Dmitry Lifshitz [Mon, 15 Dec 2014 14:02:56 +0000 (16:02 +0200)]
ahci-plat: provide a weak scsi_bus_reset() hook
This allow the platform to handle a custom reset sequence.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
Dmitry Lifshitz [Mon, 15 Dec 2014 14:02:55 +0000 (16:02 +0200)]
ahci: introduce ahci_reset()
Extract controller reset code from ahci_host_init() into separate
ahci_reset().
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Reviewed-by: Tom Rini <trini@ti.com>
Peter Howard [Wed, 17 Dec 2014 01:14:36 +0000 (12:14 +1100)]
da850evm: Use generic board and libfdt, fix size for SPI flash
Add defines to use CONFIG_SYS_GENERIC_BOARD and CONFIG_OF_LIBFDT.
Semi-separate to this: the size of the image for the da850evm has
increased to the point that the size in da850evm.h and the offset for
the environment in SPI flash no longer work. They are modified to
account for the larger image size.
Signed-off-by: Peter Howard <phoward@gme.net.au>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Przemyslaw Marczak [Thu, 18 Dec 2014 16:14:17 +0000 (17:14 +0100)]
fs: fat: read: fix fat16 ls/read issue
The present fat implementation ignores FAT16 long name
directory entries which aren't placed in a single sector.
This was becouse of the buffer was always filled by the
two sectors, and the loop was made also for two sectors.
If some file long name entries are stored in two sectors,
the we have two cases:
Case 1:
Both of sectors are in the buffer - all required data
for long file name is in the buffer.
- Read OK!
Case 2:
The current directory entry is placed at the end of the
second buffered sector. And the next entries are placed
in a sector which is not buffered yet. Then two next
sectors are buffered and the mentioned entry is ignored.
- Read fail!
This commit fixes this issue by:
- read two sectors after loop on each single is done
- keep the last used sector as a first in the buffer
before the read of two next
The commit doesn't affects the fat32 imlementation,
which works good as previous.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Mikhail Zolotaryov <lebon@lebon.org.ua>
Cc: Tom Rini <trini@ti.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Suriyan Ramasami <suriyan.r@gmail.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
Tested-by: Simon Glass <sjg@chomium.org>
Nishanth Menon [Thu, 18 Dec 2014 20:32:14 +0000 (14:32 -0600)]
TI: armv7: enable UUID and PART
Enable UUID and partition support for scripted handling platforms with
MMC and eMMC and varied partitioning schemes
And remove it from headers that end up redefining it.
Signed-off-by: Nishanth Menon <nm@ti.com>
Nishanth Menon [Thu, 18 Dec 2014 21:28:36 +0000 (15:28 -0600)]
Revert "ARM: omap4: Update sdram setting for panda rev A6"
This reverts commit
47a4bea6af77b01d59a410d09a4c34b2dd14cf50.
Signed-off-by: Nishanth Menon <nm@ti.com>
Nishanth Menon [Thu, 18 Dec 2014 21:28:35 +0000 (15:28 -0600)]
ARM: OMAP4: Panda: rework DMM logic
Part of DMM logic is reuse from commit
47a4bea6af77b01d59a410d09a4c34b2dd14cf50 ("ARM: omap4: Update sdram
setting for panda rev A6") Which broke SDP4430 with ES2.3 (uses old
DDR).
So, to maintain support for newer DDR used in Panda ES rev B3, we
should, in addition to the commit
675cc77a3ae45e8b0ec17128563264d4a509f628 ("ARM:OMAP4+: panda-es: Support
Rev B3 Elpida DDR2 RAM"), DDR timings, also do DMM configuration
specific to Panda.
Signed-off-by: Nishanth Menon <nm@ti.com>
Tom Rini [Fri, 19 Dec 2014 21:52:55 +0000 (16:52 -0500)]
omap-common/hwinit-common.c: timer_init() doesn't need to touch gd
The gd will be cleared at first so we don't need to set arch.tbl to 0.
In addition, the checks later against lastinc also work fine with an
initial value of 0 here. This also brings us in line with sunxi code
for example.
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 19 Dec 2014 21:52:54 +0000 (16:52 -0500)]
am33xx: Drop timer_init call from s_init
In both SPL and non-SPL cases we will make a call to timer_init() early
on and do not need to call it again within s_init().
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 19 Dec 2014 21:52:53 +0000 (16:52 -0500)]
socfpga: Drop redundant save_boot_params
The save_boot_params function here is the same as the default weak one
from arch/arm/cpu/armv7/start.S, drop.
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Hua Yanghao [Sun, 21 Dec 2014 20:45:59 +0000 (04:45 +0800)]
cmd_fdt: fix working_fdt is set to wrong value
Instead of setting working_fdt to map_sysmem(addr) (e.g. blob), it should be set
to addr directly as inside set_working_fdt_addr it uses map_sysmem(addr) again.
To test: ./u-boot -d dts/dt.bin , then issue: fdt addr 0x100, fdt print will
then cause an segmentation fault. After this fix fdt print is functional.
Ian Campbell [Sun, 21 Dec 2014 09:45:11 +0000 (09:45 +0000)]
ARM: bootm: do not add PSCI to fdt when booting in secure mode.
Commit
8bc347e2ec17 "ARM: bootm: Allow booting in secure mode on hyp capable
systems" added the capability to select nonsec vs sec mode boot via an
environment var.
There is a subtle gotcha with this functionality, which is that the PSCI nodes
are still created in the fdt (via armv7_update_dt->fdt_psci) even when booting
in secure mode. Which means that if the kernel is PSCI aware then it will fail
to boot because it will try and do PSCI from secure world, which won't work.
This likely didn't get noticed before because the original purpose was to
support booting the legacy linux-sunxi kernels which don't understand PSCI.
To fix expose boot_nonsec (renaming with armv7_ prefix) outside of bootm.c and
use from the virt-dt code.
As well as avoiding the creation of the PSCI nodes we should also avoid
reserving the secure RAM, so do so.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Anthoine Bourgeois [Wed, 24 Dec 2014 00:11:49 +0000 (01:11 +0100)]
devkit8000: convert to use generic board code
Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Alexey Brodkin [Fri, 26 Dec 2014 08:03:15 +0000 (11:03 +0300)]
cmd_bdinfo: check for CONFIG_ARC instead of CONFIG_ARC700
For all flavours of ARC we execute the same code in "bdinfo" so we may
safely check for CONFIG_ARC. This is especially important since we're
about to add more types of ARC so existing check won't work in all
cases.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@ti.com>