Jay Foad [Thu, 19 May 2022 14:23:10 +0000 (15:23 +0100)]
[AMDGPU] Allow multiple uses of the same literal in SOP2/SOPC
AMDGPUAsmParser::validateSOPLiteral already knew about this but
SIInstrInfo::verifyInstruction did not.
Differential Revision: https://reviews.llvm.org/D125976
David Spickett [Thu, 19 May 2022 15:35:46 +0000 (15:35 +0000)]
[lldb] Add non-address bit improvements to release notes
This summarises the changes made by
d9398a91e2a6b8837a47a5fda2164c9160e86199.
Which forms the bulk of the fixes needed for non-address bit handling.
Note that in the previous releases we noted memory tagging support,
which is a subset of non-address bits. The recent changes enable
debugging of programs using memory tagging, pointer authentication
and top byte ignore (all at once) on AArch64.
Yaxun (Sam) Liu [Tue, 17 May 2022 19:12:03 +0000 (15:12 -0400)]
[clang] Fix __has_builtin
Fix __has_builtin to return 1 only if the requested target features
of a builtin are enabled by refactoring the code for checking
required target features of a builtin and use it in evaluation
of __has_builtin.
Reviewed by: Artem Belevich
Differential Revision: https://reviews.llvm.org/D125829
Tiehu Zhang [Thu, 19 May 2022 15:24:14 +0000 (23:24 +0800)]
[LoopVectorize] Don't interleave when the number of runtime checks exceeds the threshold
The runtime check threshold should also restrict interleave count.
Otherwise, too many runtime checks will be generated for some cases.
Reviewed By: fhahn, dmgreen
Differential Revision: https://reviews.llvm.org/D122126
Tiehu Zhang [Thu, 19 May 2022 15:14:59 +0000 (23:14 +0800)]
[LoopVectorize] Precommit a test for D122126
Florian Hahn [Thu, 19 May 2022 15:24:38 +0000 (16:24 +0100)]
[VPlan] Update VPWidenMemoryInstruction to not inherit from VPValue.
VPWidenMemoryInstruction also models stores which may not produce a value.
This can trip over analyses. Improve the modeling by only adding
VPValues for VPWidenMemoryInstructionRecipes modeling loads.
Louis Dionne [Thu, 19 May 2022 15:20:26 +0000 (11:20 -0400)]
[libc++] Override the value of LIBCXX_CXX_ABI in the cache
This will allow us to remove this entirely once the commit has propagated
through all CI and hence changed the value in the cache.
Sotiris Apostolakis [Thu, 19 May 2022 05:37:22 +0000 (05:37 +0000)]
[NFC] Fix typos in X86CmovConversion
Louis Dionne [Thu, 19 May 2022 14:57:13 +0000 (10:57 -0400)]
[libunwind] Remove unused _LIBUNWIND_HAS_NO_THREADS macro in tests
The _LIBUNWIND_HAS_NO_THREADS macro is only picked up by libunwind
inside its sources, so it is only required when it builds. It doesn't
need to be defined when running the tests.
Joe Nash [Mon, 25 Apr 2022 17:33:24 +0000 (13:33 -0400)]
[AMDGPU] gfx11 scalar memory instructions
Contributors:
Mirko Brkusanin <Mirko.Brkusanin@amd.com>
Patch 9/N for upstreaming of AMDGPU gfx11 architecture.
Depends on D125820
Reviewed By: kosarev, #amdgpu, arsenm
Differential Revision: https://reviews.llvm.org/D125822
Louis Dionne [Wed, 18 May 2022 16:05:45 +0000 (12:05 -0400)]
[runtimes] Fix the build of merged ABI/unwinder libraries
Also, add a CI job that tests this configuration. The exact configuration
is that we build a shared libc++ and merge objects for the ABI library
and the unwinder library into it.
Differential Revision: https://reviews.llvm.org/D125903
Andrzej Warzynski [Sun, 15 May 2022 11:35:37 +0000 (12:35 +0100)]
[flang][driver] Add support for generating executables on MacOSX/Darwin
This patch basically extends https://reviews.llvm.org/D122008 with
support for MacOSX/Darwin.
To facilitate this, I've added `MacOSX` to the list of supported OSes in
Target.cpp. Flang already supports `Darwin` and it doesn't really do
anything OS-specific there (it could probably safely skip checking the
OS for now).
Note that generating executables remains hidden behind the
`-flang-experimental-exec` flag. Also, we don't need to add `-lm` on
MacOSX as `libm` is effectively included in `libSystem` (which is linked
in unconditionally).
Differential Revision: https://reviews.llvm.org/D125628
Mats Petersson [Wed, 7 Jul 2021 15:58:32 +0000 (16:58 +0100)]
[flang][OpenMP] Support for Collapse
Convert Fortran parse-tree into MLIR for collapse-clause.
Includes simple Fortran to LLVM-IR test, with auto-generated
check-lines (some of which have been edited by hand).
Reviewed By: kiranchandramohan, shraiysh, peixin
Differential Revision: https://reviews.llvm.org/D125302
Joe Nash [Fri, 22 Apr 2022 19:18:40 +0000 (15:18 -0400)]
[AMDGPU] gfx11 LDSDIR instructions MC support
Contributors:
Carl Ritson <carl.ritson@amd.com>
Patch 8/N for upstreaming of AMDGPU gfx11 architecture.
Depends on D125498
Reviewed By: critson, rampitec, #amdgpu
Differential Revision: https://reviews.llvm.org/D125820
Nikolas Klauser [Thu, 19 May 2022 10:50:02 +0000 (12:50 +0200)]
[libc++] Granularize algorithm benchmarks
Reviewed By: ldionne, #libc
Spies: libcxx-commits, mgorny, mgrang
Differential Revision: https://reviews.llvm.org/D124740
Daniil Dudkin [Thu, 19 May 2022 14:11:51 +0000 (17:11 +0300)]
[flang][NFC] Allow whitespaces before `ERROR`
This change allows to write whitespaces before the `ERROR` keyword
in semantic tests for consistency with other testing infrastructure.
Also, one test is changed in order to test if the change works
correctly.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D125884
Nikolas Klauser [Thu, 19 May 2022 10:46:09 +0000 (12:46 +0200)]
[libc++] Enable move semantics for vector in C++03
We require move semantics in C++03 anyways, so let's enable them for the containers.
Reviewed By: ldionne, #libc
Spies: libcxx-commits
Differential Revision: https://reviews.llvm.org/D123802
Bradley Smith [Fri, 6 May 2022 14:45:56 +0000 (14:45 +0000)]
[AArch64][SVE] Convert SRSHL to LSL when the fed from an ABS intrinsic
Differential Revision: https://reviews.llvm.org/D125233
Utkarsh Saxena [Wed, 18 May 2022 20:08:53 +0000 (22:08 +0200)]
Add an option to fill container for ref
This allows index implementations to fill container details when required specially when computing containerID is expensive.
Differential Revision: https://reviews.llvm.org/D125925
William Schmidt [Wed, 18 May 2022 20:51:47 +0000 (13:51 -0700)]
[SLP][NFC] Pre-commit test showing vectorization preventing FMA
When we generate a horizontal reduction of floating adds fed by a vectorized
tree rooted at floating multiplies, we should account for the cost of no
longer being able to generate scalar FMAs. Similarly, if we vectorize a
list of floating multiplies that each feeds a single floating add, we should
again account for this cost.
The first test was reduced from a case where the vectorizable tree looked
barely profitable (cost -1) with a horizontal reduction, but produced
substantially worse code than allowing the FMAs to be generated. The second
test was derived from the first: we again generate a horizontal reduction
here, but even if the horizontal reduction is forced to be unprofitable, we
try to vectorize the multiplies. I have follow-up patches to address these
issues.
Differential Revision: https://reviews.llvm.org/D124867
David Spickett [Wed, 13 Apr 2022 13:32:18 +0000 (14:32 +0100)]
[lldb] Add --show-tags option to "memory find"
This is off by default. If you get a result and that
memory has memory tags, when --show-tags is given you'll
see the tags inline with the memory content.
```
(lldb) memory read mte_buf mte_buf+64 --show-tags
<...>
0xfffff7ff8020: 00 00 00 00 00 00 00 00 0d f0 fe ca 00 00 00 00 ................ (tag: 0x2)
<...>
(lldb) memory find -e 0xcafef00d mte_buf mte_buf+64 --show-tags
data found at location: 0xfffff7ff8028
0xfffff7ff8028: 0d f0 fe ca 00 00 00 00 00 00 00 00 00 00 00 00 ................ (tags: 0x2 0x3)
0xfffff7ff8038: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ (tags: 0x3 0x4)
```
The logic for handling alignments is the same as for memory read
so in the above example because the line starts misaligned to the
granule it covers 2 granules.
Depends on D125089
Reviewed By: omjavaid
Differential Revision: https://reviews.llvm.org/D125090
Sheng [Thu, 19 May 2022 13:17:29 +0000 (21:17 +0800)]
[M68k] Fix a bug in disassembler
Sorry for my reckless patch. In some cases `RoundUp` is less than
the bit width of APInt. We need to check this before we do zext.
David Green [Thu, 19 May 2022 12:54:35 +0000 (13:54 +0100)]
[AArch64] Fix zero element TBL indices
A TBL instruction will fill out-of-range values with 0's, something used
in D121139 to turn tbl2 with a zero input into tbl1s. This works OK for
v16i8, but for v8i8 the input is still treated as a v16i8, so
out-of-range values (like a lane index of 8) would end up loading values
from the top half of the input register. Clean this up by detecting the
out of range values and making sure they really use out of range values.
There is a fix for swapped indices of 64bit input vectors too, which
could be incorrectly adjusted if the zerovector was the first operand.
Fixes #55545
Differential Revision: https://reviews.llvm.org/D125865
Sheng [Thu, 19 May 2022 12:43:56 +0000 (20:43 +0800)]
[NFC][M68k] Replace `APInt::zextOrSelf` with `APInt::zext`
This is a follow up to D125558
David Spickett [Thu, 19 May 2022 11:57:44 +0000 (12:57 +0100)]
Reland "[lldb] Add --all option to "memory region""
This reverts commit
3e928c4b9dfb01efd2cb968795e605760828e873.
This fixes an issue seen on Windows where we did not properly
get the section names of regions if they overlapped. Windows
has regions like:
[0x00007fff928db000-0x00007fff949a0000) ---
[0x00007fff949a0000-0x00007fff949a1000) r-- PECOFF header
[0x00007fff949a0000-0x00007fff94a3d000) r-x .hexpthk
[0x00007fff949a0000-0x00007fff94a85000) r-- .rdata
[0x00007fff949a0000-0x00007fff94a88000) rw- .data
[0x00007fff949a0000-0x00007fff94a94000) r-- .pdata
[0x00007fff94a94000-0x00007fff95250000) ---
I assumed that you could just resolve the address and get the section
name using the start of the region but here you'd always get
"PECOFF header" because they all have the same start point.
The usual command repeating loop used the end address of the previous
region when requesting the next, or getting the section name.
So I've matched this in the --all scenario.
In the example above, somehow asking for the region at
0x00007fff949a1000 would get you a region that starts at
0x00007fff949a0000 but has a different end point. Using the load
address you get (what I assume is) the correct section name.
David Green [Thu, 19 May 2022 12:01:55 +0000 (13:01 +0100)]
[AArch64] Extend zero vector TBL codegen tests. NFC
Andrzej Warzynski [Thu, 19 May 2022 09:31:03 +0000 (09:31 +0000)]
[flang][driver] Make driver accept `-module-dir<value>`
`-module-dir` is Flang's equivalent for `-J` from GFortran (in fact,
`-J` is an alias for `-module-dir` in Flang). Currently, only
`-module-dir <value>` is accepted. However, `-J` (and other options for
specifying various paths) accepts `-J<value>` as well as `-J <value>`.
This patch makes sure that `-module-dir` behaves consistently with other
such flags.
Differential Revision: https://reviews.llvm.org/D125957
Dmitry Preobrazhensky [Thu, 19 May 2022 10:40:48 +0000 (13:40 +0300)]
[AMDGPU][MC][GFX940] Add SMFMAC aliases
Differential Revision: https://reviews.llvm.org/D125888
Jay Foad [Wed, 6 Oct 2021 11:04:03 +0000 (12:04 +0100)]
[APInt] Deprecate truncOrSelf, zextOrSelf and sextOrSelf
Differential Revision: https://reviews.llvm.org/D125558
Jay Foad [Wed, 6 Oct 2021 09:54:07 +0000 (10:54 +0100)]
[APInt] Remove all uses of zextOrSelf, sextOrSelf and truncOrSelf
Most clients only used these methods because they wanted to be able to
extend or truncate to the same bit width (which is a no-op). Now that
the standard zext, sext and trunc allow this, there is no reason to use
the OrSelf versions.
The OrSelf versions additionally have the strange behaviour of allowing
extending to a *smaller* width, or truncating to a *larger* width, which
are also treated as no-ops. A small amount of client code relied on this
(ConstantRange::castOp and MicrosoftCXXNameMangler::mangleNumber) and
needed rewriting.
Differential Revision: https://reviews.llvm.org/D125557
Ivan Kosarev [Thu, 19 May 2022 10:19:26 +0000 (11:19 +0100)]
[AMDGPU][NFC] Fix FileCheck directives in phi-vgpr-input-moveimm.mir.
Discovered with D125604.
Reviewed By: #amdgpu, arsenm
Differential Revision: https://reviews.llvm.org/D125900
Kirill Bobyrev [Thu, 19 May 2022 10:03:31 +0000 (12:03 +0200)]
[clangd] Update the test after diagnostic message change
Kirill Bobyrev [Thu, 19 May 2022 09:59:00 +0000 (11:59 +0200)]
[clangd] NFC: Clarify the Include Cleaner warning
Lian Wang [Wed, 11 May 2022 08:02:42 +0000 (08:02 +0000)]
[RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation
Re-landed D125206
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D125206
Konrad Kleine [Thu, 19 May 2022 09:12:19 +0000 (11:12 +0200)]
[release] Add cmake as an extra tarball and not bundle it
Revert "Add cmake/ to release tarballs via concatenation"
This reverts commit
3a33664e8838e8b77acd1bbb13b1cf5e580a1077.
Revert "Add cmake to source release tarballs"
This reverts commit
32a0482a65b86cf0d84ea7e784cca9852df5c67c.
Reviewed By: tstellar, aaronpuchert
Differential Revision: https://reviews.llvm.org/D125798
Alex Bradbury [Thu, 19 May 2022 09:09:30 +0000 (10:09 +0100)]
[WebAssembly][NFC] Fix errant tabs in test case in last commit
[4e8b2ac](https://reviews.llvm.org/rG4e8b2ac7c019) contained unintended
tabs. This commit fixes that.
Guillaume Chatelet [Wed, 18 May 2022 15:09:09 +0000 (15:09 +0000)]
[libc] Apply no-builtin everywhere, remove unnecessary flags
Some functions like `stpncpy` are implemented in terms of `memset` but are not
currently using `-fno-builtin-memset`. This is somewhat hidden by the fact that
we use `-ffreestanding` globally and that `-ffreestanding` implies
`-fno-builtin` for Clang.
This patch also removes `-mllvm -combiner-global-alias-analysis` that is Clang
specific and that does not bring substantial gains on modern processors.
Also we keep `-mllvm --tail-merge-threshold=0` for aarch64 in CMakeLists.txt
but we omit it in the Bazel config. This is because Bazel consumes the source
files directly and so it can use PGO to take optimal decisions locally.
Differential Revision: https://reviews.llvm.org/D125894
Alex Bradbury [Thu, 19 May 2022 09:06:02 +0000 (10:06 +0100)]
[WebAssembly] Fix bug where -no-type-check failed to completely disable the typechecker
Related to <https://github.com/llvm/llvm-project/issues/55566>.
Committing directly (per LLVM's code review policy) as this is a trivial
fix.
LLVM GN Syncbot [Thu, 19 May 2022 08:04:45 +0000 (08:04 +0000)]
[gn build] Port
4df795bff752
Sam McCall [Thu, 19 May 2022 08:04:25 +0000 (10:04 +0200)]
[Serialization] Add missing includes for CHAR_BIT
Lian Wang [Thu, 12 May 2022 03:31:13 +0000 (03:31 +0000)]
[LegalizeVectorTypes][VP] Add widen and split support for VP_SETCC
Reviewed By: craig.topper, frasercrmck
Differential Revision: https://reviews.llvm.org/D125446
Daniel Kiss [Thu, 19 May 2022 07:38:30 +0000 (09:38 +0200)]
[libunwind] Remove -Wsign-conversion warning
Reland after dependent change reland.
Sam McCall [Wed, 11 May 2022 13:42:31 +0000 (15:42 +0200)]
[Serialization] Delta-encode consecutive SourceLocations in TypeLoc
Much of the size of PCH/PCM files comes from stored SourceLocations.
These are encoded using (almost) their raw value, VBR-encoded. Absolute
SourceLocations can be relatively large numbers, so this commonly takes
20-30 bits per location.
We can reduce this by exploiting redundancy: many "nearby" SourceLocations are
stored differing only slightly and can be delta-encoded.
Randam-access loading of AST nodes constrains how long these sequences
can be, but we can do it at least within a node that always gets
deserialized as an atomic unit.
TypeLoc is implemented in this patch as it's a relatively small change
that shows most of the API.
This saves ~3.5% of PCH size, I have local changes applying this technique
further that save another 3%, I think it's possible to get to 10% total.
Differential Revision: https://reviews.llvm.org/D125403
Lian Wang [Tue, 17 May 2022 01:47:32 +0000 (01:47 +0000)]
[LegalizeTypes][VP] Add integer promotions support for VP_TRUNCATE
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D125739
Lian Wang [Wed, 18 May 2022 07:44:26 +0000 (07:44 +0000)]
[LegalizeTypes][VP][NFC] Use an if and two returns instead of ?: operator
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D125858
Sam McCall [Thu, 19 May 2022 06:26:13 +0000 (08:26 +0200)]
[clangd] Suppress warning: control reaches end of function
Sam McCall [Thu, 19 May 2022 06:18:34 +0000 (08:18 +0200)]
[pseudo] Squash some warnings. NFC
Explicitly sizing Kind enum suggests that too-large values are allowed,
and that putting it in a bitfield is dangerous.
GCC doesn't like condition ? integer : enum.
LLVM GN Syncbot [Thu, 19 May 2022 06:13:53 +0000 (06:13 +0000)]
[gn build] Port
03ea140b3a28
Sam McCall [Thu, 19 May 2022 06:13:02 +0000 (08:13 +0200)]
[clang-tidy] Fix logic of assertion
Sam McCall [Wed, 18 May 2022 17:27:43 +0000 (19:27 +0200)]
Reland(3) "[clangd] Indexing of standard library"
Tracked down the crash, which was argument-evaluation-order UB
in the wrapping indexStandardLibrary().
Sorry for the churn!
This reverts commit
77533ea443aca6e9978d7c8a6822420f8345f6af.
Stella Laurenzo [Wed, 18 May 2022 05:42:39 +0000 (22:42 -0700)]
[mlir][python] Add Python bindings for ml_program dialect.
Differential Revision: https://reviews.llvm.org/D125852
Stella Laurenzo [Sat, 23 Apr 2022 02:59:34 +0000 (19:59 -0700)]
[mlir] Add GlobalOp, GlobalLoadConstOp to ml_program.
The approach I took was to define a dialect 'extern' attribute that a GlobalOp can take as a value to signify external linkage. I think this approach should compose well and should also work with wherever the OpaqueElements work goes in the future (since that is just another kind of attribute). I special cased the GlobalOp parser/printer for this case because it is significantly easier on the eyes.
In the discussion, Jeff Niu had proposed an alternative syntax for GlobalOp that I ended up not taking. I did try to implement it but a) I don't think it made anything easier to read in the common case, and b) it made the parsing/printing logic a lot more complicated (I think I would need a completely custom parser/printer to do it well). Please have a look at the common cases where the global type and initial value type match: I don't think how I have it is too bad. The less common cases seem ok to me.
I chose to only implement the direct, constant load op since that is non side effecting and there was still discussion pending on that.
Differential Revision: https://reviews.llvm.org/D124318
Alexander Pivovarov [Wed, 18 May 2022 23:04:05 +0000 (16:04 -0700)]
Fix if statement in DebugInfo/GSYM/LookupResult.cpp
lizhijin [Thu, 19 May 2022 04:20:33 +0000 (12:20 +0800)]
[LV] Widen freeze instead of scalarizing it
This patch changes the strategy for vectorizing freeze instrucion, from
replicating multiple times to widening according to selected VF.
Fixes #54992
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D125016
Zi Xuan Wu (Zeson) [Thu, 19 May 2022 04:17:29 +0000 (12:17 +0800)]
[NFC][RISCV] Enable TuneNoDefaultUnroll feature to control targets which use default unroll preference
In RISCVTargetTransformInfo, enumerating the processor family is not a good way to predict.
Because it needs to enumerate many subtarget family and is hard to update if add new subtarget.
Instead, create a feature to distinguish whether targets want to use default unroll preference or not.
Keep TuneSiFive7 because it's flag to indicate subtarget family, which may used in other place.
Differential Revision: https://reviews.llvm.org/D125741
Med Ismail Bennani [Thu, 19 May 2022 04:12:15 +0000 (21:12 -0700)]
[lldb/test] Fix failures caused by a previous PExpect.launch change
This should fix the issues introduced by d71d1a9, which skipped all the
test setup commands.
This also fixes the test failures happening in TestAutosuggestion.py.
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Thu, 19 May 2022 02:59:49 +0000 (19:59 -0700)]
Revert "[lldb/test] Make some tests as XFAIL while I investigate the issue"
This reverts commit
80589f272c200798b57a5151680a993bc2cc00a7.
Chenbing Zheng [Thu, 19 May 2022 03:22:26 +0000 (11:22 +0800)]
[InstCombine] (rot X, ?) == 0/-1 --> X == 0/-1
In this patch we add a function foldICmpInstWithConstantAllowUndef
to fold integer comparisons with a constant operand: icmp Pred X, C
where X is some kind of instruction and C is AllowUndef.
We move this fold to the new function, so that it can solve undef elts in a vector.
Reviewed By: spatel, RKSimon
Differential Revision: https://reviews.llvm.org/D125220
Chenbing Zheng [Thu, 19 May 2022 02:57:49 +0000 (10:57 +0800)]
[InstCombine] Allow undef vectors when foldSelectToCopysign
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D125671
Jon Roelofs [Thu, 19 May 2022 01:34:49 +0000 (18:34 -0700)]
Fix an or+and miscompile w/ GlobalISel
Fixes #55284
Med Ismail Bennani [Thu, 19 May 2022 02:07:47 +0000 (19:07 -0700)]
Med Ismail Bennani [Thu, 19 May 2022 01:51:10 +0000 (18:51 -0700)]
[lldb/test] Make some tests as XFAIL while I investigate the issue
This is very likely to be caused by
d71d1a947bee1247e952f22c13ad3ed3d041e36a.
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Mon, 16 May 2022 21:59:28 +0000 (14:59 -0700)]
dyld patch
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Wed, 18 May 2022 21:18:14 +0000 (14:18 -0700)]
[lldb/crashlog] Fix line entries resolution in interactive mode
This patch subtracts 1 to the pc of any frame above frame 0 to get the
previous line entry and display the right line in the debugger.
This also rephrase some old comment from `
48d157dd4`.
rdar://
92686666
Differential Revision: https://reviews.llvm.org/D125928
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Thu, 19 May 2022 01:16:59 +0000 (18:16 -0700)]
[lldb/Core] Fix "sticky" long progress messages
When the terminal window is too small, lldb would wrap progress messages
accross multiple lines which would break the progress event handling
code that is supposed to clear the message once the progress is completed.
This causes the progress message to remain on the screen, sometimes partially,
which can be confusing for the user.
To fix this issue, this patch trims the progress message to the terminal
width taking into account the progress counter leading the message for
finite progress events and also the trailing `...`.
rdar://
91993836
Differential Revision: https://reviews.llvm.org/D124785
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Wed, 18 May 2022 18:35:20 +0000 (11:35 -0700)]
[lldb/Test] Add `use_colors` argument to the PExpect.launch wrapper
This patch adds a new `use_colors` argument to the PExpect.launch
method.
As the name suggests, it allows the user to conditionally enable color
support in the debugger, which can be helpful to test functionalities that
rely on that, like progress reporting. It defaults to False.
Differential Revision: https://reviews.llvm.org/D125915
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Wed, 18 May 2022 18:33:31 +0000 (11:33 -0700)]
[llvm/Support] Fallback to $TERM if terminfo has no "colors" capability
It can happen on macOS that terminal doesn't report the "colors"
capability in the terminfo database, in which case `tigetnum` returns -1.
This doesn't mean however that the terminal doesn't supports color, it
just means that the capability is absent from the terminal description.
In that case, we should still fallback to the checking the $TERM
environment variable to see if it supports ANSI escapes codes.
Differential Revision: https://reviews.llvm.org/D125914
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Sheng [Thu, 19 May 2022 01:09:43 +0000 (09:09 +0800)]
[M68k][Disassembler] Fix decoding conflict
This diff fixes decoding conflict between these pair of instructions:
ADD(16|32)dd / ADD(16|32)dr
SUB(16|32)dd / SUB(16|32)dr
AND(16|32)dd / AND(16|32)dr
OR(16|32)dd / OR(16|32)dr
Reviewed By: ricky26
Differential Revision: https://reviews.llvm.org/D125861
Mark Kettenis [Thu, 19 May 2022 00:05:56 +0000 (20:05 -0400)]
[Sparc] Make sure that we really don't emit quad-precision unless the "hard-quad-float" feature is available
Make sure that we really don't emit quad-precision unless the "hard-quad-float"
feature is available. Add missing replacement instruction patterns that are
needed to emit alternative code for conditional moves of quad-precision floats.
Test from koakuma.
Reviewed By: koakuma
Differential Revision: https://reviews.llvm.org/D119104
Damian Rouson [Thu, 14 Apr 2022 00:03:33 +0000 (17:03 -0700)]
[flang] test conforming & non-conforming lcobound
Add a test with standard-conforming non-conforming lcobound()
intrinsic function invocations. Also test that several
non-conforming lcobound() invocations generate the correct error
messages.
Differential Revision: https://reviews.llvm.org/
DD123747
Matthias Braun [Tue, 3 May 2022 17:01:54 +0000 (10:01 -0700)]
Extend switch condition in optimizeSwitchPhiConst when free
In a case like:
switch((i32)x) { case 42: phi((i64)42, ...); }
replace `(i64)42` with `zext(x)` when we can do so for free.
This fixes a part of https://github.com/llvm/llvm-project/issues/55153
Differential Revision: https://reviews.llvm.org/D124897
Rafael Auler [Thu, 17 Feb 2022 01:01:19 +0000 (17:01 -0800)]
[BOLT] Testcase to repro R_X86_64_REX_GOTPCRELX bug
Add a new testcase that reproduces a bug when BOLTing current
trunk LLD bootstrapped with trunk clang. This makes it official
that we do not support this transformation but are working on
it. When the support is ready, XFAIL should be removed.
Reviewed By: maksfb, Amir, yota9
Differential Revision: https://reviews.llvm.org/D125843
Andrey Tretyakov [Fri, 13 May 2022 10:48:23 +0000 (13:48 +0300)]
[SPIRV] Add simple tests to improve test coverage
Differential Revision: https://reviews.llvm.org/D125404
Michael Kruse [Wed, 18 May 2022 22:03:03 +0000 (17:03 -0500)]
[Analysis] Avoid virtual dtor. NFC.
Replace virtual destructor by a protected non-virtual one. Additionally also making derived structs as virtual avoids the warning from reappearing.
Also see the mailing list discussion: https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20220516/1038290.html
Reviewed By: dblaikie, YangKeao
Differential Revision: https://reviews.llvm.org/D125830
Nemanja Ivanovic [Wed, 18 May 2022 22:31:38 +0000 (17:31 -0500)]
[Debuginfod] Fix shared libs build break after
eafa0530417e
The commit added a dependency on LLVMSymbolize but the
CMakeLists.txt file wasn't updated. This doesn't cause
issues for static libraries builds but breaks the shared
libraries build. This just adds the missing dependency.
Philip Reames [Wed, 18 May 2022 21:45:38 +0000 (14:45 -0700)]
[RISCV] Add a test case where mutation still violates strict asserts in InsertVSETVLI
This is the test which triggered my disabling of the assert in d4545e6. The
issue it reveals is basically the same as from
cc0283a6, but in the cross
block case.
We visit block1, mutate the setvli (correctly), and then visit block two and
ask whether the vadd is compatible with the block state. Before mutation, it
wasn't. After mutation, it is. And thus, we have our phase 1 vs 3 difference.
Mariusz Borsa [Mon, 9 May 2022 18:34:22 +0000 (11:34 -0700)]
[Sanitizers][Darwin] Rename Apple macro SANITIZER_MAC -> SANITIZER_APPLE
Initial introduction of the new macro before obsoleting the old one - the old name was really confusing.
Also moved SANITIZER_WATCHOS and SANITIZER_TVOS definitions under common #if defined(__APPLE__) block
Differential Revision: https://reviews.llvm.org/D125816
Usama Hameed [Wed, 18 May 2022 21:26:40 +0000 (14:26 -0700)]
[Analyzer] Remove extra space from NSErrorChecker message.
Differential Revision: https://reviews.llvm.org/D125840
Michael Jones [Wed, 18 May 2022 18:42:07 +0000 (11:42 -0700)]
[libc][windows] fix strlcpy tests
Generally, size_t is an alias for unsigned long long. In the strlcpy
tests, the return value of strlcpy (a size_t) is compared to an unsigned
long. On Linux unsigned long and unsigned long long are both 64 bits,
but on windows unsigned long is 32 bits. Since the macros require
identical types for both sides, this caused a build failure on windows.
This patch changes the constants to be explicit size_t values.
Differential Revision: https://reviews.llvm.org/D125917
Mitch Phillips [Wed, 18 May 2022 21:10:12 +0000 (14:10 -0700)]
[NFCI] clang-format gwp-asan files.
Mogball [Wed, 18 May 2022 21:06:47 +0000 (21:06 +0000)]
[mlir] Fix the error message for missing explicit TypeID
Summary:
The error message was incorrect
Reviewers: rriddle
Subscribers:
Mitch Phillips [Wed, 18 May 2022 21:04:04 +0000 (14:04 -0700)]
[NFCI] clang-format scudo standalone
Mitch Phillips [Wed, 18 May 2022 20:39:59 +0000 (13:39 -0700)]
Reland "[dwarf] Emit a DIGlobalVariable for constant strings."
An upcoming patch will extend llvm-symbolizer to provide the source line
information for global variables. The goal is to move AddressSanitizer
off of internal debug info for symbolization onto the DWARF standard
(and doing a clean-up in the process). Currently, ASan reports the line
information for constant strings if a memory safety bug happens around
them. We want to keep this behaviour, so we need to emit debuginfo for
these variables as well.
Reviewed By: dblaikie, rnk, aprantl
Differential Revision: https://reviews.llvm.org/D123534
Alexey Bataev [Tue, 5 Oct 2021 12:55:48 +0000 (05:55 -0700)]
[SLP]Improve reductions vectorization.
The pattern matching and vectgorization for reductions was not very
effective. Some of of the possible reduction values were marked as
external arguments, SLP could not find some reduction patterns because
of too early attempt to vectorize pair of binops arguments, the cost of
consts reductions was not correct. Patch addresses these issues and
improves the analysis/cost estimation and vectorization of the
reductions.
The most significant changes in SLP.NumVectorInstructions:
Metric: SLP.NumVectorInstructions [140/14396]
Program results results0 diff
test-suite :: SingleSource/Benchmarks/Adobe-C++/loop_unroll.test 920.00 3548.00 285.7%
test-suite :: SingleSource/Benchmarks/BenchmarkGame/n-body.test 66.00 122.00 84.8%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 100.00 128.00 28.0%
test-suite :: MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc.test 664.00 810.00 22.0%
test-suite :: MultiSource/Benchmarks/mafft/pairlocalalign.test 592.00 687.00 16.0%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 402.00 426.00 6.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 1665.00 1745.00 4.8%
test-suite :: External/SPEC/CINT2017rate/500.perlbench_r/500.perlbench_r.test 135.00 139.00 3.0%
test-suite :: External/SPEC/CINT2017speed/600.perlbench_s/600.perlbench_s.test 135.00 139.00 3.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 388.00 397.00 2.3%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 895.00 914.00 2.1%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 240.00 244.00 1.7%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 240.00 244.00 1.7%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 820.00 832.00 1.5%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 820.00 832.00 1.5%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 14804.00 14914.00 0.7%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 8125.00 8183.00 0.7%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 1330.00 1338.00 0.6%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 1330.00 1338.00 0.6%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 9832.00 9880.00 0.5%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 5267.00 5291.00 0.5%
test-suite :: External/SPEC/CFP2017rate/538.imagick_r/538.imagick_r.test 4018.00 4024.00 0.1%
test-suite :: External/SPEC/CFP2017speed/638.imagick_s/638.imagick_s.test 4018.00 4024.00 0.1%
test-suite :: External/SPEC/CFP2017speed/644.nab_s/644.nab_s.test 426.00 424.00 -0.5%
test-suite :: External/SPEC/CFP2017rate/544.nab_r/544.nab_r.test 426.00 424.00 -0.5%
test-suite :: External/SPEC/CINT2017rate/541.leela_r/541.leela_r.test 201.00 192.00 -4.5%
test-suite :: External/SPEC/CINT2017speed/641.leela_s/641.leela_s.test 201.00 192.00 -4.5%
644.nab_s and 544.nab_r - reduced number of shuffles but increased number
of useful vectorized instructions.
641.leela_s and 541.leela_r - the function
`@_ZN9FastBoard25get_pattern3_augment_specEiib` is not inlined anymore
but its body gets vectorized successfully. Before, the function was
inlined twice and vectorized just after inlining, currently it is not
required. The vector code looks pretty similar, just like as it was before.
Differential Revision: https://reviews.llvm.org/D111574
Yusra Syeda [Wed, 18 May 2022 19:57:05 +0000 (15:57 -0400)]
[SystemZ][z/OS] Add missing include to llvm/include/llvm/BinaryFormat/GOFF.h
Differential Revision: https://reviews.llvm.org/D125921
Nathan James [Wed, 18 May 2022 19:47:36 +0000 (20:47 +0100)]
[clang-tidy] Fix readability-simplify-boolean-expr when Ifs have an init statement or condition variable
Fixes https://github.com/llvm/llvm-project/issues/55553.
Reviewed By: LegalizeAdulthood
Differential Revision: https://reviews.llvm.org/D125874
zhijian [Wed, 18 May 2022 19:46:52 +0000 (15:46 -0400)]
[libc++][CI] fixed a return curr_symbol() for Russian in the libcxx/test/support/locale_helpers.h for AIX
Summary:
fixed a return curr_symbol() for Russian in the libcxx/test/support/locale_helpers.h for AIX
Reviewers: David Tenty,Mark de Wever
Differential Revision: https://reviews.llvm.org/D125801
David Blaikie [Wed, 18 May 2022 19:42:07 +0000 (19:42 +0000)]
Fix some -Wstrict-prototypes issues in ORC examples
Fangrui Song [Wed, 18 May 2022 19:40:27 +0000 (12:40 -0700)]
[Driver] Refactor /opt/rh detection
Check /opt/rh first to avoid `/opt/rh/*` newfstatat/etc calls on other
distributions.
Michael Kitzan [Tue, 17 May 2022 00:22:50 +0000 (17:22 -0700)]
[GISel] Add new combines for G_FMINNUM/MAXNUM and G_FMINIMUM/MAXIMUM
I noticed https://reviews.llvm.org/D87415 added SDAG combines to fold
FMIN/MAX instrs with NaNs.
The patch implements the same NaN combines for GISel GMIR FMIN/MAX opcodes:
G_FMINNUM(X, NaN) -> X
G_FMAXNUM(X, NaN) -> X
G_FMINIMUM(X, NaN) -> NaN
G_FMAXIMUM(X, NaN) -> NaN
The patch adds AArch64 tests for these combines as well.
Reviewed by: arsenm
Differential revision: https://reviews.llvm.org/D125819
Sanjay Patel [Wed, 18 May 2022 18:34:48 +0000 (14:34 -0400)]
[InstCombine] allow variable shift amount in bswap + shift fold
When shifting by a byte-multiple:
bswap (shl X, Y) --> lshr (bswap X), Y
bswap (lshr X, Y) --> shl (bswap X), Y
This was limited to constants as a first step in D122010 /
60820e53ec9d3be02 ,
but issue #55327 shows a source example (and there's a test based on that here)
where a variable shift amount is used in this pattern.
Sanjay Patel [Wed, 18 May 2022 17:35:48 +0000 (13:35 -0400)]
[InstCombine] add tests for bswap with shift op; NFC
issue #55327
Martin Storsjö [Mon, 22 Nov 2021 12:13:01 +0000 (14:13 +0200)]
[llvm-readobj] Improve printing of Windows ARM packed unwind info
Fix a couple minor details in the existing logic for calculating
saved registers and stack adjustment.
Synthesize the corresponding prologues and epilogues and print them.
(This supersedes the previous printout of one single list of stored
registers; as there's lots of minor nuance differences in how
registers are pushed/popped in various corner cases, it's better to
print the full prologue/epilogue instead of trying to condense it
into one single list.)
Print the raw values of the fields Reg, R, L (LinkRegister) and C
(Chaining) instead of only printing the derived values.
Differential Revision: https://reviews.llvm.org/D125644
LLVM GN Syncbot [Wed, 18 May 2022 18:23:14 +0000 (18:23 +0000)]
[gn build] Port
4d8268fbf4cd
Michael Jones [Wed, 18 May 2022 18:17:11 +0000 (11:17 -0700)]
[libc] fix missing semicolon in bsd_ext.td
Fix typo in previous commit
Differential Revision: https://reviews.llvm.org/D125913
Petr Hosek [Wed, 18 May 2022 17:09:23 +0000 (17:09 +0000)]
[CMake][Fuchsia] Build runtimes as universal libraries on OS X
We want to build libunwind, libc++abi and libc++ as universal libraries
supporting both x86_64 and arm64 architectures.
Differential Revision: https://reviews.llvm.org/D125908
Mark de Wever [Sun, 26 Sep 2021 15:04:53 +0000 (17:04 +0200)]
[libc++][format][5/6] Improve format_to_n.
Use a specialized buffer wrapper to limit the number of insertions in the
buffer. After the limit has been reached the buffer only needs to count
the number of insertions to return the buffer size required to store the
entire output.
Depends on D110498
Reviewed By: #libc, Mordante
Differential Revision: https://reviews.llvm.org/D110499
Yusra Syeda [Wed, 18 May 2022 17:05:11 +0000 (13:05 -0400)]
[SystemZ][z/OS] Add the PPA1 to SystemZAsmPrinter
Differential Revision: https://reviews.llvm.org/D125725
Mark de Wever [Sun, 3 Oct 2021 11:11:53 +0000 (13:11 +0200)]
[libc++][format] Improve format-arg-store.
This optimizes the __format_arg_store type to allow a more efficient
storage of the basic_format_args.
It stores the data in two arrays:
- A struct with the tag of the exposition only variant's type and the
offset of the element in the data array. Since this array only depends
on the type information it's calculated at compile time and can be
shared by different instances of this class.
- The arguments converted to the types used in the exposition only
variant of basic_format_arg. This means the packed data can be
directly copied to an element of this variant.
The new code uses rvalue reference arguments in preparation for P2418.
The handle class also has some changes to prepare for P2418. The real
changed for P2418 will be done separately, but these parts make it
easier to implement that paper.
Some parts of existing test code are removed since they were no longer
valid after the changes, but new tests have been added.
Implements parts of:
- P2418 Add support for std::generator-like types to std::format
Completes:
- LWG3473 Normative encouragement in non-normative note
Depends on D121138
Reviewed By: #libc, vitaut, Mordante
Differential Revision: https://reviews.llvm.org/D121514
Mark de Wever [Sat, 29 Jan 2022 19:15:11 +0000 (20:15 +0100)]
[libc++][format] Adds formatter<charT[N], charT>.
This formatter isn't in the list of required formatters in
[format.formatter.spec]/2.2
For each charT, the string type specializations
template<> struct formatter<charT*, charT>;
template<> struct formatter<const charT*, charT>;
template<size_t N> struct formatter<const charT[N], charT>;
template<class traits, class Allocator>
struct formatter<basic_string<charT, traits, Allocator>, charT>;
template<class traits>
struct formatter<basic_string_view<charT, traits>, charT>;
Since remove_cvref_t<const charT[N]> is charT[N] the formatter is
required by
[format.functions]/25
Preconditions: formatter<remove_cvref_t<Ti>, charT> meets the
BasicFormatter requirements ([formatter.requirements]) for each Ti in
Args.
Depends on D120921
Reviewed By: #libc, Mordante
Differential Revision: https://reviews.llvm.org/D121138