Hans-Peter Nilsson [Mon, 10 Feb 2020 16:30:05 +0000 (17:30 +0100)]
gcc.target/cris/pr93372-1.c: New test.
This test was separated from the posted and approved patch named
"dbr: Filter-out TARGET_FLAGS_REGNUM from end_of_function_needs"
and applied: it doesn't fail yet. It differs from the posted
version in that function "g" is commented-out; see the added
comment.
Hans-Peter Nilsson [Mon, 10 Feb 2020 16:25:56 +0000 (17:25 +0100)]
gcc.target/cris/cris.exp (check_effective_target_cc0): New.
To simplify separating the cc0-specific xfails, let's have an
effective-target.
This likely fits all targets.
Hans-Peter Nilsson [Mon, 10 Feb 2020 16:21:13 +0000 (17:21 +0100)]
cris: try to generate zero-based comparisons
* config/cris/cris.c (cris_reduce_compare): New function.
* config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
* config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
(cstore<mode>4"): Apply cris_reduce_compare in expanders.
The decc0ration work of the CRIS port made me look closer at the
code for trivial comparisons, as in the condition for branches
and conditional-stores, like in:
void g(short int a, short int b)
{
short int c = a + b;
if (c >= 0)
foo ();
}
At -O2, the cc0 version of the CRIS port has an explicit
*uneliminated* compare instruction ("cmp.w -1,$r10") instead of
an (eliminated) compare against 0 (which below I'll call a
zero-compare). This for the CRIS-cc0 version, but I see this
also for a much older gcc, at 4.7. For the decc0rated port, the
compare *is* a test against 0, eventually eliminated. To wit,
for cc0 (mind the delay-slot):
_g:
subq 4,$sp
add.w $r11,$r10
cmp.w -1,$r10
ble .L9
move $srp,[$sp]
jsr _foo
.L9:
jump [$sp+]
The compare instruction is expected to be eliminated, i.e. the
following diff to the above is desired, modulo the missing
sibling call, which corresponds to what I get from 4.7 and for
the decc0rated port:
!--- a Wed Feb 5 15:22:27 2020
!+++ b Wed Feb 5 15:22:51 2020
!@@ -1,8 +1,7 @@
! _g:
! subq 4,$sp
! add.w $r11,$r10
!- cmp.w -1,$r10
!- ble .L9
!+ bmi .L9
! move $srp,[$sp]
!
! jsr _foo
Tracking this difference, I see that for both cc0-CRIS and the
decc0rated CRIS, the comparison actually starts out as a compare
against -1 at "expand" time, but is transformed for decc0rated
CRIS to a zero-compare in "cse1".
For CRIS-cc0 "cse1" does try to replace the compare with a
zero-compare, but fails because at the same time it tries to
replace the c operand with (a + b). Or some such; it fails and
no other pass succeeds. I was not into fixing cc0-handling in
core gcc, so I didn't look closer.
BTW, at first, I was a bit surprised to see that for compares
against a constant, a zero-compare is not canonical RTX for
*all* conditions, and that instead only a subset of all RTX
conditions against a constant are canonical, transforming one
condition to the canonical one by adding 1 or -1 to the
constant. It does makes sense at a closer look, but still not
so much when emitting RTL.
There are several places that mention in comments that emitting
RTX as zero-compare is preferable, but nothing is done about it.
Some generic code instead seems confused that the *target* is
helped by seeing canonical RTX, or perhaps it (its authors) like
me, confused about what a canonical comparison is. For example,
prepare_cmp_insn calls canonicalize_comparison last before
emitting the actual instructions. I see most ports for various
port-specific reasons does their own massaging in their cbranch
and cstore expanders. Still, the suboptimal compares *should*
be fixed at expand time; better start out right than just
relying on later optimizations.
This kind of change is not acceptable in the current gcc
development stage, at least as a change in generic code.
However, it's problematic enough that I chose to fix this right
now in the CRIS port. For that, I claim a possibly
long-standing regression. After this, code before and after
decc0ration is similar enough that I can spot
compare-elimination-efforts and apply regression test-cases
without them drowning in cc0-specific xfailing.
I hope to eventually lift out cris_reduce_compare (renamed) into
say expmed.c, called in e.g. emit_store_flag_1 (replacing the
in-line code) and prepare_cmp_insn. Later.
H.J. Lu [Mon, 10 Feb 2020 16:06:53 +0000 (08:06 -0800)]
Move ChangeLog entry of commit
bf6465d046 from gcc to libgcc
Jakub Jelinek [Mon, 10 Feb 2020 16:05:58 +0000 (17:05 +0100)]
arm: Add testcase for already fixed ICE [PR91913]
2020-02-10 Jakub Jelinek <jakub@redhat.com>
PR target/91913
* gfortran.dg/pr91913.f90: New test.
H.J. Lu [Mon, 10 Feb 2020 15:58:45 +0000 (07:58 -0800)]
i386: Properly pop restore token in signal frame
Linux CET kernel places a restore token on shadow stack for signal
handler to enhance security. The restore token is 8 byte and aligned
to 8 bytes. It is usually transparent to user programs since kernel
will pop the restore token when signal handler returns. But when an
exception is thrown from a signal handler, now we need to pop the
restore token from shadow stack. For x86-64, we just need to treat
the signal frame as normal frame. For i386, we need to search for
the restore token to check if the original shadow stack is 8 byte
aligned. If the original shadow stack is 8 byte aligned, we just
need to pop 2 slots, one restore token, from shadow stack. Otherwise,
we need to pop 3 slots, one restore token + 4 byte padding, from
shadow stack.
This patch also includes 2 tests, one has a restore token with 4 byte
padding and one without.
Tested on Linux/x86-64 CET machine with and without -m32.
libgcc/
PR libgcc/85334
* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment):
New.
gcc/testsuite/
PR libgcc/85334
* g++.target/i386/pr85334-1.C: New test.
* g++.target/i386/pr85334-2.C: Likewise.
Richard Earnshaw [Mon, 10 Feb 2020 15:37:23 +0000 (15:37 +0000)]
arm: correct constraints on movsi_compare0 [PR91913]
The peephole that detects a mov of one register to another followed by
a comparison of the original register against zero is only used in Arm
state; but the instruction that matches this is generic to all 32-bit
compilation states. That instruction lacks support for SP which is
permitted in Arm state, but has restrictions in Thumb2 code.
This patch fixes the problem by allowing SP when in ARM state for all
registers; in Thumb state it allows SP only as a source when the
register really is copied to another target.
* config/arm/arm.md (movsi_compare0): Allow SP as a source register
in Thumb state and also as a destination in Arm state. Add T16
variants.
Hans-Peter Nilsson [Tue, 28 Jan 2020 21:34:49 +0000 (22:34 +0100)]
md.texi (Define Subst): Match closing paren in example.
Jakub Jelinek [Mon, 10 Feb 2020 14:50:17 +0000 (15:50 +0100)]
c-format: -Wformat-diag fix [PR93641]
The last argument to strncasecmp is incorrect, so it matched even when
can%' wasn't followed by t. Also, the !ISALPHA (format_chars[1]) test
looks pointless, format_chars[1] must be ' if strncasecmp succeeded and
so will never be ISALPHA.
2020-02-10 Jakub Jelinek <jakub@redhat.com>
PR other/93641
* c-format.c (check_plain): Fix up last argument of strncasecmp.
Remove useless extra test.
* gcc.dg/format/gcc_diag-11.c (test_cdiag_bad_words): Add two further
tests.
Christophe Lyon [Mon, 10 Feb 2020 12:54:39 +0000 (12:54 +0000)]
arm: Fix up arm installed unwind.h for use in pedantic modes [PR93615]
Commit r10-6500-g811a475ea3fcc55ee4aea7c81171891ef19dfc25 broke the
GCC build for arm-none-uclinuxfdpiceabi, as it forgot to update some
uses of gnu_Unwind_Find_got.
2020-02-10 Christophe Lyon <christophe.lyon@linaro.org>
libgcc/
PR target/93615
* unwind-arm-common.inc: Replace uses of gnu_Unwind_Find_got with
_Unwind_gnu_Find_got.
* unwind-pe.h: Likewise.
Jakub Jelinek [Mon, 10 Feb 2020 14:04:55 +0000 (15:04 +0100)]
c++: Fux strncmp last argument in dump_decl_name [PR93641]
I'm not aware of symbols starting with _ZG that don't start with _ZGR
prefix, but perhaps in the future there might be some.
2020-02-10 Jakub Jelinek <jakub@redhat.com>
PR other/93641
* error.c (dump_decl_name): Fix up last argument to strncmp.
Jakub Jelinek [Mon, 10 Feb 2020 14:02:39 +0000 (15:02 +0100)]
i386: Fix strncmp last arguments in x86_64_elf_section_type_flags
Clearly I can't count, so we would consider as SECTION_BSS even sections
like .lbssfoo or .gnu.linkonce.lbbar, even when linker only considers as
special .lbss or .lbss.baz or .gnu.linkonce.lb.qux.
2020-02-10 Jakub Jelinek <jakub@redhat.com>
PR target/58218
PR other/93641
* config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
arguments of strncmp.
Jason Merrill [Sun, 9 Feb 2020 23:47:34 +0000 (00:47 +0100)]
c++: Fix flexible array with synthesized constructor.
We were already rejecting initialization of a flexible array member in a
constructor; we similarly shouldn't try to clean it up.
PR c++/93618
* tree.c (array_of_unknown_bound_p): New.
* init.c (perform_member_init): Do nothing for flexible arrays.
Frederik Harwath [Mon, 10 Feb 2020 07:08:00 +0000 (08:08 +0100)]
Add xfails to libgomp tests target-{33,34}.c, target-link-1.c
Add xfails for nvptx offloading because
"no GOMP_OFFLOAD_async_run implemented in plugin-nvptx.c"
(https://gcc.gnu.org/PR81688) and because
"omp target link not implemented for nvptx"
(https://gcc.gnu.org/PR81689).
libgomp/
* testsuite/libgomp.c/target-33.c: Add xfail for execution on
offload_target_nvptx, cf. https://gcc.gnu.org/PR81688.
* testsuite/libgomp.c/target-34.c: Likewise.
* testsuite/libgomp.c/target-link-1.c: Add xfail for
offload_target_nvptx, cf. https://gcc.gnu.org/PR81689.
Feng Xue [Mon, 10 Feb 2020 04:46:45 +0000 (12:46 +0800)]
Update testcase ChangeLog for PR93203
2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
PR ipa/93203
* g++.dg/ipa/pr93203.C: New test.
* gcc.dg/ipa/ipcp-1.c: Change dump string.
Feng Xue [Tue, 21 Jan 2020 12:53:38 +0000 (20:53 +0800)]
Generalized value pass-through for self-recusive function (PR ipa/93203)
Besides simple pass-through (aggregate) jump function, arithmetic (aggregate)
jump function could also bring same (aggregate) value as parameter passed-in
for self-feeding recursive call. For example,
f1 (int i) /* normal jump function */
{
f1 (i & 1);
}
Suppose i is 0, recursive propagation via (i & 1) also gets 0, which
can be seen as a simple pass-through of i.
f2 (int *p) /* aggregate jump function */
{
int t = *p & 1;
f2 (&t);
}
Likewise, if *p is 0, (*p & 1) is also 0, and &t is an aggregate simple
pass-through of p.
2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
PR ipa/93203
* ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
but different source value.
(adjust_callers_for_value_intersection): New function.
(gather_edges_for_value): Adjust order of callers to let a
non-self-recursive caller be the first element.
(self_recursive_pass_through_p): Add a new parameter "simple", and
check generalized self-recursive pass-through jump function.
(self_recursive_agg_pass_through_p): Likewise.
(find_more_scalar_values_for_callers_subset): Compute value from
pass-through jump function for self-recursive.
(intersect_with_plats): Cleanup previous implementation code for value
itersection with self-recursive call edge.
(intersect_with_agg_replacements): Likewise.
(intersect_aggregates_with_edge): Deduce value from pass-through jump
function for self-recursive call edge. Cleanup previous implementation
code for value intersection with self-recursive call edge.
(decide_whether_version_node): Remove dead callers and adjust order
to let a non-self-recursive caller be the first element.
PR ipa/93203
* g++.dg/ipa/pr93203.C: New test.
GCC Administrator [Mon, 10 Feb 2020 00:16:38 +0000 (00:16 +0000)]
Daily bump.
Uros Bizjak [Sun, 9 Feb 2020 17:04:31 +0000 (18:04 +0100)]
Fix target selector for pr91333.c
* gcc.target/i386/pr91333.c (dg-do): Fix target selector.
Uros Bizjak [Sun, 9 Feb 2020 16:56:38 +0000 (17:56 +0100)]
Improve splitX passes management
The names of split_before_sched2 ("split4") and split_before_regstack
("split3") do not reflect their insertion point in the sequence of passes,
where split_before_regstack follows split_before_sched2. Reorder the code
and rename the passes to reflect the reality.
split_before_regstack pass does not need to run if split_before_sched2 pass
was already performed. Introduce enable_split_before_sched2 function to
simplify gating functions of these two passes.
There is no need for a separate rest_of_handle_split_before_sched2.
split_all_insns can be called unconditionally from
pass_split_before_sched2::execute, since the corresponding gating function
determines if the pass is executed or not.
* recog.c: Move pass_split_before_sched2 code in front of
pass_split_before_regstack.
(pass_data_split_before_sched2): Rename pass to split3 from split4.
(pass_data_split_before_regstack): Rename pass to split4 from split3.
(rest_of_handle_split_before_sched2): Remove.
(pass_split_before_sched2::execute): Unconditionally call
split_all_insns.
(enable_split_before_sched2): New function.
(pass_split_before_sched2::gate): Use enable_split_before_sched2.
(pass_split_before_regstack::gate): Ditto.
* config/nds32/nds32.c (nds32_split_double_word_load_store_p):
Update name check for renamed split4 pass.
* config/sh/sh.c (register_sh_passes): Update pass insertion
point for renamed split4 pass.
Jonathan Wakely [Sun, 9 Feb 2020 13:58:16 +0000 (13:58 +0000)]
libstdc++: Fix names of types in comment
* testsuite/20_util/function_objects/range.cmp/equal_to.cc: Fix
comment.
* testsuite/20_util/function_objects/range.cmp/less.ccL Likewise.
Jonathan Wakely [Sun, 9 Feb 2020 13:54:32 +0000 (13:54 +0000)]
libstdc++: Fix non-ASCII characters in comment
* include/std/ranges: Fix non-ASCII characters in comment.
Jonathan Wakely [Sun, 9 Feb 2020 13:37:43 +0000 (13:37 +0000)]
libstdc++: Fix BUILTIN-PTR-CMP helpers
The helpers that implement BUILTIN-PTR-CMP do not currently check if the
arguments are actually comparable, so the concept is true when it
shouldn't be.
Since we're trying to test for an unambiguous conversion to pointers, we
can also require that it returns bool, because the built-in comparisons
for pointers do return bool.
* include/bits/range_cmp.h (__detail::__eq_builtin_ptr_cmp): Require
equality comparison to be valid and return bool.
(__detail::__less_builtin_ptr_cmp): Likewise for less-than comparison.
* testsuite/20_util/function_objects/range.cmp/equal_to.cc: Check
type with ambiguous conversion to fundamental types.
* testsuite/20_util/function_objects/range.cmp/less.cc: Likewise.
Jakub Jelinek [Sun, 9 Feb 2020 11:32:22 +0000 (12:32 +0100)]
c++: Fix ICE during constexpr virtual call evaluation [PR93633]
The first (valid) testcase ICEs because for
A *a = new B ();
a->foo (); // virtual method call
we actually see &heap and the "heap " objects don't have the class or
whatever else type was used in new expression, but an array type containing
one (or more of those for array new) and so when using TYPE_BINFO (objtype)
on it we ICE.
This patch handles this special case, and otherwise punts (as shown e.g. in
the second testcase, where because the heap object is already deleted,
we don't really want to allow it to be used.
2020-02-09 Jakub Jelinek <jakub@redhat.com>
PR c++/93633
* constexpr.c (cxx_eval_constant_expression): If obj is heap var with
ARRAY_TYPE, use the element type. Punt if objtype after that is not
a class type.
* g++.dg/cpp2a/constexpr-new11.C: New test.
* g++.dg/cpp2a/constexpr-new12.C: New test.
* g++.dg/cpp2a/constexpr-new13.C: New test.
Jakub Jelinek [Sun, 9 Feb 2020 07:17:10 +0000 (08:17 +0100)]
openmp: Optimize DECL_IN_CONSTANT_POOL vars in target regions
DECL_IN_CONSTANT_POOL are shared and thus don't really get emitted in the
BLOCK where they are used, so for OpenMP target regions that have initializers
gimplified into copying from them we actually map them at runtime from host to
offload devices. This patch instead marks them as "omp declare target", so
that they are on the target device from the beginning and don't need to be
copied there.
2020-02-09 Jakub Jelinek <jakub@redhat.com>
* gimplify.c (gimplify_adjust_omp_clauses_1): Promote
DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
copying them around between host and target.
* testsuite/libgomp.c/target-38.c: New test.
GCC Administrator [Sun, 9 Feb 2020 00:16:37 +0000 (00:16 +0000)]
Daily bump.
Andrew Pinski [Sat, 8 Feb 2020 15:57:54 +0000 (15:57 +0000)]
aarch64: fix strict alignment for vector load/stores (PR 91927)
Hi,
The problem here is that the vector mode version of movmisalign<mode>
was only conditionalized on if SIMD was enabled instead of being
also conditionalized on STRICT_ALIGNMENT too.
Applied as pre-approved in the bug report by Richard Sandiford
after a bootstrap/test on aarch64-linux-gnu.
Thanks,
Andrew Pinski
ChangeLog:
PR target/91927
* config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
STRICT_ALIGNMENT also.
testsuite/ChangeLog:
PR target/91927
* gcc.target/aarch64/pr91927.c: New testcase.
Peter Bergner [Sat, 8 Feb 2020 23:33:08 +0000 (17:33 -0600)]
rs6000: Fix testsuite fallout from previous fix. [PR93136]
The fix for PR target/92923 exposed some test cases with fragile
scan-assembler-times counting. Split the test cases into smaller
functions, which allows less chance of optimizations causing slight
instruction count numbers.
gcc/testsuite/
PR target/93136
* gcc.dg/vmx/ops.c: Add -flax-vector-conversions to dg-options.
* gcc.target/powerpc/vsx-vector-6.h: Split tests into smaller functions.
* gcc.target/powerpc/vsx-vector-6.p7.c: Adjust scan-assembler-times
regex directives. Adjust expected instruction counts.
* gcc.target/powerpc/vsx-vector-6.p8.c: Likewise.
* gcc.target/powerpc/vsx-vector-6.p9.c: Likewise.
Jim Wilson [Sat, 8 Feb 2020 21:57:36 +0000 (13:57 -0800)]
RISC-V: Improve caller-save code generation.
Avoid paradoxical subregs when caller save. This reduces stack frame size
due to smaller loads and stores, and more frequent rematerialization.
PR target/93532
* config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
Jason Merrill [Mon, 27 Jan 2020 03:58:32 +0000 (22:58 -0500)]
c++: Use constexpr to avoid wrong -Wsign-compare (PR90691).
We would like to do constexpr evaluation to avoid false positives on
warnings, but constexpr evaluation can involve function body copying that
changes DECL_UID, which breaks -fcompare-debug. So let's remember
that we need to avoid that.
PR c++/90691
* expr.c (fold_for_warn): Call maybe_constant_value.
* constexpr.c (struct constexpr_ctx): Add uid_sensitive field.
(maybe_constant_value): Add uid_sensitive parm.
(get_fundef_copy): Don't copy if it's true.
(cxx_eval_call_expression): Don't instantiate if it's true.
(cxx_eval_outermost_constant_expr): Likewise.
Jason Merrill [Fri, 7 Feb 2020 21:28:20 +0000 (16:28 -0500)]
c++: Preserve location in maybe_constant_value.
If cxx_eval_outermost_constant_expr doesn't change the argument, we really
shouldn't unshare it when we try to fold it again.
PR c++/92852
* constexpr.c (maybe_constant_value): Don't unshare if the cached
value is the same as the argument.
Jason Merrill [Fri, 7 Feb 2020 22:14:11 +0000 (17:14 -0500)]
c++: Fix -Wreturn-local-addr location.
* typeck.c (maybe_warn_about_returning_address_of_local): Add
location parameter.
Jason Merrill [Fri, 7 Feb 2020 21:10:18 +0000 (16:10 -0500)]
c++: Fix TREE_SIDE_EFFECTS after digest_init.
* typeck2.c (process_init_constructor): Also clear TREE_SIDE_EFFECTS
if appropriate.
Jakub Jelinek [Sat, 8 Feb 2020 14:11:28 +0000 (15:11 +0100)]
c++: Handle CONSTRUCTORs without indexes in find_array_ctor_elt [PR93549]
My change
* typeck2.c (store_init_value): Don't call cp_fully_fold_init on
initializers of automatic non-constexpr variables in constexpr
functions.
- value = cp_fully_fold_init (value);
+ /* Don't fold initializers of automatic variables in constexpr functions,
+ that might fold away something that needs to be diagnosed at constexpr
+ evaluation time. */
+ if (!current_function_decl
+ || !DECL_DECLARED_CONSTEXPR_P (current_function_decl)
+ || TREE_STATIC (decl))
+ value = cp_fully_fold_init (value);
from the constexpr new change apparently broke the following testcase.
When handling COND_EXPR, we build_vector_from_val, however as the argument we
pass to it is not an INTEGER_CST/REAL_CST, but that wrapped in a
NON_LVALUE_EXPR location wrapper, we end up with a CONSTRUCTOR and as it is
middle-end that builds it, it doesn't bother with indexes. The
cp_fully_fold_init call used to fold it into VECTOR_CST in the past, but as
we intentionally don't invoke it anymore as it might fold away something
that needs to be diagnosed during constexpr evaluation, we end up evaluating
ARRAY_REF into the index-less CONSTRUCTOR. The following patch fixes the
ICE by teaching find_array_ctor_elt to handle CONSTRUCTORs without indexes
(that itself could be still very efficient) and CONSTRUCTORs with some
indexes present and others missing (the rules are that if the index on the
first element is missing, then it is the array's lowest index (in C/C++ 0)
and if other indexes are missing, they are the index of the previous element
+ 1).
Here is a new version, which assumes CONSTRUCTORs with all or none indexes
and for CONSTRUCTORs without indexes performs the verification for
flag_checking directly in find_array_ctor_elt. For CONSTRUCTORs with
indexes, it doesn't do the verification of all elts, because some CONSTRUCTORs
can be large, and it "verifies" only what it really needs - if all elts
touched during the binary search have indexes, that is actually all we care
about because we are sure we found the right elt. It is just if we see a
missing index we need assurance that all are missing to be able to directly
access it.
The assumption then simplifies the patch, for no index CONSTRUCTORs we can
use direct access like for CONSTRUCTORs where last elt index is equal to the
elt position. If we append right after the last elt, we just should clear
the index so that we don't violate the assumption, and if we need a gap
between the elts and the elt to be added, we need to add indexes.
2020-02-08 Jakub Jelinek <jakub@redhat.com>
PR c++/93549
* constexpr.c (find_array_ctor_elt): If last element has no index,
for flag_checking verify all elts have no index. If i is within the
elts, return it directly, if it is right after the last elt, append
if NULL index, otherwise force indexes on all elts.
(cxx_eval_store_expression): Allow cep->index to be NULL.
* g++.dg/ext/constexpr-pr93549.C: New test.
Jakub Jelinek [Sat, 8 Feb 2020 09:59:40 +0000 (10:59 +0100)]
i386: Make xmm16-xmm31 call used even in ms ABI [PR65782]
On Tue, Feb 04, 2020 at 11:16:06AM +0100, Uros Bizjak wrote:
> I guess that Comment #9 patch form the PR should be trivially correct,
> but althouhg it looks obvious, I don't want to propose the patch since
> I have no means of testing it.
I don't have means of testing it either.
https://docs.microsoft.com/en-us/cpp/build/x64-calling-convention?view=vs-2019
is quite explicit that [xyz]mm16-31 are call clobbered and only xmm6-15 (low
128-bits only) are call preserved.
We are talking e.g. about
/* { dg-options "-O2 -mabi=ms -mavx512vl" } */
typedef double V __attribute__((vector_size (16)));
void foo (void);
V bar (void);
void baz (V);
void
qux (void)
{
V c;
{
register V a __asm ("xmm18");
V b = bar ();
asm ("" : "=x" (a) : "0" (b));
c = a;
}
foo ();
{
register V d __asm ("xmm18");
V e;
d = c;
asm ("" : "=x" (e) : "0" (d));
baz (e);
}
}
where according to the MSDN doc gcc incorrectly holds the c value
in xmm18 register across the foo call; if foo is compiled by some Microsoft
compiler (or LLVM), then it could clobber %xmm18.
If all xmm18 occurrences are changed to say xmm15, then it is valid to hold
the 128-bit value across the foo call (though, surprisingly, LLVM saves it
into stack anyway).
The other parts are I guess mainly about SEH. Consider e.g.
void
foo (void)
{
register double x __asm ("xmm14");
register double y __asm ("xmm18");
asm ("" : "=x" (x));
asm ("" : "=v" (y));
x += y;
y += x;
asm ("" : : "x" (x));
asm ("" : : "v" (y));
}
looking at cross-compiler output, with -O2 -mavx512f this emits
.file "abcdeq.c"
.text
.align 16
.globl foo
.def foo; .scl 2; .type 32; .endef
.seh_proc foo
foo:
subq $40, %rsp
.seh_stackalloc 40
vmovaps %xmm14, (%rsp)
.seh_savexmm %xmm14, 0
vmovaps %xmm18, 16(%rsp)
.seh_savexmm %xmm18, 16
.seh_endprologue
vaddsd %xmm18, %xmm14, %xmm14
vaddsd %xmm18, %xmm14, %xmm18
vmovaps (%rsp), %xmm14
vmovaps 16(%rsp), %xmm18
addq $40, %rsp
ret
.seh_endproc
.ident "GCC: (GNU) 10.0.1
20200207 (experimental)"
Does whatever assembler mingw64 uses even assemble this (I mean the
.seh_savexmm %xmm16, 16 could be problematic)?
I can find e.g.
https://stackoverflow.com/questions/
43152633/invalid-register-for-seh-savexmm-in-cygwin/
43210527
which then links to
https://gcc.gnu.org/PR65782
2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
Jakub Jelinek <jakub@redhat.com>
PR target/65782
* config/i386/i386.h (CALL_USED_REGISTERS): Make
xmm16-xmm31 call-used even in 64-bit ms-abi.
* gcc.target/i386/pr65782.c: New test.
Co-authored-by: Uroš Bizjak <ubizjak@gmail.com>
GCC Administrator [Sat, 8 Feb 2020 00:16:49 +0000 (00:16 +0000)]
Daily bump.
Joseph Myers [Fri, 7 Feb 2020 22:35:59 +0000 (22:35 +0000)]
Regenerate .pot files.
gcc/po:
* gcc.pot: Regenerate.
libcpp/po:
* cpplib.pot: Regenerate.
Marek Polacek [Fri, 7 Feb 2020 19:44:25 +0000 (14:44 -0500)]
c++: Fix paren init of aggregates in unevaluated context [PR92947]
When I implemented C++20 parenthesized initialization of aggregates
I introduced this bogus cp_unevaluated_operand check, thus disabling
this feature in unevaluated context. Oop.
Removing the check turned up another bug: I wasn't checking the
return value of digest_init. So when constructible_expr called
build_new_method_call_1 to see if we can construct one type from
another, it got back a bogus INIT_EXPR that looked something like
*(struct T &) 1 = <<< error >>>. But that isn't the error_mark_node,
so constructible_expr thought we had been successful in creating the
ctor call, and it gave the wrong answer. Covered by paren-init17.C.
PR c++/92947 - Paren init of aggregates in unevaluated context.
* call.c (build_new_method_call_1): Don't check
cp_unevaluated_operand. Check the return value of digest_init.
* g++.dg/cpp2a/paren-init21.C: New test.
Jason Merrill [Fri, 7 Feb 2020 20:09:14 +0000 (15:09 -0500)]
c++: Make PR92654 testcase valid.
Jason Merrill [Fri, 7 Feb 2020 15:31:30 +0000 (10:31 -0500)]
c++: Fix use of local in constexpr if.
extract_local_specs wasn't finding the mention of 'an' as a template
argument because we weren't walking into template arguments. So here I
changed cp_walk_subtrees to do so--only walking into template arguments in
the spelling of the type or expression, not any hidden behind typedefs. The
change to use typedef_variant_p avoids looking through typedefs spelled with
'typedef' as well as those spelled with 'using'. And then I removed some
now-redundant code for walking into template arguments in a couple of
walk_tree callbacks.
PR c++/92654
* tree.c (cp_walk_subtrees): Walk into type template arguments.
* cp-tree.h (TYPE_TEMPLATE_INFO_MAYBE_ALIAS): Use typedef_variant_p
instead of TYPE_ALIAS_P.
* pt.c (push_template_decl_real): Likewise.
(find_parameter_packs_r): Likewise. Remove dead code.
* error.c (find_typenames_r): Remove dead code.
Jonathan Wakely [Thu, 6 Feb 2020 11:21:25 +0000 (11:21 +0000)]
libstdc++: Implement P1878R1 "Constraining Readable Types"
* include/bits/iterator_concepts.h (iter_difference_t, iter_value_t):
Use remove_cvref_t.
(readable_traits): Rename to indirectly_readable_traits.
(readable): Rename to indirectly_readable.
(writable): Rename to indirectly_writable.
(__detail::__iter_exchange_move): Do not use remove_reference_t.
(indirectly_swappable): Adjust requires expression parameter types.
expression.
* include/bits/ranges_algo.h (ranges::transform, ranges::replace)
(ranges::replace_if, ranges::generate_n, ranges::generate)
(ranges::remove): Use new name for writable.
* include/bits/stl_iterator.h (__detail::__common_iter_has_arrow):
Use new name for readable.
* include/ext/pointer.h (readable_traits<_Pointer_adapter<P>>): Use
new name for readable_traits.
* testsuite/24_iterators/associated_types/readable.traits.cc: Likewise.
* testsuite/24_iterators/indirect_callable/projected.cc: Adjust for
new definition of indirectly_readable.
Jonathan Wakely [Fri, 7 Feb 2020 16:46:42 +0000 (16:46 +0000)]
libstdc++: Fix bug in iterator_traits<common_iterator<S,I>>
The wrong type was being used in the __common_iter_has_arrow constraint,
creating a circular dependency where the iterator_traits specialization
was needed before it was complete. The correct parameter for the
__common_iter_has_arrow concept is the first template argument of the
common_iterator, not the common_iterator itself.
* include/bits/stl_iterator.h (__detail::__common_iter_ptr): Change
to take parameters of common_iterator, instead of the common_iterator
type itself. Fix argument for __common_iter_has_arrow constraint.
(iterator_traits<common_iterator<I, S>>::pointer): Adjust.
Will Schmidt [Fri, 7 Feb 2020 16:36:05 +0000 (10:36 -0600)]
[PATCH] add -mvsx to pr92923-1.c test requiring vsx
[testsuite]
* gcc.target/powerpc/pr92923-1.c: Add -mvsx.
Jonathan Wakely [Fri, 7 Feb 2020 16:06:43 +0000 (16:06 +0000)]
libstdc++ Fix missing return in istream_view iterator
* include/std/ranges (iota_view): Add braces to prevent -Wempty-body
warning.
(basic_istream_view::_Iterator::operator++()): Add missing return.
Patrick Palka [Fri, 7 Feb 2020 15:08:06 +0000 (10:08 -0500)]
libstdc++: Remove extraneous &&
Dennis Zhang [Fri, 7 Feb 2020 15:04:23 +0000 (15:04 +0000)]
aarch64: ACLE I8MM multiply-accumulate intrinsics
This patch adds intrinsics for 8-bit integer matrix multiply-accumulate
operations including vmmlaq_s32, vmmlaq_u32, and vusmmlaq_s32.
gcc/ChangeLog:
2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
* config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
(simd_ummla, simd_usmmla): Likewise.
* config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
* config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
(vusmmlaq_s32): New.
gcc/testsuite/ChangeLog:
2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
* gcc.target/aarch64/simd/vmmla.c: New test.
Patrick Palka [Fri, 7 Feb 2020 00:24:03 +0000 (19:24 -0500)]
libstdc++: Add [range.istream]
This patch adds ranges::basic_istream_view and ranges::istream_view. This seems
to be the last missing part of the ranges header.
libstdc++-v3/ChangeLog:
* include/std/ranges (ranges::__detail::__stream_extractable,
ranges::basic_istream_view, ranges::istream_view): Define.
* testsuite/std/ranges/istream_view: New test.
Patrick Palka [Fri, 7 Feb 2020 14:30:53 +0000 (09:30 -0500)]
Fix ChangeLog for previous commit
Patrick Palka [Thu, 30 Jan 2020 22:37:07 +0000 (17:37 -0500)]
libstdc++: Implement C++20 range adaptors
This patch implements [range.adaptors]. It also includes the changes from P3280
and P3278 and P3323, without which many standard examples won't work.
The implementation is mostly dictated by the spec and there was not much room
for implementation discretion. The most interesting part that was not specified
by the spec is the design of the range adaptors and range adaptor closures,
which I tried to design in a way that minimizes boilerplate and statefulness (so
that e.g. the composition of two stateless closures is stateless).
What is left unimplemented is caching of calls to begin() in filter_view,
drop_view and reverse_view, which is required to guarantee that begin() has
amortized constant time complexity. I can implement this in a subsequent patch.
"Interesting" parts of the patch are marked with XXX comments.
libstdc++-v3/ChangeLog:
Implement C++20 range adaptors
* include/std/ranges: Include <bits/refwrap.h> and <tuple>.
(subrange::_S_store_size): Mark as const instead of constexpr to
avoid what seems to be a bug in GCC.
(__detail::__box): Give it defaulted copy and move constructors.
(views::_Single::operator()): Mark constexpr.
(views::_Iota::operator()): Mark constexpr.
(__detail::Empty): Define.
(views::_RangeAdaptor, views::_RangeAdaptorClosure, ref_view, all_view,
views::all, filter_view, views::filter, transform_view,
views::transform, take_view, views::take, take_while_view,
views::take_while, drop_view, views::drop, join_view, views::join,
__detail::require_constant, __detail::tiny_range, split_view,
views::split, views::_Counted, views::counted, common_view,
views::common, reverse_view, views::reverse,
views::__detail::__is_reversible_subrange,
views::__detail::__is_reverse_view, reverse_view, views::reverse,
__detail::__has_tuple_element, elements_view, views::elements,
views::keys, views::values): Define.
* testsuite/std/ranges/adaptors/all.cc: New test.
* testsuite/std/ranges/adaptors/common.cc: Likewise.
* testsuite/std/ranges/adaptors/counted.cc: Likewise.
* testsuite/std/ranges/adaptors/drop.cc: Likewise.
* testsuite/std/ranges/adaptors/drop_while.cc: Likewise.
* testsuite/std/ranges/adaptors/elements.cc: Likewise.
* testsuite/std/ranges/adaptors/filter.cc: Likewise.
* testsuite/std/ranges/adaptors/join.cc: Likewise.
* testsuite/std/ranges/adaptors/reverse.cc: Likewise.
* testsuite/std/ranges/adaptors/split.cc: Likewise.
* testsuite/std/ranges/adaptors/take.cc: Likewise.
* testsuite/std/ranges/adaptors/take_while.cc: Likewise.
* testsuite/std/ranges/adaptors/transform.cc: Likewise.
Jonathan Wakely [Thu, 6 Feb 2020 13:31:36 +0000 (13:31 +0000)]
libstdc++: Optimize C++20 comparison category types
This reduces the size and alignment of all three comparison category
types to a single byte. The partial_ordering::_M_is_ordered flag is
replaced by the value 0x02 in the _M_value member.
This also optimizes conversion and comparison operators to avoid
conditional branches where possible, by comparing _M_value to constants
or using bitwise operations to correctly handle the unordered state.
* libsupc++/compare (__cmp_cat::type): Define typedef for underlying
type of enumerations and comparison category types.
(__cmp_cat::_Ord, __cmp_cat::_Ncmp): Add underlying type.
(__cmp_cat::_Ncmp::unordered): Change value to 2.
(partial_ordering::_M_value, weak_ordering::_M_value)
(strong_ordering::_M_value): Change type to __cmp_cat::type.
(partial_ordering::_M_is_ordered): Remove data member.
(partial_ordering): Use second bit of _M_value for unordered. Adjust
comparison operators.
(weak_ordering::operator partial_ordering): Simplify to remove
branches.
(operator<=>(unspecified, weak_ordering)): Likewise.
(strong_ordering::operator partial_ordering): Likewise.
(strong_ordering::operator weak_ordering): Likewise.
(operator<=>(unspecified, strong_ordering)): Likewise.
* testsuite/18_support/comparisons/categories/partialord.cc: New test.
* testsuite/18_support/comparisons/categories/strongord.cc: New test.
* testsuite/18_support/comparisons/categories/weakord.cc: New test.
Jason Merrill [Thu, 6 Feb 2020 21:14:19 +0000 (16:14 -0500)]
c++: Fix ICE on nonsense requires-clause.
Here we were swallowing all the syntax errors by parsing tentatively, and
returning error_mark_node without ever actually giving an error. Fixed by
using save_tokens/rollback_tokens instead.
PR c++/92517
* parser.c (cp_parser_constraint_primary_expression): Do the main
parse non-tentatively.
Richard Biener [Fri, 7 Feb 2020 11:56:18 +0000 (12:56 +0100)]
middle-end/93519 - avoid folding stmts in obviously unreachable code
The inliner folds stmts delayed, the following arranges things so
to not fold stmts that are obviously not reachable to avoid warnings
from those code regions.
2020-02-07 Richard Biener <rguenther@suse.de>
PR middle-end/93519
* tree-inline.c (fold_marked_statements): Do a PRE walk,
skipping unreachable regions.
(optimize_inline_calls): Skip folding stmts when we didn't
inline.
* gcc.dg/Wrestrict-21.c: New testcase.
Jonathan Wakely [Fri, 7 Feb 2020 11:31:12 +0000 (11:31 +0000)]
libstdc++: Enable three-way comparison for iota_view iterators
The declaration of operator<=> was disabled due to a typo in the macro.
The declaration was also ill-formed when three_way_comparable<_Winc> is
not satisfied, which is a defect in the C++20 draft.
* include/std/ranges (iota_view::_Iterator): Fix typo in name of
__cpp_lib_three_way_comparison macro and use deduced return type for
operator<=>.
* testsuite/std/ranges/iota/iterator.cc: New test.
H.J. Lu [Fri, 7 Feb 2020 11:37:46 +0000 (03:37 -0800)]
x86-64: Pass aggregates with only float/double in GPRs for MS_ABI
MS_ABI requires passing aggregates with only float/double in integer
registers as shown in the output from MSVC v19.10 at:
https://godbolt.org/z/2NPygd
This patch fixed:
FAIL: libffi.bhaible/test-callback.c -W -Wall -Wno-psabi -DDGTEST=54 -Wno-unused-variable -Wno-unused-parameter -Wno-unused-but-set-variable -Wno-uninitialized -O0 -DABI_NUM=FFI_GNUW64 -DABI_ATTR=MSABI execution test
FAIL: libffi.bhaible/test-callback.c -W -Wall -Wno-psabi -DDGTEST=54 -Wno-unused-variable -Wno-unused-parameter -Wno-unused-but-set-variable -Wno-uninitialized -O2 -DABI_NUM=FFI_GNUW64 -DABI_ATTR=MSABI execution test
FAIL: libffi.bhaible/test-callback.c -W -Wall -Wno-psabi -DDGTEST=55 -Wno-unused-variable -Wno-unused-parameter -Wno-unused-but-set-variable -Wno-uninitialized -O0 -DABI_NUM=FFI_GNUW64 -DABI_ATTR=MSABI execution test
FAIL: libffi.bhaible/test-callback.c -W -Wall -Wno-psabi -DDGTEST=55 -Wno-unused-variable -Wno-unused-parameter -Wno-unused-but-set-variable -Wno-uninitialized -O2 -DABI_NUM=FFI_GNUW64 -DABI_ATTR=MSABI execution test
FAIL: libffi.bhaible/test-callback.c -W -Wall -Wno-psabi -DDGTEST=56 -Wno-unused-variable -Wno-unused-parameter -Wno-unused-but-set-variable -Wno-uninitialized -O0 -DABI_NUM=FFI_GNUW64 -DABI_ATTR=MSABI execution test
FAIL: libffi.bhaible/test-callback.c -W -Wall -Wno-psabi -DDGTEST=56 -Wno-unused-variable -Wno-unused-parameter -Wno-unused-but-set-variable -Wno-uninitialized -O2 -DABI_NUM=FFI_GNUW64 -DABI_ATTR=MSABI execution test
in libffi testsuite.
gcc/
PR target/85667
* config/i386/i386.c (function_arg_ms_64): Add a type argument.
Don't return aggregates with only SFmode and DFmode in SSE
register.
(ix86_function_arg): Pass arg.type to function_arg_ms_64.
gcc/testsuite/
PR target/85667
* gcc.target/i386/pr85667-10.c: New test.
* gcc.target/i386/pr85667-7.c: Likewise.
* gcc.target/i386/pr85667-8.c: Likewise.
* gcc.target/i386/pr85667-9.c: Likewise.
Jakub Jelinek [Fri, 7 Feb 2020 10:09:03 +0000 (11:09 +0100)]
powerpc: Fix -fstack-clash-protection -mprefixed-addr ICE [PR93122]
As mentioned in the PR, the following testcase ICEs because rs, while valid
add_operand is not valid add_cint_operand and so gen_add3_insn fails,
because it doesn't meet the expander predicates.
Here is what I meant as the alternative, i.e. don't check any predicates,
just gen_add3_insn, if that fails, force rs into register and retry.
And, add REG_FRAME_RELATED_EXPR note always when we haven't emitted a single
insn that has rtl exactly matching what we'd add the REG_FRAME_RELATED_EXPR
with (in that case, dwarf2cfi.c is able to figure it out by itself, no need
to waste compile time memory).
2020-02-07 Jakub Jelinek <jakub@redhat.com>
PR target/93122
* config/rs6000/rs6000-logue.c
(rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
if it fails, move rs into end_addr and retry. Add
REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
the insn pattern doesn't describe well what exactly happens to
dwarf2cfi.c.
* gcc.target/powerpc/pr93122.c: New test.
Paolo Carlini [Fri, 7 Feb 2020 10:05:30 +0000 (11:05 +0100)]
Add testcase of PR c++/89404, already fixed in trunk.
PR c++/89404
* g++.dg/ext/vla21.C: New.
Jakub Jelinek [Fri, 7 Feb 2020 10:01:14 +0000 (11:01 +0100)]
arm: Fix up arm installed unwind.h for use in pedantic modes [PR93615]
As the following testcase shows, unwind.h on ARM can't be (starting with GCC
10) compiled with -std=c* modes, only -std=gnu* modes.
The problem is it uses asm keyword, which isn't a keyword in those modes
(system headers vs. non-system ones don't make a difference here).
glibc and other installed headers use __asm or __asm__ keywords instead that
work fine in both standard and gnu modes.
While there, as it is an installed header, I think it is also wrong to
completely ignore any identifier namespace rules.
The generic unwind.h defines just _Unwind* namespace identifiers plus
_sleb128_t/_uleb128_t (but e.g. unlike libstdc++/glibc headers doesn't
uglify operand names), the ARM unwind.h is much worse here. I've just
changed the gnu_Unwind_Find_got function at least not be in user identifier
namespace, but perhaps it would be good to go further and rename e.g.
or e.g.
typedef _Unwind_Reason_Code (*personality_routine) (_Unwind_State,
_Unwind_Control_Block *, _Unwind_Context *);
in unwind-arm-common.h.
2020-02-07 Jakub Jelinek <jakub@redhat.com>
PR target/93615
* config/arm/unwind-arm.h (gnu_Unwind_Find_got): Rename to ...
(_Unwind_gnu_Find_got): ... this. Use __asm instead of asm. Remove
trailing :s in asm. Formatting fixes.
(_Unwind_decode_typeinfo_ptr): Adjust caller.
* gcc.dg/pr93615.c: New test.
Jakub Jelinek [Fri, 7 Feb 2020 08:28:39 +0000 (09:28 +0100)]
i386: Better patch to improve avx* vector concatenation [PR93594]
After thinking some more on this, we can do better; rather than having to
add a new prereload splitter pattern to catch all other cases where it might
be beneficial to fold first part of an UNSPEC_CAST back to the unspec
operand, this patch reverts the *.md changes I've made yesterday and instead
tweaks the patterns, so that simplify-rtx.c can optimize those on its own.
Instead of the whole SET_SRC being an UNSPEC through which simplify-rtx.c
obviously can't optimize anything, this represents those patterns through a
VEC_CONCAT (or two nested ones for the 128-bit -> 512-bit casts) with the
operand as the low part of it and UNSPEC representing just the high part of
it (the undefined, to be ignored, bits). While richi suggested using
already in GIMPLE for those using a SSA_NAME default definition (i.e.
clearly uninitialized use), I'd say that uninit pass would warn about those,
but more importantly, in RTL it would probably force zero initialization of
that or use or an uninitialized pseudo, all of which is hard to match in an
pattern, so I think an UNSPEC is better for that.
2020-02-07 Jakub Jelinek <jakub@redhat.com>
PR target/93594
* config/i386/predicates.md (avx_identity_operand): Remove.
* config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
(avx_<castmode><avxsizesuffix>_<castmode>,
avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
a VEC_CONCAT of the operand and UNSPEC_CAST.
(avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
UNSPEC_CAST.
Jakub Jelinek [Fri, 7 Feb 2020 08:26:54 +0000 (09:26 +0100)]
i386: Fix splitters that call extract_insn_cached [PR93611]
The following testcase ICEs. The generated split_insns starts
with recog_data.insn = NULL and then tries to put various operands into
recog_data.operand array and checks various splitter conditions.
The problem is that some atom related tuning splitters indirectly call
extract_insn_cached on the insn they are used in. This can change
recog_data.operand, but most likely it will just keep it as is, but
sets recog_data.insn to the current instruction. If that splitter doesn't
match, we continue trying some other split conditions and modify
recog_data.operand array again. If even that doesn't find any usable
splitter, we punt, but at that point recog_data.insn says that recog_data
is valid for that particular instruction, even when recog_data.operand array
can be anything.
The safest thing would be to copy whole recog_data to a temporary object
before doing the calls that can call extract_insn_cached and restore it
afterwards, but it would be also very costly, recog_data has 1280 bytes.
So, this patch just makes sure to clear recog_data.insn if it has changed
during the extract_insn_cached call, which means if we extract_insn_cached
later, we'll extract it properly, while if we call it say from some other
context than splitter conditions, the insn is already cached, we don't reset
the cache.
2020-02-07 Jakub Jelinek <jakub@redhat.com>
PR target/93611
* config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
recog_data.insn if distance_non_agu_define changed it.
* gcc.target/i386/pr93611.c: New test.
Patrick Palka [Fri, 10 Jan 2020 22:11:07 +0000 (17:11 -0500)]
libstdc++: Implement C++20 constrained algorithms
This patch implements the C++20 ranges overloads for the algorithms in
[algorithms]. Most of the algorithms were reimplemented, with each of their
implementations very closely following the existing implementation in
bits/stl_algo.h and bits/stl_algobase.h. The reason for reimplementing most of
the algorithms instead of forwarding to their STL-style overload is because
forwarding cannot be conformantly and efficiently performed for algorithms that
operate on non-random-access iterators. But algorithms that operate on random
access iterators can safely and efficiently be forwarded to the STL-style
implementation, and this patch does so for push_heap, pop_heap, make_heap,
sort_heap, sort, stable_sort, nth_element, inplace_merge and stable_partition.
What's missing from this patch is debug-iterator and container specializations
that are present for some of the STL-style algorithms that need to be ported
over to the ranges algos. I marked them missing at TODO comments. There are
also some other minor outstanding TODOs.
The code that could use the most thorough review is ranges::__copy_or_move,
ranges::__copy_or_move_backward, ranges::__equal and
ranges::__lexicographical_compare. In the tests, I tried to test the interface
of each new overload, as well as the correctness of the new implementation.
libstdc++-v3/ChangeLog:
Implement C++20 constrained algorithms
* include/Makefile.am: Add new header.
* include/Makefile.in: Regenerate.
* include/std/algorithm: Include <bits/ranges_algo.h>.
* include/bits/ranges_algo.h: New file.
* testsuite/25_algorithms/adjacent_find/constrained.cc: New test.
* testsuite/25_algorithms/all_of/constrained.cc: New test.
* testsuite/25_algorithms/any_of/constrained.cc: New test.
* testsuite/25_algorithms/binary_search/constrained.cc: New test.
* testsuite/25_algorithms/copy/constrained.cc: New test.
* testsuite/25_algorithms/copy_backward/constrained.cc: New test.
* testsuite/25_algorithms/copy_if/constrained.cc: New test.
* testsuite/25_algorithms/copy_n/constrained.cc: New test.
* testsuite/25_algorithms/count/constrained.cc: New test.
* testsuite/25_algorithms/count_if/constrained.cc: New test.
* testsuite/25_algorithms/equal/constrained.cc: New test.
* testsuite/25_algorithms/equal_range/constrained.cc: New test.
* testsuite/25_algorithms/fill/constrained.cc: New test.
* testsuite/25_algorithms/fill_n/constrained.cc: New test.
* testsuite/25_algorithms/find/constrained.cc: New test.
* testsuite/25_algorithms/find_end/constrained.cc: New test.
* testsuite/25_algorithms/find_first_of/constrained.cc: New test.
* testsuite/25_algorithms/find_if/constrained.cc: New test.
* testsuite/25_algorithms/find_if_not/constrained.cc: New test.
* testsuite/25_algorithms/for_each/constrained.cc: New test.
* testsuite/25_algorithms/generate/constrained.cc: New test.
* testsuite/25_algorithms/generate_n/constrained.cc: New test.
* testsuite/25_algorithms/heap/constrained.cc: New test.
* testsuite/25_algorithms/includes/constrained.cc: New test.
* testsuite/25_algorithms/inplace_merge/constrained.cc: New test.
* testsuite/25_algorithms/is_partitioned/constrained.cc: New test.
* testsuite/25_algorithms/is_permutation/constrained.cc: New test.
* testsuite/25_algorithms/is_sorted/constrained.cc: New test.
* testsuite/25_algorithms/is_sorted_until/constrained.cc: New test.
* testsuite/25_algorithms/lexicographical_compare/constrained.cc: New
test.
* testsuite/25_algorithms/lower_bound/constrained.cc: New test.
* testsuite/25_algorithms/max/constrained.cc: New test.
* testsuite/25_algorithms/max_element/constrained.cc: New test.
* testsuite/25_algorithms/merge/constrained.cc: New test.
* testsuite/25_algorithms/min/constrained.cc: New test.
* testsuite/25_algorithms/min_element/constrained.cc: New test.
* testsuite/25_algorithms/minmax/constrained.cc: New test.
* testsuite/25_algorithms/minmax_element/constrained.cc: New test.
* testsuite/25_algorithms/mismatch/constrained.cc: New test.
* testsuite/25_algorithms/move/constrained.cc: New test.
* testsuite/25_algorithms/move_backward/constrained.cc: New test.
* testsuite/25_algorithms/next_permutation/constrained.cc: New test.
* testsuite/25_algorithms/none_of/constrained.cc: New test.
* testsuite/25_algorithms/nth_element/constrained.cc: New test.
* testsuite/25_algorithms/partial_sort/constrained.cc: New test.
* testsuite/25_algorithms/partial_sort_copy/constrained.cc: New test.
* testsuite/25_algorithms/partition/constrained.cc: New test.
* testsuite/25_algorithms/partition_copy/constrained.cc: New test.
* testsuite/25_algorithms/partition_point/constrained.cc: New test.
* testsuite/25_algorithms/prev_permutation/constrained.cc: New test.
* testsuite/25_algorithms/remove/constrained.cc: New test.
* testsuite/25_algorithms/remove_copy/constrained.cc: New test.
* testsuite/25_algorithms/remove_copy_if/constrained.cc: New test.
* testsuite/25_algorithms/remove_if/constrained.cc: New test.
* testsuite/25_algorithms/replace/constrained.cc: New test.
* testsuite/25_algorithms/replace_copy/constrained.cc: New test.
* testsuite/25_algorithms/replace_copy_if/constrained.cc: New test.
* testsuite/25_algorithms/replace_if/constrained.cc: New test.
* testsuite/25_algorithms/reverse/constrained.cc: New test.
* testsuite/25_algorithms/reverse_copy/constrained.cc: New test.
* testsuite/25_algorithms/rotate/constrained.cc: New test.
* testsuite/25_algorithms/rotate_copy/constrained.cc: New test.
* testsuite/25_algorithms/search/constrained.cc: New test.
* testsuite/25_algorithms/search_n/constrained.cc: New test.
* testsuite/25_algorithms/set_difference/constrained.cc: New test.
* testsuite/25_algorithms/set_intersection/constrained.cc: New test.
* testsuite/25_algorithms/set_symmetric_difference/constrained.cc: New
test.
* testsuite/25_algorithms/set_union/constrained.cc: New test.
* testsuite/25_algorithms/shuffle/constrained.cc: New test.
* testsuite/25_algorithms/sort/constrained.cc: New test.
* testsuite/25_algorithms/stable_partition/constrained.cc: New test.
* testsuite/25_algorithms/stable_sort/constrained.cc: New test.
* testsuite/25_algorithms/swap_ranges/constrained.cc: New test.
* testsuite/25_algorithms/transform/constrained.cc: New test.
* testsuite/25_algorithms/unique/constrained.cc: New test.
* testsuite/25_algorithms/unique_copy/constrained.cc: New test.
* testsuite/25_algorithms/upper_bound/constrained.cc: New test.
David Malcolm [Thu, 6 Feb 2020 19:17:48 +0000 (14:17 -0500)]
analyzer: fix reproducer for PR 93375
Reproducing the ICE in PR analyzer/93375 required some kind of
analyzer diagnostic occurring after a call with fewer arguments
than required by the callee.
The testcase used __builtin_memcpy with a NULL argument for this.
On x86_64-pc-linux-gnu this happened to be already optimized into:
_4 = MEM <unsigned int> [(char * {ref-all})0B];
MEM <unsigned int> [(char * {ref-all})rl_1] = _4;
by the time of the analyzer pass, leading to the diagnostic in question
being:
warning: dereference of NULL ‘rl’ [CWE-690] [-Wanalyzer-null-dereference]
On other targets e.g. arm-unknown-linux-gnueabi, the builtin isn't
optimized at the time of the analyzer pass, leading to this diagnostic
instead:
warning: use of NULL ‘rl’ where non-null expected [CWE-690] [-Wanalyzer-null-argument]
<built-in>: note: argument 1 of ‘__builtin_memcpy’ must be non-null
This patch fixes the test case by using a custom function marked as
nonnull. I manually verified that it still reproduces the ICE if the
patch for the PR is reverted.
gcc/testsuite/ChangeLog:
PR analyzer/93375
* gcc.dg/analyzer/pr93375.c: Rework test case to avoid per-target
differences in how __builtin_memcpy has been optimized at the time
the analyzer runs.
GCC Administrator [Fri, 7 Feb 2020 00:16:34 +0000 (00:16 +0000)]
Daily bump.
Michael Meissner [Thu, 6 Feb 2020 23:39:48 +0000 (18:39 -0500)]
Fix PR 93569.
2020-02-06 Michael Meissner <meissner@linux.ibm.com>
PR target/93569
* config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
we only had X-FORM (reg+reg) addressing for vectors. Also before
ISA 3.0, we only had X-FORM addressing for scalars in the
traditional Altivec registers.
Vladimir N. Makarov [Thu, 6 Feb 2020 22:10:58 +0000 (17:10 -0500)]
PR93561 -- [bounds checking] memory overflow for spill_for
2020-02-06 <zhongyunde@huawei.com>
Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/93561
* lra-assigns.c (spill_for): Check that tested hard regno is not out of
hard register range.
David Malcolm [Wed, 5 Feb 2020 17:09:23 +0000 (12:09 -0500)]
analyzer: round-trip pointer-equality through intptr_t
When investigating how the analyzer handles malloc/free of Cray pointers
in gfortran I noticed that that analyzer was losing information on
pointers that were cast to an integer type, and then back to a pointer
type again.
The root cause is that region_model::maybe_cast_1 was only preserving
the region_svalue-ness of the result if both types were pointers,
instead returning an unknown_svalue for a pointer-to-int cast.
This patch updates the above code so that it attempts to use a
region_svalue if *either* type is a pointer
Doing so allows the analyzer to recognize that the same underlying
region is in use through various casts through integer types.
gcc/analyzer/ChangeLog:
* region-model.cc (region_model::maybe_cast_1): Attempt to provide
a region_svalue if either type is a pointer, rather than if both
types are pointers.
gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/torture/intptr_t.c: New test.
Richard Sandiford [Thu, 6 Feb 2020 17:32:00 +0000 (17:32 +0000)]
aarch64: Add a type attribute to aarch64_movk<mode>
Kyrill pointed out off-list that this new pattern was missing
a type attribute.
2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
attribute.
Segher Boessenkool [Fri, 20 Dec 2019 00:15:19 +0000 (00:15 +0000)]
rs6000: Use rldimi for 64-bit constants with high=low (PR93012)
We currently use an (up to) five instruction sequence to generate such
constants. After this change we just generate a 32-bit constant and do
a rotate-and-mask-insert instruction, making the sequence only up to
three instructions.
* config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
where the low and the high 32 bits are equal to each other specially,
with an rldimi instruction.
gcc/testsuite/
* gcc.target/powerpc/pr93012.c: New.
Mihail Ionescu [Thu, 6 Feb 2020 17:28:24 +0000 (17:28 +0000)]
[GCC][PATCH][ARM] Set profile to M for Armv8.1-M
2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
* config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
Mihail Ionescu [Thu, 6 Feb 2020 17:26:48 +0000 (17:26 +0000)]
[GCC][PATCH][ARM] Regenerate arm-tables.opt for Armv8.1-M patch
2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
* config/arm/arm-tables.opt: Regenerate.
Uros Bizjak [Thu, 6 Feb 2020 17:32:42 +0000 (18:32 +0100)]
Remove parenthesis from return statements in i386.md.
Uros Bizjak [Thu, 6 Feb 2020 17:31:23 +0000 (18:31 +0100)]
Add missing ChangeLog entry.
Richard Sandiford [Mon, 3 Feb 2020 21:43:44 +0000 (21:43 +0000)]
aarch64: Add an and/ior-based movk pattern [PR87763]
This patch adds a second movk pattern that models the instruction
as a "normal" and/ior operation rather than an insertion. It fixes
the third insv_1.c failure in PR87763, which was a regression from
GCC 8.
2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR target/87763
* config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
* config/aarch64/aarch64.c (aarch64_movk_shift): New function.
* config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
gcc/testsuite/
PR target/87763
* gcc.target/aarch64/movk_2.c: New test.
Richard Sandiford [Mon, 3 Feb 2020 21:12:35 +0000 (21:12 +0000)]
aarch64: Add an extra sbfiz pattern [PR87763]
This patch matches another form of sbfiz, in which the input
has DImode and the output has SImode. It fixes a regression
in gcc.target/aarch64/lsl_asr_sbfiz.c from GCC 8.
2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR rtl-optimization/87763
* config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
Uros Bizjak [Thu, 6 Feb 2020 17:21:50 +0000 (18:21 +0100)]
Unify gcc.target/i386/memcpy scan strings.
After -fno-common became the default, we can unify various
scan strings between 64bit and 32bit targets.
* gcc.target/i386/memcpy-strategy-1.c (dg-final):
Unify scan-assembler strings for all targets.
* gcc.target/i386/memcpy-strategy-2.c (dg-final): Ditto.
* gcc.target/i386/memcpy-strategy-3.c (dg-final): Ditto.
* gcc.target/i386/memcpy-vector_loop-1.c (dg-final): Ditto.
Marek Polacek [Wed, 5 Feb 2020 17:53:06 +0000 (12:53 -0500)]
c++: Fix ICE with lambda in operator function [PR93597]
If we are going to use get_first_fn let's make sure we operate on
is_overloaded_fn, as the rest of the codebase does, and if lookup finds
any class-scope declaration, return early too.
PR c++/93597 - ICE with lambda in operator function.
* name-lookup.c (maybe_save_operator_binding): Check is_overloaded_fn.
* g++.dg/cpp0x/lambda/lambda-93597.C: New test.
Delia Burduv [Thu, 6 Feb 2020 09:45:52 +0000 (09:45 +0000)]
aarch64: ACLE intrinsics bfmmla and bfmlal<b/t>
This patch adds the ARMv8.6 ACLE intrinsics for bfmmla, bfmlalb and
bfmlalt as part of the BFloat16 extension.
(https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics)
The intrinsics are declared in arm_neon.h and the RTL patterns are
defined in aarch64-simd.md. Two new tests are added to check assembler
output.
2020-02-06 Delia Burduv <delia.burduv@arm.com>
gcc/
* config/aarch64/aarch64-simd-builtins.def
(bfmlaq): New built-in function.
(bfmlalb): New built-in function.
(bfmlalt): New built-in function.
(bfmlalb_lane): New built-in function.
(bfmlalt_lane): New built-in function.
* config/aarch64/aarch64-simd.md
(aarch64_bfmmlaqv4sf): New pattern.
(aarch64_bfmlal<bt>v4sf): New pattern.
(aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
* config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
(vbfmlalbq_f32): New intrinsic.
(vbfmlaltq_f32): New intrinsic.
(vbfmlalbq_lane_f32): New intrinsic.
(vbfmlaltq_lane_f32): New intrinsic.
(vbfmlalbq_laneq_f32): New intrinsic.
(vbfmlaltq_laneq_f32): New intrinsic.
* config/aarch64/iterators.md (BF_MLA): New int iterator.
(bt): New int attribute.
Uros Bizjak [Thu, 6 Feb 2020 16:34:21 +0000 (17:34 +0100)]
Emit "#" instead of calling gcc_unreachable for invalid insns.
Implement standard approach by emitting "#" for insns that have to be split.
* config/i386/i386.md (*pushtf): Emit "#" instead of
calling gcc_unreachable in insn output.
(*pushxf): Ditto.
(*pushdf): Ditto.
(*pushsf_rex64): Ditto for alternatives other than 1.
(*pushsf): Ditto for alternatives other than 1.
Bill Schmidt [Thu, 6 Feb 2020 13:58:42 +0000 (07:58 -0600)]
Fix PowerPC prototype documentation of __builtin_mtfsf (PR93570)
PR93570 reports that the documentation shows __builtin_mtfsf to
return a double, but this is incorrect. The return signature
should be void.
2020-02-06 Bill Schmidt <wschmidt@linux.ibm.com>
PR target/93570
* doc/extend.texi (Basic PowerPC Built-in Functions): Correct
prototype for __builtin_mtfsf.
Martin Liska [Thu, 6 Feb 2020 13:53:28 +0000 (14:53 +0100)]
Revert mangling of names with -fprofile-generate=<dir>.
PR gcov-profile/91971
PR gcov-profile/93466
* coverage.c (coverage_init): Revert mangling of
path into filename. It can lead to huge filename length.
Creation of subfolders seem more natural.
Jonathan Wakely [Thu, 6 Feb 2020 11:33:12 +0000 (11:33 +0000)]
libstdc++: Fix comment to refer to correct PR
* include/bits/stl_iterator.h (__detail::__common_iter_ptr): Fix PR
number in comment. Fix indentation.
Jonathan Wakely [Thu, 6 Feb 2020 11:30:30 +0000 (11:30 +0000)]
libstdc++: decay in viewable_range should be remove_cvref (LWG 3375)
* include/bits/stl_algobase.h (__iter_swap, __iter_swap<true>): Remove
redundant _GLIBCXX20_CONSTEXPR.
Tobias Burnus [Thu, 6 Feb 2020 12:27:45 +0000 (13:27 +0100)]
[Testsuite] – More fixes for remote execution: check_gc_sections_available, …
* gcc.target/arm/multilib.exp (multilib_config): Pass flags to
…_target_compile as (additional_flags=) option and not as source
filename to make it work with remote execution.
* lib/target-supports.exp (check_runtime, check_gc_sections_available,
check_effective_target_gas, check_effective_target_gld): Likewise.
Jonathan Wakely [Thu, 6 Feb 2020 10:45:38 +0000 (10:45 +0000)]
libstdc++: Remove redundant macro that is always empty
The __iter_swap class template and explicit specialization are only
declared (and used) for C++03 so _GLIBCXX20_CONSTEXPR does nothing here.
* include/bits/stl_algobase.h (__iter_swap, __iter_swap<true>): Remove
redundant _GLIBCXX20_CONSTEXPR.
Stam Markianos-Wright [Wed, 5 Feb 2020 19:21:42 +0000 (19:21 +0000)]
[GCC][BUG][ARM] Fix ICE due to BFmode libfunc call (PR93300)
This was sent and approved on gcc-patches as "[GCC][BUG][Aarch64][ARM]
(PR93300) Fix ICE due to BFmode placement in GET_MODES_WIDER chain".
The observed error came about because BFmode was placed between HFmode
and SFmode in the GET_MODES_WIDER chain, resulting in convert_mode_scalar
attempting to gen a libfunc for a HFmode -> BFmode conversion.
This patch registers NULL for all libfuncs in BFmode, which stops the
middle-end from attempting to generate them.
gcc/ChangeLog:
2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
PR target/93300
* config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
(arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
Jakub Jelinek [Thu, 6 Feb 2020 10:08:59 +0000 (11:08 +0100)]
i386: Improve avx* vector concatenation [PR93594]
The following testcase shows that for _mm256_set*_m128i and similar
intrinsics, we sometimes generate bad code. All 4 routines are expressing
the same thing, a 128-bit vector zero padded to 256-bit vector, but only the
3rd one actually emits the desired vmovdqa %xmm0, %xmm0 insn, the
others vpxor %xmm1, %xmm1, %xmm1; vinserti128 $0x1, %xmm1, %ymm0, %ymm0
The problem is that the cast builtins use UNSPEC_CAST which is after reload
simplified using a splitter, but during combine it prevents optimizations.
We do have avx_vec_concat* patterns that generate efficient code, both for
this low part + zero concatenation special case and for other cases too, so
the following define_insn_and_split just recognizes avx_vec_concat made of a
low half of a cast and some other reg.
2020-02-06 Jakub Jelinek <jakub@redhat.com>
PR target/93594
* config/i386/predicates.md (avx_identity_operand): New predicate.
* config/i386/sse.md (*avx_vec_concat<mode>_1): New
define_insn_and_split.
* gcc.target/i386/avx2-pr93594.c: New test.
Jakub Jelinek [Thu, 6 Feb 2020 08:19:08 +0000 (09:19 +0100)]
openmp: Fix handling of non-addressable shared scalars in parallel nested inside of target [PR93515]
As the following testcase shows, we need to consider even target to be a construct
that forces not to use copy in/out for shared on parallel inside of the target.
E.g. for parallel nested inside another parallel or host teams, we already avoid
copy in/out and we need to treat target the same.
2020-02-06 Jakub Jelinek <jakub@redhat.com>
PR libgomp/93515
* omp-low.c (use_pointer_for_field): For nested constructs, also
look for map clauses on target construct.
(scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
taskreg_nesting_level.
* testsuite/libgomp.c-c++-common/pr93515.c: New test.
Jakub Jelinek [Thu, 6 Feb 2020 08:15:13 +0000 (09:15 +0100)]
openmp: Notice reduction decl in outer contexts after adding it to shared [PR93515]
If we call omp_add_variable, following omp_notice_variable will already find it
on that construct and not go through outer constructs, the following patch fixes that.
Note, this still doesn't follow OpenMP 5.0 semantics on target combined with other
constructs with reduction/lastprivate/linear clauses, will handle that for GCC11.
2020-02-06 Jakub Jelinek <jakub@redhat.com>
PR libgomp/93515
* gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
shared clause, call omp_notice_variable on outer context if any.
Alexandre Oliva [Thu, 6 Feb 2020 06:59:45 +0000 (03:59 -0300)]
Initialize barrier_cache for ARM EH ABI compliance
The ARM Exception Handling ABI requires personality functions in
phase1 to initialize barrier_cache before returning
_URC_HANDLER_FOUND, and we don't.
Although our own ARM personality function does not use barrier_cache
at all, other languages' ARM personality functions, during phase2, are
allowed and expected to test barrier_cache.sp to check whether the
handler frame was reached, which implies that personality functions is
in charge of the frame, and the remaining fields of barrier_cache hold
whatever values it put there in phase1.
Since we did not set barrier_cache.sp, an earlier exception, already
handled by a non-Ada handler and then released, may have its storage
reused for a new exception, that phase1 matches to an Ada frame, but
if that leaves barrier_cache.sp alone, the phase2 personality function
that handled the earlier exception, upon reaching the frame that
handled the earlier exception, may believe the information in
barrier_cache applies to the current exception. The C++ personality
function, for example, would take the information in the barrier_cache
and end up activating the handler that handled the earlier exception:
try {
throw 1;
} catch (int i) {
std::cout << "caught " << i << " by c++" << std::endl;
}
raise_ada_exception (); // might loop back to the handler above
for gcc/ada/ChangeLog
* raise-gcc.c (personality_body) [__ARM_EABI_UNWINDER__]:
Initialize barrier_cache.sp when ending phase1.
Jason Merrill [Wed, 5 Feb 2020 06:02:22 +0000 (01:02 -0500)]
cgraph: A COMDAT decl always has non-zero address.
We should be able to assume that a template instantiation or other COMDAT
has non-zero address even if MAKE_DECL_ONE_ONLY for the target sets
DECL_WEAK and we haven't yet decided to emit a definition in this
translation unit.
PR c++/92003
* symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
non-zero address even if weak and not yet defined.
GCC Administrator [Thu, 6 Feb 2020 00:16:31 +0000 (00:16 +0000)]
Daily bump.
Martin Sebor [Thu, 6 Feb 2020 00:11:38 +0000 (17:11 -0700)]
Remove trailing comma to avoid pedantic warning in C++ 98 mode: comma at end of enumerator list
Martin Sebor [Wed, 5 Feb 2020 23:55:26 +0000 (16:55 -0700)]
PR tree-optimization/92765 - wrong code for strcmp of a union member
gcc/ChangeLog:
PR tree-optimization/92765
* gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
* tree-ssa-strlen.c (compute_string_length): Remove.
(determine_min_objsize): Remove.
(get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
Avoid using type size as the upper bound on string length.
(handle_builtin_string_cmp): Add an argument. Adjust.
(strlen_check_and_optimize_call): Pass additional argument to
handle_builtin_string_cmp.
gcc/testsuite/ChangeLog:
PR tree-optimization/92765
* g++.dg/tree-ssa/strlenopt-1.C: New test.
* g++.dg/tree-ssa/strlenopt-2.C: New test.
* gcc.dg/Warray-bounds-58.c: New test.
* gcc.dg/Wrestrict-20.c: Avoid a valid -Wformat-overflow.
* gcc.dg/Wstring-compare.c: Xfail a test.
* gcc.dg/strcmpopt_2.c: Disable tests.
* gcc.dg/strcmpopt_4.c: Adjust tests.
* gcc.dg/strcmpopt_10.c: New test.
* gcc.dg/strcmpopt_11.c: New test.
* gcc.dg/strlenopt-69.c: Disable tests.
* gcc.dg/strlenopt-92.c: New test.
* gcc.dg/strlenopt-93.c: New test.
* gcc.dg/strlenopt.h: Declare calloc.
* gcc.dg/tree-ssa/pr92056.c: Xfail tests until pr93518 is resolved.
* gcc.dg/tree-ssa/builtin-sprintf-warn-23.c: Correct test (pr93517).
Jason Merrill [Wed, 5 Feb 2020 22:59:28 +0000 (17:59 -0500)]
c++: Fix decltype of empty pack expansion of parm.
In unevaluated context, we only substitute a single PARM_DECL, not the
entire chain, but the handling of an empty pack expansion was missing that
check.
PR c++/93140
* pt.c (tsubst_decl) [PARM_DECL]: Check cp_unevaluated_operand in
handling of TREE_CHAIN for empty pack.
Uros Bizjak [Wed, 5 Feb 2020 23:13:00 +0000 (00:13 +0100)]
Simplify post epilogue_completed splitters.
Now that we have post epilogue_completed split point for all
optimization levels, we can simplify post epilogue_completed splitters
considerably. If corresponding define_peephole2 pattern fails to
allocate a temporary register (or if peephole2 pass isn't run at all),
we can now always split invalid RTX after epilogue_completed is set.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
* config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
(*pushdi2_rex64 peephole2): Unconditionally split after
epilogue_completed.
(*ashl<mode>3_doubleword): Ditto.
(*<shift_insn><mode>3_doubleword): Ditto.
Marek Polacek [Wed, 5 Feb 2020 22:45:16 +0000 (17:45 -0500)]
Move CL to the correct file.
Marek Polacek [Wed, 5 Feb 2020 22:44:06 +0000 (17:44 -0500)]
Add missing CL.
Jakub Jelinek [Wed, 5 Feb 2020 22:35:08 +0000 (23:35 +0100)]
c++: Mark __builtin_convertvector operand as read [PR93557]
In C++ we weren't calling mark_exp_read on the __builtin_convertvector first
argument. I guess it could misbehave even with lambda implicit captures.
Fixed by calling decay_conversion on the argument, we use the argument as
rvalue so we want the standard lvalue to rvalue conversions, but as the
argument must be a vector type, e.g. integral promotions aren't really
needed.
2020-02-05 Jakub Jelinek <jakub@redhat.com>
PR c++/93557
* semantics.c (cp_build_vec_convert): Call decay_conversion on arg
prior to passing it to c_build_vec_convert.
* c-c++-common/Wunused-var-17.c: New test.
Michael Meissner [Wed, 5 Feb 2020 21:45:05 +0000 (16:45 -0500)]
Fix PR 93568 (thinko)
2020-02-05 Michael Meissner <meissner@linux.ibm.com>
PR target/93568
* config/rs6000/rs6000.c (get_vector_offset): Fix
Marek Polacek [Wed, 5 Feb 2020 17:25:01 +0000 (12:25 -0500)]
c++: Fix ICE with CONSTRUCTOR flags verification [PR93559]
Since reshape_init_array_1 can now reuse a single constructor for
an array of non-aggregate type, we might run into a scenario where
we reuse a constructor with TREE_SIDE_EFFECTS. This broke this test
because we have something like { { expr } } and we try to reshape it,
so we recurse on the inner CONSTRUCTOR, reuse an existing CONSTRUCTOR
with TREE_SIDE_EFFECTS, and then ICE on the discrepancy because the
outermost CONSTRUCTOR doesn't have TREE_SIDE_EFFECTS. In this case
EXPR was a call to an operator function so TREE_SIDE_EFFECTS should
be set. Naturally one would want to fix this by calling
recompute_constructor_flags in an appropriate place so that the flags
on the CONSTRUCTORs match. The appropriate place would be at the end
of reshape_init, but this breaks initlist109.C: there we are dealing
with { { TARGET_EXPR <{}> } } where the outermost { } is TREE_CONSTANT
but the inner { } is not, so recompute_constructor_flags would clear
the constant flag in the outermost { }. Seems resonable but it upsets
check_initializer which then complains about "non-constant in-class
initialization invalid for static member". TARGET_EXPRs are always
created with TREE_SIDE_EFFECTS on, but that is mutually exclusive
with TREE_CONSTANT. So we're in a bind.
Fixed by not reusing a CONSTRUCTOR that has TREE_SIDE_EFFECTS; in the
grand scheme of things it isn't measurable: it only affects ~3 tests
in the testsuite.
PR c++/93559 - ICE with CONSTRUCTOR flags verification.
* decl.c (reshape_init_array_1): Don't reuse a CONSTRUCTOR with
TREE_SIDE_EFFECTS.
* g++.dg/cpp0x/initlist119.C: New test.
* g++.dg/cpp0x/initlist120.C: New test.
Jason Merrill [Tue, 4 Feb 2020 23:49:16 +0000 (18:49 -0500)]
c++: Fix SEGV with malformed constructor decl.
In the testcase, since there's no declaration of T, ref_view(T) declares a
non-static data member T of type ref_view, the same type as its enclosing
class. Then when we try to do C++20 aggregate class template argument
deduction we recursively try to adjust the braced-init-list to match the
template class definition until we run out of stack.
Fixed by rejecting the template data member.
PR c++/92593
* decl.c (grokdeclarator): Reject field of current class type even
in a template.
Andrew Stubbs [Wed, 5 Feb 2020 16:58:41 +0000 (16:58 +0000)]
amdgcn: Remove redundant multilib
2020-02-05 Andrew Stubbs <ams@codesourcery.com>
gcc/
* config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.