Ilia Mirkin [Sun, 21 Mar 2021 08:06:09 +0000 (04:06 -0400)]
nvc0: fix reported driver queries for Pascal and later GPUs
We haven't added the sm/metric info post-GM200. So make sure we don't
report available queries there. Additionally, fix the group retrieval to
take into account that either driver stats or SM stats may not be
available.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9740>
Ilia Mirkin [Sun, 21 Mar 2021 08:05:06 +0000 (04:05 -0400)]
nvc0: ensure sufficient push space for indirect data
There may be up to 3 pushbuf data's submitted in this function, make
sure that we allocate enough room for these.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9740>
Ilia Mirkin [Sun, 21 Mar 2021 08:03:54 +0000 (04:03 -0400)]
nv50: add appropriate space check before adding new pushbuffer
nouveau_pushbuf_data does not check that there are available pushes in
the current batch. So add a space check for this. Avoids crashes with
the HUD and glxspheres.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9740>
Ilia Mirkin [Sun, 21 Mar 2021 17:41:03 +0000 (13:41 -0400)]
nv50,nvc0: remove explicit target argument from view creation
Before texture views were supported, this was needed in some cases.
However with texture views (added eons ago), there is now a target
attribute in the template. Use it and remove the explicit argument.
Should help prevent bugs with inconsistencies between the stored
template target and the one that's used to create the view.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9740>
Ilia Mirkin [Sun, 21 Mar 2021 05:47:36 +0000 (01:47 -0400)]
nv50: initialize target for blit source surfaces
This target is used to determine whether MS scaling factors are to be
uploaded.
Fixes:
1288ac7632b3 ("nv50: don't try to upload MSAA settings for BUFFER textures")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9740>
Danylo Piliaiev [Mon, 22 Mar 2021 13:06:08 +0000 (15:06 +0200)]
ir3: update info about applicability of saturation modifier
On a6xx saturation doesn't work on cat4 and on bary.f
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9751>
Gert Wollny [Wed, 10 Mar 2021 09:35:57 +0000 (10:35 +0100)]
r60/sfn: don't lower scomp
The backend has the corresponding ops.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9452>
Gert Wollny [Wed, 10 Mar 2021 09:34:48 +0000 (10:34 +0100)]
r600/sfn: lower find_msb variants to find_msb_rev
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9452>
Gert Wollny [Wed, 10 Mar 2021 09:35:32 +0000 (10:35 +0100)]
r600/sfn: optimize comp+csel using fused ops
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9452>
Gert Wollny [Sat, 6 Mar 2021 15:10:55 +0000 (16:10 +0100)]
r600/sfn: Add algebraic lowering for fsin and fcos
* fsin and fcos require normalization of the input
* bitfield_insert requires an additional shift of the insert value
v2: drop bitfield_insert lowering code, it is already avaibable as
compiler option (Rhys Perry)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9452>
Gert Wollny [Wed, 10 Mar 2021 08:43:48 +0000 (09:43 +0100)]
nir: Add r600 specific sin and cos variants
r600 expect the input values to be normalited by divinding by 2 *PI, so
add an opcode to be able to lower this in nir.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9452>
Gert Wollny [Wed, 10 Mar 2021 08:42:22 +0000 (09:42 +0100)]
nir: Add opcodes for fused comp + csel and optimizations
Some backends, like r600 support a fused version of int and float compare
against zero and and csel. Adding these opcodes here makes it possible to
optimize this in nir.
v2: Add rules for float compare + csel
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9452>
Gert Wollny [Wed, 10 Mar 2021 08:38:18 +0000 (09:38 +0100)]
nir: add opcodes for *find_msb_rev and lowering
Some hardware supports a version of find_msb where the bits are counted
starting at the high bit, and this needs some lowering to obtain the
value that is expected by *find_msb
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9452>
Rhys Perry [Fri, 19 Mar 2021 17:42:57 +0000 (17:42 +0000)]
radv: lower view_index to zero if multiview is disabled
Apparently, gl_ViewIndex can be used if multiview is disabled.
See https://gitlab.freedesktop.org/mesa/mesa/-/issues/4446
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9718>
Mike Blumenkrantz [Tue, 9 Feb 2021 21:22:33 +0000 (16:22 -0500)]
zink: implement a global framebuffer cache
this uses the same mechanics as surface caching, but it
also requires that surfaces keep refs of the framebuffers they're
attached to so that they can invalidate the fb object upon destruction,
as, similar to program objects, the fb objects are "owned" by their attachments
loosely based on patches by Antonio Caggiano
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9665>
Mike Blumenkrantz [Fri, 19 Mar 2021 21:17:08 +0000 (17:17 -0400)]
zink: use a custom surface referencing function whenever unrefing a surface
pipe_surface_reference uses surface->context, which is not reliable when sharing
surfaces between contexts. since a surface will never be destroyed outside of
zink if its context is dead, forcing surfaces to go directly to the screen object
prevents accessing dead contexts
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9665>
Mike Blumenkrantz [Fri, 19 Mar 2021 21:21:38 +0000 (17:21 -0400)]
zink: break out surface destroy function into a screen function
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9665>
Mike Blumenkrantz [Tue, 22 Dec 2020 15:25:14 +0000 (10:25 -0500)]
zink: use surface references for fb attachments
this guarantees the lifetimes of framebuffer surfaces
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9665>
Mike Blumenkrantz [Tue, 22 Dec 2020 15:24:26 +0000 (10:24 -0500)]
zink: add explicit surface/bufferview batch-tracking functions
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9665>
Mike Blumenkrantz [Thu, 24 Dec 2020 20:23:34 +0000 (15:23 -0500)]
zink: make fb ref func return bool on free
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9665>
Iago Toral Quiroga [Mon, 22 Mar 2021 09:02:47 +0000 (10:02 +0100)]
broadcom/compiler: use nir_lower_undef_to_zero
total instructions in shared programs:
13731663 ->
13721549 (-0.07%)
instructions in affected programs: 98242 -> 88128 (-10.29%)
helped: 191
HURT: 131
Instructions are helped.
total threads in shared programs: 412272 -> 412296 (<.01%)
threads in affected programs: 24 -> 48 (100.00%)
helped: 12
HURT: 0
Threads are helped.
total uniforms in shared programs: 3780693 -> 3779137 (-0.04%)
uniforms in affected programs: 10564 -> 9008 (-14.73%)
helped: 114
HURT: 7
Uniforms are helped.
total max-temps in shared programs: 2319942 -> 2319528 (-0.02%)
max-temps in affected programs: 4191 -> 3777 (-9.88%)
helped: 113
HURT: 22
Max-temps are helped.
total sfu-stalls in shared programs: 31584 -> 31616 (0.10%)
sfu-stalls in affected programs: 217 -> 249 (14.75%)
helped: 51
HURT: 54
Inconclusive result (value mean confidence interval includes 0).
total inst-and-stalls in shared programs:
13763247 ->
13753165 (-0.07%)
inst-and-stalls in affected programs: 98719 -> 88637 (-10.21%)
helped: 187
HURT: 134
Inst-and-stalls are helped.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9681>
Iago Toral Quiroga [Wed, 17 Mar 2021 08:14:53 +0000 (09:14 +0100)]
broadcom/compiler: optimize constant vfpack
total instructions in shared programs:
13733627 ->
13731663 (-0.01%)
instructions in affected programs: 174140 -> 172176 (-1.13%)
helped: 1597
HURT: 310
Instructions are helped.
total uniforms in shared programs: 3784601 -> 3780693 (-0.10%)
uniforms in affected programs: 58678 -> 54770 (-6.66%)
helped: 2886
HURT: 3
Uniforms are helped.
total max-temps in shared programs: 2322714 -> 2319942 (-0.12%)
max-temps in affected programs: 15729 -> 12957 (-17.62%)
helped: 2189
HURT: 1
Max-temps are helped.
total spills in shared programs: 6010 -> 6012 (0.03%)
spills in affected programs: 61 -> 63 (3.28%)
helped: 0
HURT: 1
total fills in shared programs: 13494 -> 13497 (0.02%)
fills in affected programs: 89 -> 92 (3.37%)
helped: 0
HURT: 1
total sfu-stalls in shared programs: 31521 -> 31584 (0.20%)
sfu-stalls in affected programs: 328 -> 391 (19.21%)
helped: 30
HURT: 94
Inconclusive result (%-change mean confidence interval includes 0).
total inst-and-stalls in shared programs:
13765148 ->
13763247 (-0.01%)
inst-and-stalls in affected programs: 174237 -> 172336 (-1.09%)
helped: 1551
HURT: 316
Inst-and-stalls are helped.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9681>
Iago Toral Quiroga [Thu, 18 Mar 2021 08:15:13 +0000 (09:15 +0100)]
broadcom/compiler: handle implicit uniform loads when optimizing constant alu
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9681>
Samuel Pitoiset [Wed, 10 Mar 2021 16:04:18 +0000 (17:04 +0100)]
radv: add RADV_DEBUG=novrsflatshading option
To easily debug if enabling VRS for flat shading is broken.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9515>
Samuel Pitoiset [Wed, 10 Mar 2021 15:21:34 +0000 (16:21 +0100)]
radv: enable VRS 2x2 coarse shading for flat shading on GFX10.3+
This should safe to enable and shouldn't degrade the quality.
It decreases the number of PS invocations by 4 when used.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9515>
Samuel Pitoiset [Wed, 10 Mar 2021 15:21:14 +0000 (16:21 +0100)]
radv: determine if a pipeline is candidate for flat shading
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9515>
Samuel Pitoiset [Wed, 10 Mar 2021 15:19:59 +0000 (16:19 +0100)]
radv: gather if the FS uses perspective or linear interpolations
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9515>
Samuel Pitoiset [Fri, 19 Mar 2021 06:52:07 +0000 (07:52 +0100)]
radv: restore previous MRT CB_SHADER_MASK logic
It was moved to the shader info pass to compute MRTs from the shader
outputs to fix some CTS failures but this is actually unnecessary.
The CTS failures were actually CTS bugs.
This reverts
70cc80805ce ("radv: compute CB_SHADER_MASK from the
fragment shader outputs") and
76ee45d3a88 ("radv: adjust CB_SHADER_MASK
for dual-source blending in the shader info pass").
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9703>
Tony Wasserka [Thu, 4 Mar 2021 11:10:58 +0000 (12:10 +0100)]
radv: Skip 0-sized index buffers only when necessary
This workaround is only needed on Navi10 and Navi14.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9429>
Tony Wasserka [Wed, 10 Mar 2021 10:22:34 +0000 (11:22 +0100)]
ac: Add has_zero_index_buffer_bug to ac_gpu_info
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9429>
Tony Wasserka [Thu, 4 Mar 2021 11:10:55 +0000 (12:10 +0100)]
radv: Fix improper max_index_count argument for indexed draws
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3598
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9429>
Samuel Pitoiset [Wed, 17 Mar 2021 09:27:37 +0000 (10:27 +0100)]
radv: initialize CMASK with correct clear codes
From AMDVLK.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9650>
Samuel Pitoiset [Wed, 17 Mar 2021 09:11:50 +0000 (10:11 +0100)]
radv: fix clearing CMASK layers on GFX9+
The driver was clearing all layers.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9650>
Samuel Pitoiset [Wed, 17 Mar 2021 09:10:13 +0000 (10:10 +0100)]
ac/surface: init CMASK slice size on GFX9+
It was only set for GFX6-8.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9650>
Marcin Ślusarz [Fri, 19 Mar 2021 10:33:25 +0000 (11:33 +0100)]
intel/aub_viewer: fix decoding of sampler states
There's only 1 sampler state behind
3DSTATE_SAMPLER_STATE_POINTERS[_VS|_HS|_DS|_GS|_PS] and
3DSTATE_SAMPLER_STATE_POINTERS.[PointertoVSSamplerState|PointertoPSSamplerState|PointertoGSSamplerState].
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
Marcin Ślusarz [Fri, 19 Mar 2021 10:32:46 +0000 (11:32 +0100)]
intel/aub_viewer: drop bogus check
state_addr == bo.addr, bo.size==0 is handled by another check
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
Marcin Ślusarz [Fri, 19 Mar 2021 10:31:30 +0000 (11:31 +0100)]
intel/aub_viewer: catch invalid sampler state pointer
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
Marcin Ślusarz [Fri, 19 Mar 2021 09:16:16 +0000 (10:16 +0100)]
intel/batch_decoder: assert on invalid sampler pointer
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
Marcin Ślusarz [Fri, 19 Mar 2021 08:57:33 +0000 (09:57 +0100)]
intel/batch_decoder: fix decoding of sampler states
There's only 1 sampler state behind
3DSTATE_SAMPLER_STATE_POINTERS[_VS|_HS|_DS|_GS|_PS] and
3DSTATE_SAMPLER_STATE_POINTERS.[PointertoVSSamplerState|PointertoPSSamplerState|PointertoGSSamplerState].
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
Marcin Ślusarz [Wed, 17 Mar 2021 19:03:49 +0000 (20:03 +0100)]
intel/batch_decoder: drop bogus check
state_addr == bo.addr, bo.size==0 is handled by another check
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
Marcin Ślusarz [Wed, 17 Mar 2021 19:01:01 +0000 (20:01 +0100)]
intel/batch_decoder: catch invalid sampler state pointer
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
Marcin Ślusarz [Wed, 17 Mar 2021 19:27:40 +0000 (20:27 +0100)]
i965: fix decode_get_bo
Similar fix to the iris one.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
Marcin Ślusarz [Wed, 17 Mar 2021 18:56:34 +0000 (19:56 +0100)]
iris: fix decode_get_bo
It tries to be helpful by returning BO metadata matching exactly
the requested address, but it "forgets" to fix the remaining size.
The only caller of this function (ctx_get_bo) already deals with
raw BO metadata, so return it as such instead of fixing size too.
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9707>
Vasily Khoruzhick [Wed, 17 Mar 2021 06:41:03 +0000 (23:41 -0700)]
lima: relax checks of imported BO
We don't need stride of imported buffer to be equal to calculated
stride if the buffer is linear.
Fixes #3070
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9646>
Dave Airlie [Wed, 17 Mar 2021 01:23:26 +0000 (11:23 +1000)]
lavapipe: enable 8/16-bit storage extensions
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
Dave Airlie [Tue, 29 Dec 2020 02:43:47 +0000 (12:43 +1000)]
gallivm: use fp16 casts lowering
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
Dave Airlie [Wed, 10 Mar 2021 06:19:32 +0000 (16:19 +1000)]
nir: lower 64-bit floats to 32-bit first.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
Dave Airlie [Tue, 29 Dec 2020 02:43:11 +0000 (12:43 +1000)]
nir: port fp16 casting code from dxil
This moves the dxil pass to common code and makes dxil
use the new code.
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
Dave Airlie [Tue, 22 Dec 2020 05:38:06 +0000 (15:38 +1000)]
gallivm/nir: handle bool registers.
lowering to 32-bit bools doesn't get rid of register stores,
so handle those.
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
Dave Airlie [Fri, 18 Dec 2020 06:43:56 +0000 (16:43 +1000)]
gallivm: fix non-32bit ubo loads
8/16-bit storage requires ubo loads for the smaller types,
fix the ubo loading and bounds checking.
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
Arno Messiaen [Mon, 23 Dec 2019 20:02:49 +0000 (21:02 +0100)]
lima/ppir: increase usage of pipeline regs
It's possible to increase usage of ppir_pipeline_reg_fmul and
ppir_pipeline_reg_vmul by reordering arguments in some cases, so let's
do that.
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Arno Messiaen <arnomessiaen@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3232>
Jesse Natalie [Fri, 19 Mar 2021 01:46:09 +0000 (18:46 -0700)]
nir: Temporarily disable optimizations for MSVC ARM64
There's currently an MSVC optimizer bug which causes a stack overflow
in the compiler if it attempts to optimize fsat.
Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9700>
Ilia Mirkin [Sun, 21 Mar 2021 06:25:09 +0000 (02:25 -0400)]
gallium,st: add missing viewport swizzles
Viewports must be initialized with the appropriate swizzles (for
hardware that supports this feature).
Fixes:
90fcb3fef28 (st/mesa: add NV_viewport_swizzle support)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9732>
Rob Clark [Sun, 21 Mar 2021 15:18:26 +0000 (08:18 -0700)]
freedreno/a6xx: Fix typo
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
Rob Clark [Tue, 9 Mar 2021 23:50:26 +0000 (15:50 -0800)]
freedreno: Autotune bypass vs GMEM rendering decision
In some cases, like gl_driver2, we have all the characteristics that
make our current simplistic bypass vs GMEM decision pick GMEM (ie. batch
starts with a clear, has blend enabled, has a high draw count, etc),
but each draw touches very few pixels and the per-tile state-change
overhead leaves us CP limited. We would be better in this case picking
the bypass path.
So use feedback from # of samples-passed in previous render passes to
the same FBO to give us a bit more information to make better choices.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2798
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
Rob Clark [Mon, 15 Mar 2021 20:42:37 +0000 (13:42 -0700)]
freedreno/a6xx: Fix sRGB/snorm vs sysmem clear path
This shows up when, thanks to the next patch, we decide to start doing
bypass instead of GMEM for some dEQP's
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
Rob Clark [Mon, 15 Mar 2021 19:27:33 +0000 (12:27 -0700)]
freedreno: Add gmem_reason_mask
Older gens had more restrictions about GMEM bypass which do not apply to
newer generations. Add a bitmask so we know which bits are not a hard
requirement for using GMEM.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
Rob Clark [Wed, 10 Mar 2021 20:14:29 +0000 (12:14 -0800)]
freedreno/batch: Add a way to clone a batch key
For autotune, the lifetime of it's hashtable keys doesn't match the
batch, so we'll need to clone the key before inserting into the
hashtable.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
Rob Clark [Wed, 10 Mar 2021 19:53:52 +0000 (11:53 -0800)]
freedreno/batch: Export key/hash fxns
We are going to re-use these for autotune.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
Rob Clark [Tue, 9 Mar 2021 22:21:16 +0000 (14:21 -0800)]
freedreno: Add draw cost estimation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9535>
Mike Blumenkrantz [Fri, 19 Mar 2021 16:07:15 +0000 (12:07 -0400)]
zink: more accurately check samplecount caps for shader images
lavapipe can only do up to 4bits, so this isn't just a binary check
Fixes:
0daa61553d0 ("zink: check if multisample support exists for shader image formats")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9713>
Rob Clark [Sat, 20 Mar 2021 19:50:56 +0000 (12:50 -0700)]
freedreno/a6xx: Emit streamout state on every draw
If stream-output is active, we can't skip it's state-emit, even if the
SO buffer(s) have not changed.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Sun, 14 Mar 2021 18:53:23 +0000 (11:53 -0700)]
freedreno: Push multi-draw closer to backend
It will take some more extensive work to plumb this through the backends
(although that should increase the benefit further), but this is already
worth a nearly 4x speedup in piglit drawoverhead tests with no state
change, so this seems like a useful intermediate step.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Sun, 14 Mar 2021 18:38:13 +0000 (11:38 -0700)]
freedreno: Handle multi-draw edge cases
Use the multi-draw emulation helper in the edge cases where we don't
handle multi-draw.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Sun, 14 Mar 2021 18:13:58 +0000 (11:13 -0700)]
freedreno: Use multi-draw helper
In the normal case, we'll be pushing multi-draw (eventually) down into
the backend, but there are still a few remaining edge cases where we
can't deal with it.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Thu, 18 Mar 2021 17:48:41 +0000 (10:48 -0700)]
u_draw: Add helper to emultate multi-draw
No need to duplicate this in every driver.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Sun, 14 Mar 2021 17:52:53 +0000 (10:52 -0700)]
freedreno: Drop u_trim_pipe_prim() from fast-paths
Not sure if we need this for a2xx. For a3xx and a4xx we need it for sw
xfb which needs to know the trimmed # of vertices in the VS. We do not
need it on a6xx, and unlikely need it for anything a5xx+.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Mon, 15 Mar 2021 21:40:48 +0000 (14:40 -0700)]
freedreno/a6xx/vsc: Be more tolerate of degenerate prims
Before we drop u_trim_pipe_prim(), we need to be more tolerant of the
edge cases it was protecting us from.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Sun, 14 Mar 2021 17:18:42 +0000 (10:18 -0700)]
freedreno: Only collect sw stats when required
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Sun, 14 Mar 2021 17:09:28 +0000 (10:09 -0700)]
freedreno: Split out helper for updating sw stats
And while we're at it, handle the num_draws > 1 case, to prepare for
plumbing num_draws further down.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Mon, 15 Mar 2021 15:15:21 +0000 (08:15 -0700)]
freedreno: Don't ignore geom/tess stage resources
The draw resource-tracking logic looks like it never was updated to
account for HS/DS/GS stages. Add it bitmask of bound stages so we only
have to loop over the bound stages.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Sat, 13 Mar 2021 17:02:49 +0000 (09:02 -0800)]
freedreno: Add dirty bit for state that needs rsc tracking
aa1ddb6fe3c364c4f10df29bb42a0cf09d4cdabe skipped the tracking for the
!dirty case, but we can do a bit better and track at bind time whether
the state change is one that requires resource tracking.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Sat, 13 Mar 2021 17:02:06 +0000 (09:02 -0800)]
freedreno: Small dirty flag re-org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Fri, 12 Mar 2021 23:03:52 +0000 (15:03 -0800)]
freedreno/a6xx: Convert to dirty_groups
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4106
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Fri, 12 Mar 2021 20:39:11 +0000 (12:39 -0800)]
freedreno: Add mapping to generation specific dirty state
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Fri, 12 Mar 2021 19:38:59 +0000 (11:38 -0800)]
freedreno: Add helpers to mark dirty state
Doesn't change anything yet, but this will let us more easily add
mapping from dirty gallium state to dirty gen-specific state-groups.
Note that the mapping from shader-state to global state in
fd_context_dirty_shader() optimizes out for release builds. This
is kind of important, in the next patch we'll want ffs(SOME_CONST)
to optimize away even more.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Mon, 15 Mar 2021 16:04:28 +0000 (09:04 -0700)]
freedreno/ir3: Precompute whether we need driver-params
To save a bit of extra math in the draw-path.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Sat, 13 Mar 2021 19:25:42 +0000 (11:25 -0800)]
freedreno/drm: Inline iova calculation
The shift/or are frequently zero, so this lets the compiler optimize out
some draw-overhead hotpath.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Sat, 13 Mar 2021 19:06:16 +0000 (11:06 -0800)]
freedreno/drm: Move emit_reloc_tail to head
Get this out of the way first to avoid some register push/pop. Only
reloc->bo is needed after writing the address into cmdstream, so this
turns msm_submit_append_bo() into a tail call.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Fri, 12 Mar 2021 17:40:01 +0000 (09:40 -0800)]
freedreno/drm: Split 64b vs 32b paths
No need to 'if (gpu_id >= 500)' on every reloc
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Rob Clark [Fri, 12 Mar 2021 17:32:36 +0000 (09:32 -0800)]
freedreno/drm: Split softpin "reloc" functions
"OBJECT" rb's are long lived, and generating them is not a hotpath, but
relocs to "STREAMING" rb's are a hot path. But we can decouple these.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9581>
Jason Ekstrand [Mon, 11 May 2020 17:42:39 +0000 (12:42 -0500)]
intel/tools: Handle BINDING_TABLE_POOL_ALLOC in batch decoding
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
Jason Ekstrand [Mon, 11 May 2020 17:47:59 +0000 (12:47 -0500)]
intel/genxml: Make BindingTablePoolEnable a bool
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
Jason Ekstrand [Mon, 11 May 2020 20:31:57 +0000 (15:31 -0500)]
intel/tools: Handle GT_MODE in the batch decoder
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
Jason Ekstrand [Mon, 11 May 2020 20:54:43 +0000 (15:54 -0500)]
intel/tools: Handle milti-LRI in the batch decoder
Context batches tend to have a lot of multi-LRI and, if we want to be
able to parse those registers nicely, we really handle it.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
Jason Ekstrand [Sat, 20 Mar 2021 15:11:00 +0000 (10:11 -0500)]
intel/genxml: Binding table pointers are 15 bits on GFX version 12.5+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
Kenneth Graunke [Tue, 25 Jun 2019 20:15:47 +0000 (13:15 -0700)]
intel/genxml: Add a partial GT_MODE definition for Gen11+.
I chose to drop "HW" from the name of this field because on Gen11
it applies to both HW and SW binding tables, so it's a bit of a
misnomer.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9729>
Jose Fonseca [Fri, 19 Mar 2021 20:08:54 +0000 (20:08 +0000)]
scons: Remove.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9720>
Jose Fonseca [Fri, 19 Mar 2021 20:00:31 +0000 (20:00 +0000)]
appveyor: Remove integration.
It's only testing SCons w/ MSVC at this moment.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9720>
Christian Gmeiner [Mon, 14 Dec 2020 14:44:15 +0000 (15:44 +0100)]
etnaviv: rename struct members
As the structs are used for TE and NTE change the naming of the
struct members to be more generic.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8103>
Christian Gmeiner [Sat, 12 Dec 2020 14:28:48 +0000 (15:28 +0100)]
etnaviv: add support for NTE
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8103>
Christian Gmeiner [Sat, 12 Dec 2020 14:24:21 +0000 (15:24 +0100)]
etnaviv: factor out TS state emitting
Will be reused in NTE path.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8103>
Christian Gmeiner [Mon, 21 Dec 2020 09:02:34 +0000 (10:02 +0100)]
etnaviv: etnaviv: put sampler limit determination into own function
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8103>
Vinson Lee [Fri, 22 Jan 2021 21:18:55 +0000 (13:18 -0800)]
clover: Add constructor for sampler_argument.
Fix defects reported by Coverity Scan.
member_not_init_in_gen_ctor: The compiler-generated constructor for this class does not initialize s.
member_not_init_in_gen_ctor: The compiler-generated constructor for this class does not initialize st.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8657>
Bas Nieuwenhuizen [Wed, 17 Mar 2021 13:25:58 +0000 (14:25 +0100)]
radv: Dedupe winsyses per device.
The heap usage/budget needs to be tracked per process instead
of per device.
Fixes:
7bef1920182 ("radv: add support for VK_EXT_memory_budget")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9651>
Lepton Wu [Fri, 19 Mar 2021 20:57:13 +0000 (13:57 -0700)]
virgl: Use atomic operation directly.
This make sure we don't trigger assert in pipe_reference
Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: John Bates <jbates@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9722>
Eric Anholt [Fri, 19 Mar 2021 16:59:01 +0000 (09:59 -0700)]
ci/freedreno: Mark glx-swap-copy as a flake on a630.
Just flaked on a post-merge pipeline.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9715>
Eric Anholt [Fri, 19 Mar 2021 16:38:47 +0000 (09:38 -0700)]
ci/bare-metal: Move the db820c lockup detect to the right boot script.
Fixes:
2407952ec99a ("ci/bare-metal: Restart a run on intermittent kernel lockups.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9715>
Eric Anholt [Fri, 19 Mar 2021 16:34:59 +0000 (09:34 -0700)]
ci/freedreno: Mark all of dEQP TF as flaky.
I keep working on stabilizing it, but no luck yet. Stop blocking CI on
our flakes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9715>
Mike Blumenkrantz [Thu, 5 Nov 2020 17:39:50 +0000 (12:39 -0500)]
zink: rewrite queue dispatch to use monotonic batch ids instead of hardcoded ones
historically zink has been bound to 4 gfx batches and then a separate compute batch
was added. this is not ideal for a number of reasons, the primary one being that if
an application performs 5 glFlush commands, the fifth one will force a gpu stall
this patch aims to do the following, all of which are necessarily done in the same patch
because they can't be added incrementally and still have the same function:
* rewrite batch tracking for resources/views/queries/descriptors/...
|originally this was done with a single uint32_t as a bitmask, but that becomes cumbersome
to track as batch counts increase, not to mention it becomes doubly-annoying
when factoring in separate compute batches with their own ids. zink_batch_usage gives
us separate tracking for gfx and compute batches along with a standardized api for
managing usage
* flatten batch objects to a gfx batch and a compute batch
|these are separate queues, so we can use an enum to choose between an array[2] of
all batch-related objects
* switch to monotonic batch ids with batch "states"
|with the flattened queues, we can just use monotonic uints to represent batch ids,
thus freeing us from constantly using bitfield operations here and also enabling
batch counts to scale dynamically by allocating/caching "states" that represent a batch
for a given queue
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9547>
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