Matt Arsenault [Fri, 6 Sep 2019 20:49:10 +0000 (20:49 +0000)]
GlobalISel: Add G_FMAD instruction
llvm-svn: 371254
Matt Arsenault [Fri, 6 Sep 2019 20:32:37 +0000 (20:32 +0000)]
GlobalISel: Support physical register inputs in patterns
llvm-svn: 371253
Richard Smith [Fri, 6 Sep 2019 20:32:01 +0000 (20:32 +0000)]
Update comment for <template-param-decl> mangling to match extended mangling rule in r371004.
llvm-svn: 371252
Reid Kleckner [Fri, 6 Sep 2019 20:12:44 +0000 (20:12 +0000)]
Remove dead .seh_stackalloc parsing method in X86AsmParser
The shared COFF asm parser code handles this directive, since it is
shared with AArch64. Spotted by Alexandre Ganea in review.
llvm-svn: 371251
Jan Korous [Fri, 6 Sep 2019 20:08:32 +0000 (20:08 +0000)]
[clang][Index][NFC] Put IndexingOptions to a separate header
llvm-svn: 371250
Matt Arsenault [Fri, 6 Sep 2019 20:00:22 +0000 (20:00 +0000)]
AMDGPU: Fix typo
llvm-svn: 371249
Puyan Lotfi [Fri, 6 Sep 2019 19:59:59 +0000 (19:59 +0000)]
[llvm-ifs] Improving detection of PlatformKind from triple for TBD generation.
It was pointed out that I had hard-coded PlatformKind. This is rectifying that.
Differential Revision: https://reviews.llvm.org/D67255
llvm-svn: 371248
Sean Fertile [Fri, 6 Sep 2019 19:55:44 +0000 (19:55 +0000)]
[PowerPC][XCOFF] Remove basic test. [NFC]
Test verified that we could compile an empty module and produce an XCOFF
object file. Newer tests superssed this coverage, its safe to remove.
llvm-svn: 371247
Evandro Menezes [Fri, 6 Sep 2019 19:41:49 +0000 (19:41 +0000)]
[ConstantFolding] Add new test cases for transcendentals (NFC)
llvm-svn: 371246
Lang Hames [Fri, 6 Sep 2019 19:21:59 +0000 (19:21 +0000)]
[ORC] Make sure RPC channel-send is called in blocking calls and responses.
ORC-RPC batches calls by default, and the channel's send method must be called
to transfer any buffered calls to the remote. The call to send was missing on
responses and blocking calls in the SingleThreadedRPCEndpoint. This patch adds
the necessary calls and modifies the RPC unit test to check for them.
llvm-svn: 371245
Lang Hames [Fri, 6 Sep 2019 19:21:55 +0000 (19:21 +0000)]
[llvm-jitlink] Add optional slab allocator for testing locality optimizations.
The llvm-jitlink utility now accepts a '-slab-allocate <size>' option. If given,
llvm-jitlink will use a slab-based memory manager rather than the default
InProcessMemoryManager. Using a slab allocator will allow reliable testing of
future locality based optimizations (e.g. PLT and GOT elimination) in JITLink.
The <size> argument is a number, optionally followed by a units specifier (Kb,
Mb, or Gb). If the units are not given then the number is assumed to be in Kb.
llvm-svn: 371244
Craig Topper [Fri, 6 Sep 2019 19:17:02 +0000 (19:17 +0000)]
[X86] Use MOVSX by default instead of CBW to extend i8 to AX for i8 sdivrem.
We can use a MOVSX16 here then rely on FixupBWInst to change to
MOVSX32 if the upper bits are dead. With a special case to
not promote if it could be turned into CBW.
Then we can rely on X86MCInstLower to turn the MOVSX into CBW
very late if register allocation worked out.
Using MOVSX gives an opportunity to use the MOVSX as a both a
copy and a sign extend since the input and output register aren't
tied together.
Differential Revision: https://reviews.llvm.org/D67192
llvm-svn: 371243
Craig Topper [Fri, 6 Sep 2019 19:15:04 +0000 (19:15 +0000)]
[X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem.
We can rely on X86FixupBWInsts to turn these into MOVZX32. This
simplifies a follow up commit to use MOVSX for i8 sdivrem with
a late optimization to use CBW when register allocation works out.
llvm-svn: 371242
Matthias Gehre [Fri, 6 Sep 2019 19:15:02 +0000 (19:15 +0000)]
[LifetimeAnalysis] don't use raw string literals in macros
They broke the AArch64 bots (gcc does not support it)
llvm-svn: 371241
Craig Topper [Fri, 6 Sep 2019 19:14:49 +0000 (19:14 +0000)]
[X86] Teach FixupBWInsts to turn MOVSX16rr8/MOVZX16rr8/MOVSX16rm8/MOVZX16rm8 into their 32-bit dest equivalents when the upper part of the register is dead.
llvm-svn: 371240
Sean Fertile [Fri, 6 Sep 2019 18:56:14 +0000 (18:56 +0000)]
[PowerPC][XCOFF] Verify symbol table in xcoff object files. [NFC]
Extend the common/local-common testing for object files to also verify the
symbol table now that the needed functionality has landed in llvm-readobj.
Differential Revision: https://reviews.llvm.org/D66944
llvm-svn: 371237
Evandro Menezes [Fri, 6 Sep 2019 18:24:21 +0000 (18:24 +0000)]
[ConstantFolding] Refactor functions not available before C99 (NFC)
Note the cases when calling a function at compile time may fail if the host
does not support the C99 run time library.
llvm-svn: 371236
Kevin P. Neal [Fri, 6 Sep 2019 18:04:34 +0000 (18:04 +0000)]
[FPEnv] Teach the IRBuilder about constrained FPToSI and FPToUI.
The IRBuilder doesn't know that the two floating point to integer instructions
have constrained equivalents. This patch adds the support by building on
the strict FP mode now present in the IRBuilder.
Reviewed by: John McCall
Approved by: John McCall
Differential Revision: https://reviews.llvm.org/D67291
llvm-svn: 371235
Jan Kratochvil [Fri, 6 Sep 2019 17:52:27 +0000 (17:52 +0000)]
[lldb] Small optimization of FormatMap::Delete and FormatMap::Get
llvm-svn: 371234
Francis Visoiu Mistrih [Fri, 6 Sep 2019 17:22:51 +0000 (17:22 +0000)]
[Remarks] Add support for internalizing a remark in a string table
In order to keep remarks around, we need to make them tied to a string
table.
Users then can delete the parser and rely on the string table to keep
the memory of the strings alive and deduplicated.
llvm-svn: 371233
Oliver Cruickshank [Fri, 6 Sep 2019 17:02:42 +0000 (17:02 +0000)]
[ARM] Add patterns for VSUB with q and r registers
Added patterns for VSUB to support q and r registers, which reduces
pressure on q registers.
llvm-svn: 371231
Oliver Cruickshank [Fri, 6 Sep 2019 17:02:35 +0000 (17:02 +0000)]
[ARM] Add patterns for VADD with q and r registers
Added support for VADD to use q and r registers, which reduces pressure
on q registers.
llvm-svn: 371230
Oliver Cruickshank [Fri, 6 Sep 2019 17:02:21 +0000 (17:02 +0000)]
[ARM] Add patterns for VMUL with q and r registers
Added support for VMUL to use an r register, this reduces pressure on
the q registers.
llvm-svn: 371229
Evandro Menezes [Fri, 6 Sep 2019 16:49:49 +0000 (16:49 +0000)]
[ConstantFolding] Refactor function match for better speed (NFC)
Use an `enum` instead of string comparison to match the candidate function.
llvm-svn: 371228
Jessica Paquette [Fri, 6 Sep 2019 16:49:13 +0000 (16:49 +0000)]
[AArch64][GlobalISel] Always fall back on tail calls with -tailcallopt
-tailcallopt requires that we perform different stack adjustments than with
sibling calls. For example, the `@caller_to0_from8` function in
test/CodeGen/AArch64/tail-call.ll requires that we adjust SP. Without
-tailcallopt, this adjustment does not happen. With it, however, it is expected.
So, to ensure that adding sibling call support doesn't break -tailcallopt,
make CallLowering always fall back on possible tail calls when -tailcallopt
is passed in.
Update test/CodeGen/AArch64/tail-call.ll with a GlobalISel line to make sure
that we don't differ from the SDAG implementation at any point.
Differential Revision: https://reviews.llvm.org/D67245
llvm-svn: 371227
David Bolvansky [Fri, 6 Sep 2019 16:30:44 +0000 (16:30 +0000)]
[NFCI] Unbreak buildbots
llvm-svn: 371226
Fangrui Song [Fri, 6 Sep 2019 16:30:22 +0000 (16:30 +0000)]
[ELF] Replace error() with errorOrWarn() for the ASSERT command
Summary:
ld.bfd produces an output with --noinhibit-exec when an ASSERT fails.
Use errorOrWarn() so that we can produce an output as well.
An interesting case is that symbol assignments may execute multiple
times, so we probably want to suppress errors for non-final runs.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D67285
llvm-svn: 371225
JF Bastien [Fri, 6 Sep 2019 16:26:59 +0000 (16:26 +0000)]
[InstCombine] pow(x, +/- 0.0) -> 1.0
Summary:
This isn't an important optimization at all... We're already doing:
pow(x, 0.0) -> 1.0
My patch merely teaches instcombine that -0.0 does the same.
However, doing this fixes an AMAZING bug! Compile this program:
extern "C" double pow(double, double);
double boom(double base) {
return pow(base, -0.0);
}
With:
clang++ ~/Desktop/fast-math.cpp -ffast-math -O2 -S
And clang will crash with a signal. Wow, fast math is so fast it ICEs the
compiler! Arguably, the generated math is infinitely fast.
What's actually happening is that we recurse infinitely in getPow. In debug we
hit its assertion:
assert(Exp != 0 && "Incorrect exponent 0 not handled");
We avoid this entire mess if we instead recognize that an exponent of positive
and negative zero yield 1.0.
A separate commit, r371221, fixed the same problem. This only contains the added
tests.
<rdar://problem/
54598300>
Reviewers: scanon
Subscribers: hiraditya, jkorous, dexonsmith, ributzka, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67248
llvm-svn: 371224
David Bolvansky [Fri, 6 Sep 2019 16:18:18 +0000 (16:18 +0000)]
[NFC] Added new tests for r371222
llvm-svn: 371223
David Bolvansky [Fri, 6 Sep 2019 16:12:48 +0000 (16:12 +0000)]
[Diagnostics] Refactor code for -Wsizeof-pointer-div, catch more cases; also add -Wsizeof-array-div
Previously, -Wsizeof-pointer-div failed to catch:
const int *r;
sizeof(r) / sizeof(int);
Now fixed.
Also introduced -Wsizeof-array-div which catches bugs like:
sizeof(r) / sizeof(short);
(Array element type does not match type of sizeof operand).
llvm-svn: 371222
Sanjay Patel [Fri, 6 Sep 2019 16:10:18 +0000 (16:10 +0000)]
[SimplifyLibCalls] handle pow(x,-0.0) before it can assert (PR43233)
https://bugs.llvm.org/show_bug.cgi?id=43233
llvm-svn: 371221
Sam Tebbs [Fri, 6 Sep 2019 16:01:32 +0000 (16:01 +0000)]
[ARM] Sink add/mul(shufflevector(insertelement())) for MVE instruction selection
This patch sinks add/mul(shufflevector(insertelement())) into the basic block in which they are used so that they can then be selected together.
This is useful for various MVE instructions, such as vmla and others that take R registers.
Loop tests have been added to the vmla test file to make sure vmlas are generated in loops.
Differential revision: https://reviews.llvm.org/D66295
llvm-svn: 371218
Fangrui Song [Fri, 6 Sep 2019 15:57:44 +0000 (15:57 +0000)]
Reland D66717 [ELF] Do not ICF two sections with different output sections (by SECTIONS commands)
Recommit r370635 (reverted by r371202), with one change: move addOrphanSections() before ICF.
Before, orphan sections in two different partitions may be folded and
moved to the main partition.
Now, InputSection->OutputSection assignment for orphans happens before
ICF. ICF does not fold input sections with different output sections.
With the PR43241 reproduce,
`llvm-objcopy --extract-partition libvr.so libchrome__combined.so libvr.so` => no error
Updated description:
Fixes PR39418. Complements D47241 (the non-linker-script case).
processSectionCommands() assigns input sections to output sections.
ICF is called before it, so .text.foo and .text.bar may be folded even if
their output sections are made different by SECTIONS commands.
```
markLive<ELFT>()
doIcf<ELFT>() // During ICF, we don't know the output sections
writeResult()
combineEhSections<ELFT>()
script->processSectionCommands() // InputSection -> OutputSection assignment
```
This patch splits processSectionCommands() into processSectionCommands()
and processSymbolAssignments(), and moves
processSectionCommands()/addOrphanSections() before ICF:
```
markLive<ELFT>()
combineEhSections<ELFT>()
script->processSectionCommands()
script->addOrphanSections();
doIcf<ELFT>() // should remove folded input sections
writeResult()
script->processSymbolAssignments()
```
An alternative approach is to unfold a section `sec` in
processSectionCommands() when we find `sec` and `sec->repl` belong to
different output sections. I feel this patch is superior because this
can fold more sections and the decouple of
SectionCommand/SymbolAssignment gives flexibility:
* An ExprValue can't be evaluated before its section is assigned to an
output section -> we can delete getOutputSectionVA and simplify
another place where we had to check if the output section is null.
Moreover, a case in linkerscript/early-assign-symbol.s can be handled
now.
* processSectionCommands/processSymbolAssignments can be freely moved
around.
llvm-svn: 371216
Fangrui Song [Fri, 6 Sep 2019 15:57:24 +0000 (15:57 +0000)]
Revert "Revert r370635, it caused PR43241."
This reverts commit
50d2dca22b3b05d0ee4883b0cbf93d7d15f241fc.
llvm-svn: 371215
Valery Pykhtin [Fri, 6 Sep 2019 15:33:53 +0000 (15:33 +0000)]
[AMDGPU] Enable constant offset promotion to immediate operand for VMEM stores
Differential revision: https://reviews.llvm.org/D66958
llvm-svn: 371214
Fangrui Song [Fri, 6 Sep 2019 15:10:31 +0000 (15:10 +0000)]
[ELF][test] Simplify and reorganize tests
Add file-level comments
Delete insignificant addresses to make them more tolerant to layout changes
Simplify test output
Delete simple Inputs/*.s files
Delete version-script-copy-rel.s - covered by verdef-defaultver.s
Delete version-wildcard.test - covered by version-script-glob.s
llvm-svn: 371213
Guillaume Chatelet [Fri, 6 Sep 2019 15:03:49 +0000 (15:03 +0000)]
[Alignment][NFC] Use Align with TargetLowering::setPrefFunctionAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: nemanjai, javed.absar, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, s.egerton, pzheng, ychen, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67267
llvm-svn: 371212
Cyndy Ishida [Fri, 6 Sep 2019 15:02:22 +0000 (15:02 +0000)]
[Object] remove struct constructor, NFC
Summary: make POD struct by removing ctors
Reviewers: avl, dblaikie
Reviewed By: dblaikie
Subscribers: ributzka, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67251
llvm-svn: 371211
Guillaume Chatelet [Fri, 6 Sep 2019 14:51:15 +0000 (14:51 +0000)]
[Alignment][NFC] Use Align with TargetLowering::setPrefLoopAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: nemanjai, hiraditya, kbarton, MaskRay, jsji, ychen, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67278
llvm-svn: 371210
Roman Lebedev [Fri, 6 Sep 2019 14:19:04 +0000 (14:19 +0000)]
[NFC][CodeGen][UBSan] EmitCheckedInBoundsGEP(): pass a vector to EmitCheck()
Will be easier to add a new 'check' in a follow-up.
This was originally part of https://reviews.llvm.org/D67122
llvm-svn: 371208
Roman Lebedev [Fri, 6 Sep 2019 14:18:57 +0000 (14:18 +0000)]
[NFC][CodeGen][UBSan] EmitCheckedInBoundsGEP(): refactor EmitGEPOffsetInBytes() helper
It shouldn't really be inlined into the EmitCheckedInBoundsGEP().
Refactoring it beforehand will make follow-up changes more obvious.
This was originally part of https://reviews.llvm.org/D67122
llvm-svn: 371207
Roman Lebedev [Fri, 6 Sep 2019 14:18:49 +0000 (14:18 +0000)]
[NFC][CodeGen][UBSan] EmitCheckedInBoundsGEP(): add some comments to pointer-overflow check
It's rather eye-twiching, some comments may help here..
This was originally part of https://reviews.llvm.org/D67122
llvm-svn: 371206
Nico Weber [Fri, 6 Sep 2019 13:57:12 +0000 (13:57 +0000)]
libclang depends on ClangDriverOptions since r352803
Without this, the build would sometimes fail with
In file included from clang/tools/libclang/CIndexer.cpp:17:
In file included from clang/include/clang/Driver/Driver.h:15:
clang/include/clang/Driver/Options.h:44:10: fatal error:
'clang/Driver/Options.inc' file not found
#include "clang/Driver/Options.inc"
^~~~~~~~~~~~~~~~~
if Options.inc wasn't generated before libclang was built
by coincidence.
(In the GN build, this works because lib/Driver there declares
the dep on tablegen as a public_dep since the generated file
is part of Driver's public interface, and then things work out
automatically without every client of Driver having to be careful.)
llvm-svn: 371205
Guillaume Chatelet [Fri, 6 Sep 2019 13:54:09 +0000 (13:54 +0000)]
[Alignment] fix dubious min function alignment
Summary:
This was discovered while introducing the llvm::Align type.
The original setMinFunctionAlignment used to take alignment as log2, looking at the comment it seems like instructions are to be 2-bytes aligned and not 4-bytes aligned.
Reviewers: uweigand
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67271
llvm-svn: 371204
Nico Weber [Fri, 6 Sep 2019 13:23:42 +0000 (13:23 +0000)]
Revert r370635, it caused PR43241.
llvm-svn: 371202
George Rimar [Fri, 6 Sep 2019 13:05:34 +0000 (13:05 +0000)]
[llvm-readelf] - Print unknown st_other value if present in GNU output.
This is a fix for https://bugs.llvm.org/show_bug.cgi?id=40785.
llvm-readelf does not print the st_value of the symbol when
st_value has any non-visibility bits set.
This patch:
* Aligns "Ndx" row for the default and a new cases.
(it was 1 space character off for the case when "PROTECTED" visibility was printed)
* Prints "[<other>: 0x??]" for symbols which has an additional st_other bits set.
In compare with GNU, this logic is a bit simpler and seems to be more consistent.
For MIPS GNU can print named flags, though can't print a mix of them:
0:
00000000 0 NOTYPE LOCAL DEFAULT UND
1:
00000000 0 NOTYPE GLOBAL DEFAULT [OPTIONAL] UND a1
2:
00000000 0 NOTYPE GLOBAL DEFAULT [MIPS PLT] UND a2
3:
00000000 0 NOTYPE GLOBAL DEFAULT [MIPS PIC] UND a3
4:
00000000 0 NOTYPE GLOBAL DEFAULT [MICROMIPS] UND a4
5:
00000000 0 NOTYPE GLOBAL DEFAULT [MIPS16] UND a5
6:
00000000 0 NOTYPE GLOBAL DEFAULT [<other>: c] UND b1
7:
00000000 0 NOTYPE GLOBAL DEFAULT [<other>: 28] UND b2
On PPC64 it can print a localentry value that is encoded in the high bits of st_other
63:
0000000000000850 208 FUNC GLOBAL DEFAULT [<localentry>: 8] 12
We chose to print the raw st_other field, prefixed with '0x'.
Differential revision: https://reviews.llvm.org/D67094
llvm-svn: 371201
Guillaume Chatelet [Fri, 6 Sep 2019 12:48:34 +0000 (12:48 +0000)]
[Alignment][NFC] Use Align with TargetLowering::setMinFunctionAlignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: jyknight, sdardis, nemanjai, javed.absar, hiraditya, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67229
llvm-svn: 371200
Djordje Todorovic [Fri, 6 Sep 2019 12:23:37 +0000 (12:23 +0000)]
[test] Update the name of the debug entry values option. NFC
llvm-svn: 371199
James Molloy [Fri, 6 Sep 2019 12:20:08 +0000 (12:20 +0000)]
[DFAPacketizer] Track resources for packetized instructions
This patch allows the DFAPacketizer to be queried after a packet is formed to work out which
resources were allocated to the packetized instructions.
This is particularly important for targets that do their own bundle packing - it's not
sufficient to know simply that instructions can share a packet; which slots are used is
also required for encoding.
This extends the emitter to emit a side-table containing resource usage diffs for each
state transition. The packetizer maintains a set of all possible resource states in its
current state. After packetization is complete, all remaining resource states are
possible packetization strategies.
The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't need the extra
maintained state).
Differential Revision: https://reviews.llvm.org/D66936
llvm-svn: 371198
Serge Guelton [Fri, 6 Sep 2019 11:06:23 +0000 (11:06 +0000)]
Remove call to obsolete gethostbyname, using getaddrinfo
Differential Revision: https://reviews.llvm.org/D67230
llvm-svn: 371195
Haojian Wu [Fri, 6 Sep 2019 10:24:39 +0000 (10:24 +0000)]
[clangd] Use override keyword to override the base class method, NFC
llvm-svn: 371194
Jeremy Morse [Fri, 6 Sep 2019 10:08:22 +0000 (10:08 +0000)]
[DebugInfo] LiveDebugValues: explicitly terminate overwritten stack locations
If a stack spill location is overwritten by another spill instruction,
any variable locations pointing at that slot should be terminated. We
cannot rely on spills always being restored to registers or variable
locations being moved by a DBG_VALUE: the register allocator is entitled
to spill a value and then forget about it when it goes out of liveness.
To address this, scan for memory writes to spill locations, even those we
don't consider to be normal "spills". isSpillInstruction and
isLocationSpill distinguish the two now. After identifying spill
overwrites, terminate the open range, and insert a $noreg DBG_VALUE for
that variable.
Differential Revision: https://reviews.llvm.org/D66941
llvm-svn: 371193
Jay Foad [Fri, 6 Sep 2019 10:07:28 +0000 (10:07 +0000)]
[AMDGPU] Mark s_barrier as having side effects but not accessing memory.
Summary:
This fixes poor scheduling in a function containing a barrier and a few
load instructions.
Without this fix, ScheduleDAGInstrs::buildSchedGraph adds an artificial
edge in the dependency graph from the barrier instruction to the exit
node representing live-out latency, with a latency of about 500 cycles.
Because of this it thinks the critical path through the graph also has
a latency of about 500 cycles. And because of that it does not think
that any of the load instructions are on the critical path, so it
schedules them with no regard for their (80 cycle) latency, which gives
poor results.
Reviewers: arsenm, dstuttard, tpr, nhaehnle
Subscribers: kzhuravl, jvesely, wdng, yaxunl, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67218
llvm-svn: 371192
Nico Weber [Fri, 6 Sep 2019 09:44:13 +0000 (09:44 +0000)]
gn build: Merge r371182
llvm-svn: 371191
Nico Weber [Fri, 6 Sep 2019 09:44:10 +0000 (09:44 +0000)]
gn build: Merge r371179
llvm-svn: 371190
Fangrui Song [Fri, 6 Sep 2019 09:39:48 +0000 (09:39 +0000)]
[ELF][test] Update test after r371185
llvm-svn: 371189
Sam Parker [Fri, 6 Sep 2019 09:36:23 +0000 (09:36 +0000)]
[ARM] Fix for buildbot
llvm-svn: 371187
Fangrui Song [Fri, 6 Sep 2019 09:23:17 +0000 (09:23 +0000)]
[yaml2obj] Rename SHOffset (e_shoff) field to SHOff. NFC
`struct Elf*_Shdr` has a field `sh_offset`, named `ShOffset` in
llvm::ELFYAML::Section. Rename SHOffset (e_shoff) to SHOff to prevent confusion.
Reviewed By: grimar
Differential Revision: https://reviews.llvm.org/D67254
llvm-svn: 371185
Matthias Gehre [Fri, 6 Sep 2019 08:56:30 +0000 (08:56 +0000)]
Reland [LifetimeAnalysis] Support more STL idioms (template forward declaration and DependentNameType)
Reland after https://reviews.llvm.org/D66806 fixed the false-positive diagnostics.
Summary:
This fixes inference of gsl::Pointer on std::set::iterator with libstdc++ (the typedef for iterator
on the template is a DependentNameType - we can only put the gsl::Pointer attribute
on the underlaying record after instantiation)
inference of gsl::Pointer on std::vector::iterator with libc++ (the class was forward-declared,
we added the gsl::Pointer on the canonical decl (the forward decl), and later when the
template was instantiated, there was no attribute on the definition so it was not instantiated).
and a duplicate gsl::Pointer on some class with libstdc++ (we first added an attribute to
a incomplete instantiation, and then another was copied from the template definition
when the instantiation was completed).
We now add the attributes to all redeclarations to fix thos issues and make their usage easier.
Reviewers: gribozavr
Subscribers: Szelethus, xazax.hun, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66179
llvm-svn: 371182
Raphael Isemann [Fri, 6 Sep 2019 08:40:31 +0000 (08:40 +0000)]
[lldb][NFC] Remove Args::StripSpaces
This just reimplemented llvm::StringRef::[r/l]trim().
llvm-svn: 371181
Raphael Isemann [Fri, 6 Sep 2019 08:39:53 +0000 (08:39 +0000)]
[lldb][NFC] Extend ArgsTest
llvm-svn: 371180
Sam Parker [Fri, 6 Sep 2019 08:24:41 +0000 (08:24 +0000)]
[ARM] MVE Tail Predication
The MVE and LOB extensions of Armv8.1m can be combined to enable
'tail predication' which removes the need for a scalar remainder
loop after vectorization. Lane predication is performed implicitly
via a system register. The effects of predication is described in
Section B5.6.3 of the Armv8.1-m Arch Reference Manual, the key points
being:
- For vector operations that perform reduction across the vector and
produce a scalar result, whether the value is accumulated or not.
- For non-load instructions, the predicate flags determine if the
destination register byte is updated with the new value or if the
previous value is preserved.
- For vector store instructions, whether the store occurs or not.
- For vector load instructions, whether the value that is loaded or
whether zeros are written to that element of the destination
register.
This patch implements a pass that takes a hardware loop, containing
masked vector instructions, and converts it something that resembles
an MVE tail predicated loop. Currently, if we had code generation,
we'd generate a loop in which the VCTP would generate the predicate
and VPST would then setup the value of VPR.PO. The loads and stores
would be placed in VPT blocks so this is not tail predication, but
normal VPT predication with the predicate based upon a element
counting induction variable. Further work needs to be done to finally
produce a true tail predicated loop.
Because only the loads and stores are predicated, in both the LLVM IR
and MIR level, we will restrict support to only lane-wise operations
(no horizontal reductions). We will perform a final check on MIR
during loop finalisation too.
Another restriction, specific to MVE, is that all the vector
instructions need operate on the same number of elements. This is
because predication is performed at the byte level and this is set
on entry to the loop, or by the VCTP instead.
Differential Revision: https://reviews.llvm.org/D65884
llvm-svn: 371179
Kang Zhang [Fri, 6 Sep 2019 08:16:18 +0000 (08:16 +0000)]
[CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks
Summary:
Fix a bug of not update the jump table and recommit it again.
In `block-placement` pass, it will create some patterns for unconditional we can do the simple early retrun.
But the `early-ret` pass is before `block-placement`, we don't want to run it again.
This patch is to do the simple early return to optimize the blocks at the last of `block-placement`.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D63972
llvm-svn: 371177
Raphael Isemann [Fri, 6 Sep 2019 07:54:47 +0000 (07:54 +0000)]
[lldb][NFC] Remove unused Args::GetArgumentQuoteCharAtIndex
llvm-svn: 371176
Simon Atanasyan [Fri, 6 Sep 2019 07:23:02 +0000 (07:23 +0000)]
[mips] Make another set of test cases more tolerant to exact symbol addresses. NFC
llvm-svn: 371174
David Zarzycki [Fri, 6 Sep 2019 07:12:36 +0000 (07:12 +0000)]
[CMake] LLVM_COMPILE_FLAGS also applies to C files
LLVM_COMPILE_FLAGS also applies to C files, otherwise tuning flags,
etc. won't be picked up.
https://reviews.llvm.org/D67171
llvm-svn: 371173
Raphael Isemann [Fri, 6 Sep 2019 07:11:14 +0000 (07:11 +0000)]
[lldb] Remove xcode bot from website listing and fix link to sanitized
llvm-svn: 371172
Mikael Holmen [Fri, 6 Sep 2019 06:55:54 +0000 (06:55 +0000)]
[MIR] Change test case to read from stdin instead of file
The
;CHECK: bb
;CHECK-NEXT: %namedVReg1353:_(p0) = COPY $d0
parts of the test case failed when the tests were placed in a directory
including "bb" in the path, since the full path of the file is then
output in the
; ModuleID = '/repo/bb/
line which the CHECK matched on and then the CHECK-NEXT failed.
llvm-svn: 371171
Craig Topper [Fri, 6 Sep 2019 06:02:17 +0000 (06:02 +0000)]
[X86] Add tests for extending and truncating between v16i8 and v16i64 with min-legal-vector-width=256.
It looks like we might be able to do these in fewer steps, but
I'm not sure.
llvm-svn: 371170
Craig Topper [Fri, 6 Sep 2019 06:02:13 +0000 (06:02 +0000)]
[X86] Prevent passing vectors of __int128 as <X x i128> in llvm IR
As far as I can tell, gcc passes 256/512 bit vectors __int128 in memory. And passes a vector of 1 _int128 in an xmm register. The backend considers <X x i128> as an illegal type and will scalarize any arguments with that type. So we need to coerce the argument types in the frontend to match to avoid the illegal type.
I'm restricting this to change to Linux and NetBSD based on the
how similar ABI changes have been handled in the past.
PS4, FreeBSD, and Darwin are unaffected. I've also added a
new -fclang-abi-compat version to restore the old behavior.
This issue was identified in PR42607. Though even with the types changed, we still seem to be doing some unnecessary stack realignment.
llvm-svn: 371169
Craig Topper [Fri, 6 Sep 2019 06:02:06 +0000 (06:02 +0000)]
[X86] Pre-commit vector of __int128 test cases for D64672.
llvm-svn: 371168
Craig Topper [Fri, 6 Sep 2019 05:50:46 +0000 (05:50 +0000)]
[X86] Fix bad indentation. NFC
llvm-svn: 371167
Aleksandr Urakov [Fri, 6 Sep 2019 05:37:03 +0000 (05:37 +0000)]
[Windows] Add support of watchpoints to `ProcessWindows`
Summary:
This patch adds support of watchpoints to the old `ProcessWindows` plugin.
The `ProcessWindows` plugin uses the `RegisterContext` to set and reset
watchpoints. The `RegisterContext` has some interface to access watchpoints,
but it is very limited (e.g. it is impossible to retrieve the last triggered
watchpoint with it), that's why I have implemented a slightly different
interface in the `RegisterContextWindows`. Moreover, I have made the
`ProcessWindows` plugin responsible for search of a vacant watchpoint slot,
because watchpoints exist per-process (not per-thread), then we can place
the same watchpoint in the same slot in different threads. With this scheme
threads don't need to have their own watchpoint lists, and it simplifies
identifying of the last triggered watchpoint.
Reviewers: asmith, stella.stamenova, amccarth
Reviewed By: amccarth
Subscribers: labath, zturner, leonid.mashinskiy, abidh, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D67168
llvm-svn: 371166
Alex Brachet [Fri, 6 Sep 2019 03:31:42 +0000 (03:31 +0000)]
Fix rL371162 again
llvm-svn: 371164
Alex Brachet [Fri, 6 Sep 2019 02:56:48 +0000 (02:56 +0000)]
Fix failing test from rL371162
llvm-svn: 371163
Alex Brachet [Fri, 6 Sep 2019 02:27:55 +0000 (02:27 +0000)]
[yaml2obj] Make e_phoff and e_phentsize 0 if there are no program headers
Summary: It says [[ http://www.sco.com/developers/gabi/latest/ch4.eheader.html | here ]] that if there are no program headers than e_phoff should be 0, but currently it is always set after the header. GNU's `readelf` (but not `llvm-readelf`) complains about this: `readelf: Warning: possibly corrupt ELF header - it has a non-zero program header offset, but no program headers`.
Reviewers: jhenderson, grimar, MaskRay, rupprecht
Reviewed By: jhenderson, grimar, MaskRay
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67054
llvm-svn: 371162
Nico Weber [Fri, 6 Sep 2019 01:22:13 +0000 (01:22 +0000)]
gn build: Merge r371159
llvm-svn: 371161
Fangrui Song [Fri, 6 Sep 2019 01:18:01 +0000 (01:18 +0000)]
Update SHT_LLVM_PART_EHDR test after r371157
llvm-svn: 371160
Jonas Devlieghere [Fri, 6 Sep 2019 01:13:32 +0000 (01:13 +0000)]
[MC] Fix undefined behavior in MCInstPrinter::formatHex
Passing INT64_MIN to MCInstPrinter::formatHex triggers undefined
behavior because the negation of -
9223372036854775808 cannot be
represented in type 'int64_t' (aka 'long long'). This patch puts a
workaround in place to just print the hex value directly.
A possible alternative involves using a small helper functions that uses
(implementation) defined conversions to achieve the desirable value:
static int64_t helper(int64_t V) {
auto U = static_cast<uint64_t>(V);
return V < 0 ? -U : U;
}
The underlying problem is that MCInstPrinter::formatHex(int64_t) returns
a format_object<int64_t> and should really return a
format_object<uint64_t>. However, that's not possible because formatImm
needs to be able to print both as decimal (where a signed is required)
and hex (where we'd prefer to always have an unsigned).
format_object<int64_t> formatImm(int64_t Value) const {
return PrintImmHex ? formatHex(Value) : formatDec(Value);
}
Differential revision: https://reviews.llvm.org/D67236
llvm-svn: 371159
Alina Sbirlea [Fri, 6 Sep 2019 00:58:03 +0000 (00:58 +0000)]
Cleanup test.
llvm-svn: 371158
Fangrui Song [Fri, 6 Sep 2019 00:53:28 +0000 (00:53 +0000)]
[llvm-readobj][yaml2obj] Support SHT_LLVM_SYMPART, SHT_LLVM_PART_EHDR and SHT_LLVM_PART_PHDR
See http://lists.llvm.org/pipermail/llvm-dev/2019-February/130583.html
and D60242 for the lld partition feature.
This patch:
* Teaches yaml2obj to parse the 3 section types.
* Teaches llvm-readobj/llvm-readelf to dump the 3 section types.
There is no test for SHT_LLVM_DEPENDENT_LIBRARIES in llvm-readobj. Add
it as well.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D67228
llvm-svn: 371157
Matt Arsenault [Fri, 6 Sep 2019 00:36:10 +0000 (00:36 +0000)]
AMDGPU/GlobalISel: Avoid repeating 32-bit type lists
llvm-svn: 371156
Matt Arsenault [Fri, 6 Sep 2019 00:36:06 +0000 (00:36 +0000)]
AMDGPU/GlobalISel: Fix load/store of types in other address spaces
There should probably be a size only matcher.
llvm-svn: 371155
Matt Arsenault [Fri, 6 Sep 2019 00:05:58 +0000 (00:05 +0000)]
GlobalISel/TableGen: Fix handling of EXTRACT_SUBREG constraints
This was only using the correct register constraints if this was the
final result instruction. If the extract was a sub instruction of the
result, it would attempt to use GIR_ConstrainSelectedInstOperands on a
COPY, which won't work. Move the handling to
createAndImportSubInstructionRenderer so it works correctly.
I don't fully understand why runOnPattern and
createAndImportSubInstructionRenderer both need to handle these
special cases, and constrain them with slightly different methods. If
I remove the runOnPattern handling, it does break the constraint when
the final result instruction is EXTRACT_SUBREG.
llvm-svn: 371150
Matt Arsenault [Thu, 5 Sep 2019 23:54:35 +0000 (23:54 +0000)]
AMDGPU: Allow getMemOperandWithOffset to analyze stack accesses
Report soffset as a base register if the scratch resource can be
ignored.
llvm-svn: 371149
Matt Arsenault [Thu, 5 Sep 2019 23:40:14 +0000 (23:40 +0000)]
AMDGPU: Fix emitting multiple stack loads for stack passed workitems
The same stack is loaded for each workitem ID, and each use. Nothing
prevents you from creating multiple fixed stack objects with the same
offsets, so this was creating a load for each unique frame index,
despite them being the same offset. Re-use the same frame index so the
loads are CSEable.
llvm-svn: 371148
Eli Friedman [Thu, 5 Sep 2019 23:40:03 +0000 (23:40 +0000)]
[AArch64] Add testcase for codegen for sdiv by 2.
llvm-svn: 371147
Matt Arsenault [Thu, 5 Sep 2019 23:39:21 +0000 (23:39 +0000)]
InstCombine: Fix crash on icmp of gep with addrspacecasted null
llvm-svn: 371146
Jonas Devlieghere [Thu, 5 Sep 2019 23:36:57 +0000 (23:36 +0000)]
[Reproducer] Add a `cont` to ModuleCXX.test
On more than one occasion I've found this test got stuck during replay
while waiting for a packet from debugserver when the debugger was in the
process of being destroyed. For some reason it's more prevalent on the
downstream Swift fork. Adding a cont mitigates the problem while I
investigate.
llvm-svn: 371144
David Blaikie [Thu, 5 Sep 2019 23:33:44 +0000 (23:33 +0000)]
llvm-reduce: Use %python from lit to get the correct/valid python binary for the reduction script
llvm-svn: 371143
Matt Arsenault [Thu, 5 Sep 2019 23:07:10 +0000 (23:07 +0000)]
AMDGPU: Fix Register copypaste error
llvm-svn: 371141
Alina Sbirlea [Thu, 5 Sep 2019 23:00:36 +0000 (23:00 +0000)]
[AliasSetTracker] Correct AAInfo check.
Properly check if NewAAInfo conflicts with AAInfo.
Update local variable and alias set that a change occured when a conflict is found.
Resolves PR42969.
llvm-svn: 371139
Vitaly Buka [Thu, 5 Sep 2019 22:49:34 +0000 (22:49 +0000)]
[SimplifyCFG] Don't SimplifyBranchOnICmpChain with ExtraCase
Summary:
Here we try to avoid issues with "explicit branch" with SimplifyBranchOnICmpChain
which can check on undef. Msan by design reports branches on uninitialized
memory and undefs, so we have false report here.
In general msan does not like when we convert
```
// If at least one of them is true we can MSAN is ok if another is undefs
if (a || b)
return;
```
into
```
// If 'a' is undef MSAN will complain even if 'b' is true
if (a)
return;
if (b)
return;
```
Example
Before optimization we had something like this:
```
while (true) {
bool maybe_undef = doStuff();
while (true) {
char c = getChar();
if (c != 10 && c != 13)
continue
break;
}
// we know that c == 10 || c == 13 if we get here,
// so msan know that branch is not affected by maybe_undef
if (maybe_undef || c == 10 || c == 13)
continue;
return;
}
```
SimplifyBranchOnICmpChain will convert that into
```
while (true) {
bool maybe_undef = doStuff();
while (true) {
char c = getChar();
if (c != 10 && c != 13)
continue;
break;
}
// however msan will complain here:
if (maybe_undef)
continue;
// we know that c == 10 || c == 13, so either way we will get continue
switch(c) {
case 10: continue;
case 13: continue;
}
return;
}
```
Reviewers: eugenis, efriedma
Reviewed By: eugenis, efriedma
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67205
llvm-svn: 371138
Matt Arsenault [Thu, 5 Sep 2019 22:44:06 +0000 (22:44 +0000)]
AMDGPU: Avoid constructing new std::vector in initCandidate
Approximately 30% of the time was spent in the std::vector
constructor. In one testcase this pushes the scheduler to being the
second slowest pass.
I'm not sure I understand why these vector are necessary. The default
scheduler initCandidate seems to use some pre-existing vectors for the
pressure.
llvm-svn: 371136
Nico Weber [Thu, 5 Sep 2019 22:40:47 +0000 (22:40 +0000)]
gn build: Merge r371134
llvm-svn: 371135
Francis Visoiu Mistrih [Thu, 5 Sep 2019 22:35:37 +0000 (22:35 +0000)]
[Remarks] Add comparison operators to the Remark object
and related structs.
This also adds tests for the remarks::Remark object in general.
llvm-svn: 371134
Jonas Devlieghere [Thu, 5 Sep 2019 21:43:32 +0000 (21:43 +0000)]
Remove `bugreport` command
The bugreport command exists to create domain-specific bug reports.
Currently it has one implementation for filing bugs on the unwinder. As
far as we can tell, it has never been of use. Although not exactly the
same as the reproducers, it's a bit confusing to have two parallel
command trees for (kind of) the same thing.
Differential revision: https://reviews.llvm.org/D65469
llvm-svn: 371132
Sterling Augustine [Thu, 5 Sep 2019 21:35:05 +0000 (21:35 +0000)]
Add gdb pretty printers for a wide variety of libc++ data structures (take 2).
Summary:
This patch is an exact duplicate of https://reviews.llvm.org/D65609, except
that it uses the newly introduced testing framework to detect if gdb is present
so that the tests won't fail on machines without gdb.
Reviewers: echristo, EricWF
Subscribers: christof, ldionne, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67238
llvm-svn: 371131
Sterling Augustine [Thu, 5 Sep 2019 21:34:54 +0000 (21:34 +0000)]
Don't assume libcxx_gdb is always set.
libc++abi also uses this file, but doesn't use the same CMakeLists.txt.
llvm-svn: 371130
Jan Korous [Thu, 5 Sep 2019 21:27:25 +0000 (21:27 +0000)]
[ADT] Add makeArrayRef(std::array<>) template specialization
llvm-svn: 371129