glx: Replace FreeB 2.0 text with SPDX-License-Identifier: SGI-B-2.0

Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20300>

glx: Remove dead declarations from <GL/glx.h>

MESA_swap_control is defined in glxext.h now. MESA_swap_frame_usage was
removed in Mesa 7.9 in 2010. The other two were never specified or
implemented.

Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20300>

include: Sync <GL/glxext.h> with Khronos

Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20300>

r300: don't convert to constant swizzles when translating from TGSI

We currently convert it twice for unknown reasons, first when
translating from TGSI and later in constant folding. Not only is this
unnecessary, the first translation doesn't check for non-native
swizzles, so removing it actually saves few instructions and gains
a single Unigine shader for R300 at the expense of few more constant
loads and temps.

Also fixes few dEQPs because we could previously generate code like
TEX temp[1], none.01__, 2D[0];
and the native swizzle rewrite pass was not ready for it.

RV370 shader-db:

total instructions in shared programs: 84441 -> 84436 (<.01%)
instructions in affected programs: 63 -> 58 (-7.94%)
helped: 4
HURT: 0

total temps in shared programs: 12398 -> 12400 (0.02%)
temps in affected programs: 10 -> 12 (20.00%)
helped: 1
HURT: 3

total consts in shared programs: 79081 -> 79090 (0.01%)
consts in affected programs: 12 -> 21 (75.00%)
helped: 0
HURT: 7

GAINED: shaders/tropics/465.shader_test FS

No shader-db change with RV530.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20484>

r300: allow copy propagate of RC_FILE_NONE reads to TEX instructions

Texturing instructions can't read from constant sources, however this
can work when the constant was transformed to constant swizzles and
hence RC_FILE_NONE.

Prevents a regression in single Unigine Tropics shader that uses
constant (0.5,0.5) as a TEX coordinate in a next patch. We now
convert to constant swizzles twice, first when translating from TGSI
and than in constant folding. If we disable the first conversion
rc_transform_tex will emit a mov from constant to temporary. With this
patch, copy propagate will clean it up later.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20484>

r300: don't copy propagate constant swizzles to KIL on R300

Transforming
0: MOV temp[1], -none.1111;
1: KIL temp[1];
 to
0: KIL -none.1111;

Doesn't work on R300 while it works just fine with R500.

Prevents a regression when we enable the copy propagate of RC_FILE_NONE
to texture instructions in the next commit.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20484>

aco: Use v_mov_b16 on GFX11.

Foz-DB GFX1100:
Totals from 4684 (3.47% of 134913) affected shaders:
CodeSize: 41086444 -> 41043476 (-0.10%)
Instrs: 8176019 -> 8175995 (-0.00%)
Latency: 83792071 -> 83792023 (-0.00%)
InvThroughput: 10311371 -> 10311369 (-0.00%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20369>

CI/Windows: Use waffle instead of freeglut for piglit

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20466>

CI/Windows: Update piglit for Waffle fix

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20466>

docs/freedreno: Add bindless/bindful descriptor docs

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20456>

freedreno/registers: Cleanup bindless-base regs

Make it clear that the low two bits of the 64b address is it's own
bitfield.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20456>

freedreno/registers: Fix bo fields with low != 0

We need to add the missing left-shift.  And a right-shift is negative!

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20456>

freedreno/decode: Improved reg64 decoding

This also (other than for an a5xx hack) gets rid of relying on
type0_reg_vals which isn't updated in all paths.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20456>

freedreno/decode: Add rnn_reginfo_free() helper

Simplify things a bit.. and fix a few places that just leaked the
rnndecaddrinfo.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20456>

freedreno/registers: Fix reg64 support

The maximum "high" position depends on 32b vs 64b registers.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20456>

ci: Update mingw and vs2019 libva build dependency to libva/releases/tag/2.17.0

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20498>

radv: Use the correct pipeline layout for LBVH IR generation

Fixes: 5ba950e ("radv: Switch to new LBVH implementation.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20481>

nv30: Fix an offset for vbos being applied to a buffer twice

Similar to 1387d1d4, this offset was being applied twice (once in
translate_generic, and once when the buffer is mapped).

This fixes 7972, which was initially thought to be an endianness
specific issue.

CC: mesa-stable
Tested-by: Filip Gawin <filip@gawin.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20468>

ci: update venus-lavapipe test expectations

Remove fixed push descriptor tests from expected failures.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20471>

venus: properly ignore the sampler for immutable sampler

This was found while debugging venus-lavapipe ci failure. It's a real
bug though no tests have caught this yet, but fixing this would regress
venus-lavapipe non-templated push tests if without the dependent lvp
fix. The sampler in the descriptor write can be garbled if the binding
has immutable samplers.

cc: mesa-stable

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20471>

lvp: properly ignore sampler write for immutable sampler

The issue is hidden due to a overly relaxed cts:
dEQP-VK.binding_model.shader_access.primary_cmd_buf.with_push*
that doesn't scrub the sampler from descriptor writes for immutable
samplers. The issue is exposed via venus-lavapipe ci because venus must
ignore the potentially garbled sampler. This change aligns the
VK_DESCRIPTOR_TYPE_SAMPLER path with the
VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER path by removing a false check
against the provided sampler from push since the sampler can be null. An
alternative is to also check against !binding->immutable_samplers there.

Test: venus-lavapipe with venus push descriptor support

cc: mesa-stable

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20471>

spirv2dxil: Support linking multiple shaders

This probably could/should be split up into multiple commits, but
it's simpler to make this a monolithic change.

This change inlines a bunch of logic from spirv_to_dxil into the
spirv2dxil tool so that linking can be done on the nir shaders.
Probably the linking functionality should be exposed in the lib/dll
form too, which means that a helper for freeing intermediate nir
would be needed too. That's TODO for now.

The tool now requires arguments to be in-order, and once a filename
is encountered, will use the previous arguments to compile the shader.
If multiple graphics shaders are passed, they're linked as if they
were forming a pipeline together.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20440>

spirv2dxil: Rename and move prep helper

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20440>

CI/Windows: Use deqp-runner for D3D12 piglit

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20454>

vulkan/runtime: Preserve pNext when upgrading to synchronization2 structs

The functions that upgraded VkFooMemoryBarrier to VkFooMemoryBarrier2
dropped the pNext pointers. It loses VkSampleLocationsInfoEXT, and may
lose additional structs too if VkFooMemoryBarrier receives further
extensions in the future.

Signed-off-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20477>

radv: determine the gfx scratch size at pipeline bind time

This doesn't need to be in the draw path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20299>

radv: dirty all dynamic states when beginning a new cmdbuf

Sounds safer to not rely on other cmdbuf states.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20299>

radv: dirty states when beginning a cmdbuf instead of when a pipeline is bound

To reduce CPU overhead of radv_emit_graphics_pipeline().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20299>

radv: move emitting the strmout buffer in CmdDrawIndirectByteCountEXT()

This doesn't need to be in the generic draw path because only one
draw command uses it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20299>

radv: flush DFSM on CB_TARGET_MASK changes when it's emitted

To avoid performing the same check twice and to emit it at the right
place.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20299>

frontends/va: Update state var frame_num disregarding cap check

The frame_num variable must be updated for encode entrypoint disregarding
the outcome of the PIPE_VIDEO_CAP_REQUIRES_FLUSH_ON_END_FRAME cap check

fixes: 229c6f79a660e5c7999ffc94e1fb514692df3b6a ("frontends/va: Implement vaSyncBuffer")

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20490>

radeonsi,radv/llvm: fix amdgpu-color/depth-export with epilogs

The main shader wouldn't use ac_build_export(), and the discard exit would
have no export.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 1174ab6d56e ("ac/llvm: use amdgpu-color-export/amdgpu-depth-export")
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7991
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20482>

postprocess: move the definition of pp_filters into **/pp_init.c

An LTO-friendly move.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7881

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20374>

ci: build test LTO

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20374>

zink: use EXT_descriptor_buffer with ZINK_DESCRIPTORS=db

this should be bug-free, as it passes cts/piglit/gaming on multiple drivers,
but since it's new, it stays behind an env var for at least one release

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20489>

zink: move some descriptor data into a substruct

no functional changes

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20489>

Revert "zink: remove descriptor-mode selection infrastructure"

this would've been in-use, but khronos changes while I was on vacation
blocked a merge

This reverts commit 3f371d4e940509c73fa19c4e50ae319e75636eb0.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20489>

anv: implement Wa_14015814527 for task shaders

After using task shader, we need to emit a zero URB state and a
nullprim (empty pipe control) before rendering with primitives.

After this, a normal URB state needs to be returned, this will
happen when pipeline batch is emitted during pipeline switch.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20334>

nir: basic tests for nir_opt_shrink_vectors

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20213>

nir: fix shrinking of load_const for large vectors

Specifically when shrinking load_const with number of components
> 5, if the final number of components is not allowed (for example 8->6)
it would report false for progress even if we actually did some
reshuffling and also it would skip on the rewrite of the readers.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20213>

nir: remove duplicate alu channels in nir_opt_shrink_vectors

This will clean code like:
   vec3 32 ssa_8 = frcp ssa_7.www
   vec3 32 ssa_9 = fmul ssa_7.xyz, ssa_8
into
   vec1 32 ssa_8 = frcp ssa_7.w
   vec3 32 ssa_9 = fmul ssa_7.xyz, ssa_8.xxx

This helps r300 driver because we can only do single channel for math
ops at a time, so the first version would result in three frcp
instructions. The nir_opt_shrink_vectors comments even claim the pass
should be doing this, however it actually does it only for nir_op_vecx
instructions, so extend this for generic alu instructions.

RV530 shader-db:
total instructions in shared programs: 135032 -> 133707 (-0.98%)
instructions in affected programs: 46121 -> 44796 (-2.87%)
helped: 452
HURT: 26
total temps in shared programs: 17051 -> 17033 (-0.11%)
temps in affected programs: 1509 -> 1491 (-1.19%)
helped: 91
HURT: 30

12.02->12.08 (+0.5%) fps gain in Unigine Sanctuary (n=5) with RV530

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7051
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reiewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20213>

pan/bi: Move Bifrost specific C code to src/compiler/bifrost

The goal is to make files at the root of src/compiler/ apply to both Bifrost and
Valhall, while ISA-specific code (e.g. instruction packing) code goes in
compiler/bifrost/ or compiler/valhall/. This is what Valhall is already doing,
the Bifrost specific stuff was just grandfathered in.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20455>

pan/bi: Remove standalone compiler

This functionality is now available on Linux with drm-shim + shader-db, and I
suspect the version bundled here is broken anyway. Strictly this drops
Windows/macOS support for the known-broken frontend to the shader compiler but I
can't say I'm terribly worried about that.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20455>

pan/bi: Rename panfrost/bifrost -> panfrost/compiler

This is the compiler for both Bifrost and Valhall, and presumably future
Mali GPUs too. Give it a more generic name so we can use the bifrost/ path for
something a bit more specific.

For historical reasons the compiler's name is still "bifrost" and uses the
prefix `bi_`. I think that's ok in the same way that i915 in the kernel supports
way more than just i915.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20455>

hasvk: Add layer with work-around for Doom 64 texture corruption

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7817
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19502>

anv: Add layer with work-around for Doom 64 texture corruption

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7817
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19502>

radv: Add an app layer driconf and use it for Metro Exodus

To make adding more application layers easier.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>

radv: Clean up entrypoints generation

This should make it easier to add new tracing and application layers.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>

radv: Use multiple dispatch tables for layers

Every layer has its own dispatch table that it can use to call down the
layer stack. This allows us to use RRA and RGP tracing simultaneously.
Using application layers with tracing should work as well.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>

radv: Move dispatch table init into a separate function

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>

vulkan: Allow passing NULL dispatch tables to vk_device_init

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>

r600: Don't merge alu groups with variable length dot using t-slot

Since the variable length dot must stay in its slot configuration
do not try to merge the group with the previous group when an op may be
moved to the t slot, because this may lead to breaking the multi-slot
operation.

Fixes:  357e5fac9953b26eedc8819ab528b981be6e1b69
   r600/sfn: Use variable length DOT on Evergreen and Cayman

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>

r600/sfn: Set minimum required registers based on array allocation

In the rare case that after register allocation the highest directly
accessed register index is below the highest value used for an
indirectly accessed array we have to ensure that the shader allocates
enough registers to account for these indices that are not seen by the
assembler.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7966
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>

r600: enable ARB_gl_spirv

76 out of 86 piglits pass.
Some fail because SSBOs are only supported for FS and CS on r600, but
the piglits try to use SSBOs with VS, and there are piglits that try to
bind SSBO at 8, and only 0-7 is supported as binding point.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>

r600: Fix early exit when setting SSBOs

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>

r600/sfn: Fix FS primid input slot

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>

r600/sfn: Fix warning for mixed use of enum and integer

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>

r600/sfn: pre-evaluate allowed dest mask in Alu instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>

r600/sfn: move handling of legacy math rules to assembler

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>

st/mesa: Fix free of non-shareable shaders on context destroy

On drivers that do not set PIPE_CAP_SHAREABLE_SHADERS,
st_destroy_program_variants() may reach st_save_zombie_shader()
which accesses st->zombie_shaders.mutex.
Destroying st->zombie_shaders.mutex before destroying program variants
may result in an invalid access in a multiple context scenario for
those drivers.
Move the mutex destroy call to after program variants destroy so that
it doesn't hit a deadlock on context destroy.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20458>

ac/llvm: use amdgpu-color-export/amdgpu-depth-export

These are necessary to use the correct export target on GFX11:
https://reviews.llvm.org/D128185

Fixes artifacts on Lara in Rise of the Tomb Raider benchmark and hair in
The Witcher 3 (classic).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20357>

radv: Decouple radv_before_taskmesh_draw from radv_before_draw.

radv_before_taskmesh_draw will no longer call radv_before_draw and
instead implement the necessary functionality on its own.

radv_before_draw will no longer have to emit mesh shader descriptors.

As a result, both functions should have a lower CPU overhead now.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18829>

radv: fix missing initialization of radv_resolve_barrier::dst_stage_mask

Otherwise, this value is unitialized when read in
radv_ace_internal_barrier().

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7909
Fixes: 4c6f83006d4 ("radv: Synchronization for task shaders.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20351>

iris: implement PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE

required by glthread

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20379>

glthread,gallium: add a CAP to disable glBufferSubData optimization in glthread

it regresses performance on iris

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20379>

aco: Reassign dead definitions of p_split_vector to associated register

Any unused split_vector definition can always use the same register
as the operand. This avoids creating unnecessary copies.

Fossil DB stats on Rembrandt (RDNA2):
Totals from 3904 (2.89% of 134906) affected shaders:
CodeSize: 18326692 -> 18271688 (-0.30%)
Instrs: 3386632 -> 3372888 (-0.41%)
Latency: 42337481 -> 42330085 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 6566731 -> 6566424 (-0.00%); split: -0.01%, +0.00%
Copies: 224301 -> 210559 (-6.13%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>

aco: Try to reassign split vector registers post-RA.

Eliminate unnecessary copies when the operand registers of a
p_split_vector instruction are not clobbered between the p_split_vector
and the user of its definitions.

This happens when p_split_vector doesn't kill its operand and its
definitions have a shorter lifespan that the operand. It affects every
NGG culling shader among other things.

This optimization exists because it's too difficult to solve it
in RA, and should be removed after we solved this in RA.

v2 by Daniel Schürmann:
- Rearrange and simplify conditions for the new optimization
- Fix a few bugs

v3 by Daniel Schürmann:
- Check number of encoded ALU operands

Fossil DB stats on Rembrandt (RDNA2):
Totals from 64896 (48.10% of 134906) affected shaders:
CodeSize: 175693348 -> 175434944 (-0.15%)
Instrs: 33333912 -> 33269388 (-0.19%)
Latency: 183766084 -> 183763432 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 28589651 -> 28589340 (-0.00%); split: -0.00%, +0.00%
Copies: 2806550 -> 2742038 (-2.30%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>

aco/optimizer_postRA: Distinguish overwritten untrackable and subdword.

This allows is_overwritten_since to return false when the last
writer instruction of a register can't be tracked but we know it wasn't
written in the current block.

Fossil DB stats on Rembrandt (RDNA2):
Totals from 1163 (0.86% of 134906) affected shaders:
CodeSize: 9815920 -> 9805016 (-0.11%)
Instrs: 1843688 -> 1840962 (-0.15%)
Latency: 19219153 -> 19209171 (-0.05%)
InvThroughput: 3354375 -> 3353852 (-0.02%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>

aco/optimizer_postRA: Initialize loop header with preheader information

This works because of SSA and should be safer than just setting 'not_written_yet'.

No Fossil DB changes on Rembrandt (RDNA2).

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>

aco: fix reset_block_regs() in postRA-optimizer

Accidentally, we picked the index of the predecessors instead of the predecessors.

Totals from 8496 (6.30% of 134913) affected shaders: (GFX10.3)
CodeSize: 64070724 -> 64022516 (-0.08%); split: -0.08%, +0.00%
Instrs: 11932750 -> 11920698 (-0.10%); split: -0.10%, +0.00%
Latency: 144040266 -> 144017062 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 29327735 -> 29326421 (-0.00%); split: -0.00%, +0.00%

Fossil DB stats on Rembrandt (RDNA2):
Totals from 4488 (3.33% of 134906) affected shaders:
CodeSize: 42759736 -> 42735392 (-0.06%); split: -0.06%, +0.00%
Instrs: 7960522 -> 7954436 (-0.08%); split: -0.08%, +0.00%
Latency: 96192647 -> 96172571 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 19313576 -> 19312575 (-0.01%); split: -0.01%, +0.00%

Fixes: 75967a4814be7988afc20e59bac4b48bafacab00 ('aco/optimizer_postRA: Speed up reset_block() with predecessors.')
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>

aux/trace: Add pipe_context::set_hw_atomic_buffers

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20453>

radv: Advertise rt pipelines for DOOM Eternal

The game has been fixed recently.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20464>

radv: Advertise rt pipelines for Quake II RTX

The game has been working for a while now.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20464>

radv: Add a driconf to advertise rt pipelines

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20464>

isaspec: encode: handle special fieldname properties

Without this change a fieldname like '{DST::align=12}' was not used for
encoding. Change the regex to include such fieldnames and remove the fieldname
property in a later step.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20462>

drm-shim: Use hide_drm_device_path() to hide other drm devices

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19241>

drm-shim: Add hide_drm_device_path()

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19241>

drm-shim: Convert nfasprintf and nfvasprintf to functions

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19241>

freedreno/a6xx: Linewrap

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>

freedreno: Fix use_fence_fd typo

This was causing excessive flushes, because requesting an out-fence fd
triggers the drm layer to flush deferred submits instead of continued
merging.

Fixes: 48b5164356c ("freedreno/drm: Return fence from submit flush")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>

freedreno/drm: Flush deferred submits at context teardown

If we don't flush deferred submits, we could end up waiting on a fence
that is never signaled.

Fixes: 48b5164356c ("freedreno/drm: Return fence from submit flush")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>

freedreno: Add some more traces

Add some more traces around fence waits to better see potential stalls.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>

freedreno: Remove some impossible NULL checks

There is only one special case (a3xx/a4xx queries) were a pipe_resource
is allocated without a backing buffer (because we don't know the needed
size until we know the # of bins).  But those will never end up as an
a6xx render target!

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>

bin/gen_release_notes.py: read Closes/Fixes tags case-insensitively

Cc: mesa-stable
Signed-off-by: Konstantin Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20241>

bin/gen_release_notes.py: parse "Fixes" tags as well as "Closes"

Some commits refer to bugs being fixed with "Fixes" tag. Example of one:

    e13d53e1fdb 'Revert "glx/dri: Fix DRI drawable release at MakeCurrent time"'

Parse this tag as well.

Cc: mesa-stable
Signed-off-by: Konstantin Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20241>

bin/gen_release_notes.py: don't fail if "Closes" refers to an MR

Sometimes a tag "Closes:" in a commit may refer to a merge request
instead of an issue. Examples of such commits:

    34319c7d84 "ci/freedreno: disable antichambers trace"
    998122d9c2 "mesa: fix GL_INVALID_OPERATION in glEGLImageTargetTexStorageEXT"

Avoid failing on these by explicitly checking that the URL refers to an
issue

Cc: mesa-stable
Signed-off-by: Konstantin Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20241>

bin/gen_release_notes.py: do not fail on confidential features

A commit may refer to an issue marked as confidential. That will look
like a 404 page for outside users. One example of such commit is:

    369c12e5be "anv: clear descriptorsets if AllocateDescriptorSets fails"

Let's handle that case.

Cc: mesa-stable
Signed-off-by: Konstantin Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20241>

bin/gen_release_notes.py: do not end "features" with "None"

Currently, the "New features" list unconditionally ends with a "None"
point, which makes no sense. The original author probably meant to check
whether the file is empty, so remove the else clause, and add the check
for emptiness.

Cc: mesa-stable
Signed-off-by: Konstantin Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20241>

docs: update calendar for 22.3.2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20457>

docs: add release notes for 22.3.2

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20457>

gen_release_notes: strip second newline in new features

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20132>

freedreno/ir3: Allow isam for non-bindless ssbo loads

We already had the infrastructure for this, dating back to a5xx, so this
is low hanging fruit to hit the faster isam path.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20429>

ci/broadcom: add rpi3 flake color_clears.multi_context.gles2.rgba8888_pbuffer

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20452>

intel/genxml/gen12.5: Pipe_Control::Remove Global Snapshot Count Reset

It was not meant to be used(Iris have assert for it) and it was
removed from Pipe_Control instruction in gen12.5 and newer.

BSpec: 47112
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20444>

anv: Add and use emit_pipeline_select()

To avoid the replication of code to properly emit PIPELINE_SELECT.

init_compute_queue_state() had a different emit of PIPELINE_SELECT but
as there is no compute engine in GFX VER 11 we are safe with the
differences.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20444>

ci/iris: add iris-kbl flake

Ref: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7547

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20448>

ci: Enable gl-renderer in weston for wayland testing

The weston headless backend defaults to gl-renderer disabled, which
exposes a different set of globals and clients may fall back to software
rendering.
Enable gl-renderer so that clients use the hardware drivers.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20391>

pan/va: Fix MUX.i32 and MUX.v2i16 description. Should be:

`(A &amp; mask) | (B &amp; ~mask)`

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20441>

pan/va: Fix d0 description in enum "Load lane (8-bit)"

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20441>

pan/va: Fix description for constant 0xFAFCFDFE: -2, -3, -4, -6

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20441>