Olliver Schinagl [Wed, 21 Nov 2018 18:05:30 +0000 (20:05 +0200)]
power: axp209: Add support for voltage rate control on LDO3
The AXP209 LDO3 regulator supports voltage rate control, or can set a
slew rate.
This allows for the power to gradually rise up to the desired voltage,
instead of spiking up as fast as possible. Reason to have this can be
to reduce the inrush currents for example.
There are 3 slopes to choose from, the default, 'none' is a voltage rise
of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise.
In ideal world (where vendors follow the recommended design guidelines)
this setting should not be enabled by default. Unless of course AXP209
crashes instead of reporting overcurrent condition as it normally should
do in this case.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Olliver Schinagl [Wed, 21 Nov 2018 18:05:29 +0000 (20:05 +0200)]
power: axp209: Reduce magic values by adding defines for LDO[234]
The AXP209 has a few 'magisc-ish' values that are better served with
clear defines.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Olliver Schinagl [Wed, 21 Nov 2018 18:05:28 +0000 (20:05 +0200)]
power: axp209: Define the chip version mask
Use a define for the chip version mask on the axp209.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Olliver Schinagl [Wed, 21 Nov 2018 18:05:27 +0000 (20:05 +0200)]
power: axp209: Use BIT() macro
Use the standard BIT() macro for bitfield definitions in headers.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Olliver Schinagl [Wed, 21 Nov 2018 18:05:26 +0000 (20:05 +0200)]
sunxi: pmic_bus: Decrease boot time by not writing duplicate data
When we clear a pmic_bus bit, we do a read-modify-write operation.
We waste some time however, by writing back the exact samea value
that was already set in the chip. Let us thus only do the write
in case data was changed.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Olliver Schinagl [Wed, 21 Nov 2018 18:05:25 +0000 (20:05 +0200)]
sunxi: board: Print error after power initialization fails
Currently during init, we enable all power, then enable the dram and
after that check whether there was an error during power-up.
This makes little sense, we should enable power and then check if power
was brought up properly before we continue to initialize other things.
This patch moves the DRAM init after the power failure check.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tom Rini [Fri, 7 Dec 2018 15:55:12 +0000 (10:55 -0500)]
Merge branch '2018-12-06-master-imports'
- Various FAT fixes
- Hardware spinlock uclass
- DMA uclass
- Various am335x fixes
- DT resyncs for a number of TI platforms
- stm32 updates
Simon Goldschmidt [Thu, 29 Nov 2018 20:17:08 +0000 (21:17 +0100)]
arm: socfpga: imply SPL options instead of select
For a small SPL, it should be possible to build without SPI(-flash) drivers
or wihout MMC drivers.
For this to work, we have to change from 'select'ing options to 'imply'ing
them.
With this change, I can have SPL trimmed to my hard-wired starting method
(SPI-NOR or MMC) while still including all drivers in U-Boot.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:47 +0000 (10:57 +0100)]
board: ti: am57xx: remove USB platform code
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:46 +0000 (10:57 +0100)]
board: ti: dra7-evm: remove USB platform code
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:45 +0000 (10:57 +0100)]
configs: am57xx_evm: Enable DM_USB and DM_USB_DEV
Enable DM_USB and DM_USB_DEV for AM57xx based boards.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:44 +0000 (10:57 +0100)]
configs: enable DM_USB and DM_USB_DEV for all DRA7 platforms
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:43 +0000 (10:57 +0100)]
dts: dra7x: make ocp2scp@
4a080000 compatible with simple-bus
This is required when DM_USB is used, to bind the USB phys.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vignesh R [Thu, 29 Nov 2018 09:57:42 +0000 (10:57 +0100)]
board; ti: am57xx: turn on USB clocks
Enable USB clocks in late init stage to support ports under DM_USB.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:41 +0000 (10:57 +0100)]
board: ti: dra7xx-evm: turn on USB clocks in late init stage
For USB ports that use the Driver Model, turn on the clocks during the
late init stage.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:40 +0000 (10:57 +0100)]
dwc3-generic: Add support for the TI DWC3 glue
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:39 +0000 (10:57 +0100)]
phy: Add a new driver for OMAP's USB2 PHYs
This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Vignesh R [Thu, 29 Nov 2018 09:57:38 +0000 (10:57 +0100)]
phy: ti-pip3-phy: Add support for USB3 PHY
Add support to handle USB3 PHYs present on AM57xx/DRA7xx SoCs. This is
needed to move AM57xx to DM_USB.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:57:37 +0000 (10:57 +0100)]
syscon: dm: Add a new method to get a regmap from DTS
syscon_regmap_lookup_by_phandle() can be used to get the regmap of a syscon
device from a reference in the DTS. It operates similarly to the linux
version of the namesake function.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:50 +0000 (10:52 +0100)]
usb: dwc3: Fix a compilation error with the edison defconfig
The error is:
In file included from include/part.h:10:0,
from include/usb.h:18,
from include/linux/usb/gadget.h:22,
from drivers/usb/dwc3/ep0.c:20:
include/ide.h:62:14: error: unknown type name ‘uchar’
void ide_led(uchar led, uchar status);
Fixing it by including common.h that defines the uchar type.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:49 +0000 (10:52 +0100)]
dwc3-generic: Add select_dr_mode operation
The select_dr_mode operation is executed when the glue driver is probed.
The role of this optional function is to configure the operating mode
of the controller at the glue level.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:48 +0000 (10:52 +0100)]
dwc3-generic: Handle the PHYs, the clocks and the reset lines
This make the driver more generic. At this point this driver can replace
the dwc3-of-simple implementation.
Make the description in the Kconfig more generic too.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:47 +0000 (10:52 +0100)]
configs: evb-rk3328: Enable CONFIG_USB_DWC3
This is now required because the PHY operations used by xhci-dwc3 are part
of the dwc3 core.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:46 +0000 (10:52 +0100)]
dm: usb: create a new UCLASS ID for USB gadget devices
UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host
controllers, not gadget devices.
Adding a new UCLASS for gadget devices alone.
Also move the generic DM code for USB gadgets in a separate file for
clarity.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:45 +0000 (10:52 +0100)]
dwc3: move phy operation to core.c
Those operations can be used for peripheral operation as well as host
operation.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
# Conflicts:
# drivers/usb/dwc3/core.c
# drivers/usb/host/xhci-dwc3.c
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:44 +0000 (10:52 +0100)]
dwc3_generic: do not probe the USB device driver when it's bound
The driver will be probed when usb_gadget_initialize() is called.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:43 +0000 (10:52 +0100)]
usb: udc: implement DM versions of usb_gadget_initialize()/_release()/_handle_interrupt()
When DM_USB_GADGET the platform code for the USB device must be replaced by
calls to a USB device driver.
usb_gadget_initialize() probes the USB device driver.
usb_gadget_release() removes the USB device driver.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:42 +0000 (10:52 +0100)]
usb: introduce a separate config option for DM USB device
Using CONFIG_DM_USB for this purpose prevents using DM_USB for host and not
for device.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Jean-Jacques Hiblot [Thu, 29 Nov 2018 09:52:41 +0000 (10:52 +0100)]
usb: gadget: Do not call board_usb_xxx() directly in USB gadget drivers
Add 2 functions to wrap the calls to board_usb_init() and
board_usb_cleanup().
This is a preparatory work for DM support for UDC drivers (DM_USB_GADGET).
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Takeshi Kihara [Tue, 4 Dec 2018 02:53:24 +0000 (11:53 +0900)]
ARM: rmobile: Fix to enable icache early in Gen3
This patch fixes the problem that u-boot will not start unless icache is
enabled early.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Takeshi Kihara [Tue, 4 Dec 2018 03:51:01 +0000 (12:51 +0900)]
ARM: rcar_gen3: fix protection area access error
This patch fixes the problem that "main memory domain AXI secure access
protection error" occurs. Exclude the area (0x43f00000 to 0x47DFFFFF)
set by DBSC from the map area.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Hiroyuki Yokoyama [Thu, 22 Nov 2018 02:50:44 +0000 (11:50 +0900)]
ARM: rcar_gen3: fix protection area access error at Cortex-A53
This patch fixes the problem that "main memory domain AXI secure
access protection error" occurs when booting Cortex-A53. Exclude
the area (0x43f00000 to 0x47DFFFFF) set by DBSC from the map area.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Felix Brack [Wed, 5 Dec 2018 13:53:42 +0000 (14:53 +0100)]
arm: dts: am33xx: Sync dts with Linux 4.20.0
This patch synchronizes the am33xx SoC specific files with those from
Linux 4.20.0. Hence all board maintainers of am33xx based boards are
on the cc list.
The main purpose of this patch is to prevent further diverging of the
dts files from U-Boot and those from Linux. It aims to set the stage
for the synchronization of board specific dts files. Example: I'm the
maintainer of the PDU001 board: once this patch is applied successfully
I will make changes to the board specific dts file in Linux only and
then post a patch with a copy of this exact dts file to U-Boot. This
will make U-Boot and Linux remain in sync.
The stumbling block of https://patchwork.ozlabs.org/patch/943627 was
removed by the patch https://patchwork.ozlabs.org/patch/962428 from
Lokesh Vutla (many thanks!). This omap-serial driver allows using the
Linux am33xx.dtsi file in U-Boot.
Other changes to dts and dtsi files made by this patch are mainly to
prevent _new_ warnings during the build process. Especially the warning
at pinmux@800 stating 'unnecessary #address-cells/#size-cells without
"ranges" or child "reg"' was not removed. This warning is a good example
showing the benefit of the synchronization: if it needs to be fixed it
will be fixed in Linux and ported back to U-Boot.
Buildman reports all 46 am33xx SoC based boards to build fine, with
warnings of course. Nevertheless this patch should be tested thoroughly
on as many boards as possible to prevent any collateral damage.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
Heiko Schocher [Wed, 5 Dec 2018 10:29:54 +0000 (11:29 +0100)]
spl/tpl: change banner into upper case
commit
d6330064634a ("spl: Add a define for SPL_TPL_PROMPT")
changes the SPL/TPL banner from upper case into lower
case. As SPL and TPL are three-letter acronyms and they
are written in upper case, change it back to upper case.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adam Ford [Mon, 3 Dec 2018 14:29:44 +0000 (08:29 -0600)]
ARM: DTS: da850-evm: Re-sync da850-evm.dts from Linux 4.20
There has been some natural evolution of the device tree, so
resync with 4.20
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 3 Dec 2018 14:29:43 +0000 (08:29 -0600)]
ARM: dts: da850-lcdk: Sync from Linux 4.20
Re-synce the device tree files from Linux 4.20
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 3 Dec 2018 14:29:42 +0000 (08:29 -0600)]
ARM: DTS: da850: Sync from Linux 4.20
Re-sync with 4.20 due some some natural evolution.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 3 Dec 2018 14:17:29 +0000 (08:17 -0600)]
ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit with Linux 4.20
Migrate some small device tree fixes from Linux 4.20.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 3 Dec 2018 14:15:59 +0000 (08:15 -0600)]
ARM: DTS: Resync LogicPD SOM-LV with Linux 4.20
There have been a few fixes to the device trees, so this
re-syncs the dts/dtsi files with Linux
Signed-off-by: Adam Ford <aford173@gmail.com>
Felix Brack [Mon, 3 Dec 2018 14:12:25 +0000 (15:12 +0100)]
serial: omap: Add code for early debugging
This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as
early debugging UART. The code is basically copied from the ns16550
driver.
Signed-off-by: Felix Brack <fb@ltec.ch>
Alexey Brodkin [Mon, 3 Dec 2018 14:09:13 +0000 (17:09 +0300)]
travis: Bump ARC tools to arc-2018.09
Build tested in Travis, see:
https://travis-ci.org/abrodkin/u-boot/jobs/
462808237
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Adam Ford [Mon, 3 Dec 2018 14:06:28 +0000 (08:06 -0600)]
ARM: DTS: Resync am3517-evm.dts with Linux 4.20
The DTS file for the AM3517 had the incorrect CD polarity. Resync with
the fixed DTS file from Linux.
Signed-off-by: Adam Ford <aford173@gmail.com>
Frank Wunderlich [Mon, 3 Dec 2018 10:23:41 +0000 (11:23 +0100)]
ensure active menuitem is inside menu
Hi,
setting active menuitem currently can be outside of menu which results in invisible selection
attached Patch fixes this
regards Frank
>From
1d9c4cb8b3e2dd9b0a7a6a2d4a21684d0a099dbf Mon Sep 17 00:00:00 2001
From: Frank Wunderlich <frank-w@public-files.de>
Date: Sun, 2 Dec 2018 11:23:53 +0100
Subject: [PATCH] ensure active menuitem is inside menu
if active menuitem is defined via environment var it can be outside the menu (>=menuitem-count)
this patch resets this definition back to 0
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Patrice Chotard [Mon, 3 Dec 2018 09:52:54 +0000 (10:52 +0100)]
pinctrl: stm32: Update stm32_pinctrl_get_gpio_dev()
Due to gpio holes management, stm32_pinctrl_get_gpio_dev() must
be updated.
stm32_pinctrl_get_gpio_dev() returns from a given pin selectors
the corresponding bank gpio device and the gpio_offset inside this
gpio bank.
Update also all functions which makes usage of stm32_pinctrl_get_gpio_dev.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Mon, 3 Dec 2018 09:52:53 +0000 (10:52 +0100)]
gpio: stm32f7: Remove CONFIG_CLK flag.
As all STM32 SoCs supports CONFIG_CLK flag,
it becomes useless in this driver, remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Mon, 3 Dec 2018 09:52:52 +0000 (10:52 +0100)]
gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h
To allow access to this define by other driver, move
it into gpio.h
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Mon, 3 Dec 2018 09:52:51 +0000 (10:52 +0100)]
gpio: stm32f7: Add gpio bank holes management
In some STM32 SoC packages, GPIO bank has not always 16 gpios.
Several cases can occur, gpio hole can be located at the beginning,
middle or end of the gpio bank or a combination of these 3
configurations.
For that, gpio bindings offer the gpio-ranges DT property which
described the gpio bank mapping.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Mon, 3 Dec 2018 09:52:50 +0000 (10:52 +0100)]
pinctrl: stm32: Move gpio_dev list filling outside probe()
Move gpio_dev list filling outside probe() to speed-up U-boot
boot sequence execution. This list is populated only when needed.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Álvaro Fernández Rojas [Sat, 1 Dec 2018 17:42:09 +0000 (18:42 +0100)]
serial: bcm6858: remove driver and switch to bcm6345
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sat, 1 Dec 2018 17:42:08 +0000 (18:42 +0100)]
arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sat, 1 Dec 2018 17:42:07 +0000 (18:42 +0100)]
serial: bcm6345: switch to raw I/O functions
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Felix Brack [Fri, 30 Nov 2018 09:23:36 +0000 (10:23 +0100)]
arm: am335x-pdu001: Enable CONFIG_BLK and CONFIG_DM_MMC
This patch enables CONFIG_BLK as well as CONFIG_DM_MMC for the PDU001
board. It depends on Patrice Chotard's patch 'power: regulator: denied
disable on always-on regulator' which prevents power cycling the vmmc
supply. Without this patch the board will not boot as vmmc is
unfortunately used by other board components, not just eMMC and micro SD
card. Furthermore my patch 'dts: am335x-pdu001: Fix polarity of card
detection input' is required to boot from external micro SD card. Without
this patch no SD card will be detected and hence booting will fail.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
Felix Brack [Thu, 29 Nov 2018 12:45:06 +0000 (13:45 +0100)]
dts: am335x-pdu001: Fix polarity of card detection input
When a micro SD card is inserted in the PDU001 card cage, the card
detection switch is opened and the corresponding GPIO input is driven
by a pull-up. Hence change the active level of the card detection
input from low to high.
Signed-off-by: Felix Brack <fb@ltec.ch>
Grygorii Strashko [Wed, 28 Nov 2018 18:17:51 +0000 (19:17 +0100)]
test: dma: add dma-uclass test
Add a sandbox DMA driver implementation (provider) and corresponding DM
test.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Wed, 28 Nov 2018 18:17:50 +0000 (19:17 +0100)]
dma: add channels support
This adds channels support for dma controllers that have multiple channels
which can transfer data to/from different devices (enet, usb...).
DMA channle API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[grygorii.strashko@ti.com: drop unused dma_get_by_index_platdata(),
add metadata to send/receive ops, add dma_prepare_rcv_buf(),
minor clean up]
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Wed, 28 Nov 2018 18:17:49 +0000 (19:17 +0100)]
dma: move dma_ops to dma-uclass.h
Move dma_ops to a separate header file, following other uclass
implementations. While doing so, this patch also improves dma_ops
documentation.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Andrew F. Davis [Wed, 28 Nov 2018 16:56:06 +0000 (10:56 -0600)]
configs: am335x_hs_evm_uart: Add YMODEM SPL support for UART boot
UART booting requires YMODEM support. Add this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Eugen.Hristev@microchip.com [Wed, 28 Nov 2018 09:33:43 +0000 (09:33 +0000)]
ARM: at91: lds: add test for SPL binary size and bss size
Add test for the SPL binary size and the bss section size.
This will throw an error at build time if the SPL sections
do not fit in the designated RAM area, thus avoiding oversizing the SPL.
Based on original work by Wenyou Yang.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Carlo Caione [Thu, 6 Dec 2018 08:08:11 +0000 (08:08 +0000)]
pinctrl: meson: axg: Fix GPIO pin offsets
The pin number (first and last) in the bank definition is missing the
pin base offset shifting. This is causing a miscalculation when
retrieving the register and pin offsets in the GPIO driver causing the
'gpio' command to drive the wrong pins / GPIOs in the second GPIO chip
(the AO bank is driven correctly because the shifting is already 0).
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:53 +0000 (13:49 +0100)]
pinctrl: stm32: make pinctrl use hwspinlock
Protect configuration registers with a hardware spinlock.
If a hwspinlock is defined in the device-tree node used it
to be sure that none of the others processors on the SoC could
change the configuration at the same time.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:52 +0000 (13:49 +0100)]
hwspinlock: add stm32 hardware spinlock support
Implement hardware spinlock support for STM32MP1.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:51 +0000 (13:49 +0100)]
clk: stm32: add hardware spinlock clock
Add hardware spinlock in the list of the clocks.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Benjamin Gaignard [Tue, 27 Nov 2018 12:49:50 +0000 (13:49 +0100)]
dm: Add Hardware Spinlock class
This is uclass for Hardware Spinlocks.
It implements two mandatory operations: lock and unlock
and one optional relax operation.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Keerthy [Tue, 27 Nov 2018 12:22:41 +0000 (17:52 +0530)]
board: ti: ks2_evm: Over ride spl_get_load_buffer function
Currently k2 spi boot is broken as the image header
is getting copied to an invalid memory location
CONFIG_SYS_TEXT_BASE - sizeof (struct image_size)
which maps to 0xc000000 - 0x40 = 0xbffffc0 being a reserved
location.
We cannot change the CONFIG_SYS_TEXT_BASE address as the single
stage boots like UART boot will need the address to be 0xc000000
hence override the spl_get_load_buffer to have image_header
address as CONFIG_SYS_TEXT_BASE aka 0xc000000
Signed-off-by: Keerthy <j-keerthy@ti.com>
Philipp Tomsich [Mon, 26 Nov 2018 19:20:19 +0000 (20:20 +0100)]
clk: Allow clock defaults to be set during re-reloc state for SPL only
In commit
e5e06b65ad65 ("clk: Allow clock defaults to be set also
during re-reloc state") the earlier guard against setting clock
defaults in pre-reloc state was removed. While it is easy to filter
'assigned-clocks' properties for SPL using CONFIG_OF_SPL_REMOVE_PROPS,
no such mechanism exists for the pre-reloc stage of the full U-Boot.
With the default defconfig for the RK3399-Q7 (which filter the
'assigned-clocks' property for the DTS used by SPL anyway), this
caused a pause during startup of the full U-Boot stage that lasted for
almost 10s (due to the CPU not having been clocked up yet).
This reintroduces the guard from commit
f4fcba5c5baa ("clk: Allow
clock defaults to be set also during re-reloc state") and extends it
to only apply outside of a TPL/SPL build: i.e. clk_set_defaults will
now run in pre-reloc state for SPL, but only after reloc for the full
U-Boot.
References: commit
f4fcba5c5baa ("clk: implement clk_set_defaults()")
References: commit
e5e06b65ad65 ("clk: Allow clock defaults to be set
also during re-reloc state")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Patrick Wildt [Mon, 26 Nov 2018 14:58:13 +0000 (15:58 +0100)]
fs: fix FAT name extraction
The long name apparently can be accumulated using multiple
13-byte slots. Unfortunately we never checked how many we
can actually fit in the buffer we are reading to.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Patrick Wildt [Mon, 26 Nov 2018 14:56:57 +0000 (15:56 +0100)]
fs: check FAT cluster size
The cluster size specifies how many sectors make up a cluster. A
cluster size of zero makes no sense, as it would mean that the
cluster is made up of no sectors. This will later lead into a
division by zero in sect_to_clust(), so better take care of that
early.
The MAX_CLUSTSIZE define can reduced using a define to make some
room in low-memory system. Unfortunately if the code reads a
filesystem with a bigger cluster size it will overflow the buffer.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Patrice Chotard [Mon, 26 Nov 2018 12:42:32 +0000 (13:42 +0100)]
configs: stm32f746-disco: Fix stm32f746-disco boot
Since commit
8f651ca60ba1 ("pinctrl: stm32: Add get_pins_count() ops")
stm32f746-disco can't boot.
This is due to new memory allocation into STM32 pinctrl driver,
increase SYS_MALLOC_F_LEN from 0xC00 to 0xE00.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Simon Glass [Mon, 26 Nov 2018 03:05:54 +0000 (20:05 -0700)]
main: Drop more #ifdefs
Now that many things are converted to Kconfig we can drop most of the
Signed-off-by: Simon Glass <sjg@chromium.org>
Priyanka Jain [Mon, 29 Oct 2018 09:17:09 +0000 (09:17 +0000)]
armv8: lx2160a: Add LX2160A SoC Support
LX2160A Soc is based on Layerscape Chassis Generation 3.2
architecture with features:
16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC,
2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers,
3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs,
4 TZASC instances, etc.
SoC personalites:
LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs
LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs
Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Mon, 29 Oct 2018 09:11:29 +0000 (09:11 +0000)]
armv8:fsl-layerscape: Add support for Chassis 3.2
NXP layerscape architecture Chassis 3.2 builds upon chassis3
architecture with changes like DDR Memory map change,
removal of IFC and support of upto 8 I2C controller.
Patch add README.lsch3_2 and the above changes under
macro CONFIG_NXP_LSCH3_2.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Thu, 11 Oct 2018 05:22:34 +0000 (05:22 +0000)]
board/freescale/vid: Add vdd table for NXP LX2160A SoC
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Thu, 27 Sep 2018 05:02:05 +0000 (10:32 +0530)]
armv8: lsch3: Add support of serdes3 module
Some lsch3 based SoCs like lx2160a contains three
serdes modules.
Add support for third serdes protocol in lsch3
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Thu, 11 Oct 2018 05:11:23 +0000 (05:11 +0000)]
board/freescale/vid: Add correction for ltc3882 read error.
Voltage regulator LTC3882 device has 0.5% voltage read error.
So for NXP SoC devices this generally equates to 2mV
Update set_voltage_to_LTC for below:
1.Add coorection of upto 2mV in voltage comparison
to take care of voltage read error of voltage regulator
2.Add loop max count kept as 100 to avoid infinte loop.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Fri, 12 Oct 2018 09:15:59 +0000 (14:45 +0530)]
ls1088a: Move CONFIG_FSL_QSPI to defconfig
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Pramod Kumar [Fri, 12 Oct 2018 14:04:27 +0000 (14:04 +0000)]
armv8: ls1088ardb_pb: Add support for board detection
ls1088ardb-pb and ls1088ardb both boards are ls1088a based soc,
board type detection is dynamic at boot time
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alison Wang [Tue, 16 Oct 2018 08:19:22 +0000 (16:19 +0800)]
arm: ls1021a: Add timer_init() in board_init_f for SPL
I2C is used to access DDR SPD in the DDR initialization for SPL. In
i2c_write process, get_timer() will be called. In board_init_f for SPL,
timer_init() is not called before. The system counter is not enabled and
the counter frequency is not set to 12.5MHz in SPL. The parameters for
do_div() are zero too.
It could not be found until CONFIG_USE_PRIVATE_LIBGCC is enabled in
default. When CONFIG_USE_PRIVATE_LIBGCC is enabled, U-Boot will use its
own set of libgcc functions. As the parameters for do_div() are zero,
__div0 will be called. Then the processor will stay in an endless loop
after calling hang().
This patch will add timer_init() in board_init_f for SPL and fix a
series of issues it caused.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Peng Ma [Mon, 22 Oct 2018 02:43:22 +0000 (10:43 +0800)]
arm64: ls2080a: enable DM support for sata
Enable related configs to support sata DM feature.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[YS: moveconfig -s -d]
Reviewed-by: York Sun <york.sun@nxp.com>
Peng Ma [Mon, 22 Oct 2018 02:43:21 +0000 (10:43 +0800)]
armv8: dts: fsl-ls2080a: add sata node support
One ls2080a, there is one SATA 3.0 advanced host controller interface
which is a high-performance SATA solution that delivers comprehensive
and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA
capabilities, in accordance with the serial ATA revision 3.0 of Serial
ATA International Organization.
Add sata node to support this feature.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Peng Ma [Mon, 22 Oct 2018 02:43:20 +0000 (10:43 +0800)]
scsi: ceva: add ls2080a soc support
Add ahci compatible support for ls2080a soc.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
[YS: add fallthrough comment]
Reviewed-by: York Sun <york.sun@nxp.com>
Peng Ma [Mon, 22 Oct 2018 02:39:51 +0000 (10:39 +0800)]
arm64: ls1088a: enable DM support for sata
Enable related configs to support sata DM feature.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[YS: moveconfig.py -s -d]
Reviewed-by: York Sun <york.sun@nxp.com>
Peng Ma [Mon, 22 Oct 2018 02:39:50 +0000 (10:39 +0800)]
armv8: dts: fsl-ls1088a: add sata node support
One ls1088a, there is one SATA 3.0 advanced host controller interface
which is a high-performance SATA solution that delivers comprehensive
and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA
capabilities, in accordance with the serial ATA revision 3.0 of Serial
ATA International Organization.
Add sata node to support this feature.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Peng Ma [Mon, 22 Oct 2018 02:39:49 +0000 (10:39 +0800)]
scsi: ceva: add ls1088a soc support
Add ahci compatible support for ls1088a soc.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Peng Ma [Thu, 11 Oct 2018 10:34:22 +0000 (10:34 +0000)]
arm64: ls1046aqds: enable DM support for sata
Enable related configs to support sata DM feature.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
[YS: moveconfig.py -s -d]
Reviewed-by: York Sun <york.sun@nxp.com>
Peng Ma [Thu, 11 Oct 2018 10:34:21 +0000 (10:34 +0000)]
arm64: ls1046ardb: enable DM support for sata
Enable related configs to support sata DM feature.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
[YS: moveconfig.py -s -d]
Reviewed-by: York Sun <york.sun@nxp.com>
Peng Ma [Thu, 11 Oct 2018 10:34:20 +0000 (10:34 +0000)]
armv8: dts: fsl-ls1046a: add sata node support
One ls1046a, there is one SATA 3.0 advanced host controller interface
which is a high-performance SATA solution that delivers comprehensive
and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA
capabilities, in accordance with the serial ATA revision 3.0 of Serial
ATA International Organization.
Add sata node to support this feature.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Peng Ma [Thu, 11 Oct 2018 10:34:19 +0000 (10:34 +0000)]
scsi: ceva: add ls1046a soc support
Add ahci compatible support for ls1046a soc.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:03:08 +0000 (18:03 +0000)]
armv8: ls1012afrx: Add TFABOOT support
TFABOOT support includes:
- ls1012a2g5rdb/ls1012afrdm/ls1012afrwy_tfa_defconfig to be
loaded by trusted firmware
- define BOOTCOMMAND for TFABOOT
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: remove unnecessary braces]
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:03:04 +0000 (18:03 +0000)]
armv8: ls1012aqds: Add TFABOOT support
TFABOOT support includes:
- ls1012aqds_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:59 +0000 (18:02 +0000)]
armv8: ls1012aqds: fix secure boot compilation
Includes environment.h file in ls1012aqds.c Also, enables
pfe validation
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:53 +0000 (18:02 +0000)]
armv8: ls1012ardb: Add TFABOOT support
TFABOOT support includes:
- ls1012ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
- enable PFE validation for secure boot
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:48 +0000 (18:02 +0000)]
armv8: ls1043aqds: Add TFABOOT support
TFABOOT support includes:
- ls1043aqds_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:44 +0000 (18:02 +0000)]
armv8: ls1043ardb: Add TFABOOT support
TFABOOT support includes:
- ls1043ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- FMAN and QE address changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:40 +0000 (18:02 +0000)]
armv8: ls1046aqds: Add TFABOOT support
TFABOOT support includes:
- ls1046aqds_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- FMAN address changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:36 +0000 (18:02 +0000)]
armv8: ls1046ardb: Add TFABOOT support
TFABOOT support includes:
- ls1046ardb_tfa_defconfig to be loaded by trusted firmware
- environment address and size changes for TFABOOT
- FMAN address changes for TFABOOT
- define BOOTCOMMAND for TFABOOT
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Pankit Garg [Mon, 5 Nov 2018 18:02:31 +0000 (18:02 +0000)]
armv8: fsl-layerscape: add support of MC framework for TFA
Add support of MC framework for TFA
Make MC framework independent of boot source.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:28 +0000 (18:02 +0000)]
drivers: qe: add TFABOOT support
Adds TFABOOT support and allows to pick QE firmware
on basis of boot source.
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: remove line continuation in quoted string]
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:23 +0000 (18:02 +0000)]
net: fm: add TFABOOT support
Adds TFABOOT support and allows to pick FMAN firmware
on basis of boot source.
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
Pankit Garg [Mon, 5 Nov 2018 18:02:19 +0000 (18:02 +0000)]
armv8: sec_firmware: return job ring status as true in TFABOOT
Returns job ring status as true in TFABOOT, as one job ring is always
reserved.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:13 +0000 (18:02 +0000)]
armv8: sec_firmware: change el2_to_aarch32 SMC ID
Changes the el2_to_aarch32 SMC ID from 0xc000ff04 to 0xc200ff17,
it is applicable to both TFA and non-TFA boot.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>