Jay Foad [Mon, 23 Jan 2023 15:00:43 +0000 (15:00 +0000)]
[cmake] Remove AddLLVMDefinitions
This has been unused since D31125.
Differential Revision: https://reviews.llvm.org/D142362
Matthias Springer [Tue, 24 Jan 2023 08:10:32 +0000 (09:10 +0100)]
[mlir][linalg] Convert tensor.generate to destination style
This can be a pre-processing for bufferization and allows for more efficient lowerings without an alloc.
Differential Revision: https://reviews.llvm.org/D142205
eopXD [Sat, 14 Jan 2023 11:58:35 +0000 (03:58 -0800)]
[5/15][Clang][RISCV][NFC] Remove extra attribute Policy::IntrinsicWithoutMU by reusing HasTailPolicy and HasMaskPolicy
Righteously there shouldn't be any special cases here because
`HasTailPolicy` and `HasMaskPolicy` is able to express necessary cases.
This commit is a part of the step-by-step effort to remove
`Policy::Scheme::Omit`, which completely does not make sense in RVV 1.0
because an RVV instruction always executes with `vta` and `vma` set
to a certain value.
This is the 5th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (D141573) for an
overview.
Reviewed By: craig.topper, kito-cheng
Differential Revision: https://reviews.llvm.org/D141754
eopXD [Sat, 7 Jan 2023 09:04:26 +0000 (01:04 -0800)]
[4/15][Clang][RISCV][NFC] Remove unnecessary logic under RVVIntrinsic::computeBuiltinTypes
`PolicyAttrs::IsUnspecified` is modified in
`RVV::Intrinsic::computeBuiltInTypes` and used under
`RVVIntrinsic::updateNamesAndPolicy`. Suprisingly the modification
in `RVV::Intrinsic::computeBuiltInTypes` is completely unnecessary.
This commit removes the redundant logic.
This is the 4th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (D141573) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D141577
eopXD [Sat, 7 Jan 2023 08:17:08 +0000 (00:17 -0800)]
[3/15][Clang][RISCV][NFC] Clarify edge cases of RVVIntrinsic::getSupportedMaskedPolicies for clarity
This is the 3rd commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (D141573) for an
overview.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/D141575
eopXD [Sat, 7 Jan 2023 08:05:41 +0000 (00:05 -0800)]
[2/15][Clang][RISCV][NFC] Rename Policy::IsPolicyNone to IsUnspecifed
The original naming is inaccurate. An RVV intrinsic always comes with
a corresponding policy behavior. When the policy is unspecified for an
intrinsic, its policy behavior should be it's default assumption.
This is the 2nd commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (D141573) for an
overview.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/D141574
eopXD [Thu, 5 Jan 2023 11:37:37 +0000 (03:37 -0800)]
[1/15][Clang][RISCV][NFC] Extract common utility to RISCVVIntrinsicUtils
This is the 1st commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
The patch-set work towards the simplification proposal [0] of Nick
Knight. After this patch-set, all intrinsics operates under a general
assumption that the policy behavior is agnostic.
You may find that most of the patches are NFC patches. They subtly remove
implicit assumptions that entangles the codebase, making the singular patch
that contains functional change clear and obvious.
In [2/15], The attribute `Policy::IsPolicyNone` may give the mis-perception
that an RVV intrinsic may operate without any policy. However this is not the
case because the policy CSR-s (`vta` and `vma`) always affect an RVV
instruction's behavior, except that some instructions have policy always set
as agnostic (e.g. instructions with a mask destination register is always
tail agnostic).
Next, to perform the change from TAMU to TAMA, we need to first remove
`Policy::PolicyType::Omit`. [4/15] ~ [12/15] removes it with NFC patches step
by step. Without the patches, directly applying [14/15] to the existing codebase
will not work because there will be complicated logics that are scattered in
places that is hard to maintain.
[1/15], [3/15] are not related to the main goal of this patch-set, they were
clean-up along the way as I was going through the codebase. [13/15] is a
clean-up that was an oversight in D141198.
Finally, [14/15] performs the functional change this patch-set aims for. The
default policy is changed from TAMU to TAMA. This affects the masked version of
the intrinsics without a policy suffix. The masked-off operand is removed. Due
to the removal, masked version of `vid` and `viota` intrinsics are no longer
available for overloading.
[15/15] is a final commit to set data members of `Policy` as constants. Through
the refactoring the class `Policy` is now correct-by-construction.
The next patch-set will be to remove redundant intrinsics with a policy suffix
`_ta` and `_tama` intrinsics are redundant and will be removed. Other policy
suffix will be renamed to adapt to the general assumption that policy is
generally agnostic.
[0] https://gist.github.com/nick-knight/
6cb0b74b351a25323dfb1821d3a269b9
Pull Request: riscv-non-isa/rvv-intrinsic-doc#186
Reviewed By: craig.topper, kito-cheng
Differential Revision: https://reviews.llvm.org/D141573
eopXD [Wed, 4 Jan 2023 07:10:25 +0000 (23:10 -0800)]
[7/7][Clang][RISCV][NFC] Remove attribute `IsPrototypeDefaultTU`
This is the 7th commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
This is the final commit of the patch-set. Now that no intrinsics is
using the attribute, we are safe to remove it.
Please refer to the cover letter in the 1st commit (D140895) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140954
eopXD [Tue, 3 Jan 2023 05:43:56 +0000 (21:43 -0800)]
[6/7][Clang][RISCV] Remove default tail-undisturbed for vmv_s_x and vfmv_s_f intrinsics
The destination parameter is removed for non-policy unmasked intrinsics.
The default policy for non-policy (implicit) vmv_s_x and vfmv_s_f
intrinsics will be tail agnostic and mask undisturbed.
Upon change of prototype, vmv_s_x and vfmv_s_f is no longer able to
have an overloading version for its non-policy and tail agnostic
intrinsics.
This is the 6th commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
Please refer to the cover letter in the 1st commit (D140895) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140947
eopXD [Tue, 3 Jan 2023 05:35:07 +0000 (21:35 -0800)]
[5/7][Clang][RISCV] Remove default tail-undisturbed for vcompress intrinsics
The destination parameter is removed for non-policy unmasked intrinsics.
The default policy for non-policy (implicit) vcompress intrinsics will
be tail agnostic and mask undisturbed.
This is the 5th commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
Please refer to the cover letter in the 1st commit (D140895) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140942
eopXD [Tue, 3 Jan 2023 05:19:12 +0000 (21:19 -0800)]
[4/7][Clang][RISCV] Remove default tail-undisturbed for multiply-add intrinsics
The destination parameter is still needed as the computation requires
so.
The default policy for non-policy (implicit) vslideup intrinsics
will be tail agnostic and mask undisturbed.
This is the 4th commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
Please refer to the cover letter in the 1st commit (D140895) for an overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140941
eopXD [Tue, 3 Jan 2023 10:37:10 +0000 (02:37 -0800)]
[3/7][Clang][RISCV] Remove default tail-undisturbed for vslidedown intrinsics
The destination parameter is removed for non-policy unmasked vslidedown
intrinsics.
The default policy for non-policy (implicit) vslidedown intrinsics will
be tail agnostic and mask undisturbed.
This is the 3rd commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
Please refer to the cover letter in the 1st commit (D140895) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140937
eopXD [Tue, 3 Jan 2023 04:06:42 +0000 (20:06 -0800)]
[2/7][Clang][RISCV] Remove default tail-undisturbed for vslideup intrinsics
The destination parameter is still needed as elements of
0 < i < max(vstart, OFFSET) in vd remains unchanged.
The default policy for non-policy (implicit) vslideup intrinsics
will be tail agnostic and mask undisturbed.
This is the 2nd commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
Please refer to the cover letter in the 1st commit (D140895) for an overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140936
eopXD [Tue, 3 Jan 2023 03:49:29 +0000 (19:49 -0800)]
[1/7][Clang][RISCV] Remove default tail-undisturbed for vector reduction intrinsics
The destination parameter is removed for non-policy unmasked intrinsics,
they are now tail agnostic. The non-policy masked intrinsics are tail
agnostic and masked undisturbed, just like normal instructions like
vadd.
This is the 1st commit of a patch-set that aims to remove the
`IsPrototypeDefaultTU` special case for the rvv-intrinsics.
The patch-set work towards the simplification proposal [0] of Nick
Knight, the plan is that after this patch-set, all non-policy
intrinsics will be aligned with default policy behavior of tail
agnostic and mask undisturbed. Then the next patch-set will aim
towards changing non-policy intrinsics to tail agnostic and mask
agnostic.
[0] https://gist.github.com/nick-knight/
6cb0b74b351a25323dfb1821d3a269b9
Pull Request: riscv-non-isa/rvv-intrinsic-doc#186
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140895
Kazu Hirata [Tue, 24 Jan 2023 07:07:41 +0000 (23:07 -0800)]
[llvm] Use llvm::countr_zero instead of findFirstSet (NFC)
At each call to findFirstSet in this patch, the argument is known to
be nonzero, so we can safely switch to llvm::countr_zero, which will
become std::countr_zero once C++20 is available.
Kazu Hirata [Tue, 24 Jan 2023 06:48:42 +0000 (22:48 -0800)]
[SystemZ] Use isShiftedMask_64 instead of isStringOfOnes (NFC)
isStringOfOnes does the same thing as isShiftedMask_64, provided that
the parameter is nonzero, which is the case for both calls in this
patch.
Johannes Doerfert [Tue, 24 Jan 2023 03:53:12 +0000 (19:53 -0800)]
[Attributor] Allow (inter-procedural) "CFG" reasoning for aligned regions
If an instruction is executed in an aligned region we can ignore
threading effects and use CFG reasoning (dominance and reachability).
This is true because all threads are together in an aligned region and
there cannot be one waiting for a signal at a place not connected via
the control flow.
More dedicated tests will follow.
More details can be found here:
"Co-Designing an OpenMP GPU Runtime and Optimizations for Near-Zero
Overhead Execution", IPDPS 2022,
https://www.osti.gov/servlets/purl/1890094
Johannes Doerfert [Tue, 24 Jan 2023 03:46:38 +0000 (19:46 -0800)]
[OpenMP] Readnone calls do not have non-local side-effects
Johannes Doerfert [Tue, 24 Jan 2023 03:45:06 +0000 (19:45 -0800)]
[OpenMP] Run the Attributor as part of the device runtime optimization
This will help us propagate assumptions to call sites, among other
things.
Shivam Gupta [Tue, 24 Jan 2023 06:25:54 +0000 (11:55 +0530)]
[Clang][NFC] Remove a redundancy check in Sema::adjustMemberFunctionCC
If the current calling convection CurCC is not equal to Target calling
convection ToCC and current calling convention (CurCC) is equal to the
default calling convention (DefaultCC), that means DefaultCC can not be
equal to ToCC so the right part of the expression DefaultCC == ToCC is
not needed.
revelant code -
if (CurCC == ToCC)
return;
if (CurCC != DefaultCC || DefaultCC == ToCC)
return;
Found by PVS-Studio - https://pvs-studio.com/en/blog/posts/cpp/1003/, N41.
Differential Revision: https://reviews.llvm.org/D142338
Nicole Rabjohn [Tue, 24 Jan 2023 05:00:27 +0000 (00:00 -0500)]
Opting out of Clang 16 ABI Changes for AIX and z/OS
There is already a GCC compatibility gap on AIX, & GCC compatibility is
not a concern on z/OS. GCC compatibility is not sufficient motivation
for breaking ABI on AIX and z/OS. This opts out of changes introduced in
https://reviews.llvm.org/D119051. For AIX only, also opt out of D117616
(which z/OS had picked up at the time ABI stabilization occurred).
Differential Revision: https://reviews.llvm.org/D142358
Mariusz Sikora [Mon, 23 Jan 2023 06:13:02 +0000 (07:13 +0100)]
[AMDGPU][NFC] Apply new naming convention for feature fmacf64
Differential Revision: https://reviews.llvm.org/D142329
Max Kazantsev [Tue, 24 Jan 2023 05:46:48 +0000 (12:46 +0700)]
[IndVars] Improve handling of multi-exit loops with known symbolic counts
This patch does two things, both related to support of multi-exit loops with
many exits that have known symbolic max exit count. They can theoretically
go independently, but I don't know how to write a test showing separate
impact.
Part 1: `SkipLastIter` can be set to `true` not when a particular exit has exit
count same as the whole loop (and therefore it must exit on the last iteration),
but when the aggregate of first few exits has umin same as whole loop exit count.
It means that it's not known which of them will exit exactly, but one of them will.
Part 2: when `SkipLastIter` is set, and exit count is `umin(a, b, c)`, instead of
`umin(a, b, c) - 1` use `umin(a - 1, b - 1, c - 1)`. We don't care about overflows
here, but the further logic knows how to deal with umin by element, but the
`SCEVAddExpr` node will confuse it.
Differential Revision: https://reviews.llvm.org/D141361
Reviewed By: nikic
Max Kazantsev [Tue, 24 Jan 2023 05:17:33 +0000 (12:17 +0700)]
[IndVars] Apply more optimistic SkipLastIter for AND/OR conditions
When exit by condition `C1` dominates exit by condition `C2`, and
max symbolic exit count for `C1` matches those for loop, we will
apply more optimistic logic to `C2` by setting `SkipLastIter` for it,
meaning that it will do 1 iteration less because the dominating branch
must exit on the last loop iteration.
But when we have a single exit by condition `C1 & C2`, we cannot
apply the same logic, because there is no dominating condition.
However, if we can prove that the symbolic max exit count of `C1 & C2`
matches those of `C1`, it means that for `C2` we can assume that it
doesn't matter on the last iteration (because the whole thing is `false`
because `C1` must be `false`). Therefore, in this situation, we can handle
`C2` as if it had `SkipLastIter`.
Differential Revision: https://reviews.llvm.org/D139934
Reviewed By: nikic
Andrew Young [Tue, 24 Jan 2023 04:08:35 +0000 (20:08 -0800)]
[MLIR] Add LocationAttr declarations to ODS
This commit adds location attributes and arrays of locations to OpBase.td.
Using LocationAttrs directly in an operation is useful when the location does
not correspond 1-1 to an operation or value in the IR. We use this in CIRCT to
store the declaration location of result ports of HWModule operations.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D142148
Johannes Doerfert [Tue, 24 Jan 2023 03:41:02 +0000 (19:41 -0800)]
[Attributor] Check assumptions to improve `isAlignedBarrier` queries
Johannes Doerfert [Tue, 24 Jan 2023 03:40:17 +0000 (19:40 -0800)]
[Attributor] Allow to delete (assume) intrinsics outside the SCC
Johannes Doerfert [Tue, 24 Jan 2023 03:58:20 +0000 (19:58 -0800)]
[Attributor][FIX] Ensure not to run new queries during manifest
If we modified the IR during manifest, e.g., SPMDzation, we might end up
with un-cached reachability queries. This is not good as the result is
going to be optimistic. We now cache the updateImpl result and use it
during manifest.
Bug was exposed in a follow up extension.
Johannes Doerfert [Tue, 24 Jan 2023 03:38:46 +0000 (19:38 -0800)]
[Attributor][FIX] Reachability needs to process the entire worklist
Johannes Doerfert [Tue, 24 Jan 2023 04:09:09 +0000 (20:09 -0800)]
[Attributor][FIX] Replace typo with something more sane
Xiang Li [Sat, 21 Jan 2023 06:50:40 +0000 (01:50 -0500)]
[mlir] support !shape.value_shape when replace WithOp in OutlineShapeComputationPass.
Fixes #60069 https://github.com/llvm/llvm-project/issues/60069
In case like:
%1 = shape.with_shape %arg1, %0 : !shape.value_shape, !shape.shape
%2 = shape.value_of %1 : tensor<?xf32>
cannot replace %2 with %arg1.
Transform it into
%2 = shape.value_of %arg1 : tensor<?xf32>
Differential Revision: https://reviews.llvm.org/D142275
Haowei Wu [Tue, 24 Jan 2023 02:43:23 +0000 (18:43 -0800)]
Revert "[Fuchsia] Build windows runtimes using cross compilation on Linux"
This reverts commit
20bb7658f53b0b8db165ff4d404ede3f9b34862d.
It breaks Fuchsia stage2 builders.
Alexey Bader [Tue, 24 Jan 2023 01:19:26 +0000 (17:19 -0800)]
[bugpoint] Fix compilation of bugpoint-passes on Windows
Bugpoint also depends on libLLVMSupport.dll for 'llvm_unreachable'
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D140609
Vitaly Buka [Tue, 24 Jan 2023 01:05:59 +0000 (17:05 -0800)]
Revert "[profile] Disable test which needs update after D141512"
Work around with -fno-slp-vectorize.
This reverts commit
31260a4ce43aab7c04f501095a9032de063ccaf9.
Louis Dionne [Mon, 23 Jan 2023 15:19:27 +0000 (10:19 -0500)]
[libc++] Fix installation path for the modulemap
As pointed out in a post-commit comment of https://reviews.llvm.org/rGd00e035a4270.
Differential Revision: https://reviews.llvm.org/D142365
Siva Chandra Reddy [Mon, 23 Jan 2023 18:18:08 +0000 (18:18 +0000)]
[libc][NFC] Another round of replacement of static inline with LIBC_INLINE.
Reviewed By: lntue
Differential Revision: https://reviews.llvm.org/D142398
Kirill Stoimenov [Mon, 23 Jan 2023 17:55:53 +0000 (17:55 +0000)]
[HWASAN] Fix PointsIntoChunk to untag pointers. Also added some checks where we know that the pointer should be untagged.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D142389
Francesco Petrogalli [Tue, 24 Jan 2023 00:25:26 +0000 (01:25 +0100)]
Re-apply [build] Fix stand-alone builds of clang.
This reverts commit
0e09bb8b143c80426c497a924ee4fa57a26af6b5.
Differential Revision: https://reviews.llvm.org/D142403
Francesco Petrogalli [Tue, 24 Jan 2023 00:23:41 +0000 (01:23 +0100)]
Revert "[build] Fix stand-alone builds of clang."
There is a typo in the cmake configuration. It should be
RISCVTargetParserTableGen, not RISCVTargetParserTablegen.
This reverts commit
5d02e38f56dfa6c46dd71658c185582af1ffb07b.
Nadeem, Usman [Mon, 23 Jan 2023 19:13:58 +0000 (11:13 -0800)]
[WoA] Use fences for sequentially consistent stores/writes
LLVM currently uses LDAR/STLR and variants for acquire/release
as well as seq_cst operations. This is fine as long as all code uses
this convention.
Normally LDAR/STLR act as one way barriers but when used in
combination they provide a sequentially consistent model. i.e.
when an LDAR appears after an STLR in program order the STLR
acts as a two way fence and the store will be observed before
the load.
The problem is that normal loads (unlike ldar), when they appear
after the STLR can be observed before STLR (if my understanding
is correct). Possibly providing weaker than expected guarantees if
they are used for ordered atomic operations.
Unfortunately in Microsoft Visual Studio STL seq_cst ld/st are
implemented using normal load/stores and explicit fences:
dmb ish + str + dmb ish
ldr + dmb ish
This patch uses fences for MSVC target whenever we write to the
memory in a sequentially consistent way so that we don't rely on
the assumptions that just using LDAR/STLR will give us sequentially
consistent ordering.
Differential Revision: https://reviews.llvm.org/D141748
Change-Id: I48f3500ff8ec89677c9f089ce58181bd139bc68a
Nadeem, Usman [Sat, 14 Jan 2023 04:16:39 +0000 (20:16 -0800)]
[NFC][WoA] Precommit test for aarch64 atomics
This copies the atomic-ops file.
Committed without review.
Differential Revision: https://reviews.llvm.org/D141964
Change-Id: I7d7b05339d9ca23f88848c56f73a3e4d3e1abeba
Kirill Stoimenov [Mon, 23 Jan 2023 23:59:56 +0000 (23:59 +0000)]
[Sanitizer] Make GetBlockBeginFastLocked parameters const.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D142402
Kirill Stoimenov [Mon, 23 Jan 2023 23:56:41 +0000 (23:56 +0000)]
[HWASAN] Fix memory leaks in tests.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D142383
Joseph Huber [Mon, 23 Jan 2023 23:56:22 +0000 (17:56 -0600)]
[Clang][NFC] Fix documentation and remove unused tool
Summary:
I removed some documentation but not its Sphinx index, this fixes that.
Also I realized that we had a tool in the header still around so that's
gone too.
Francesco Petrogalli [Mon, 23 Jan 2023 23:56:37 +0000 (00:56 +0100)]
[build] Fix stand-alone builds of clang.
The target RISCVTargetParserTablegen needs to be visible for stand-alone [1] builds of clang to prevent configuration failures.
[1] https://llvm.org/docs/GettingStarted.html#stand-alone-builds
Reviewed By: tstellar
Differential Revision: https://reviews.llvm.org/D142403
Scott Linder [Mon, 23 Jan 2023 23:50:44 +0000 (23:50 +0000)]
[NFC] Add missing llvm:: specifier
This was omitted in
25c0ea2a5370813f46686918a84e0de27e107d08
Scott Linder [Mon, 23 Jan 2023 23:26:11 +0000 (23:26 +0000)]
[NFC] Use int underlying type for CodeGenOpt::Level
In practice the change from an unspecified underlying type to uint8_t in
25c0ea2a5370813f46686918a84e0de27e107d08 means some builds break due to
ambiguity resolving operator<< on ostreams (I assume because they define
uint8_t differently).
There were also valid points raised on the review saying that we can
just use int here anyway. Pinning it to any type removes the potential
for UB when constructing it, and int is the de-facto default.
Sanjay Patel [Mon, 23 Jan 2023 23:29:30 +0000 (18:29 -0500)]
[Support] revert accidentally removed "std::" specifiers
This snuck into
e76c95fb40b1 but wasn't intended.
Note: for some reason, these prefixes are causing build failures
on a macOS XCode project of LLVM.
Matthias Braun [Mon, 23 Jan 2023 17:54:15 +0000 (09:54 -0800)]
CoroFrame: Fix missing bitcast for some frame merges
The code to adjust types when merging fields on the coroutine frame
accidentally used `GetElementPtrInst::getResultElementType()` which does
the return the type the resulting pointer points to (so misses a pointer
type). This worked most of the time by accident because the type nearly
never matched, but failed to add a necessary bitcast for from `i8**` to
`i8*`.
Differential Revision: https://reviews.llvm.org/D142385
Joseph Huber [Mon, 23 Jan 2023 21:06:44 +0000 (15:06 -0600)]
[Libomptarget] Use the nextgen plugins by default.
The next-gen plugins are complete drop-in replacements for the old
versions. We should strive to replace the old ones as quickly as
possible now that we have a viable alternative.
The only test failing is the `prelock.cpp` test as the support has not landed in
the next-gen plugins.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D142399
Sanjay Patel [Mon, 23 Jan 2023 22:58:10 +0000 (17:58 -0500)]
[InstCombine] allow matching vector types for icmp-of-mask/cast
Also use a more specific matcher to simplify the mask
compare to type size.
Sanjay Patel [Mon, 23 Jan 2023 22:46:14 +0000 (17:46 -0500)]
[InstCombine] relax one-use check for icmp with mask/cast
Sanjay Patel [Mon, 23 Jan 2023 22:45:18 +0000 (17:45 -0500)]
[InstCombine] add tests for masked/casted icmp; NFC
Sanjay Patel [Mon, 23 Jan 2023 21:55:25 +0000 (16:55 -0500)]
[InstCombine] remove dead pattern matching code; NFC
Complexity canonicalization guarantees that a binop and cast
are op0/op1 respectively. Adjusted generic test names to
show that this pattern is still useful.
Sanjay Patel [Mon, 23 Jan 2023 20:48:15 +0000 (15:48 -0500)]
[InstCombine] add tests for signbit compares; NFC
Scott Linder [Mon, 23 Jan 2023 23:00:15 +0000 (23:00 +0000)]
[NFC] Remove redundant range check
Remove gratuitous check introduced in
25c0ea2a5370813f46686918a84e0de27e107d08 which was generating a warning
when compiling under GCC.
Aaron Puchert [Mon, 23 Jan 2023 22:58:43 +0000 (23:58 +0100)]
[CMake] Replace list(FIND) by if(IN_LIST) where index isn't used
If we don't use the index otherwise, if(IN_LIST) is more readable and
doesn't clutter the local scope with index variables.
This was pointed out by @beanz in D96670.
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/D142405
Vitaly Buka [Mon, 23 Jan 2023 22:50:52 +0000 (14:50 -0800)]
[profile] Disable test which needs update after D141512
Scott Linder [Mon, 16 Jan 2023 23:55:22 +0000 (23:55 +0000)]
[NFC] Consolidate llvm::CodeGenOpt::Level handling
Add free functions llvm::CodeGenOpt::{getLevel,getID,parseLevel} to
provide common implementations for functionality that has been
duplicated in many places across the codebase.
Differential Revision: https://reviews.llvm.org/D141968
Owen Pan [Sun, 22 Jan 2023 03:46:41 +0000 (19:46 -0800)]
[clang-format] Fix bugs in parsing C++20 module import statements
Also fixes #60145.
Differential Revision: https://reviews.llvm.org/D142296
serge-sans-paille [Mon, 23 Jan 2023 22:11:05 +0000 (23:11 +0100)]
[clang] Fix unused variable warning in isBuiltinSupported
Warnings introduced by
cf1756146d386667a80501fb8161505d12950804
Haowei Wu [Sat, 14 Jan 2023 00:51:14 +0000 (16:51 -0800)]
[Fuchsia] Build windows runtimes using cross compilation on Linux
This patch provides initial support of building Clang runtimes for
Windows when using Fuchsia Clang toolchains under Linux.
Differential Revision: https://reviews.llvm.org/D141738
Andy Getzendanner [Mon, 23 Jan 2023 13:36:55 +0000 (13:36 +0000)]
readability-const-return-type: don't diagnose a template function returning T, even if sometimes instantiated with e.g. T = const int.
It's not really a readability problem since there's no `const` to read at the declaration site, and returning std::remove_const_t<T> instead usually only hurts readability.
Reviewed By: ymandel
Differential Revision: https://reviews.llvm.org/D140434
Nuno Lopes [Mon, 23 Jan 2023 22:04:55 +0000 (22:04 +0000)]
Fix test expected result [NFC]
Take 2
Aopologies for the noise. Metadata numbering doesn't seem to be stable..
Martin Storsjö [Mon, 23 Jan 2023 12:09:56 +0000 (14:09 +0200)]
[docs] Add/update docs regarding LLVM_NATIVE_TOOL_DIR vs LLVM_TABLEGEN
Differential Revision: https://reviews.llvm.org/D142349
Nuno Lopes [Mon, 23 Jan 2023 21:36:56 +0000 (21:36 +0000)]
Fix test expected result [NFC]
For some reason, it only fails on some buildbots, but not in all, and not on my computer..
Francesco Petrogalli [Mon, 23 Jan 2023 21:31:34 +0000 (22:31 +0100)]
Revert "[build] Fix stand-alone builds of clang."
It breaks some builds [1] with the following error:
```
ccache /usr/bin/c++ -DGTEST_HAS_RTTI=0 -D_DEBUG -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/home/omp-vega20-0/bbot/openmp-offload-amdgpu-runtime/llvm.build/tools/clang/lib/Basic -I/home/omp-vega20-0/bbot/openmp-offload-amdgpu-runtime/llvm.src/clang/lib/Basic -I/home/omp-vega20-0/bbot/openmp-offload-amdgpu-runtime/llvm.src/clang/include -I/home/omp-vega20-0/bbot/openmp-offload-amdgpu-runtime/llvm.build/tools/clang/include -I/home/omp-vega20-0/bbot/openmp-offload-amdgpu-runtime/llvm.build/include -I/home/omp-vega20-0/bbot/openmp-offload-amdgpu-runtime/llvm.src/llvm/include -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wsuggest-override -Wno-comment -Wno-misleading-indentation -fdiagnostics-color -ffunction-sections -fdata-sections -fno-common -Woverloaded-virtual -fno-strict-aliasing -O3 -DNDEBUG -fno-exceptions -fno-rtti -UNDEBUG -std=c++17 -MD -MT tools/clang/lib/Basic/CMakeFiles/obj.clangBasic.dir/Targets/RISCV.cpp.o -MF tools/clang/lib/Basic/CMakeFiles/obj.clangBasic.dir/Targets/RISCV.cpp.o.d -o tools/clang/lib/Basic/CMakeFiles/obj.clangBasic.dir/Targets/RISCV.cpp.o -c /home/omp-vega20-0/bbot/openmp-offload-amdgpu-runtime/llvm.src/clang/lib/Basic/Targets/RISCV.cpp
In file included from /home/omp-vega20-0/bbot/openmp-offload-amdgpu-runtime/llvm.src/clang/lib/Basic/Targets/RISCV.cpp:19:
/home/omp-vega20-0/bbot/openmp-offload-amdgpu-runtime/llvm.src/llvm/include/llvm/TargetParser/RISCVTargetParser.h:29:10: fatal error: llvm/TargetParser/RISCVTargetParserDef.inc: No such file or directory
29 | #include "llvm/TargetParser/RISCVTargetParserDef.inc"
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
2.225 [3029/31/825] Building CXX object tools/clang/lib/Basic/CMakeFiles/obj.clangBasic.dir/Version.cpp.o
2.524 [3029/30/826] Building RISCVTargetParserDef.inc...
```
[1] https://lab.llvm.org/buildbot/#/builders/193/builds/25362
This reverts commit
52bcdac3b8425e20023151bb726b56fd6f62ec17.
Chris Cotter [Mon, 23 Jan 2023 21:24:01 +0000 (21:24 +0000)]
[clang-tidy] Improve rename_check.py
rename_check.py now find and renames the test file. rename_check.py
also will now use 'git mv', so the developer no longer has to manually
add the file after running the script.
Reviewed By: carlosgalvezp
Differential Revision: https://reviews.llvm.org/D141463
Carlos Galvez [Sun, 22 Jan 2023 16:30:10 +0000 (16:30 +0000)]
[clang-tidy][NFC] Use C++17 nested namespaces in clang-tidy headers
We forgot to apply the change to headers in the previous patch,
due to missing "-header-filter" in the run-clang-tidy invocation.
Differential Revision: https://reviews.llvm.org/D142307
Sam James [Mon, 9 Jan 2023 04:32:10 +0000 (04:32 +0000)]
[Clang] [Python] Fix tests when default config file contains -include
In Gentoo, we make use of Clang's recently-enhanced config file support
and add a default include to `clang` invocations using '-include ...'.
This breaks clang-python tests like so:
```
======================================================================
ERROR: test_includes (tests.cindex.test_translation_unit.TestTranslationUnit)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/var/tmp/portage/dev-python/clang-python-15.0.6/work/clang/bindings/python/tests/cindex/test_translation_unit.py", line 145, in test_includes
eq(i[0], i[1])
File "/var/tmp/portage/dev-python/clang-python-15.0.6/work/clang/bindings/python/tests/cindex/test_translation_unit.py", line 132, in eq
self.assert_normpaths_equal(expected[0], actual.source.name)
AttributeError: 'NoneType' object has no attribute 'name'
======================================================================
FAIL: test_inclusion_directive (tests.cindex.test_translation_unit.TestTranslationUnit)
----------------------------------------------------------------------
Traceback (most recent call last):
File "/var/tmp/portage/dev-python/clang-python-15.0.6/work/clang/bindings/python/tests/cindex/test_translation_unit.py", line 157, in test_inclusion_directive
self.assert_normpaths_equal(i[0], i[1])
File "/var/tmp/portage/dev-python/clang-python-15.0.6/work/clang/bindings/python/tests/cindex/test_translation_unit.py", line 126, in assert_normpaths_equal
self.assertEqual(os.path.normpath(path1),
AssertionError: '/var/tmp/portage/dev-python/clang-python-1[58 chars]r1.h' != '/usr/include/gentoo/fortify.h'
- /var/tmp/portage/dev-python/clang-python-15.0.6/work/clang/bindings/python/tests/cindex/INPUTS/header1.h
+ /usr/include/gentoo/fortify.h
```
Disable using the default Clang configuration files on the system, like
we did for other tests.
Bug: https://bugs.gentoo.org/890204
Differential Revision: https://reviews.llvm.org/D141248
Francesco Petrogalli [Mon, 23 Jan 2023 12:27:10 +0000 (13:27 +0100)]
[build] Fix stand-alone builds of clang.
The header file `llvm/include/llvm/Targetparser/RISCVTargetParser.h`
relies on the auto-generated *.inc file associated to the tablegen
target `RISCVTargetParserTableGen`.
Both clangBasic and clangDriver include `RISCVTargetParser.h`,
therefore we need to make sure that the *.inc file is avaiable to
avoid compilation errors like the following:
FAILED: tools/clang/lib/Basic/CMakeFiles/obj.clangBasic.dir/Targets/RISCV.cpp.o
/usr/bin/c++ [bunch of non interesting stuff] -c <path-to>/llvm-project/clang/lib/Basic/Targets/RISCV.cpp
In file included from <path-to>/llvm-project/clang/lib/Basic/Targets/RISCV.cpp:19:
<path-to>/llvm-project/llvm/include/llvm/TargetParser/RISCVTargetParser.h:29:10: fatal error: llvm/TargetParser/RISCVTargetParserDef.inc: No such file or directory
29 | #include "llvm/TargetParser/RISCVTargetParserDef.inc"
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The stand-alone build of `clang` has been tested with the following
script (see [*] for further information):
```
build_llvm=`pwd`/build-llvm
build_clang=`pwd`/build-clang
installprefix=`pwd`/install
llvm=`pwd`/llvm-project
mkdir -p $build_llvm
mkdir -p $installprefix
cmake -G Ninja -S $llvm/llvm -B $build_llvm \
-DLLVM_INSTALL_UTILS=ON \
-DCMAKE_INSTALL_PREFIX=$installprefix \
-DCMAKE_BUILD_TYPE=Release
ninja -C $build_llvm install
cmake -G Ninja -S $llvm/clang -B $build_clang \
-DLLVM_EXTERNAL_LIT=$build_llvm/utils/lit \
-DLLVM_ROOT=$installprefix
```
[*] https://llvm.org/docs/GettingStarted.html#stand-alone-builds
Differential Revision: https://reviews.llvm.org/D141581
Hui [Tue, 3 Jan 2023 18:51:34 +0000 (18:51 +0000)]
[libc++] implement P1020R1 P1973R1 make_unique[shared]_for_overwrite
Differential Revision: https://reviews.llvm.org/D140913
Carlos Galvez [Mon, 23 Jan 2023 21:05:08 +0000 (21:05 +0000)]
[clang-tidy][NFC] Fix Release Notes build error
Carlos Galvez [Wed, 4 Jan 2023 16:42:16 +0000 (16:42 +0000)]
[clang-tidy] Introduce HeaderFileExtensions and ImplementationFileExtensions options
We have a number of checks designed to analyze problems
in header files only, for example:
bugprone-suspicious-include
google-build-namespaces
llvm-header-guard
misc-definitions-in-header
...
All these checks duplicate the same logic and options
to determine whether a location is placed in the main
source file or in the header. More checks are coming
up with similar requirements.
Thus, to remove duplication, let's move this option
to the top-level configuration of clang-tidy (since
it's something all checks should share).
Since the checks fetch the option via getLocalOrGlobal,
the behavior is unchanged.
Add a deprecation notice for all checks that use the
local option, prompting to update to the global option.
The functionality for parsing the option will need to
remain in the checks during the transition period.
Once the local options are fully removed, the goal
is to store the parsed options in the ClangTidyContext,
that checks can easily have access to.
Differential Revision: https://reviews.llvm.org/D141000
Fangrui Song [Mon, 23 Jan 2023 20:56:23 +0000 (12:56 -0800)]
[bazel] Enable layering_check for llvm/unittests
Fangrui Song [Mon, 23 Jan 2023 20:55:00 +0000 (12:55 -0800)]
[bazel] Fix --features=layering_check issues for llvm/unittests
Nicolai Hähnle [Thu, 1 Dec 2022 10:00:30 +0000 (11:00 +0100)]
AMDGPU: Clean up LDS-related occupancy calculations
Occupancy is expressed as waves per SIMD. This means that we need to
take into account the number of SIMDs per "CU" or, to be more precise,
the number of SIMDs over which a workgroup may be distributed.
getOccupancyWithLocalMemSize was wrong because it didn't take SIMDs
into account at all.
At the same time, we need to take into account that WGP mode offers
access to a larger total amount of LDS, since this can affect how
non-power-of-two LDS allocations are rounded. To make this work
consistently, we distinguish between (available) local memory size and
addressable local memory size (which is always limited by 64kB on
gfx10+, even with WGP mode).
This change results in a massive amount of test churn. A lot of it is
caused by the fact that the default work group size is 1024, which means
that (due to rounding effects) the default occupancy on older hardware
is 8 instead of 10, which affects scheduling via register pressure
estimates. I've adjusted most tests by just running the UTC tools, but
in some cases I manually changed the work group size to 32 or 64 to make
sure that work group size chunkiness has no effect.
Differential Revision: https://reviews.llvm.org/D139468
Nicolai Hähnle [Tue, 6 Dec 2022 22:10:15 +0000 (23:10 +0100)]
AMDGPU: Add a scheduler test to demonstrate an upcoming change
Nicolai Hähnle [Tue, 6 Dec 2022 21:41:08 +0000 (22:41 +0100)]
AMDGPU: Re-run UTC scripts on some test cases
Reduce the diff of subsequent changes.
Nicolai Hähnle [Thu, 1 Dec 2022 09:57:22 +0000 (10:57 +0100)]
AMDGPU: Add AMDGPUSubtarget::getEUsPerCU()
We will use this for more accurate occupancy computations. Note that
IsaInfo takes WGP mode vs. CU mode into account on gfx10+.
Differential Revision: https://reviews.llvm.org/D139467
Philip Reames [Mon, 23 Jan 2023 20:29:36 +0000 (12:29 -0800)]
[RISCV] Add a test case for a missed PRE oppurtunity when inserting vsetvlis
Slava Zakharin [Sat, 21 Jan 2023 03:58:36 +0000 (19:58 -0800)]
[flang] Avoid unnecessary temporaries in ArrayValueCopy.
Assume no conflict between pointer arrays and arrays without the target
attribute, if the fact of an array not having the target attribute
can be reliably computed.
This change speeds up SPEC CPU2017/527.cam from 2.5k seconds to 880 seconds
on Icelake, and makes further performance investigation easier.
Differential Revision: https://reviews.llvm.org/D142273
Martin Storsjö [Mon, 23 Jan 2023 11:25:55 +0000 (13:25 +0200)]
[docs] Add release notes for news in 16.x done by me, or otherwise relating to MinGW targets
Differential Revision: https://reviews.llvm.org/D142346
Aart Bik [Sat, 21 Jan 2023 21:05:32 +0000 (13:05 -0800)]
[mlir][sparse] clean vectorization bail-out for VL=0
Fixes https://github.com/llvm/llvm-project/issues/59970
Reviewed By: Peiming
Differential Revision: https://reviews.llvm.org/D142290
Fangrui Song [Mon, 23 Jan 2023 20:08:13 +0000 (12:08 -0800)]
[bazel] Fix layering_check issues of {llvm,clang}:all
Valentin Clement [Mon, 23 Jan 2023 19:23:02 +0000 (20:23 +0100)]
[flang] Keep polymorphic aspect when lowering intrinsic arguments
Make sure the source passed to an intrinsic is still polymorphic when
it is an element of a polymorphic array. This was not handled properly
before.
Reviewed By: PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D142380
Lei Zhang [Mon, 23 Jan 2023 19:08:06 +0000 (11:08 -0800)]
[mlir][spirv] Move uint asm name test to the proper place
Anshil Gandhi [Mon, 23 Jan 2023 16:19:55 +0000 (09:19 -0700)]
[InstCombine] Handle select inst when eliminating constant memcpy
Allow iterating through SelectInst use of the alloca when
checking if it is only ever overwritten from constant memory.
Recursively determine if the SelectInst is replacable and insert
it into the Worklist if so. Finally, define a new SelectInst to
replace the old one, with both of it's values replaced according
to the WorkMap.
Differential Revision: https://reviews.llvm.org/D136524
Stanislav Mekhanoshin [Mon, 23 Jan 2023 18:59:46 +0000 (10:59 -0800)]
[AMDGPU] Use more consistemt way to avoid overflow in the scheduler
Use more consistent way to avoid overflow when calculating SGPR
and VGPR pressure limits.
Differential Revision: https://reviews.llvm.org/D142262
Kazu Hirata [Mon, 23 Jan 2023 18:57:56 +0000 (10:57 -0800)]
[llvm] Fix warnings
This patch fixes:
llvm/lib/IR/DataLayout.cpp:942:13: warning: unused variable ‘VecTy’
[-Wunused-variable]
llvm/lib/Transforms/IPO/OpenMPOpt.cpp:2899:27: warning: unused
variable ‘MI’ [-Wunused-variable]
Jay Foad [Mon, 23 Jan 2023 18:21:04 +0000 (18:21 +0000)]
[TableGen] Avoid repeated lookups of Uses and Defs records. NFC.
Aaron Ballman [Mon, 23 Jan 2023 18:43:41 +0000 (13:43 -0500)]
Silence an MSVC "not all control paths return" warning; NFC
Jason Molenda [Mon, 23 Jan 2023 18:42:31 +0000 (10:42 -0800)]
Run cmdline address expressions through ABI's FixAddress
On systems like ARM, where the non-addressable bits of a pointer
value may be used for metadata (ARMv8.3 pointer authentication, or
Type Byte Ignore), those bits need to be cleared before the address
points to a valid memory location. Add a call to the target's ABI
to clear those from address expression arguments to the lldb
commands (e.g. `disassemble -a`).
Differential Revision: https://reviews.llvm.org/D141629
Stanislav Mekhanoshin [Mon, 16 Jan 2023 23:17:06 +0000 (15:17 -0800)]
[AMDGPU] Tune scheduler on GFX10 and GFX11 for regions with spilling
Unlike older ASICs GFX10+ have a lot of VGPRs. Therefore, it is possible
to achieve high occupancy even with all or almost all addressable VGPRs
used. Our scheduler was never tuned for this scenario. The VGPR Critical
Limit threshold always comes very high, even if maximum occupancy is
targeted. For example on gfx1100 it is set to 192 registers even with
the requested occupancy 16. As a result scheduler starts prioritizing
register pressure reduction very late and we easily end up spilling.
This patch makes VGPR critical limit similar to what we would have on
pre-gfx10 targets with much more limited VGPR budget while still trying
to maintain occupancy as it does now.
Pre-gfx10 ASICs shall not be affected as the limit shall be the same
as before, and on gfx10+ it shall only affect regions where we have
to spill.
Fixes: SWDEV-377300
Differential Revision: https://reviews.llvm.org/D141876
David Green [Mon, 23 Jan 2023 18:39:17 +0000 (18:39 +0000)]
[AArch64] Remove AES, SHA2, SHA3 and SM4 features from armv8.6-a+
The Armv8.6-a and later architecture definitions included AES, SHA2,
SHA3 and SM4, but this did not have an effect when specifying
-march=armv8.6-a. The did not set preprocessor features
(https://godbolt.org/z/1YKad6M8e) or enable the relevant instructions
(like eor3 from sha3: https://godbolt.org/z/vY9v4MqvG). Similarly
architectures armv8 to armv8.5 defined +crypto, but this did not effect
the -march's, only the -mcpu with those architectures. I believe this
was working as intended.
After D141411 we now add the default features for architectures except
for +crypto, which has had the effect of enabling aes/sha2/sha3/sm4 when
-march=armv8.6-a is used. This patch removed those crypto features
again, going back to how things were before. It also removes the
AEK_CRYPTO feature from lower architecture levels, moving it to the cpus
that use it. This shouldn't make any changes, but a few extra tests have
been added for preprocessor features that have improved since llvm 15.
The -mcpu=ampere1 cpu is the only armv8.6+ cpu at present. For that, the
AES, SHA2 and SHA3 features have been re-added to the CPU definition to
keep it in-line with the gcc definition from
https://github.com/gcc-mirror/gcc/commit/
db2f5d661239737157cf131de7d4df1c17d8d88d.
Differential Revision: https://reviews.llvm.org/D141606
Pavel Iliin [Fri, 20 Jan 2023 23:31:53 +0000 (23:31 +0000)]
[AArch64] Function multi-versioning release notes added. NFC.
Differential Revision: https://reviews.llvm.org/D142265
Han Zhu [Fri, 13 Jan 2023 20:18:32 +0000 (12:18 -0800)]
[tsan] Always initialize tsan when building shared lib
Differential Revision: https://reviews.llvm.org/D142039
Pavel Iliin [Mon, 23 Jan 2023 18:22:20 +0000 (18:22 +0000)]
Revert "[AArch64] Function multi-versioning release notes added. NFC."
This reverts commit
5474d7d932710c260f03ce6c6387ec9d82bd10e2.
Wrong differential revision link was used.
Shivam Gupta [Mon, 23 Jan 2023 18:18:37 +0000 (23:48 +0530)]
[Clang] Fix a Wbitfield-enum-conversion warning in DirectoryLookup.h
When compiling clang/Lex/DirectoryLookup.h with option -Wbitfield-enum-conversion, we get the following warning:
DirectoryLookup.h:77:17: warning:
bit-field 'DirCharacteristic' is not wide enough to store all enumerators of
'CharacteristicKind' [-Wbitfield-enum-conversion]
: u(Map), DirCharacteristic(DT), LookupType(LT_HeaderMap),
DirCharacteristic is a bitfield with 2 bits (4 values)
/// DirCharacteristic - The type of directory this is: this is an instance of
/// SrcMgr::CharacteristicKind.
unsigned DirCharacteristic : 2;
Whereas SrcMgr::CharacterKind is an enum with 5 values:
enum CharacteristicKind {
C_User,
C_System,
C_ExternCSystem,
C_User_ModuleMap,
C_System_ModuleMap
};
Solution is to increase DirCharacteristic bitfield from 2 to 3.
Patch by Dimitri van Heesch
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D142304
Craig Topper [Mon, 23 Jan 2023 18:03:06 +0000 (10:03 -0800)]
[RISCV] Move Processors and Features from RISCV.td to their own files.
This reduces RISCV.td to mainly being a top level include file.
Reviewed By: asb, luismarques
Differential Revision: https://reviews.llvm.org/D142239