platform/upstream/mesa.git
2 years agovenus: suggest the proper sampler ycbcr model conversion based on format
Yiwei Zhang [Thu, 2 Sep 2021 07:17:37 +0000 (07:17 +0000)]
venus: suggest the proper sampler ycbcr model conversion based on format

Cc: 21.2.3 mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12694>

2 years agoradv: remove NGG streamout support in LLVM
Samuel Pitoiset [Thu, 2 Sep 2021 07:55:22 +0000 (09:55 +0200)]
radv: remove NGG streamout support in LLVM

It has never really been used due to various issues with GDS in the
past and it will be lowered in NIR at some point.

The driver support is still there because it can likely be re-used.
This implementation can also be used as a reference point.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12695>

2 years agozink: use imageless framebuffers
Mike Blumenkrantz [Wed, 30 Jun 2021 15:51:31 +0000 (11:51 -0400)]
zink: use imageless framebuffers

this feature lets zink avoid the screen-based framebuffer cache with locks
in favor of a context-based one that doesn't need any complicated wizardry
to work since it doesn't need to track refcounts for attachments or work
across contexts since the surface info gets passed in when the renderpass
is begun

also expand the dummy surface to an array for use with multisampling and simplify
surface refs there for non-imageless case

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12661>

2 years agozink: store some surface metadata to struct during creation
Mike Blumenkrantz [Wed, 30 Jun 2021 13:51:51 +0000 (09:51 -0400)]
zink: store some surface metadata to struct during creation

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12661>

2 years agozink: store some image creation metadata to object struct
Mike Blumenkrantz [Wed, 30 Jun 2021 13:32:19 +0000 (09:32 -0400)]
zink: store some image creation metadata to object struct

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12661>

2 years agozink: move get_framebuffer() to zink_framebuffer.c
Mike Blumenkrantz [Wed, 30 Jun 2021 13:25:57 +0000 (09:25 -0400)]
zink: move get_framebuffer() to zink_framebuffer.c

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12661>

2 years agoradv: fix determining the maximum number of waves that can use scratch
Samuel Pitoiset [Thu, 2 Sep 2021 11:37:11 +0000 (13:37 +0200)]
radv: fix determining the maximum number of waves that can use scratch

This estimation was incorrect, the number of waves doesn't only
depend of the number of VGPRs.
Though, {SPI,COMPUTE}_TMPRING_SIZE.WAVES should limit the number of
scratch waves in flight, not sure if limiting it really works.

This fixes a GPU hang with an upcoming game, and this might also
helps resolving some spurious random GPU hangs.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12700>

2 years agoaco/lower_phis: optimize loop exit phis
Daniel Schürmann [Wed, 30 Jun 2021 12:21:44 +0000 (14:21 +0200)]
aco/lower_phis: optimize loop exit phis

This optimization works by ensuring that disabled lanes
are zero'd before any merge sequence.

Totals from 6075 (4.05% of 150170) affected shaders: (GFX10.3)
CodeSize: 57913908 -> 57913212 (-0.00%)
Instrs: 11055852 -> 11055678 (-0.00%)
Latency: 438705219 -> 438534652 (-0.04%); split: -0.04%, +0.00%
InvThroughput: 125284101 -> 125251397 (-0.03%); split: -0.03%, +0.00%
Copies: 807388 -> 821035 (+1.69%); split: -0.00%, +1.69%
Branches: 391827 -> 391782 (-0.01%)
PreSGPRs: 574841 -> 574838 (-0.00%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11659>

2 years agoaco/lower_phis: propagate constants before emitting merge code
Daniel Schürmann [Wed, 30 Jun 2021 12:17:28 +0000 (14:17 +0200)]
aco/lower_phis: propagate constants before emitting merge code

This generalizes a previous optimization.

Totals from 521 (0.35% of 150170) affected shaders: (GFX10.3)
CodeSize: 1680348 -> 1678884 (-0.09%)
Instrs: 307994 -> 307628 (-0.12%)
Latency: 5799845 -> 5792655 (-0.12%)
InvThroughput: 994859 -> 994030 (-0.08%)
Copies: 18992 -> 18767 (-1.18%)
Branches: 10143 -> 10037 (-1.05%)
PreSGPRs: 21904 -> 21853 (-0.23%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11659>

2 years agoaco/lower_bool_phis: avoid creating trivial phis
Daniel Schürmann [Thu, 24 Jun 2021 20:59:21 +0000 (22:59 +0200)]
aco/lower_bool_phis: avoid creating trivial phis

For this purpose, get_ssa() is also refactored slightly.

Totals from 4 (0.00% of 150170) affected shaders: (GFX10.3)
CodeSize: 15504 -> 15376 (-0.83%)
Instrs: 2942 -> 2910 (-1.09%)
Latency: 292444 -> 291642 (-0.27%)
InvThroughput: 30842 -> 30770 (-0.23%)
Copies: 164 -> 150 (-8.54%)
Branches: 96 -> 82 (-14.58%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11659>

2 years agoaco: refactor lower_phis()
Daniel Schürmann [Thu, 24 Jun 2021 20:11:20 +0000 (22:11 +0200)]
aco: refactor lower_phis()

No fossil-db changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11659>

2 years agoaco: fix init_any_pred_defined() for loop header phis
Daniel Schürmann [Thu, 24 Jun 2021 16:11:12 +0000 (18:11 +0200)]
aco: fix init_any_pred_defined() for loop header phis

This includes setting the correct end point of the propagation and
not propagating the incoming values after the loop header.
This patch also changes the propagation to a single iteration for
loop exit phis.

No fossil-db changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
aco: don't propagate incoming value in init_any_pred_defined()

No fossil-db changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11659>

2 years agopanfrost: tidy up GPU naming to be in line with official names
Carsten Haitzler [Wed, 1 Sep 2021 10:09:27 +0000 (11:09 +0100)]
panfrost: tidy up GPU naming to be in line with official names

Offical naming of Mali GPUs is like Mali-G52 or Mali-T860 wth a dash.
Also variants of the same GPU e.g. revision 1 are generally not part
of the name. This adds a dash instead of a space between Mali and the
model and also splits off the r1 revision with a space. This should
keep the naming in-line with offical names and with what the binary
DDK uses for naming.

Signed-off-by: Carsten Haitzler <carsten.haitzler@foss.arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12667>

2 years agoradv: use common vkGet{Buffer,Image}MemoryRequirements()
Samuel Pitoiset [Tue, 17 Aug 2021 15:18:18 +0000 (17:18 +0200)]
radv: use common vkGet{Buffer,Image}MemoryRequirements()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12416>

2 years agoradv: use common vkBind{Buffer,Image}Memory()
Samuel Pitoiset [Tue, 17 Aug 2021 15:15:14 +0000 (17:15 +0200)]
radv: use common vkBind{Buffer,Image}Memory()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12416>

2 years agoradv: use common vkGetDeviceQueue()
Samuel Pitoiset [Tue, 17 Aug 2021 15:19:42 +0000 (17:19 +0200)]
radv: use common vkGetDeviceQueue()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12416>

2 years agoradv: use common vkGetPhysicalDevice{Image}FormatProperties()
Samuel Pitoiset [Tue, 17 Aug 2021 15:06:39 +0000 (17:06 +0200)]
radv: use common vkGetPhysicalDevice{Image}FormatProperties()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12416>

2 years agoradv: use common entrypoints for sparse image requirements/properties
Samuel Pitoiset [Tue, 17 Aug 2021 15:44:54 +0000 (17:44 +0200)]
radv: use common entrypoints for sparse image requirements/properties

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12416>

2 years agovulkan: add common entrypoints for sparse image requirements/properties
Samuel Pitoiset [Tue, 17 Aug 2021 15:44:32 +0000 (17:44 +0200)]
vulkan: add common entrypoints for sparse image requirements/properties

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12416>

2 years agoradv: do not disable DCC for storage images if atomics aren't enabled
Samuel Pitoiset [Tue, 17 Aug 2021 10:08:42 +0000 (12:08 +0200)]
radv: do not disable DCC for storage images if atomics aren't enabled

VK_FORMAT_R32_SFLOAT seems pretty common and it seems we can be a
little smarter when shader image 32-bit float atomics aren't enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12406>

2 years agoradv: track if shader image 32-bit float atomics are enabled
Samuel Pitoiset [Tue, 17 Aug 2021 09:52:52 +0000 (11:52 +0200)]
radv: track if shader image 32-bit float atomics are enabled

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12406>

2 years agoradv: call nir_lower_int64() for LLVM
Samuel Pitoiset [Wed, 1 Sep 2021 08:52:02 +0000 (10:52 +0200)]
radv: call nir_lower_int64() for LLVM

Seems to run fine now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12665>

2 years agov3dv: make v3dv_image_view derive from vk_image_view
Iago Toral Quiroga [Mon, 26 Jul 2021 11:23:30 +0000 (13:23 +0200)]
v3dv: make v3dv_image_view derive from vk_image_view

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12668>

2 years agov3dv: use subresource helpers in more places
Iago Toral Quiroga [Mon, 26 Jul 2021 10:53:45 +0000 (12:53 +0200)]
v3dv: use subresource helpers in more places

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12668>

2 years agov3dv: make v3dv_image derive from vk_image
Iago Toral Quiroga [Mon, 26 Jul 2021 10:06:17 +0000 (12:06 +0200)]
v3dv: make v3dv_image derive from vk_image

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12668>

2 years agovulkan: allow creating color views from depth/stencil images
Iago Toral Quiroga [Tue, 27 Jul 2021 08:42:13 +0000 (10:42 +0200)]
vulkan: allow creating color views from depth/stencil images

Some drivers may want to implement certain depth/stencil operations by
reinterpreting a depth/stencil format as a color format. This is not
strictly allowed by the Vulkan spec, so handle it separately.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12668>

2 years agoiris: Make sure a bound resource is flushed after iris_dirty_for_history.
Francisco Jerez [Fri, 29 May 2020 23:19:06 +0000 (16:19 -0700)]
iris: Make sure a bound resource is flushed after iris_dirty_for_history.

This is the last step before we can start removing the history flush
mechanism: In cases where a dirtied buffer has the potential to be
concurrently bound to the pipeline (as indicated by the bind_history
mask), flag the "flush" dirty bits corresponding to its binding point.
This ensures that the buffer-local memory barriers introduced earlier
in this series are executed before the next draw call, which in turn
will emit any necessary PIPE_CONTROLs in cases where the buffer is
bound through a cache incoherent with the cache that performed the
write.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Track dirty UBOs per-stage for more targeted flushing.
Francisco Jerez [Tue, 5 May 2020 20:05:52 +0000 (13:05 -0700)]
iris: Track dirty UBOs per-stage for more targeted flushing.

This allows us to skip over individual constant buffer bindings which
haven't been changed since the last flush, or which are set to a user
buffer, which means they don't require flushing.

Omitting this commit would lead to the following statistically
significant Piglit Draw Overhead regressions:

 107/DrawArrays (16 VBO| 8 UBO|  8 Tex) w/ 1 UBO change:   XXX ±2.31% x22 -> XXX ±2.55% x21  d=-3.49% ±2.38%  p=0.00%
 79/DrawArrays ( 1 VBO| 8 UBO|  8 Tex) w/ 8 UBOs change:   XXX ±1.90% x22 -> XXX ±2.25% x21  d=-3.20% ±2.04%  p=0.00%
 78/DrawArrays ( 1 VBO| 8 UBO|  8 Tex) w/ 1 UBO change:    XXX ±2.64% x22 -> XXX ±2.58% x21  d=-2.74% ±2.58%  p=0.12%
 45/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ 1 UBO change:  XXX ±2.53% x22 -> XXX ±2.29% x21  d=-2.41% ±2.39%  p=0.20%
 108/DrawArrays (16 VBO| 8 UBO|  8 Tex) w/ 8 UBOs change:  XXX ±2.10% x22 -> XXX ±1.41% x21  d=-2.36% ±1.78%  p=0.01%
 16/DrawElements ( 1 VBO| 8 UBO|  8 Tex) w/ 1 UBO change:  XXX ±2.44% x22 -> XXX ±1.19% x21  d=-2.12% ±1.93%  p=0.09%
 46/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ 8 UBOs change: XXX ±2.93% x22 -> XXX ±2.44% x21  d=-1.99% ±2.68%  p=1.93%

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Use separate dirty bits for UBO and SSBO flushes.
Francisco Jerez [Fri, 29 May 2020 23:36:23 +0000 (16:36 -0700)]
iris: Use separate dirty bits for UBO and SSBO flushes.

This moves UBO+SSBO flushing into a dirty bit separate from the one
used for image and sampler views, which saves some CPU overhead in the
frequent case where buffers from only one or the other set are updated.

Omitting this commit would lead to the following statistically
significant Piglit Draw Overhead regressions:

 107/DrawArrays (16 VBO| 8 UBO|  8 Tex) w/ 1 UBO change:           XXX ±2.31% x22 -> XXX ±1.80% x21  d=-24.31% ±1.91%  p=0.00%
 78/DrawArrays ( 1 VBO| 8 UBO|  8 Tex) w/ 1 UBO change:            XXX ±2.64% x22 -> XXX ±2.21% x21  d=-24.13% ±2.22%  p=0.00%
 45/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ 1 UBO change:          XXX ±2.53% x22 -> XXX ±1.90% x21  d=-23.63% ±2.07%  p=0.00%
 16/DrawElements ( 1 VBO| 8 UBO|  8 Tex) w/ 1 UBO change:          XXX ±2.44% x22 -> XXX ±1.97% x21  d=-23.23% ±2.04%  p=0.00%
 108/DrawArrays (16 VBO| 8 UBO|  8 Tex) w/ 8 UBOs change:          XXX ±2.10% x22 -> XXX ±1.50% x21  d=-22.15% ±1.71%  p=0.00%
 79/DrawArrays ( 1 VBO| 8 UBO|  8 Tex) w/ 8 UBOs change:           XXX ±1.90% x22 -> XXX ±1.70% x21  d=-22.12% ±1.64%  p=0.00%
 17/DrawElements ( 1 VBO| 8 UBO|  8 Tex) w/ 8 UBOs change:         XXX ±2.85% x22 -> XXX ±1.59% x21  d=-21.03% ±2.22%  p=0.00%
 46/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ 8 UBOs change:         XXX ±2.93% x22 -> XXX ±1.09% x21  d=-20.62% ±2.18%  p=0.00%
 7/DrawElements ( 1 VBO| 8 UBO|  8 Tex) w/ vertex attrib change:   XXX ±9.30% x22 -> XXX ±7.02% x21   d=-6.49% ±8.08%  p=1.19%
 68/DrawArrays ( 1 VBO| 8 UBO|  8 Tex) w/ shader program change:   XXX ±1.60% x22 -> XXX ±1.93% x21   d=-2.23% ±1.75%  p=0.01%
 6/DrawElements ( 1 VBO| 8 UBO|  8 Tex) w/ shader program change:  XXX ±2.90% x22 -> XXX ±2.71% x21   d=-2.04% ±2.78%  p=2.08%

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Insert buffer-local memory barriers for UBO reads.
Francisco Jerez [Fri, 29 May 2020 23:12:55 +0000 (16:12 -0700)]
iris: Insert buffer-local memory barriers for UBO reads.

Similar to what was previously done for other kinds of buffers --
Insert memory barriers at resolves-and-flushes time instead of relying
on the history flush mechanism.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Insert buffer-local memory barriers for SSBO reads and writes.
Francisco Jerez [Fri, 29 May 2020 23:12:34 +0000 (16:12 -0700)]
iris: Insert buffer-local memory barriers for SSBO reads and writes.

Similar to what was previously done for vertex buffers, render
buffers, etc -- Insert memory barriers at resolves-and-flushes time
instead of relying on the history flush mechanism.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Use DATA domain barrier for shader images instead of OTHER domain.
Francisco Jerez [Thu, 6 Feb 2020 04:45:01 +0000 (20:45 -0800)]
iris: Use DATA domain barrier for shader images instead of OTHER domain.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Add read-write domain for data cache.
Francisco Jerez [Sat, 30 May 2020 00:22:55 +0000 (17:22 -0700)]
iris: Add read-write domain for data cache.

This will allow us to remove the history flushes performed for SSBOs
and instead take advantage of the same mechanism used for tracking
other memory accesses.

v2: Use C99 designated initializers (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Insert buffer-local memory barriers for indirect draw parameters.
Francisco Jerez [Mon, 11 May 2020 21:43:41 +0000 (14:43 -0700)]
iris: Insert buffer-local memory barriers for indirect draw parameters.

This adds buffer-local barriers so any required synchronization
commands are emitted before a buffer object is used as source for
indirect draw parameters.  An unconditional PIPE_CONTROL meant to
flush the contents of the draw count buffer can now be removed, since
it's redundant with the more accurate buffer-local barrier introduced
here, which should avoid flushing in cases where the buffer wasn't
written by any incoherent cache since the last flush.

(Rebased by Kenneth Graunke.)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Add separate dirty bit for VBO flushes.
Francisco Jerez [Fri, 29 May 2020 23:11:58 +0000 (16:11 -0700)]
iris: Add separate dirty bit for VBO flushes.

Instead of emitting barriers every time IRIS_DIRTY_VERTEX_BUFFERS is
flagged, use a separate dirty bit and optimize out the barriers in
cases where the same buffer object is re-bound as vertex buffer.

Omitting this commit would lead to the following statistically
significant Piglit Draw Overhead regressions:

 36/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ vertex attrib change:      XXX ±7.22% x22 -> XXX±11.09% x21  d=-20.10% ±8.06%  p=0.00%
 98/DrawArrays (16 VBO| 8 UBO|  8 Tex) w/ vertex attrib change:        XXX ±7.27% x22 -> XXX ±7.70% x21  d=-17.76% ±6.83%  p=0.00%
 69/DrawArrays ( 1 VBO| 8 UBO|  8 Tex) w/ vertex attrib change:        XXX ±9.94% x22 -> XXX ±8.72% x21   d=-7.46% ±9.08%  p=1.02%
 53/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ depth enable change:       XXX ±8.34% x22 -> XXX ±6.88% x21   d=-7.30% ±7.45%  p=0.26%
 61/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ cull face enable change:   XXX±10.22% x22 -> XXX ±8.63% x21   d=-6.75% ±9.23%  p=2.11%
 55/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ stencil enable change:     XXX ±9.30% x22 -> XXX ±7.25% x21   d=-6.60% ±8.16%  p=1.14%
 50/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ viewport change:           XXX ±6.48% x22 -> XXX ±5.93% x21   d=-6.58% ±6.04%  p=0.09%
 54/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ depth clamp enable change: XXX ±9.95% x22 -> XXX ±7.95% x21   d=-6.50% ±8.81%  p=2.02%
 35/DrawElements (16 VBO| 8 UBO|  8 Tex) w/ shader program change:     XXX ±7.27% x22 -> XXX ±7.25% x21   d=-5.77% ±7.06%  p=1.06%

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Insert buffer-local memory barriers for VF reads.
Francisco Jerez [Tue, 5 May 2020 19:02:07 +0000 (12:02 -0700)]
iris: Insert buffer-local memory barriers for VF reads.

This ensures that any required synchronization (i.e. PIPE_CONTROL)
commands are emitted whenever a vertex or index buffer is used in
cases where it had been previously accessed from an incoherent caching
domain.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Annotate all BO uses through VF cache domain.
Francisco Jerez [Thu, 6 Feb 2020 03:42:04 +0000 (19:42 -0800)]
iris: Annotate all BO uses through VF cache domain.

This promotes some of the previously introduced IRIS_DOMAIN_OTHER_READ
annotations used for vertex data to the more specific
IRIS_DOMAIN_VF_READ domain.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agoiris: Add read-only domain for VF cache.
Francisco Jerez [Sat, 30 May 2020 00:21:28 +0000 (17:21 -0700)]
iris: Add read-only domain for VF cache.

This will allow us to order writes and reads of vertex and index
buffers by using the same cache tracking infrastructure introduced
previously for render and depth buffers.  The ultimate goal is to
remove the somewhat heavy-handed history flush mechanism currently
used for buffer objects, and use a single cache tracking mechanism
across the whole driver.

v2: Use C99 designated initializers (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12691>

2 years agolavapipe: unbreak imageless framebuffer
Mike Blumenkrantz [Thu, 2 Sep 2021 01:13:38 +0000 (21:13 -0400)]
lavapipe: unbreak imageless framebuffer

vk cmd queue doesn't copy pNext pointers

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12688>

2 years agovenus: workaround a blob_mem mappable size check issue
Yiwei Zhang [Wed, 1 Sep 2021 21:30:36 +0000 (21:30 +0000)]
venus: workaround a blob_mem mappable size check issue

For blob_mem allocated from virtgpu_virgl backend, the guest mappable
size queried can be smaller than the size returned from image memory
requirement query from the host side. Here we temporarily workaround
until we switch to use cross-domain backend in minigbm.

Cc: 21.2.3 mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12687>

2 years agovenus: renderer to check map size only when mappable
Yiwei Zhang [Wed, 1 Sep 2021 21:46:38 +0000 (21:46 +0000)]
venus: renderer to check map size only when mappable

Cc: 21.2.3 mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12687>

2 years agodocs: update features for lavapipe
Mike Blumenkrantz [Wed, 1 Sep 2021 21:48:25 +0000 (17:48 -0400)]
docs: update features for lavapipe

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12627>

2 years agolavapipe: support EXT_primitive_topology_list_restart
Mike Blumenkrantz [Mon, 30 Aug 2021 19:24:14 +0000 (15:24 -0400)]
lavapipe: support EXT_primitive_topology_list_restart

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12627>

2 years agoiris: switch to explicit busy tracking
Paulo Zanoni [Thu, 5 Aug 2021 19:23:04 +0000 (12:23 -0700)]
iris: switch to explicit busy tracking

We're moving away from relying on the Kernel's implicit busy tracking
into our own tracking, except for shared buffers.

Not only this shouldn't hurt now (it doesn't, according to my
measurements), when we switch to vm_bind we will be able to cut some
significant overhead by simply omitting all the async buffers from the
execbuf ioctl.

v2:
- Change iris_bo_busy() to bool (Ken).
- Fix coding style issues (Ken).
- Rebase on not having the refcount _inc and _dec helpers anymore
  (Ken).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4748
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12363>

2 years agoiris: give each screen of a bufmgr a unique ID
Paulo Zanoni [Wed, 11 Aug 2021 22:17:33 +0000 (15:17 -0700)]
iris: give each screen of a bufmgr a unique ID

We want to implement explicit BO dependency tracking and for that
we'll use arrays of dependencies (syncobjs) indexed by screen->id.
This is way more efficient than storing and checking screen pointers
everywhere.

v2: Properly use atomic operations in a non-racy way (Alyssa, Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12363>

2 years agoiris: syncobjs are now owned by bufmgr instead of screen
Paulo Zanoni [Tue, 3 Aug 2021 23:28:02 +0000 (16:28 -0700)]
iris: syncobjs are now owned by bufmgr instead of screen

The next patches will justify the new ownership. We want the BOs to
have references on the batches' syncobjs so we can implement implicit
tracking. In other words: BOs will be able to wait on syncobjs owned
by different screens. Since our syncobjs are actually just a Kernel
handle with a refcount, they can be used globally and it makes more
sense to map them to the bufmgr, just like the BOs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12363>

2 years agoradv: use radeon_set_sh_reg_seq() more for initial gfx/compute state
Samuel Pitoiset [Wed, 1 Sep 2021 11:53:57 +0000 (13:53 +0200)]
radv: use radeon_set_sh_reg_seq() more for initial gfx/compute state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12671>

2 years agovenus: initialize physical devices once
Chia-I Wu [Tue, 31 Aug 2021 19:28:20 +0000 (12:28 -0700)]
venus: initialize physical devices once

Avoid re-enumeration when there is no device or no supported device.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12653>

2 years agovenus: no supported device is not an error
Chia-I Wu [Tue, 31 Aug 2021 19:36:45 +0000 (12:36 -0700)]
venus: no supported device is not an error

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12653>

2 years agovenus: group physical device fields with a struct
Chia-I Wu [Tue, 31 Aug 2021 19:16:16 +0000 (12:16 -0700)]
venus: group physical device fields with a struct

This makes it clear what the mutex protects.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12653>

2 years agoradv: add some asserts for descriptor updating
Mike Blumenkrantz [Mon, 30 Aug 2021 15:37:06 +0000 (11:37 -0400)]
radv: add some asserts for descriptor updating

let's avoid any further issues with descriptor sizing

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12620>

2 years agovulkan: Remove dependency on Python 3.9+
Tomeu Vizoso [Wed, 1 Sep 2021 12:13:40 +0000 (14:13 +0200)]
vulkan: Remove dependency on Python 3.9+

Closes #5311.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Fixes: 997a6ca22654 ("vulkan: Generate entrypoints that enqueue commands")
Fixes: a7b0946ef046 ("vulkan: Generate code to place commands in a queue")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12672>

2 years agofreedreno/computerator: Add support for pvtmem
Connor Abbott [Wed, 14 Jul 2021 11:42:02 +0000 (13:42 +0200)]
freedreno/computerator: Add support for pvtmem

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11876>

2 years agoci/freedreno: Add a bunch of recent a530 and a630 flakes.
Emma Anholt [Wed, 1 Sep 2021 16:36:29 +0000 (09:36 -0700)]
ci/freedreno: Add a bunch of recent a530 and a630 flakes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12683>

2 years agoci/freedreno: Annotate a bunch of piglit fails/crashes.
Emma Anholt [Wed, 1 Sep 2021 00:00:37 +0000 (17:00 -0700)]
ci/freedreno: Annotate a bunch of piglit fails/crashes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12683>

2 years agoradv: just use UINT64_MAX when getting absolute timeout for that value
Mike Blumenkrantz [Wed, 1 Sep 2021 15:55:08 +0000 (11:55 -0400)]
radv: just use UINT64_MAX when getting absolute timeout for that value

this would otherwise result in (UINT64_MAX - gettime()), which can effectively
be rounded to UINT64_MAX without a noticeable change

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12680>

2 years agomesa/st: create new surfaces before destroying old ones when updating attachments
Mike Blumenkrantz [Tue, 31 Aug 2021 18:37:31 +0000 (14:37 -0400)]
mesa/st: create new surfaces before destroying old ones when updating attachments

try to avoid patterns that would destroy surfaces for drivers that cache them for
deduplication purposes

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12651>

2 years agoutil/format: NEON is not available with the soft-float ABI
Adrian Bunk [Thu, 26 Aug 2021 19:35:49 +0000 (22:35 +0300)]
util/format: NEON is not available with the soft-float ABI

Fixes: 80923e8d58cc ("util/format: Add some NEON intrinsics-based u_format_unpack.")
Reviewed-by: Emma Anholt <emma@anholt.net>
Tested-by: Ross Burton <ross.burton@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12569>

2 years agoac/nir/nggc: Move gs_alloc_req up in NGG culling shaders.
Timur Kristóf [Mon, 2 Aug 2021 15:57:39 +0000 (17:57 +0200)]
ac/nir/nggc: Move gs_alloc_req up in NGG culling shaders.

This is the first part of a refactor to make vertex compaction optional.
Additionally, it may yield a very small benefit to allocate the PC
space sligtly sooner.

Fossil DB stats on Sienna Cichlid with NGGC on:

Totals from 58239 (45.27% of 128647) affected shaders:
CodeSize: 160502348 -> 160502340 (-0.00%)
Instrs: 30722664 -> 30722662 (-0.00%)
Latency: 137627419 -> 137782218 (+0.11%); split: -0.00%, +0.11%
InvThroughput: 21698587 -> 21699068 (+0.00%); split: -0.00%, +0.00%
Copies: 3288263 -> 3288261 (-0.00%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12246>

2 years agoac/nir/nggc: Only repack arguments that are needed.
Timur Kristóf [Thu, 5 Aug 2021 14:24:35 +0000 (16:24 +0200)]
ac/nir/nggc: Only repack arguments that are needed.

Don't repack everything, only what is actually used.
The goal of this commit is primarily to remove unnecessary
LDS stores and loads. In addition to that, it also gets rid of
a few VALU instructions and reduces VGPR use.

Fossil DB stats on Sienna Cichlid with NGGC on:

Totals from 6951 (5.40% of 128647) affected shaders:
VGPRs: 206056 -> 205360 (-0.34%); split: -0.79%, +0.45%
CodeSize: 12344568 -> 12269312 (-0.61%); split: -0.62%, +0.01%
MaxWaves: 211206 -> 212196 (+0.47%)
Instrs: 2319459 -> 2308483 (-0.47%); split: -0.50%, +0.03%
Latency: 7220829 -> 7164721 (-0.78%); split: -1.21%, +0.43%
InvThroughput: 1051450 -> 1049191 (-0.21%); split: -0.36%, +0.15%
VClause: 25794 -> 25445 (-1.35%); split: -1.97%, +0.61%
SClause: 39192 -> 39277 (+0.22%); split: -0.21%, +0.43%
Copies: 315756 -> 313404 (-0.74%); split: -1.17%, +0.42%
Branches: 127878 -> 127879 (+0.00%); split: -0.00%, +0.00%
PreVGPRs: 168029 -> 160162 (-4.68%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12246>

2 years agoac/nir/nggc: Don't stop applying reusable variables at prim export.
Timur Kristóf [Thu, 5 Aug 2021 16:42:17 +0000 (18:42 +0200)]
ac/nir/nggc: Don't stop applying reusable variables at prim export.

This was a mistake that prevented reusing variables in shaders
with late primitive export.

Fossil DB stats on Sienna Cichlid with NGGC on:

Totals from 6547 (5.09% of 128647) affected shaders:
VGPRs: 323368 -> 323824 (+0.14%); split: -0.03%, +0.18%
SpillSGPRs: 45 -> 4865 (+10711.11%)
CodeSize: 34208732 -> 33855952 (-1.03%); split: -1.21%, +0.18%
MaxWaves: 142538 -> 142456 (-0.06%); split: +0.04%, -0.09%
Instrs: 6654252 -> 6606432 (-0.72%); split: -0.89%, +0.17%
Latency: 30527770 -> 30452769 (-0.25%); split: -0.42%, +0.18%
InvThroughput: 5604540 -> 5609450 (+0.09%); split: -0.04%, +0.13%
VClause: 121531 -> 120448 (-0.89%); split: -1.17%, +0.27%
SClause: 195388 -> 177902 (-8.95%); split: -9.14%, +0.19%
Copies: 617949 -> 636397 (+2.99%); split: -0.44%, +3.42%
Branches: 228184 -> 228281 (+0.04%); split: -0.09%, +0.13%
PreSGPRs: 271395 -> 343555 (+26.59%); split: -0.01%, +26.60%
PreVGPRs: 277650 -> 277710 (+0.02%); split: -0.01%, +0.03%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12246>

2 years agoac/nir/ngg: Delete unused struct.
Timur Kristóf [Tue, 3 Aug 2021 08:30:47 +0000 (10:30 +0200)]
ac/nir/ngg: Delete unused struct.

This was left there by accident after a rebase mistake.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12246>

2 years agolavapipe: Use c_msvc_compat_args
Tomeu Vizoso [Wed, 1 Sep 2021 05:03:02 +0000 (07:03 +0200)]
lavapipe: Use c_msvc_compat_args

So local builds fail before the Windows build finds out.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12662>

2 years agoir3/a6xx,freedreno: account for resinfo return size dependency on IBO_0_FMT
Danylo Piliaiev [Mon, 30 Aug 2021 09:25:46 +0000 (12:25 +0300)]
ir3/a6xx,freedreno: account for resinfo return size dependency on IBO_0_FMT

On a6xx resinfo returns size in bytes divided by IBO_0_FMT format size
(not just size in dwords), we have to shift it back to NIR meaning which
is size in bytes.

Make freedreno use 16b buffers when they are supported in order to be
able to depend on hardware capabilities when lowering ssbo size.

Fixes: ce1a381e57d2803246c8a27f52f3dea2d2bfbfb1 "turnip: enable VK_KHR_16bit_storage on A650"

Fixes cts tests:
    dEQP-VK.ssbo.unsized_array_length.float_offset_explicit_size
    dEQP-VK.ssbo.unsized_array_length.float_no_offset_whole_size
    dEQP-VK.compute.basic.write_multiple_unsized_arr_single_invocation
and many more

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12485>

2 years agoiris: Fix compute shader leak
Mykhailo Skorokhodov [Tue, 31 Aug 2021 07:43:46 +0000 (10:43 +0300)]
iris: Fix compute shader leak

Variant after creation with the function iris_create_shader_variant
requires to be added to variants. Otherwise there is a memory
leak after execution.

Fixes: 2024d470483("iris: Add the variant to the list as early as possible")
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12645>

2 years agoaco: Fix invalid usage of std::fill with std::array.
Timur Kristóf [Wed, 1 Sep 2021 06:40:45 +0000 (08:40 +0200)]
aco: Fix invalid usage of std::fill with std::array.

In this case std::array doesn't behave like a regular array, therefore
it is NOT okay to index it outside the array, even though std::fill
needs us to do so.

Change the syntax to do the same thing slightly differently,
and add an assertion to make sure the registers are always within
the array's bounds.

Closes: #5289
Fixes: 0e4747d3fb7ec15f8c1d6b971b1352249e7d95c6
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12664>

2 years agoglx: Fix unused-variable warning with macOS build.
Vinson Lee [Sat, 28 Aug 2021 07:02:50 +0000 (00:02 -0700)]
glx: Fix unused-variable warning with macOS build.

../src/glx/tests/indirect_api.cpp:52:20: warning: unused variable 'nil' [-Wunused-variable]
static const void *nil = 0;
                   ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12607>

2 years agonir: Add comment to explain the sad_u8x4 opcode.
Timur Kristóf [Tue, 31 Aug 2021 18:00:16 +0000 (20:00 +0200)]
nir: Add comment to explain the sad_u8x4 opcode.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12649>

2 years agolima/gpir: Rewrite register allocation for value registers
Connor Abbott [Wed, 9 Oct 2019 13:36:56 +0000 (09:36 -0400)]
lima/gpir: Rewrite register allocation for value registers

The usual linear-scan register allocation algorithm can't handle
preallocated registers, since we might be forced to choose a color for
a non-preallocated variable that overlaps with a pre-allocated variable.
But in such cases we can simply split the live range of the offending
variable when we reach the beginning of the pre-allocated variable's
live range. This is still optimal in the sense that it always finds a
coloring whenever one is possible, but we may not insert the smallest
possible number of moves. However, since it's actually the scheduler
which splits live ranges afterwards, we can simply fold in the move
while keeping its fake dependencies, and then everything still works! In
other words, inserting a live range split for a value register during
register allocation is pretty much free.

This means that we can split register allocation in two. First globally
allocate the cross-block registers accessed through load_reg and
store_reg instructions, which is still done via graph coloring, and then
run a linear scan algorithm over each block, treating the load_reg and
store_reg nodes as referring to pre-allocated registers. This makes the
existing RA more complicated, but it has two benefits: first, using
round-robin with the linear scan allocator results in much fewer fake
dependencies, resulting in around 15 less instructions in the glmark2
jellyfish shader and fixing a regression in instruction count since
branching support went in. Second, it will simplify handling spilling.
With just graph coloring for everything, every time we spill a node, we
have to create new value registers which become new nodes in the graph
and re-run RA. This is worsened by the fact that when writing a value to
a temporary, we need to have an extra register available to load the
write address with a load_const node. With the new scheme, we can ignore
this entirely in the first part and then in the second part we can just
reserve an extra register in sections where we know we have to spill. So
no re-running RA many times, and we can get a good result quickly.

The current implementation does linear scan backwards, so that we can
insert the fake dependencies while allocating and avoid creating any
move nodes at all when we have to split a live range. However, it turns
out that this makes handling schedule_first nodes a bit more
complicated, so it's not clear if that was worth it.

Note:
The commit was originally authored by Connor Abbott <cwabbott@gmail.com>
and was cherry-picked from <mesa/mesa!2315>.
Rebasing was necessary due to changes to BITSET_FOREACH_SET,
see 4413537c
Because some deqp tests pass now, deqp-lima-fails.txt was also changed.
The above changes are

Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7682>

2 years agolima: Add a NIR load duplicating pass
Connor Abbott [Mon, 16 Sep 2019 08:37:27 +0000 (15:37 +0700)]
lima: Add a NIR load duplicating pass

and use it with vertex shaders.

Note:
The commit was originally authored by Connor Abbott <cwabbott@gmail.com>
and was cherry-picked from <mesa/mesa!2315>.
Apart from some changes, which were necessary due to rebasing, the following
changes have been added:
clone_intrinsic() was changed to use nir_instr_clone() instead of
doing it manually.
Tests against `src->parent_instr->type != nir_instr_type_phi` have been
inserted, otherwise we may run into a nir validation error.
Intrinsic load_input and load_uniform  are not duplicated, if their source
type is nir_instr_type_load_const.
The above changes are

Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7682>

2 years agoradeonsi: clean up typecasts in compute_copy_image
Marek Olšák [Wed, 18 Aug 2021 00:40:48 +0000 (20:40 -0400)]
radeonsi: clean up typecasts in compute_copy_image

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>

2 years agoradeonsi: enable DCC stores on gfx10.3 APUs for better performance
Marek Olšák [Tue, 17 Aug 2021 23:01:37 +0000 (19:01 -0400)]
radeonsi: enable DCC stores on gfx10.3 APUs for better performance

There is just one hw bug that we need to handle.

NO_DCC_FB was unused.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>

2 years agoradeonsi: track displayable_dcc_dirty for non-compute shaders
Marek Olšák [Tue, 17 Aug 2021 23:58:36 +0000 (19:58 -0400)]
radeonsi: track displayable_dcc_dirty for non-compute shaders

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>

2 years agoradeonsi: rename DCC_WRITE -> ALLOW_DCC_STORE
Marek Olšák [Tue, 17 Aug 2021 22:58:20 +0000 (18:58 -0400)]
radeonsi: rename DCC_WRITE -> ALLOW_DCC_STORE

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>

2 years agoradeonsi: handle pipe_aligned in compute_expand_fmask
Marek Olšák [Tue, 17 Aug 2021 22:55:16 +0000 (18:55 -0400)]
radeonsi: handle pipe_aligned in compute_expand_fmask

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>

2 years agoradeonsi: add missing make_CB_shader_coherent for DCC stores into copy_image
Marek Olšák [Tue, 17 Aug 2021 22:54:16 +0000 (18:54 -0400)]
radeonsi: add missing make_CB_shader_coherent for DCC stores into copy_image

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>

2 years agoradeonsi: enable DCC stores for clear_render_target on gfx10
Marek Olšák [Tue, 17 Aug 2021 22:50:15 +0000 (18:50 -0400)]
radeonsi: enable DCC stores for clear_render_target on gfx10

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>

2 years agoradeonsi: disable DCC stores on Navi12-14 for displayable DCC to fix corruption
Marek Olšák [Tue, 24 Aug 2021 15:29:31 +0000 (11:29 -0400)]
radeonsi: disable DCC stores on Navi12-14 for displayable DCC to fix corruption

This is a hardware limitation.

Fixes: 1d64a1045ea205ee0 "radeonsi: enable dcc image stores on gfx10+"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12449>

2 years agozink: remove ZINK_HEAP_HOST_VISIBLE_ANY
Mike Blumenkrantz [Fri, 27 Aug 2021 22:09:25 +0000 (18:09 -0400)]
zink: remove ZINK_HEAP_HOST_VISIBLE_ANY

this was just the coherent heap but splitting the slabs more to make
suballocating worse

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12659>

2 years agozink: clamp lazy pools to 500 descriptors and allocate more slowly
Mike Blumenkrantz [Fri, 16 Jul 2021 17:16:58 +0000 (13:16 -0400)]
zink: clamp lazy pools to 500 descriptors and allocate more slowly

now that these can get popped without stalling, they can be much smaller
to avoid exploding available memory or address space

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12658>

2 years agozink: use compatible renderpass state in pipeline hash
Mike Blumenkrantz [Thu, 17 Jun 2021 19:54:35 +0000 (15:54 -0400)]
zink: use compatible renderpass state in pipeline hash

this massively deduplicates the number of pipelines

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12605>

2 years agozink: track compatible render passes
Mike Blumenkrantz [Thu, 17 Jun 2021 19:51:27 +0000 (15:51 -0400)]
zink: track compatible render passes

Two render passes are compatible if their corresponding color, input, resolve, and depth/stencil
attachment references are compatible and if they are otherwise identical except for:
• Initial and final image layout in attachment descriptions
• Load and store operations in attachment descriptions
• Image layout in attachment references

VK 8.2

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12605>

2 years agozink: inline gfx pipeline hash table
Mike Blumenkrantz [Thu, 17 Jun 2021 18:20:40 +0000 (14:20 -0400)]
zink: inline gfx pipeline hash table

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12605>

2 years agozink: incrementally hash all pipeline component hashes
Mike Blumenkrantz [Thu, 17 Jun 2021 15:46:04 +0000 (11:46 -0400)]
zink: incrementally hash all pipeline component hashes

not the actual pipeline hash, just the components

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12605>

2 years agozink: incrementally hash vertex state into pipeline hash
Mike Blumenkrantz [Thu, 17 Jun 2021 15:32:01 +0000 (11:32 -0400)]
zink: incrementally hash vertex state into pipeline hash

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12605>

2 years agozink: incrementally hash module variants in pipeline
Mike Blumenkrantz [Thu, 17 Jun 2021 15:25:19 +0000 (11:25 -0400)]
zink: incrementally hash module variants in pipeline

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12605>

2 years agozink: incrementally hash gfx shader stages
Mike Blumenkrantz [Thu, 17 Jun 2021 13:45:11 +0000 (09:45 -0400)]
zink: incrementally hash gfx shader stages

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12605>

2 years agozink: don't use dynamic vertex stride with dynamic vertex input
Mike Blumenkrantz [Tue, 17 Aug 2021 14:25:59 +0000 (10:25 -0400)]
zink: don't use dynamic vertex stride with dynamic vertex input

avoid spurious validation errors and potential driver fails from updating
stride twice

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12604>

2 years agozink: dynamic vertex input template
Mike Blumenkrantz [Tue, 15 Jun 2021 18:35:39 +0000 (14:35 -0400)]
zink: dynamic vertex input template

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12604>

2 years agozink: create inner scanout object without scanout binds
Mike Blumenkrantz [Wed, 25 Aug 2021 02:05:23 +0000 (22:05 -0400)]
zink: create inner scanout object without scanout binds

this restores mutable formats to the inner object to work with scanout

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12629>

2 years agozink: ensure gfx shader module states are updated when doing a partial recalc
Mike Blumenkrantz [Tue, 24 Aug 2021 22:33:32 +0000 (18:33 -0400)]
zink: ensure gfx shader module states are updated when doing a partial recalc

these are in the pipeline state and must be updated

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12632>

2 years agozink: remove refcounting from batch states
Mike Blumenkrantz [Wed, 25 Aug 2021 20:08:35 +0000 (16:08 -0400)]
zink: remove refcounting from batch states

these are always destroyed by the context, no exceptions

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12633>

2 years agozink: split out stalling from fence-waiting function
Mike Blumenkrantz [Tue, 31 Aug 2021 20:01:49 +0000 (16:01 -0400)]
zink: split out stalling from fence-waiting function

stall and flush+stall are not the same; in some cases, the driver must only
stall and never flush, so ensure that this is possible to avoid infinite
recursion

fixes Metro Last Light: Redux benchmark mode

Fixes: d8905446d65 ("zink: rework oom flushing")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12652>

2 years agozink: use tc rebind info for buffer replacements
Mike Blumenkrantz [Fri, 9 Jul 2021 15:12:08 +0000 (11:12 -0400)]
zink: use tc rebind info for buffer replacements

this makes the most common type of replacement more efficient

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12575>

2 years agozink: directly pass resource pointer to descriptor state updates
Mike Blumenkrantz [Mon, 21 Jun 2021 14:42:53 +0000 (10:42 -0400)]
zink: directly pass resource pointer to descriptor state updates

this should cut down a little more overhead

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12575>

2 years agogallium/cso: add unbind mask for cso restore
Mike Blumenkrantz [Mon, 7 Jun 2021 14:20:38 +0000 (10:20 -0400)]
gallium/cso: add unbind mask for cso restore

this code was duplicated in a bunch of places, so now there can just
be a bitmask passed to simplify and consolidate

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12571>

2 years agoaux/cso: always restore states in atom order
Mike Blumenkrantz [Mon, 7 Jun 2021 13:37:59 +0000 (09:37 -0400)]
aux/cso: always restore states in atom order

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12571>

2 years agozink: destroy shader modules on program free to avoid leaking
Mike Blumenkrantz [Tue, 31 Aug 2021 18:21:30 +0000 (14:21 -0400)]
zink: destroy shader modules on program free to avoid leaking

it's irrelevant whether the shader pointer is valid, the shader cache
may still exist

Fixes: a92442225ca ("zink: split up shader cache per-stage")

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12650>

2 years agolavapipe: Use generated command queue code
Tomeu Vizoso [Fri, 13 Aug 2021 08:48:20 +0000 (10:48 +0200)]
lavapipe: Use generated command queue code

Most of the code that implements entry points for commands doesn't need
to be manually written. So just drop it.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12369>

2 years agovulkan: Generate entrypoints that enqueue commands
Tomeu Vizoso [Tue, 24 Aug 2021 09:14:33 +0000 (11:14 +0200)]
vulkan: Generate entrypoints that enqueue commands

For drivers such as Lavapipe that record the commands at the execution
stage.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12369>