Thomas H.P. Andersen [Wed, 3 May 2023 18:49:35 +0000 (20:49 +0200)]
vc4: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:49:28 +0000 (20:49 +0200)]
v3d: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:49:21 +0000 (20:49 +0200)]
svga: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:49:11 +0000 (20:49 +0200)]
softpipe: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:49:04 +0000 (20:49 +0200)]
radeonsi: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:48:55 +0000 (20:48 +0200)]
r600: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:48:48 +0000 (20:48 +0200)]
r300: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:48:40 +0000 (20:48 +0200)]
nouveau: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:48:34 +0000 (20:48 +0200)]
llvmpipe: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:48:20 +0000 (20:48 +0200)]
i915: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:48:12 +0000 (20:48 +0200)]
freedreno: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:48:01 +0000 (20:48 +0200)]
etnaviv: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:47:51 +0000 (20:47 +0200)]
d3d12: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Wed, 3 May 2023 18:47:13 +0000 (20:47 +0200)]
aux: remove unused tgsi includes
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22838>
Thomas H.P. Andersen [Thu, 4 May 2023 09:50:59 +0000 (11:50 +0200)]
tgsi: delete unused functions
None of these are in use
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22864>
Erik Faye-Lund [Mon, 8 May 2023 07:54:46 +0000 (09:54 +0200)]
nir: use nir_fsub_imm
Now that we have nir_fsub_imm, let's use it to save some typing!
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
Erik Faye-Lund [Mon, 8 May 2023 07:07:53 +0000 (09:07 +0200)]
nir: add nir_fsub_imm
This is similar to nir_isub_imm, but for floats.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
Erik Faye-Lund [Tue, 9 May 2023 22:53:24 +0000 (23:53 +0100)]
nir: use more nir_ffma_imm variants
nir_ffma_imm has several variants that allows specific arguments to be
immediates. Use them for simplicity.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
Erik Faye-Lund [Mon, 8 May 2023 08:12:56 +0000 (10:12 +0200)]
nir: fsub -> fadd_imm
When doing nir_fsub(b, x, imm), we can negate the immediate value, and
replace the fsub with nir_fadd_imm() and get the same result. This makes
the code a bit shorter and easier to read.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
Erik Faye-Lund [Mon, 8 May 2023 07:57:56 +0000 (09:57 +0200)]
nir: use more nir_fadd_imm
This makes the code a bit easier to read.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
Erik Faye-Lund [Sat, 6 May 2023 06:49:32 +0000 (08:49 +0200)]
nir: use more nir_fmul_imm
This simplifies things a bit. Note that in some cases, the arguments are
swapped, because multiplications are commutative, and nir_fmul_imm only
allows the second operand to be an immediate.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23179>
Dave Airlie [Wed, 24 May 2023 23:37:39 +0000 (09:37 +1000)]
radv/video: use correct h264 levels
This should be set to the enum, ffmpeg has it wrong so far, but the sample decoder has it right.
convert radv to the proper answer.
Fixes:
1693c03a3963 ("radv/video: add initial h264 decoder for VCN")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23225>
Julia Tatz [Wed, 24 May 2023 23:51:29 +0000 (19:51 -0400)]
zink: Implement PIPE_CAP_RESOURCE_FROM_USER_MEMORY
Needed for GL_AMD_pinned_memory & zero-copy support in opencl
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23199>
Marek Olšák [Wed, 24 May 2023 21:28:17 +0000 (17:28 -0400)]
winsys/radeon: set more radeon_info fields
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23221>
Marek Olšák [Wed, 24 May 2023 21:30:43 +0000 (17:30 -0400)]
winsys/radeon: fix the scratch buffer on gfx6-7
I'm sure this was broken.
Fixes:
1bf39b1f9d115d69 - ac,radeonsi: rework how scratch_waves is used and move it to ac_gpu_info.c
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23221>
Marek Olšák [Wed, 24 May 2023 20:59:10 +0000 (16:59 -0400)]
winsys/radeon: set has_image_opcodes to unbreak gfx6-7
Fixes:
96913bbf3eba74 - ac/surface: force linear image layout for chips not supporting image opcodes
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9073
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23221>
Jesse Natalie [Wed, 24 May 2023 18:11:58 +0000 (11:11 -0700)]
dzn: Fix src/dest confusion for some non-bindless descriptor copies
Fixes:
5d2b4ee4 ("dzn: Allocate descriptor sets in buffers for bindless mode")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23218>
Jesse Natalie [Wed, 24 May 2023 17:54:08 +0000 (10:54 -0700)]
dzn: Don't expose copy queues
Vulkan says you can do things like image resolves or blits on transfer
queues, but D3D only allows literal copies. We could try to emulate
a Vulkan transfer-only queue backed by multiple D3D queues, where we
use the copy queue when possible but fall back to compute when needed,
but let's wait until there's a good reason to do that...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23218>
Jesse Natalie [Wed, 24 May 2023 17:41:40 +0000 (10:41 -0700)]
dzn: Partial revert of
8887852d
Turns out there was a good reason for having both buffer count
and desc_count. They served different purposes.
Fixes:
8887852d ("dzn: Add some docs around descriptor sets and remove redundant/unused data")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23218>
Jesse Natalie [Wed, 24 May 2023 16:54:14 +0000 (09:54 -0700)]
dzn: Fix inverted assert
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23218>
Jesse Natalie [Wed, 24 May 2023 16:51:45 +0000 (09:51 -0700)]
dzn: Add a no-bindless debug flag
Forcing bindless on is nice for apps that don't use EXT_descriptor_indexing,
but for the CTS, whenever EXT_descriptor_indexing is supported, it's used.
To be able to more thoroughly test the not-bindless path, add a debug flag
to turn it off.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23218>
Frank Binns [Mon, 22 May 2023 12:10:45 +0000 (13:10 +0100)]
pvr: fix invalid read reported by valgrind
pvr_gpu_upload() can't be used in the case of pvr_gpu_upload_usc() as it expects
the source and destination buffers to be the same size. This isn't the case
because pvr_gpu_upload_usc() adds some padding bytes to the size passed in by
the caller.
Fixes:
547a10f8702 ("pvr: switch pvr_cmd_buffer_alloc_mem to use pvr_bo_suballoc")
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23185>
Caleb Cornett [Wed, 24 May 2023 01:11:43 +0000 (21:11 -0400)]
d3d12: Fix Xbox frame scheduling for interval != 1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23154>
Caleb Cornett [Wed, 24 May 2023 01:11:11 +0000 (21:11 -0400)]
wgl: Add BITMAPV5HEADER to stw_gdishim.h
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23154>
Caleb Cornett [Wed, 24 May 2023 01:10:03 +0000 (21:10 -0400)]
d3d12: Fix Xbox GDK build errors
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23154>
Patrick Lerda [Sat, 20 May 2023 15:12:34 +0000 (17:12 +0200)]
glthread: fix typo related to upload_vertices()
Fixes:
68a926a15b7b ("glthread: set GL_OUT_OF_MEMORY if we fail to upload vertices")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23166>
Marek Olšák [Thu, 18 May 2023 21:22:27 +0000 (17:22 -0400)]
ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT
excluding: aco, radv, addrlib
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23113>
Eric Engestrom [Wed, 24 May 2023 14:09:38 +0000 (15:09 +0100)]
ci/zink: add new zink-radv-navi10-valve flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23215>
David Heidelberg [Wed, 24 May 2023 14:52:40 +0000 (16:52 +0200)]
ci/freedreno: rename piglit job to respresent the real testing it does
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23211>
David Heidelberg [Wed, 24 May 2023 14:51:43 +0000 (16:51 +0200)]
ci/freedreno: disable 3 jobs to match our farm 3 devices down
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23211>
Marek Olšák [Thu, 18 May 2023 20:50:50 +0000 (16:50 -0400)]
mesa: fix a VBO buffer reference leak in _mesa_bind_vertex_buffer
Fixes:
03ba57c6c53214b19 - mesa: extend _mesa_bind_vertex_buffer to take ownership of the buffer reference
Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23112>
Samuel Pitoiset [Wed, 24 May 2023 15:09:30 +0000 (17:09 +0200)]
zink/ci: update VANGOGH expected list of failures
arb_pipeline_statistics_query-frag is passing now. VRS flat shading
was the culprit and since smooth lines, it's disabled because
gl_SampleMaskIn is read. Incredible.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23212>
Rhys Perry [Wed, 12 Apr 2023 15:00:10 +0000 (16:00 +0100)]
aco: consider how definitions fixed to operands can change register demand
Usually the register demand before an instruction would be considered part
of the previous instruction, since it's not greater than the register
demand for that previous instruction. Except, it can be greater in the
case of an definition fixed to a non-killed operand: the RA needs to
reserve space between the two instructions for the definition (containing
a copy of the operand).
fossil-db (navi21):
Totals from 5 (0.00% of 135636) affected shaders:
PreVGPRs: 35 -> 40 (+14.29%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8807
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22446>
Rhys Perry [Wed, 12 Apr 2023 14:50:57 +0000 (15:50 +0100)]
aco: add get_op_fixed_to_def() helper
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22446>
Lionel Landwerlin [Sat, 8 Apr 2023 20:21:29 +0000 (23:21 +0300)]
anv: implement EDS2.extendedDynamicState2PatchControlPoints
We make the compiler assume the worst possible case (it's not great
because we have to burn 32 GRFs of potential input data) and then we
push the actual value through push constants.
This enables VK_EXT_gpl usage on zink, which causes two traces to change
their results. Raven is an imperceptible change, blender has missing
original pngs but looks plausible.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22378>
Lionel Landwerlin [Sat, 8 Apr 2023 18:34:35 +0000 (21:34 +0300)]
intel/fs: make tcs input_vertices dynamic
We need to do 3 things to accomplish this :
1. make all the register access consider the maximal case when
unknown at compile time
2. move the clamping of load_per_vertex_input prior to lowering
nir_intrinsic_load_patch_vertices_in (in the dynamic cases, the
clamping will use the nir_intrinsic_load_patch_vertices_in to
clamp), meaning clamping using derefs rather than lowered
nir_intrinsic_load_per_vertex_input
3. in the known cases, lower nir_intrinsic_load_patch_vertices_in
in NIR (so that the clamped elements still be vectorized to the
smallest number of URB read messages)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22378>
Mike Blumenkrantz [Tue, 23 May 2023 17:58:09 +0000 (13:58 -0400)]
zink: use the per-context track_renderpasses flag in more places
this should fix some erroneous zsbuf invalidation
Fixes:
215beee16d9 ("zink: more explicitly track/check rp optimizing per-context")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23189>
Mike Blumenkrantz [Tue, 23 May 2023 13:30:59 +0000 (09:30 -0400)]
zink: don't wait on queue thread if disabled
Fixes:
270f9c0b063 ("zink: add ZINK_DEBUG=flushsync")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23189>
Alyssa Rosenzweig [Tue, 23 May 2023 22:19:03 +0000 (18:19 -0400)]
nir: Drop stale comments
Follow-on clean up after
01e9ee79f70 ("nir: Drop unused name from
nir_ssa_dest_init"). The referenced argument no longer exists.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
Alyssa Rosenzweig [Tue, 23 May 2023 18:13:00 +0000 (14:13 -0400)]
agx: Use common combine_all_barriers callback
This contains a bugfix: execution scopes are now respected when combining
barriers. Otherwise control barriers can disappear during combining, which is
wrong.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
Alyssa Rosenzweig [Tue, 23 May 2023 18:12:19 +0000 (14:12 -0400)]
nir/opt_barriers: Add a default callback
Absent any knowledge about the hardware, if the backend wants to combine
barriers we should try to combine all barriers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
Alyssa Rosenzweig [Tue, 23 May 2023 14:10:47 +0000 (10:10 -0400)]
treewide: Avoid nir_lower_regs_to_ssa calls
nir_registers are only supposed to be used temporarily. They may be created by a
producer, but then must be immediately lowered prior to optimizing the produced
shader. They may be created internally by an optimization pass that doesn't want
to deal with phis, but that pass needs to lower them back to phis immediately.
Finally they may be created when going out-of-SSA if a backend chooses, but that
has to happen late.
Regardless, there should be no case where a backend sees a shader that comes in
with nir_registers needing to be lowered. The two frontend producers of
registers (tgsi_to_nir and mesa/st) both call nir_lower_regs_to_ssa to clean up
as they should. Some backend (like intel) already depend on this behaviour.
There's no need for other backends to call nir_lower_regs_to_ssa too.
Drop the pointless calls as a baby step towards replacing nir_register.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23181>
José Roberto de Souza [Tue, 9 May 2023 17:28:07 +0000 (10:28 -0700)]
iris: Replace aperture_bytes by sram size in iris_resource_create_for_image() for PIPE_USAGE_STAGING
All platforms supported by Iris will have aperture_bytes set as 4Gb.
Also this value is not the actual aperture in i915, it actualy is the
GGTT size.
So here replacing it by the sram size, something that will vary
depending in the amount of RAM available.
This fix some tests with Xe KMD, as it is not setting aperture_bytes.
And will not do that as there is no UAPI to fetch this information
and it is not planned to it to Xe UAPI.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Ack-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22969>
Alejandro Piñeiro [Wed, 24 May 2023 09:58:51 +0000 (11:58 +0200)]
broadcom/compiler: disable tmu pipelining when needed
disable_tmu_pipelining has been recently set to false on two
strategies that should set it to true.
Fixes the following CTS test:
dEQP-VK.graphicsfuzz.spv-stable-maze-flatten-copy-composite
Fixes:
c950098ab - broadcom/compiler: move buffer loads to lower register pressure
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23207>
Julia Tatz [Wed, 15 Feb 2023 05:39:57 +0000 (00:39 -0500)]
zink: Implement PIPE_CAP_OPENCL_INTEGER_FUNCTIONS and PIPE_CAP_INTEGER_MULTIPLY_32X16.
Enables GL_INTEL_shader_integer_functions2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23197>
Alejandro Piñeiro [Wed, 24 May 2023 08:43:55 +0000 (10:43 +0200)]
v3d: assert if v3d_compile returns NULL
Ideally we would like to trigger a compilation error like we do on
v3dv (VK_ERROR_UNKNOWN). But with v3d we can't really do that, as this
could happen on a draw call. Let's at least assert so debug builds
stops at this point.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23203>
Alejandro Piñeiro [Wed, 24 May 2023 08:32:59 +0000 (10:32 +0200)]
broadcom/compiler: return NULL if we fail to register allocate
Right now if we fail to register allocate, we return the qpu_insts
that we had at that point, even if the driver can't really use it.
Also v3dv_pipeline was already assuming that it would return NULL on
failure, returning VK_ERROR_UNKNOWN on that case.
This allows CTS tests with a lot of pressure, that regress now and
then to not being able to allocate, to finish with an error, instead
of blocking forever. For example:
dEQP-VK.graphicsfuzz.spv-stable-maze-flatten-copy-composite
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23203>
Patrick Lerda [Mon, 8 May 2023 16:02:44 +0000 (18:02 +0200)]
mesa: fix refcnt imbalance related to egl_image_target_texture()
Indeed, the locally allocated "stimg" reference was not freed
on a specific code path.
For instance, this issue is triggered on radeonsi or r600 with:
"piglit/bin/egl-ext_egl_image_storage -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.
Fixes:
6a3f5c65128b ("mesa: simplify st_egl_image binding process for texture storage")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23165>
Eric Engestrom [Wed, 24 May 2023 11:44:57 +0000 (12:44 +0100)]
ci/amd: don't override the b2c timeout in the steamdeck config
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23206>
Eric Engestrom [Wed, 24 May 2023 09:45:00 +0000 (10:45 +0100)]
ci/b2c: increase timeout to 5 minutes
We've been trying to get podman to output its progress while it downloads
images so that we don't think it's stuck, but until we manage to do that,
a longer timeout means fewer inaccurate timeouts.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23206>
Iago Toral Quiroga [Wed, 24 May 2023 07:00:48 +0000 (09:00 +0200)]
v3dv: align compressed image regions to block size
This fixes an assert crash in UE4 when forcing the blit path for
image copies, caused by an image copy of a small miplevel which
pixel size is smaller than a single compressed block, leading to
an empty blit region.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23180>
Iago Toral Quiroga [Mon, 22 May 2023 11:55:45 +0000 (13:55 +0200)]
v3dv: allow TFU transfers for mip levels other than 0
We had a check to ensure we were copying full slices, but the
size check was done against the base mip level, so in practice
we were only using the TFU for mip 0.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23180>
Iago Toral Quiroga [Mon, 22 May 2023 11:55:14 +0000 (13:55 +0200)]
v3dv: store slice dimensions in pixels
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23180>
Samuel Pitoiset [Tue, 23 May 2023 16:50:52 +0000 (18:50 +0200)]
radv: do not enable VRS flat shading if the VRS builtin is read
When the fragment shader reads the VRS builtin, VRS flat shading
shouldn't be enabled, otherwise the value might not be what the FS
expects.
Fixes dEQP-VK.fragment_shading_rate.renderpass2.monolithic.multipass.*
on RDNA2 (VRS flat shading isn't yet enabled on RDNA3).
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23187>
Corentin Noël [Tue, 23 May 2023 15:13:07 +0000 (17:13 +0200)]
nir: Propagate the type sampler type change to the used variable.
Avoid keeping a mismatching type between the sampler declaration and its
use.
In the case of virgl, we were hitting sanity checks when running the
spec@arb_fragment_program_shadow@tex-shadow2dnotdepth piglit test.
Fixes:
0843d4cbc3546a80d76109c892a1e1a3b847dd55
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23183>
Dave Airlie [Mon, 22 May 2023 03:13:25 +0000 (13:13 +1000)]
radv/video: add missing space checks for video.
Fixes:
7893040f807f ("radv: Add stricter space checks.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23158>
Tapani Pälli [Tue, 23 May 2023 05:28:40 +0000 (08:28 +0300)]
mesa: validate shader binary format in _mesa_spirv_shader_binary
Rework:
* Jordan: Added ARB_gl_spirv text to comment.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23155>
Lionel Landwerlin [Fri, 19 May 2023 18:34:46 +0000 (21:34 +0300)]
iris: use COMPUTE_WALKER post sync field to track compute work
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
Lionel Landwerlin [Fri, 19 May 2023 14:01:23 +0000 (17:01 +0300)]
anv: use COMPUTE_WALKER post sync field to track compute work
This is more accurate than PIPE_CONTROL as it won't introduce stalls
between the compute dispatches.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
Lionel Landwerlin [Fri, 19 May 2023 12:36:40 +0000 (15:36 +0300)]
anv: move timestamp vfunc initialization to genX code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
Gert Wollny [Wed, 24 May 2023 04:56:08 +0000 (06:56 +0200)]
docs/features: fix empty line error
Fixes: cbb144c (virgl: Add support for ARB_pipeline_statistics)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23195>
Tapani Pälli [Wed, 18 Jan 2023 12:11:53 +0000 (14:11 +0200)]
iris: add required invalidate/flush for Wa_14014427904
This WA impacts skus with multiple CCS, e.g. ATS-M. According to
description, we need to add a pipe control before following NP state
commands:
STATE_BASE_ADDRESS
3DSTATE_BTD
CHROMA_KEY
STATE_SIP
STATE_COMPUTE_MODE
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
Tapani Pälli [Wed, 18 Jan 2023 12:33:27 +0000 (14:33 +0200)]
anv: add required invalidate/flush for Wa_14014427904
This WA impacts skus with multiple CCS, e.g. ATS-M. According to
description, we need to add a pipe control before following NP state
commands:
STATE_BASE_ADDRESS
3DSTATE_BTD
CHROMA_KEY
STATE_SIP
STATE_COMPUTE_MODE
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
Tapani Pälli [Wed, 22 Feb 2023 07:53:43 +0000 (09:53 +0200)]
intel/dev: provide helper to check if devinfo is ATS-M
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
Rob Clark [Sat, 20 May 2023 00:28:51 +0000 (17:28 -0700)]
freedreno/batch: Move submit bo tracking to batch
We already do _most_ of the tracking of rsc associated with a batch at
the batch level. If we manually add the handful of BOs that aren't part
of the resource tracking, we can drop the duplicate drm level tracking.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Rob Clark [Sat, 20 May 2023 14:31:39 +0000 (07:31 -0700)]
freedreno/a6xx: Optimize max_indices calculation
Turn draw-time udiv into two shifts.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Rob Clark [Fri, 19 May 2023 02:45:03 +0000 (19:45 -0700)]
freedreno/a6xx: Template specialization for pipeline type
There are a bunch of extra steps for draws that involve GS and/or tess
stages. But we can use template specialization to skip all that when
there is no GS/tess shader stage bound.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Rob Clark [Fri, 19 May 2023 01:13:20 +0000 (18:13 -0700)]
freedreno/a6xx: Template specialization for draw type
Convert various run-time conditionals into a single draw type
determination, and use template specialization to generate unique
optimized code paths for each. This also lets us fold the WFM needed
in some cases into normal barrier flushes.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Rob Clark [Sat, 20 May 2023 13:37:32 +0000 (06:37 -0700)]
mesa: Skip update_gl_clamp() if samplers need clamp
update_gl_clamp() was ~12% of drawoverhead -test 40.. this turns it into
a no-op when no clamp lowering is needed.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
Lucas Fryzek [Fri, 19 May 2023 15:40:51 +0000 (11:40 -0400)]
broadcom: Fix slice memory allocation logic for compressed textures
Compressed textures require their width and height padding to be
calculated based on the number of blocks in the image. This change ensures
that the number of blocks in the texture is a POT for mip levels > 1.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23133>
Lucas Fryzek [Fri, 5 May 2023 18:44:50 +0000 (14:44 -0400)]
broadcom: Add support for VK_FORMAT_A2R10G10B10_UNORM_PACK32
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23133>
Eric Engestrom [Tue, 23 May 2023 20:27:55 +0000 (21:27 +0100)]
docs: update calendar for 23.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23193>
Eric Engestrom [Tue, 23 May 2023 20:22:03 +0000 (21:22 +0100)]
docs: add release notes for 23.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23193>
Alyssa Rosenzweig [Tue, 23 May 2023 17:44:11 +0000 (13:44 -0400)]
dxil: Rely on scoped_barrier
We don't get non-scoped barriers. Don't handle them.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23188>
Filip Gawin [Tue, 23 May 2023 09:25:01 +0000 (11:25 +0200)]
ac/nir: fix slots in clamping legacy colors
fixes:
7c41cdb81f564ef52404e5f313ccfe2d723896e6
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23178>
Mike Blumenkrantz [Wed, 17 May 2023 12:37:49 +0000 (08:37 -0400)]
lavapipe: VK_EXT_pageable_device_local_memory
the memory guarantees of this extension should be implicit to linux systems
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Mike Blumenkrantz [Wed, 17 May 2023 12:36:32 +0000 (08:36 -0400)]
lavapipe: store memory allocation size onto lvp_device_memory
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Mike Blumenkrantz [Wed, 17 May 2023 12:26:24 +0000 (08:26 -0400)]
lavapipe: EXT_memory_priority
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Mike Blumenkrantz [Wed, 17 May 2023 11:47:06 +0000 (07:47 -0400)]
lavapipe: EXT_memory_budget
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Mike Blumenkrantz [Wed, 17 May 2023 11:46:12 +0000 (07:46 -0400)]
lavapipe: report full memory in heap for 64bit processes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Mike Blumenkrantz [Wed, 17 May 2023 11:33:38 +0000 (07:33 -0400)]
lavapipe: bump memory allocation heap to 3GiB
this should still be a safe limit on all systems and archs
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
Erik Faye-Lund [Sun, 21 May 2023 15:08:54 +0000 (17:08 +0200)]
util: mark externally-unused functions as static
These functions aren't used outside of sha1.c, so let's remove the
prototypes from the header-file, and mark the definitions as static.
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23163>
Ruijing Dong [Tue, 16 May 2023 15:47:09 +0000 (11:47 -0400)]
frontends/va: remove private member and update target buffer
use update_decoder_target to update the target buffer to
let decoder obtain correct reference frame.
remove the previous logic which failed to update reference
info in time.
fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8996
fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8387
Cc: mesa-stable
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
Ruijing Dong [Tue, 23 May 2023 13:52:40 +0000 (09:52 -0400)]
radeonsi/vcn: apply update_decoder_target logic
implement update_decoder_target and
remove corresponding obsolete logic.
Cc: mesa-stable
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
Ruijing Dong [Tue, 23 May 2023 13:47:59 +0000 (09:47 -0400)]
gallium/pipe: add interface update_decoder_target
reason:
decoder uses the target buffer address in record
to indentify the reference frames. When target
buffer has changed outside of decoding process,
it has to be updated back to decoder, otherwise
the outdated reference will cause image corruption.
Cc: mesa-stable
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
Dave Airlie [Tue, 2 May 2023 20:42:36 +0000 (06:42 +1000)]
ci: reenable lavapipe
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22806>
Ryan Houdek [Mon, 22 May 2023 20:58:56 +0000 (22:58 +0200)]
util: move check for AVX512
As a side effect solve:
```
[91/1401] Compiling C object src/util/libmesa_util.a.p/u_cpu_detect.c.o
../src/util/u_cpu_detect.c: In function '_util_cpu_detect_once':
../src/util/u_cpu_detect.c:889:11: warning: 'regs2[2]' may be used uninitialized [-Wmaybe-uninitialized]
889 | if (((regs2[2] >> 27) & 1) && // OSXSAVE
| ^~~~~~~~~~~~~~~~~~~~~~
../src/util/u_cpu_detect.c:823:16: note: 'regs2[2]' was declared here
823 | uint32_t regs2[4];
| ^~~~~
```
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23164>
Eric Engestrom [Mon, 22 May 2023 18:51:15 +0000 (19:51 +0100)]
util/bitset: ensure the sets compared have the same size at compile time
Instead of checking this at run time.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23171>
Eric Engestrom [Fri, 12 May 2023 15:46:34 +0000 (16:46 +0100)]
ci: only execute capture-devcoredump.sh when it's present
Avoids this error:
./install/common/init-stage2.sh: line 130: /capture-devcoredump.sh: No such file or directory
One step closer to an error-free CI and being able to `set -e`.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22992>
Dave Airlie [Fri, 19 May 2023 00:29:23 +0000 (10:29 +1000)]
lvp: use stage iterator macros instead of explicit loops
This cleans up the compute checks
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>