platform/upstream/llvm.git
3 years ago[mlir][vector] Move splitting transfer ops into a separate entry point
Lei Zhang [Tue, 16 Feb 2021 15:00:32 +0000 (10:00 -0500)]
[mlir][vector] Move splitting transfer ops into a separate entry point

These patterns unrolls transfer read/write ops if the vector consumers/
producers are extract/insert slices op. Transfer ops can map to hardware
load/store functionalities, where the vector size matters for bandwidth
considerations. So these patterns should be collected separately, instead
of being generic canonicalization patterns.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96782

3 years ago[libc++] Build thread_win32.cpp only if LIBCXX_HAS_PTHREAD_API is not set
Colin Finck [Tue, 16 Feb 2021 15:03:04 +0000 (10:03 -0500)]
[libc++] Build thread_win32.cpp only if LIBCXX_HAS_PTHREAD_API is not set

This allows building libc++ against winpthreads from mingw-w64 to support
operating systems older than Windows 7. The remaining libc++ code already
supports `WIN32` with `LIBCXX_HAS_PTHREAD_API`.

Note that there is also the older "pthreads-win32". However, that support
library implements `pthread_t` as a struct, which violates the libc++
assumption that `pthread_t` is always a scalar and can be compared,
ordered, and set to zero.

Differential Revision: https://reviews.llvm.org/D96339

3 years ago[mlir][vector] Add support for unrolling vector.fma
Lei Zhang [Tue, 16 Feb 2021 14:56:01 +0000 (09:56 -0500)]
[mlir][vector] Add support for unrolling vector.fma

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96781

3 years ago[lldb/test] Test lldb-server named pipe functionality on windows
Pavel Labath [Mon, 8 Feb 2021 09:28:42 +0000 (10:28 +0100)]
[lldb/test] Test lldb-server named pipe functionality on windows

lldb-server can use a named pipe to communicate the port number it is
listening on. This windows bits of this are already implemented, but we
did not have a test for that, most likely because python does not have
native pipe functionality.

This patch implements the windows bits necessary to test this. I'm using
the ctypes package to call the native APIs directly to avoid a
dependency to non-standard python packages. This introduces some amount
of boilerplate, but our named pipe use case is fairly limited, so we
should not end up needing to wrap large chunks of windows APIs.

Surprisingly to changes to lldb-server were needed to make the test
pass.

Differential Revision: https://reviews.llvm.org/D96260

3 years ago[clangd] Give modules access to filesystem, scheduler, and index.
Sam McCall [Mon, 15 Feb 2021 19:26:48 +0000 (20:26 +0100)]
[clangd] Give modules access to filesystem, scheduler, and index.

This finally makes it possible to implement useful modules.

Differential Revision: https://reviews.llvm.org/D96726

3 years ago[gn build] Port 40cc63ea6eec
LLVM GN Syncbot [Tue, 16 Feb 2021 14:23:58 +0000 (14:23 +0000)]
[gn build] Port 40cc63ea6eec

3 years ago[clangd] Modules can have a public API. NFC
Sam McCall [Mon, 15 Feb 2021 20:43:11 +0000 (21:43 +0100)]
[clangd] Modules can have a public API. NFC

Differential Revision: https://reviews.llvm.org/D96730

3 years ago[NFC][LoopInterchange] Explicitly pass both `InnerLoop` and `OuterLoop` to `processLoop`
Ta-Wei Tu [Tue, 16 Feb 2021 14:16:53 +0000 (22:16 +0800)]
[NFC][LoopInterchange] Explicitly pass both `InnerLoop` and `OuterLoop` to `processLoop`

This is a split patch of D96644.

Explicitly pass both `InnerLoop` and `OuterLoop` to function `processLoop` to remove the need to swap elements in loop list and allow making loop list an `ArrayRef`.
Also, fix inconsistent spellings of `OuterLoopId` and `Inner Loop Id` in debug log.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D96650

3 years ago[llvm][Aarch64][SVE] Remove extra fmov instruction with certain literals
David Truby [Tue, 16 Feb 2021 14:15:28 +0000 (14:15 +0000)]
[llvm][Aarch64][SVE] Remove extra fmov instruction with certain literals

When a literal that cannot fit in the immediate form of the fmov instruction
is used to initialise an SVE vector, an extra unnecessary fmov is currently
generated. This patch adds an extra codegen pattern preventing the extra
instruction from being generated.

Differential Revision: https://reviews.llvm.org/D96700

Co-Authored-By: Paul Walker <paul.walker@arm.com>
3 years ago[clang][cli] Add explicit round-trip test
Jan Svoboda [Tue, 16 Feb 2021 13:41:25 +0000 (14:41 +0100)]
[clang][cli] Add explicit round-trip test

This patch adds a test that verifies all `CompilerInvocation` members are filled correctly during command line round-trip.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D96705

3 years ago[VPlan] Remove unused Phi member from VPWidenPHIRecipe (NFC).
Florian Hahn [Tue, 16 Feb 2021 13:46:01 +0000 (13:46 +0000)]
[VPlan] Remove unused Phi member from VPWidenPHIRecipe (NFC).

The member is not needed any longer after recent changes.

3 years ago[DAG] Avoid APInt copies by directly using the APInt reference from getAPIntValue...
Simon Pilgrim [Tue, 16 Feb 2021 12:40:10 +0000 (12:40 +0000)]
[DAG] Avoid APInt copies by directly using the APInt reference from getAPIntValue. NFCI.

3 years ago[DAG] Use APInt::extractBits instead of lshr().trunc(). NFCI.
Simon Pilgrim [Tue, 16 Feb 2021 12:02:41 +0000 (12:02 +0000)]
[DAG] Use APInt::extractBits instead of lshr().trunc(). NFCI.

Avoids so many APInt instances by directly using the APInt reference from getAPIntValue.

3 years ago[SVE] Add support for scalable vectorization of loops with int/fast FP reductions
Kerry McLaughlin [Tue, 16 Feb 2021 10:43:42 +0000 (10:43 +0000)]
[SVE] Add support for scalable vectorization of loops with int/fast FP reductions

This patch enables scalable vectorization of loops with integer/fast reductions, e.g:

```
unsigned sum = 0;
for (int i = 0; i < n; ++i) {
  sum += a[i];
}
```

A new TTI interface, isLegalToVectorizeReduction, has been added to prevent
reductions which are not supported for scalable types from vectorizing.
If the reduction is not supported for a given scalable VF,
computeFeasibleMaxVF will fall back to using fixed-width vectorization.

Reviewed By: david-arm, fhahn, dmgreen

Differential Revision: https://reviews.llvm.org/D95245

3 years ago[clang][cli] Generate -f[no-]finite-loops arguments
Jan Svoboda [Tue, 16 Feb 2021 13:27:21 +0000 (14:27 +0100)]
[clang][cli] Generate -f[no-]finite-loops arguments

This patch generates the `-f[no-]finite-loops` arguments from `CompilerInvocation` (added in D96419), fixing test failures of Clang built with `-DCLANG_ROUND_TRIP_CC1_ARGS=ON`.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D96761

3 years ago[analyzer] Rework SValBuilder::evalCast function into maintainable and clear way
Denys Petrov [Tue, 16 Feb 2021 12:29:45 +0000 (14:29 +0200)]
[analyzer] Rework SValBuilder::evalCast function into maintainable and clear way

Summary: Refactor SValBuilder::evalCast function. Make the function clear and get rid of redundant and repetitive code. Unite SValBuilder::evalCast, SimpleSValBuilder::dispatchCast, SimpleSValBuilder::evalCastFromNonLoc and SimpleSValBuilder::evalCastFromLoc functions into single SValBuilder::evalCast.
This patch shall not change any previous behavior.

Differential Revision: https://reviews.llvm.org/D90157

3 years ago[flang][driver] Add extension options and -finput-charset
Faris Rehman [Thu, 4 Feb 2021 21:11:22 +0000 (21:11 +0000)]
[flang][driver] Add extension options and -finput-charset

Add the following options:
* -fimplicit-none and -fno-implicit-none
* -fbackslash and -fno-backslash
* -flogical-abbreviations and -fno-logical-abbreviations
* -fxor-operator and -fno-xor-operator
* -falternative-parameter-statement
* -finput-charset=<value>

Summary of changes:
- Enable extensions in CompilerInvocation#ParseFrontendArgs
- Add encoding_ to Fortran::frontend::FrontendOptions
- Add encoding to Fortran::parser::Options

Differential Revision: https://reviews.llvm.org/D96407

3 years ago[mlir] Don't return nullptrs from scf::IfOp::getSuccessorRegions
Tres Popp [Tue, 16 Feb 2021 10:31:41 +0000 (11:31 +0100)]
[mlir] Don't return nullptrs from scf::IfOp::getSuccessorRegions

Previously this might happen if there was no elseRegion and the method
was asked for all successor regions.

Differential Revision: https://reviews.llvm.org/D96764

3 years ago[llvm-symbolizer][test] Add explicit tests for CODE and DATA
James Henderson [Mon, 15 Feb 2021 15:42:31 +0000 (15:42 +0000)]
[llvm-symbolizer][test] Add explicit tests for CODE and DATA

These directives force the associated address to be interpreted as a
function or data respectively. CODE is the default when not specified.

Differential Revision: https://reviews.llvm.org/D96712

Reviewed by: MaskRay

3 years ago[RISCV] Remove unused CHECKs from recent test addition
Fraser Cormack [Tue, 16 Feb 2021 10:33:33 +0000 (10:33 +0000)]
[RISCV] Remove unused CHECKs from recent test addition

These didn't show up as failures locally.

3 years ago[RISCV] Fix a crash in fixed-length build_vector lowering
Fraser Cormack [Mon, 15 Feb 2021 16:35:34 +0000 (16:35 +0000)]
[RISCV] Fix a crash in fixed-length build_vector lowering

Non-splatted non-integer build_vector nodes were mistakenly being
lowered as VID expressions, which should not happen. VID can only be
used to select integer build_vector nodes.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D96718

3 years ago[RISCV] Add patterns for scalable-vector fabs & fcopysign
Fraser Cormack [Thu, 4 Feb 2021 12:07:59 +0000 (12:07 +0000)]
[RISCV] Add patterns for scalable-vector fabs & fcopysign

The patterns mostly follow the scalar counterparts, save for some extra
optimizations to match the vector/scalar forms.

The patch adds a DAGCombine for ISD::FCOPYSIGN to try and reorder
ISD::FNEG around any ISD::FP_EXTEND or ISD::FP_TRUNC of the second
operand. This helps us achieve better codegen to match vfsgnjn.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D96028

3 years ago[flang][driver] Remove unused code (nfc)
Andrzej Warzynski [Tue, 16 Feb 2021 10:00:41 +0000 (10:00 +0000)]
[flang][driver] Remove unused code (nfc)

3 years ago[mlir][Linalg] Generalize vector::transfer hoisting on tensors.
Nicolas Vasilache [Tue, 16 Feb 2021 09:24:28 +0000 (09:24 +0000)]
[mlir][Linalg] Generalize vector::transfer hoisting on tensors.

This revision adds support for hoisting "subtensor + vector.transfer_read" / "subtensor_insert + vector.transfer_write pairs" across scf.for.
The unit of hoisting becomes a HoistableRead / HoistableWrite struct which contains a pair of "vector.transfer_read + optional subtensor" / "vector.transfer_write + optional subtensor_insert".
scf::ForOp canonicalization patterns are applied greedily on the successful application of the transformation to cleanup the IR more eagerly and potentially expose more transformation opportunities.

Differential revision: https://reviews.llvm.org/D96731

3 years ago[flang][driver] Add options for unparsing
Andrzej Warzynski [Thu, 4 Feb 2021 11:14:57 +0000 (11:14 +0000)]
[flang][driver] Add options for unparsing

This patch adds the following compiler frontend driver options:
  * -fdebug-unparse (f18 spelling: -funparse)
  * -fdebug-unparse-with-symbols (f18 spelling: -funparse-with-symbols)
The new driver will only accept the new spelling. `f18` will accept both
the original and the new spelling.

A new base class for frontend actions is added: `PrescanAndSemaAction`.
This is added to reduce code duplication that otherwise these new
options would lead to. Implementation from
  * `ParseSyntaxOnlyAction::ExecutionAction`
is moved to:
  * `PrescanAndSemaAction::BeginSourceFileAction`
This implementation is now shared between:
  * PrescanAndSemaAction
  * ParseSyntaxOnlyAction
  * DebugUnparseAction
  * DebugUnparseWithSymbolsAction

All tests that don't require other yet unimplemented options are
updated. This way `flang-new -fc1` is used instead of `f18` when
`FLANG_BUILD_NEW_DRIVER` is set to `On`. In order to facilitate this,
`%flang_fc1` is added in the LIT configuration (lit.cfg.py).

`asFortran` from f18.cpp is duplicated as `getBasicAsFortran` in
FrontendOptions.cpp. At this stage it's hard to find a good place to
share this method. I suggest that we revisit this once a switch from
`f18` to `flang-new` is complete.

Differential Revision: https://reviews.llvm.org/D96483

3 years ago[SCEVExpander] Migrate costAndCollectOperands to use InstructionCost.
Sander de Smalen [Tue, 16 Feb 2021 08:42:19 +0000 (08:42 +0000)]
[SCEVExpander] Migrate costAndCollectOperands to use InstructionCost.

This patch changes costAndCollectOperands to use InstructionCost for
accumulated cost values.

isHighCostExpansion will return true if the cost has exceeded the budget.

Reviewed By: CarolineConcatto, ctetreau

Differential Revision: https://reviews.llvm.org/D92238

3 years agoLower math.expm1 to intrinsics in the GPUToNVVM and GPUToROCDL conversions.
Adrian Kuegel [Tue, 16 Feb 2021 08:18:34 +0000 (09:18 +0100)]
Lower math.expm1 to intrinsics in the GPUToNVVM and GPUToROCDL conversions.

This adds the lowering for expm1 for GPU backends.

Differential Revision: https://reviews.llvm.org/D96756

3 years ago[flang][f18] Make -fdebug-dump-{symbols|parse-tree} imply -fsyntax-only
Andrzej Warzynski [Thu, 11 Feb 2021 18:28:25 +0000 (18:28 +0000)]
[flang][f18] Make -fdebug-dump-{symbols|parse-tree} imply -fsyntax-only

The following _action_ options are always used with `-fsyntax-only`
(also an _action_ option):
  * -fdebug-dump-symbols
  * -fdebug-dump-parse-tree
This patch makes the above options imply `-fsyntax-only`.

From the perspective of `f18` this change saves typing and is otherwise
a non-functional change. But it will simplify things in the new driver,
`flang-new`, in which only the last action option is taken into account
and executed. In other words, the following would only run
`-fsyntax-only`:
```
flang-new -fdebug-dump-symbols -fsyntax-only <input>
```
whereas this would only run `-fdebug-dump-symbols`:
```
flang-new -fsyntax-only -fdebug-dump-symbols <input>
```

Differential Revision: https://reviews.llvm.org/D96528

3 years ago[gn build] Port 9510b0940265
LLVM GN Syncbot [Tue, 16 Feb 2021 09:12:07 +0000 (09:12 +0000)]
[gn build] Port 9510b0940265

3 years ago[clangd] Factor out the heuristic resolver code into its own class
Nathan Ridge [Mon, 18 Jan 2021 07:58:43 +0000 (02:58 -0500)]
[clangd] Factor out the heuristic resolver code into its own class

The patch also does some cleanup on the interface of the entry
points from TargetFinder into the heuristic resolution code.

Since the heuristic resolver is created in a place where the
ASTContext is available, it can store the ASTContext and the
NameFactory hack can be removed.

Differential revision: https://reviews.llvm.org/D92290

3 years ago[VPlan] Manage scalarized values using VPValues.
Florian Hahn [Tue, 16 Feb 2021 09:04:10 +0000 (09:04 +0000)]
[VPlan] Manage scalarized values using VPValues.

This patch updates codegen to use VPValues to manage the generated
scalarized instructions.

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D92285

3 years agoAdd Expm1 op to the math dialect.
Adrian Kuegel [Mon, 15 Feb 2021 12:56:12 +0000 (13:56 +0100)]
Add Expm1 op to the math dialect.

Differential Revision: https://reviews.llvm.org/D96704

3 years ago[mlir] Drop reliance of SliceAnalysis on specific ops.
Nicolas Vasilache [Mon, 15 Feb 2021 21:44:44 +0000 (21:44 +0000)]
[mlir] Drop reliance of SliceAnalysis on specific ops.

SliceAnalysis originally was developed in the context of affine.for within mlfunc.
It predates the notion of region.
This revision updates it to not hardcode specific ops like scf::ForOp.
When rooted at an op, the behavior of the slice computation changes as it recurses into the regions of the op. This does not support gathering all values transitively depending on a loop induction variable anymore.
Additional variants rooted at a Value are added to also support the existing behavior.

Differential revision: https://reviews.llvm.org/D96702

3 years ago[NewPM] Introduce (GPU)DivergenceAnalysis in the new pass manager
Sameer Sahasrabuddhe [Tue, 16 Feb 2021 04:56:45 +0000 (10:26 +0530)]
[NewPM] Introduce (GPU)DivergenceAnalysis in the new pass manager

The GPUDivergenceAnalysis is now renamed to just "DivergenceAnalysis"
since there is no conflict with LegacyDivergenceAnalysis. In the
legacy PM, this analysis can only be used through the legacy DA
serving as a wrapper. It is now made available as a pass in the new
PM, and has no relation with the legacy DA.

The new DA currently cannot handle irreducible control flow; its
presence can cause the analysis to run indefinitely. The analysis is
now modified to detect this and report all instructions in the
function as divergent. This is super conservative, but allows the
analysis to be used without hanging the compiler.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D96615

3 years ago[debugserver] Correctly pass argv[0] to execl
Jonas Devlieghere [Tue, 16 Feb 2021 02:38:21 +0000 (18:38 -0800)]
[debugserver] Correctly pass argv[0] to execl

The execl function takes both the executable and argv[0].

3 years ago[lldb] Remove very old misleading comment (NFC)
Dave Lee [Tue, 16 Feb 2021 02:14:47 +0000 (18:14 -0800)]
[lldb] Remove very old misleading comment (NFC)

3 years ago[lldb] Remove unused ThreadPlan tracer utilities (NFC)
Dave Lee [Sat, 13 Feb 2021 23:48:05 +0000 (15:48 -0800)]
[lldb] Remove unused ThreadPlan tracer utilities (NFC)

Delete unused `EnableTracer()` and `SetTracer()` functions on `Thread`. By deleting
these, their `ThreadPlan` counterparts also become unused.

Then, by deleting `ThreadPlanStack::EnableTracer`, `EnableSingleStep` becomes unused.
With no more callers to `EnableSingleStep`, the value `m_single_step` is always true and
can be removed as well.

Differential Revision: https://reviews.llvm.org/D96666

3 years ago[lldb] Lower GetRealStopInfo into ThreadPlanCallFunction (NFC)
Dave Lee [Mon, 15 Feb 2021 06:59:31 +0000 (22:59 -0800)]
[lldb] Lower GetRealStopInfo into ThreadPlanCallFunction (NFC)

`GetRealStopInfo` has only one call site, and in that call site a reference to the
concrete thread plan is available (`ThreadPlanCallUserExpression`), from which
`GetRealStopInfo` can be called.

Differential Revision: https://reviews.llvm.org/D96687

3 years ago[lldb] Minor refinements to ThreadPlan::RestoreThreadState (NFC)
Dave Lee [Mon, 15 Feb 2021 06:49:16 +0000 (22:49 -0800)]
[lldb] Minor refinements to ThreadPlan::RestoreThreadState (NFC)

Correct `RestoreThreadState` to a `void` return type. Also, update the signature of its
callee, `Thread::RestoreThreadStateFromCheckpoint`, by updating it to a `void` return
type, and making it non-`virtual`.

Differential Revision: https://reviews.llvm.org/D96688

3 years ago[ObjC][ARC] Do not perform code motion on precise release calls
Akira Hatanaka [Tue, 16 Feb 2021 01:39:36 +0000 (17:39 -0800)]
[ObjC][ARC] Do not perform code motion on precise release calls

This fixes a bug where an object can get deallocated before reaching the
end of its full formal lifetime.

rdar://72110887
rdar://74123176

3 years ago[CodeGen] Use range-based for loops (NFC)
Kazu Hirata [Mon, 15 Feb 2021 22:46:10 +0000 (14:46 -0800)]
[CodeGen] Use range-based for loops (NFC)

3 years ago[Support] Use ListSeparator (NFC)
Kazu Hirata [Mon, 15 Feb 2021 22:46:09 +0000 (14:46 -0800)]
[Support] Use ListSeparator (NFC)

3 years ago[LazyCallGraph] Remove forward declarations of nonexistent classes (NFC)
Kazu Hirata [Mon, 15 Feb 2021 22:46:07 +0000 (14:46 -0800)]
[LazyCallGraph] Remove forward declarations of nonexistent classes (NFC)

3 years ago[RISCV] Add expicit i32/i64 types to RV32 or RV64 only isel patterns. NFC
Craig Topper [Mon, 15 Feb 2021 22:23:42 +0000 (14:23 -0800)]
[RISCV] Add expicit i32/i64 types to RV32 or RV64 only isel patterns. NFC

This stops tablegen from generating patterns with the opposite type
in the opposite HwMode. This just adds wasted bytes to the isel table.

This reduces the isel table by about 1800 bytes.

3 years agoGlobalISel: Handle arguments partially passed on the stack
Matt Arsenault [Sun, 7 Feb 2021 20:17:04 +0000 (15:17 -0500)]
GlobalISel: Handle arguments partially passed on the stack

The API is a bit awkward since you need to index into an array in the
passed struct. I guess an alternative would be to pass all of the
individual fields.

3 years agoCodeGen: Move function to get subregister indexes to cover a LaneMask
Matt Arsenault [Wed, 2 Dec 2020 00:34:54 +0000 (19:34 -0500)]
CodeGen: Move function to get subregister indexes to cover a LaneMask

Return the best covering index, and additional needed to complete the
mask. This logically belongs in TargetRegisterInfo, although I ended
up not needing it for why I originally split this out.

3 years ago[mlir][Vector] Add a canonicalization pattern for vector.contract + add
Nicolas Vasilache [Mon, 15 Feb 2021 12:11:29 +0000 (12:11 +0000)]
[mlir][Vector] Add a canonicalization pattern for vector.contract + add

Differential Revision: https://reviews.llvm.org/D96701

3 years ago[libc++] Change `std::numeric_limits` to just `numeric_limits` in <chrono>.
Arthur O'Dwyer [Mon, 15 Feb 2021 21:10:28 +0000 (16:10 -0500)]
[libc++] Change `std::numeric_limits` to just `numeric_limits` in <chrono>.

The namespace is unnecessary, and libc++ style is not to include it on type names.
(As opposed to function names, where qualification affects ADL; and in certain
function signatures where `std::` and `_VSTD::` might be mangled differently.
This is none of those situations.)

3 years ago[RISCV] Add support for fixed vector floating point setcc.
Craig Topper [Mon, 15 Feb 2021 20:42:33 +0000 (12:42 -0800)]
[RISCV] Add support for fixed vector floating point setcc.

This is annoying because the condition code legalization belongs
to LegalizeDAG, but our custom handler runs in Legalize vector ops
which occurs earlier.

This adds some of the mask binary operations so that we can combine
multiple compares that we need for expansion.

I've also fixed up RISCVISelDAGToDAG.cpp to handle copies of masks.

This patch contains a subset of the integer setcc patch as well.
That patch is dependent on the integer binary ops patch. I'll rebase
based on what order the patches go in.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D96567

3 years ago[RISCV][LegalizeTypes] Try to expand BITREVERSE before promoting if the promoted...
Craig Topper [Mon, 15 Feb 2021 20:33:14 +0000 (12:33 -0800)]
[RISCV][LegalizeTypes] Try to expand BITREVERSE before promoting if the promoted BITREVERSE would expand anyway.

If we're going to end up expanding anyway, we should do it early
so we don't create extra operations to handle the bytes added by
promotion.

Simlilar was done for BSWAP previously.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D96681

3 years ago[LLDB] Skip TestMultipleTargets.py on Arm/AArch64 Linux
Muhammad Omair Javaid [Mon, 15 Feb 2021 20:25:48 +0000 (01:25 +0500)]
[LLDB] Skip TestMultipleTargets.py on Arm/AArch64 Linux

TestMultipleTargets.py fails randomly on Arm/AArch64 Linux buildbot with
no reasonable clues. I am marking it skipped for avoiding LLDB buildbot
failures due to this test.

3 years ago[libc++] Mark __cpp_lib_constexpr_memory as being implemented
Louis Dionne [Mon, 15 Feb 2021 20:26:29 +0000 (15:26 -0500)]
[libc++] Mark __cpp_lib_constexpr_memory as being implemented

3 years ago[ValueTracking] add scan limit for assumes
Sanjay Patel [Mon, 15 Feb 2021 19:53:07 +0000 (14:53 -0500)]
[ValueTracking] add scan limit for assumes

In the motivating example from https://llvm.org/PR49171 and
reduced test here, we would unroll and clone assumes so much
that compile-time effectively became infinite while analyzing
all of those assumes.

3 years agoDefine new/delete in libc++ when using libcxxrt
Dimitry Andric [Mon, 15 Feb 2021 17:22:01 +0000 (18:22 +0100)]
Define new/delete in libc++ when using libcxxrt

Always turn on LIBCXX_ENABLE_NEW_DELETE_DEFINITIONS, if libcxxrt is used
as the C++ ABI library, since libcxxrt does not provide the full set
ofnew and delete operators. In particular, the aligned versions of these
operators are completely missing. This primarily addresses builds on
FreeBSD, as this platform uses libcxxrt by default.

Also, attempt to provide a FreeBSD.cmake cache file, with hopefully sane
settings, partially copied from the Apple.cmake cache file. This needs
more work, probably some additions to ci build scripts (although I am
not aware of any 'official' FreeBSD build bots).

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D96720

3 years ago[clangd] Pass raw client capabilities to modules. NFC
Sam McCall [Mon, 15 Feb 2021 19:56:57 +0000 (20:56 +0100)]
[clangd] Pass raw client capabilities to modules. NFC

3 years agoTransformUtils: Fix metadata handling in CloneModule (and improve CloneFunctionInto)
Duncan P. N. Exon Smith [Thu, 11 Feb 2021 16:23:39 +0000 (08:23 -0800)]
TransformUtils: Fix metadata handling in CloneModule (and improve CloneFunctionInto)

This commit fixes how metadata is handled in CloneModule to be sound,
and improves how it's handled in CloneFunctionInto (although the latter
is still awkward when called within a module).

Ruiling Song pointed out in PR48841 that CloneModule was changed to
unsoundly use the RF_ReuseAndMutateDistinctMDs flag (renamed in
fa35c1f80f0ea080a7cbc581416929b0a654f25c for clarity). This flag papered
over a crash caused by other various changes made to CloneFunctionInto
over the past few years that made it unsound to use cloning between
different modules.

(This commit partially addresses PR48841, fixing the repro from
preprocessed source but not textual IR. MDNodeMapper::mapDistinctNode
became unsound in df763188c9a1ecb1e7e5c4d4ea53a99fbb755903 and this
commit does not address that regression.)

RF_ReuseAndMutateDistinctMDs is designed for the IRMover to use,
avoiding unnecessary clones of all referenced metadata when linking
between modules (with IRMover, the source module is discarded after
linking). It never makes sense to use when you're not discarding the
source. This commit drops its incorrect use in CloneModule.

Sadly, the right thing to do with metadata when cloning a function is
complicated, and this patch doesn't totally fix it.

The first problem is that there are two different types of referenceable
metadata and it's not obvious what to with one of them when remapping.

- `!0 = !{!1}` is metadata's version of a constant. Programatically it's
  called "uniqued" (probably a better term would be "constant") because,
  like `ConstantArray`, it's stored in uniquing tables. Once it's
  constructed, it's illegal to change its arguments.
- `!0 = distinct !{!1}` is a bit closer to a global variable. It's legal
  to change the operands after construction.

What should be done with distinct metadata when cloning functions within
the same module?

- Should new, cloned nodes be created?
- Should all references point to the same, old nodes?

The answer depends on whether that metadata is effectively owned by a
function.

And that's the second problem. Referenceable metadata's ownership model
is not clear or explicit. Technically, it's all stored on an
LLVMContext. However, any metadata that is `distinct`, that transitively
references a `distinct` node, or that transitively references a
GlobalValue is specific to a Module and is effectively owned by it. More
specifically, some metadata is effectively owned by a specific Function
within a module.

Effectively function-local metadata was introduced somewhere around
c10d0e5ccd12f049bddb24dcf8bbb7fbbc6c68f2, which made it illegal for two
functions to share a DISubprogram attachment.

When cloning a function within a module, you need to clone the
function-local debug info and suppress cloning of global debug info (the
status quo suppresses cloning some global debug info but not all). When
cloning a function to a new/different module, you need to clone all of
the debug info.

Here's what I think we should do (eventually? soon? not this patch
though):
- Distinguish explicitly (somehow) between pure constant metadata owned
  by the LLVMContext, global metadata owned by the Module, and local
  metadata owned by a GlobalValue (such as a function).
- Update CloneFunctionInto to trigger cloning of all "local" metadata
  (only), perhaps by adding a bit to RemapFlag. Alternatively, split
  out a separate function CloneFunctionMetadataInto to prime the
  metadata map that callers are updated to call ahead of time as
  appropriate.

Here's the somewhat more isolated fix in this patch:
- Converted the `ModuleLevelChanges` parameter to `CloneFunctionInto` to
  an enum called `CloneFunctionChangeType` that is one of
  LocalChangesOnly, GlobalChanges, DifferentModule, and ClonedModule.
- The code maintaining the "functions uniquely own subprograms"
  invariant is now only active in the first two cases, where a function
  is being cloned within a single module. That's necessary because this
  code inhibits cloning of (some) "global" metadata that's effectively
  owned by the module.
- The code maintaining the "all compile units must be explicitly
  referenced by !llvm.dbg.cu" invariant is now only active in the
  DifferentModule case, where a function is being cloned into a new
  module in isolation.
- CoroSplit.cpp's call to CloneFunctionInto in CoroCloner::create
  uses LocalChangeOnly, since fa635d730f74f3285b77cc1537f1692184b8bf5b
  only set `ModuleLevelChanges` to trigger cloning of local metadata.
- CloneModule drops its unsound use of RF_ReuseAndMutateDistinctMDs
  and special handling of !llvm.dbg.cu.
- Fixed some outdated header docs and left a couple of FIXMEs.

Differential Revision: https://reviews.llvm.org/D96531

3 years ago[lto] Enable new PM when the PM config is non-empty
Benjamin Kramer [Mon, 15 Feb 2021 19:49:09 +0000 (20:49 +0100)]
[lto] Enable new PM when the PM config is non-empty

This restores the behavior before 964f8103c58d, which broke 2 tests:
  LLVM :: tools/llvm-lto2/X86/pipeline.ll
  lld :: ELF/lto/ltopasses-custom.ll

3 years ago[AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn
Stanislav Mekhanoshin [Fri, 12 Feb 2021 22:19:10 +0000 (14:19 -0800)]
[AMDGPU] Add two TSFlags: IsAtomicNoRtn and IsAtomicRtn

We are using AtomicNoRet map in multiple places to determine
if an instruction atomic, rtn or nortn atomic. This method
does not work always since we have some instructions which
only has rtn or nortn version.

One such instruction is ds_wrxchg_rtn_b32 which does not have
nortn version. This has caused changes in memory legalizer
tests.

Differential Revision: https://reviews.llvm.org/D96639

3 years ago[llvm-objcopy] Delete --build-id-link-{dir,input,output}
Fangrui Song [Mon, 15 Feb 2021 19:17:32 +0000 (11:17 -0800)]
[llvm-objcopy] Delete --build-id-link-{dir,input,output}

The few options are niche. They solved a problem which was traditionally solved
with more shell commands (`llvm-readelf -n` fetches the Build ID. Then
`ln` is used to hard link the file to a directory derived from the Build ID.)

Due to limitation, they are no longer used by Fuchsia and they don't appear to
be used elsewhere (checked with Google Search and Debian Code Search). So delete
them without a transition period.

Announcement: https://lists.llvm.org/pipermail/llvm-dev/2021-February/148446.html

Differential Revision: https://reviews.llvm.org/D96310

3 years ago[OpenMP] Delay more diagnostics of potentially non-emitted code
Johannes Doerfert [Tue, 2 Feb 2021 17:17:44 +0000 (11:17 -0600)]
[OpenMP] Delay more diagnostics of potentially non-emitted code

Even code in target and declare target regions might not be emitted.
With this patch we delay more diagnostics and use laziness and linkage
to determine if a function is emitted (for the device). Note that we
still eagerly emit diagnostics for target regions, unfortunately, see
the TODO for the reason.

This hopefully fixes PR48933.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D95928

3 years ago[OpenMP] Attribute target diagnostics properly
Johannes Doerfert [Fri, 29 Jan 2021 08:42:20 +0000 (02:42 -0600)]
[OpenMP] Attribute target diagnostics properly

Type errors in function declarations were not (always) diagnosed prior
to this patch. Furthermore, certain remarks did not get associated
properly which caused them to be emitted multiple times.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D95912

3 years ago[OpenMP][NFC] Pre-commit test changes regarding PR48933
Johannes Doerfert [Tue, 2 Feb 2021 23:24:53 +0000 (17:24 -0600)]
[OpenMP][NFC] Pre-commit test changes regarding PR48933

This will highlight the effective changes in subsequent commits.

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D95903

3 years agoSupport emitting complex expressions that include entry values
Adrian Prantl [Fri, 12 Feb 2021 00:07:19 +0000 (16:07 -0800)]
Support emitting complex expressions that include entry values

This patch enables AsmPrinter support for complex expression with
entry values. It shouldn't AsmPrinter's call whether these are safe or
not but the pass who introduces the DW_OP_LLVM_entry_value. This patch
on its own has no effect on clang.

Differential Revision: https://reviews.llvm.org/D96559

3 years ago[CMake] Delete LLVM_RUNTIME_BUILD_ID_LINK_TARGETS
Fangrui Song [Mon, 15 Feb 2021 19:06:23 +0000 (11:06 -0800)]
[CMake] Delete LLVM_RUNTIME_BUILD_ID_LINK_TARGETS

Announcement: https://lists.llvm.org/pipermail/llvm-dev/2021-February/148446.html

Differential Revision: https://reviews.llvm.org/D96360

3 years ago[mlir] Add clone method to ShapedType
Jacques Pienaar [Mon, 15 Feb 2021 19:04:16 +0000 (11:04 -0800)]
[mlir] Add clone method to ShapedType

Allow clients to create a new ShapedType of the same "container" type
but with different element or shape. First use case is when refining
shape during shape inference without needing to consider which
ShapedType is being refined.

Differential Revision: https://reviews.llvm.org/D96682

3 years ago[clangd] Delay binding LSP methods until initialize. NFC
Sam McCall [Fri, 12 Feb 2021 15:23:53 +0000 (16:23 +0100)]
[clangd] Delay binding LSP methods until initialize. NFC

This is NFC because the MessageHandler refused to dispatch to them until the
server is initialized anyway.

This is a more natural time to bind them - it's when they become callable, and
it's when client capabalities are available and server ones can be set.

One module-lifecycle function will be responsible for all three.

Differential Revision: https://reviews.llvm.org/D96608

3 years ago[DAG] visitVSELECT - move OpLHS == LHS into inner if() in USUBSAT matching. NFCI.
Simon Pilgrim [Mon, 15 Feb 2021 18:27:00 +0000 (18:27 +0000)]
[DAG] visitVSELECT - move OpLHS == LHS into inner if() in USUBSAT matching. NFCI.

This will be necessary for the update of D25987 where we'll need to match OpLHS against other ops.

3 years ago[NFC] Remove spurious ';' on return line in python code
Mircea Trofin [Mon, 15 Feb 2021 16:41:26 +0000 (08:41 -0800)]
[NFC] Remove spurious ';' on return line in python code

3 years ago[AArch64] Move machine bundle unpacking to PreEmit2 phase.
Florian Hahn [Mon, 15 Feb 2021 16:10:43 +0000 (16:10 +0000)]
[AArch64] Move machine bundle unpacking to PreEmit2 phase.

This patch adjusts the placement of the bundle unpacking to just before
code emission. In particular, this means bundle unpacking happens AFTER
the machine outliner. With the previous position, the machine outliner
may outline parts of a bundle, which breaks them up.

This is an issue for BLR_RVMARKER handling, as illustrated by the
rvmarker-pseudo-expansion-and-outlining.mir test case. The machine
outliner should not break up the bundles created during pseudo
expansion.

This should fix PR49082.

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D96294

3 years ago[LangRef] Increase size of title underline for experimental.vector.reverse
Caroline Concatto [Mon, 15 Feb 2021 14:31:32 +0000 (14:31 +0000)]
[LangRef] Increase size of title underline for experimental.vector.reverse

3 years ago[ARM] Add some basic Min/Max costs
David Green [Mon, 15 Feb 2021 15:06:19 +0000 (15:06 +0000)]
[ARM] Add some basic Min/Max costs

This adds basic MVE costs for SMIN/SMAX/UMIN/UMAX, as well as MINNUM and
MAXNUM representing fmin and fmax. It tightens up the costs, not using a
ICmp+Select cost.

Differential Revision: https://reviews.llvm.org/D96603

3 years agoMake shape.is_broadcastable/shape.cstr_broadcastable nary
Tres Popp [Wed, 10 Feb 2021 09:24:32 +0000 (10:24 +0100)]
Make shape.is_broadcastable/shape.cstr_broadcastable nary

This corresponds with the previous work to make shape.broadcast nary.
Additionally, simplify the ConvertShapeConstraints pass. It now doesn't
lower an implicit shape.is_broadcastable. This is still the same in
combination with shape-to-standard when the 2 passes are used in either
order.

Differential Revision: https://reviews.llvm.org/D96401

3 years ago[debuginfo-tests] Delete unused/duplicate imports
James Henderson [Tue, 9 Feb 2021 14:24:18 +0000 (14:24 +0000)]
[debuginfo-tests] Delete unused/duplicate imports

Differential Revision: https://reviews.llvm.org/D96502

Reviewed by: aprantl

3 years ago[CostModel]Add cost model for experimental.vector.reverse
Caroline Concatto [Wed, 27 Jan 2021 15:59:27 +0000 (15:59 +0000)]
[CostModel]Add cost model for experimental.vector.reverse

This patch uses the function getShuffleCost with SK_Reverse to compute the cost
for experimental.vector.reverse.
For scalable vector type, it adds a table will the legal types on
AArch64TTIImpl::getShuffleCost to not assert in BasicTTIImpl::getShuffleCost,
and for fixed vector, it relies on the existing cost model in BasicTTIImpl.

Depends on D94883

Differential Revision: https://reviews.llvm.org/D95603

3 years ago[debuginfo-tests] Remove some unused config variables
James Henderson [Tue, 9 Feb 2021 11:12:49 +0000 (11:12 +0000)]
[debuginfo-tests] Remove some unused config variables

Differential Revision: https://reviews.llvm.org/D96500

Reviewed by: aprantl

3 years ago[debuginfo-tests] Remove explicit checks for Python 3
James Henderson [Mon, 8 Feb 2021 15:46:40 +0000 (15:46 +0000)]
[debuginfo-tests] Remove explicit checks for Python 3

LLVM has a minimum requirement of python 3.6 now, and Python is
explicitly checked for in the LLVM CMakeLists.txt, so this check is no
longer needed here.

Differential Revision: https://reviews.llvm.org/D96499

Reviewed by: aprantl

3 years ago[X86] Add SSE2+SSE3 common check prefix to psubus tests
Simon Pilgrim [Mon, 15 Feb 2021 14:06:38 +0000 (14:06 +0000)]
[X86] Add SSE2+SSE3 common check prefix to psubus tests

Noticed by @pengfei on D96703

3 years ago[mlir] use new cmake targets in mlir-*-runner
Alex Zinenko [Mon, 15 Feb 2021 14:02:56 +0000 (15:02 +0100)]
[mlir] use new cmake targets in mlir-*-runner

3 years ago[llvm-nm][test] Add additional test coverage for llvm-nm options
James Henderson [Fri, 12 Feb 2021 14:23:45 +0000 (14:23 +0000)]
[llvm-nm][test] Add additional test coverage for llvm-nm options

Some of these options have a degree of incidental coverage, or are for
Mach-O only. This patch adds dedicated ELF (where applicable) coverage.

Differential Revision: https://reviews.llvm.org/D96602

Reviewed by: rupprecht, Higuoxing

3 years ago[llvm-nm] Tidy up error messages
James Henderson [Fri, 12 Feb 2021 14:18:21 +0000 (14:18 +0000)]
[llvm-nm] Tidy up error messages

This adds colons to separate the file name from the message, removes a
duplicate space, and removes a trailing full stop from some messages.
These help bring the error messages into line with other tools, as well
as making all llvm-nm message more self-consistent.

Differential Revision: https://reviews.llvm.org/D96601

Reviewed by: Higuoxing, rupprecht, MaskRay

3 years ago[llvm] NFC: Cleanup llvm-yaml-numeric-parser-fuzzer
Kirill Bobyrev [Mon, 15 Feb 2021 13:52:46 +0000 (14:52 +0100)]
[llvm] NFC: Cleanup llvm-yaml-numeric-parser-fuzzer

* Use static variables instead of non-trivially destructible global ones.
* Remove unused header.

Differential Revision: https://reviews.llvm.org/D91600

3 years ago[LoopVectorizer] Require no-signed-zeros-fp-math=true for fmin/fmax
Kerry McLaughlin [Mon, 15 Feb 2021 10:36:40 +0000 (10:36 +0000)]
[LoopVectorizer] Require no-signed-zeros-fp-math=true for fmin/fmax

Currently, setting the `no-nans-fp-math` attribute to true will allow
loops with fmin/fmax to vectorize, though we should be requiring that
`no-signed-zeros-fp-math` is also set.

This patch adds the check for no-signed-zeros at the function level and includes
tests to make sure we don't vectorize functions with only one of the attributes
associated.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D96604

3 years agoFix MSVC natvis visualisation of llvm::FixedVectorTyID and ScalableVectorTyID
Simon Pilgrim [Mon, 15 Feb 2021 13:20:11 +0000 (13:20 +0000)]
Fix MSVC natvis visualisation of llvm::FixedVectorTyID and ScalableVectorTyID

VectorTyID was replaced with FixedVectorTyID and ScalableVectorTyID

3 years ago[mlir] Use the interface-based translation for LLVM "intrinsic" dialects
Alex Zinenko [Fri, 12 Feb 2021 11:53:27 +0000 (12:53 +0100)]
[mlir] Use the interface-based translation for LLVM "intrinsic" dialects

Port the translation of five dialects that define LLVM IR intrinsics
(LLVMAVX512, LLVMArmNeon, LLVMArmSVE, NVVM, ROCDL) to the new dialect
interface-based mechanism. This allows us to remove individual translations
that were created for each of these dialects and just use one common
MLIR-to-LLVM-IR translation that potentially supports all dialects instead,
based on what is registered and including any combination of translatable
dialects. This removal was one of the main goals of the refactoring.

To support the addition of GPU-related metadata, the translation interface is
extended with the `amendOperation` function that allows the interface
implementation to post-process any translated operation with dialect attributes
from the dialect for which the interface is implemented regardless of the
operation's dialect. This is currently applied to "kernel" functions, but can
be used to construct other metadata in dialect-specific ways without
necessarily affecting operations.

Depends On D96591, D96504

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D96592

3 years ago[CodeGen][SelectionDAG]Add new intrinsic experimental.vector.reverse
Caroline Concatto [Fri, 15 Jan 2021 16:46:42 +0000 (16:46 +0000)]
[CodeGen][SelectionDAG]Add new intrinsic  experimental.vector.reverse

This patch adds  a new intrinsic experimental.vector.reduce that takes a single
vector and returns a vector of matching type but with the original lane order
 reversed. For example:

```
vector.reverse(<A,B,C,D>) ==> <D,C,B,A>
```

The new intrinsic supports fixed and scalable vectors types.
The fixed-width vector relies on shufflevector to maintain existing behaviour.
Scalable vector uses the new ISD node - VECTOR_REVERSE.

This new intrinsic is one of the named shufflevector intrinsics proposed on the
mailing-list in the RFC at [1].

Patch by Paul Walker (@paulwalker-arm).

[1] https://lists.llvm.org/pipermail/llvm-dev/2020-November/146864.html

Differential Revision: https://reviews.llvm.org/D94883

3 years ago[analyzer][NFC] Fix test failures for builds w/o assertions
Valeriy Savchenko [Mon, 15 Feb 2021 13:36:22 +0000 (16:36 +0300)]
[analyzer][NFC] Fix test failures for builds w/o assertions

3 years ago[ARM] Extend search for increment in load/store optimizer
David Green [Mon, 15 Feb 2021 13:17:21 +0000 (13:17 +0000)]
[ARM] Extend search for increment in load/store optimizer

Currently the findIncDecAfter will only look at the next instruction for
post-inc candidates in the load/store optimizer. This extends that to a
search through the current BB, until an instruction that modifies or
uses the increment reg is found. This allows more post-inc load/stores
and ldm/stm's to be created, especially in cases where a schedule might
move instructions further apart.

We make sure not to look any further for an SP, as that might invalidate
stack slots that are still in use.

Differential Revision: https://reviews.llvm.org/D95881

3 years agoAdd Semantic check for Flang OpenMP 4.5 - 2.7.1 Do Loop restrictions.
Yashaswini [Mon, 15 Feb 2021 12:54:27 +0000 (18:24 +0530)]
Add Semantic check for Flang OpenMP 4.5 - 2.7.1  Do Loop restrictions.
Implementation of Do loop iteration variable check, Do while loop check, Do loop cycle restrictions.
Also to check whether the ordered clause is present on the loop construct if any ordered region ever
 binds to a loop region arising from the loop construct.

Files:

check-omp-structure.h
check-omp-structure.cpp
resolve-directives.cpp

Testcases:

omp-do06-positivecases.f90
omp-do06.f90
omp-do08.f90
omp-do09.f90
omp-do10.f90
omp-do11.f90
omp-do12.f90
omp-do13.f90
omp-do14.f90
omp-do15.f90
omp-do16.f90
omp-do17.f90

Reviewed by: Kiran Chandramohan @kiranchandramohan , Valentin Clement @clementval

Differential Revision: https://reviews.llvm.org/D92732

3 years ago[sanitizer] [arm] Disable some LSAN tests for arm-linux-gnueabihf
Adhemerval Zanella [Mon, 15 Feb 2021 12:26:45 +0000 (09:26 -0300)]
[sanitizer] [arm] Disable some LSAN tests for arm-linux-gnueabihf

Reinstate D90628 since the fix done by D96337 does not change the outcome
of the https://bugs.llvm.org/show_bug.cgi?id=48052

3 years ago[lldb] Rename FreeBSDRemote to FreeBSD (NFC)
Michał Górny [Thu, 11 Feb 2021 23:40:52 +0000 (00:40 +0100)]
[lldb] Rename FreeBSDRemote to FreeBSD (NFC)

Differential Revision: https://reviews.llvm.org/D96557

3 years ago[lldb] Remove the legacy FreeBSD plugin
Michał Górny [Thu, 11 Feb 2021 23:37:10 +0000 (00:37 +0100)]
[lldb] Remove the legacy FreeBSD plugin

The new FreeBSDRemote plugin has reached feature parity with the legacy
plugin, so we can finally remove the latter.  The new plugin will
be renamed to FreeBSD in a separate commit to avoid confusion.

Differential Revision: https://reviews.llvm.org/D96555

3 years ago[X86][AVX] Regenerate PSUBUS tests for slow/fast shuffle AVX2 targets
Simon Pilgrim [Mon, 15 Feb 2021 12:00:29 +0000 (12:00 +0000)]
[X86][AVX] Regenerate PSUBUS tests for slow/fast shuffle AVX2 targets

update_llc_test_checks.py isn't reporting when we don't have a usable prefix for a particular run any more - so we lost all AVX2 testing!

3 years ago[X86][SSE] Add missing USUBSAT test coverage
Simon Pilgrim [Mon, 15 Feb 2021 11:38:08 +0000 (11:38 +0000)]
[X86][SSE] Add missing USUBSAT test coverage

Before we start removing combineSubToSubus (PR40111) - make sure we have actually have test coverage for SUB(X,TRUNC(UMIN(ZEXT(X),Y))) -> USUBSAT(X,TRUNC(UMIN(Y,C)))) patterns

3 years agoRecommit "[TTI] Unify FavorPostInc and FavorBackedgeIndex into getPreferredAddressing...
Sjoerd Meijer [Mon, 15 Feb 2021 11:06:42 +0000 (11:06 +0000)]
Recommit "[TTI] Unify FavorPostInc and FavorBackedgeIndex into getPreferredAddressingMode"

This reverts commit effc3b079927a6dd3084b4ff712ec07f926366f0, with the build
problem fixed.

3 years ago[LoopLoadElim] Pass ScalarEvolution in old pass manager. PR49141
Max Kazantsev [Mon, 15 Feb 2021 11:06:33 +0000 (18:06 +0700)]
[LoopLoadElim] Pass ScalarEvolution in old pass manager. PR49141

Loop canonicalization may end up deleting blocks from CFG. And
Scalar Evolution may still keep cached referenced to those blocks
unless updated properly.

3 years agoRevert "[TTI] Unify FavorPostInc and FavorBackedgeIndex into getPreferredAddressingMode"
Sjoerd Meijer [Mon, 15 Feb 2021 11:01:23 +0000 (11:01 +0000)]
Revert "[TTI] Unify FavorPostInc and FavorBackedgeIndex into getPreferredAddressingMode"

This reverts commit cd6de0e8de4a5fd558580be4b1a07116914fc8ed.

3 years ago[TTI] Unify FavorPostInc and FavorBackedgeIndex into getPreferredAddressingMode
Sjoerd Meijer [Fri, 12 Feb 2021 15:15:05 +0000 (15:15 +0000)]
[TTI] Unify FavorPostInc and FavorBackedgeIndex into getPreferredAddressingMode

This refactors shouldFavorPostInc() and shouldFavorBackedgeIndex() into
getPreferredAddressingMode() so that we have one interface to steer LSR in
generating the preferred addressing mode.

Differential Revision: https://reviews.llvm.org/D96600

3 years ago[RISCV] Convert VSLIDE(UP|DOWN) nodes to "VL" versions (NFC)
Fraser Cormack [Thu, 11 Feb 2021 15:01:40 +0000 (15:01 +0000)]
[RISCV] Convert VSLIDE(UP|DOWN) nodes to "VL" versions (NFC)

This patch prepares the RISCV VSLIDEUP and VSLIDEDOWN custom nodes to
ones carrying additional mask and vector-length operands. This is
primarily so they can be used by both systems.

This also takes the opportunity to create some helper functions to deal
with the common task of getting the default (unmasked) VL operands.

Reviewed By: craig.topper, arcbbb

Differential Revision: https://reviews.llvm.org/D96505

3 years agoRestore diagnostic handler after CodeGenAction::ExecuteAction
Marco Antognini [Mon, 8 Feb 2021 18:14:22 +0000 (18:14 +0000)]
Restore diagnostic handler after CodeGenAction::ExecuteAction

Fix dangling pointer to local variable and address some typos.

Reviewed By: xur

Differential Revision: https://reviews.llvm.org/D96487

3 years agoRecommit "[LTO] Use lto::backend for code generation."
Florian Hahn [Sun, 14 Feb 2021 19:33:36 +0000 (19:33 +0000)]
Recommit "[LTO] Use lto::backend for code generation."

This version of the patch includes a fix for the cfi failures.

(undoes the revert commit 7db390cc7738a9ba0ed7d4ca59ab6ea2e69c47e9)

It also undoes reverts of follow-up patches that also needed reverting
originally:

  * [LTO] Add option enable NewPM with LTOCodeGenerator.
    (undoes revert commit 0a17664b47c153aa26a0d31b4835f26375440ec6)

  * [LTOCodeGenerator] Use lto::Config for options (NFC)."
    (undoes revert commit b0a8e41cfff717ff067bf63412d6edb0280608cd)