Pali Rohár [Mon, 25 Jul 2022 11:56:15 +0000 (13:56 +0200)]
arm: mvebu: turris_omnia: Enable a38x pinctrl and gpio support
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Jul 2022 11:56:14 +0000 (13:56 +0200)]
gpio: mvebu_gpio: Set bank name to mvebu%d
Currently bank name is just one alphabetical letter.
Change it to mvebu and number.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Jul 2022 11:56:13 +0000 (13:56 +0200)]
gpio: mvebu_gpio: Read number of gpios from DT
Device tree property "ngpios" contains number of gpios.
Use it when available.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Jul 2022 11:56:12 +0000 (13:56 +0200)]
gpio: mvebu_gpio: Add .request and .rfree methods for Armada 38x
To use particular pin GPIO, it needs to be first switched to GPIO by
pinctrl. Use pinctrl_gpio_request() and pinctrl_gpio_free() for this
purpose.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Jul 2022 11:56:11 +0000 (13:56 +0200)]
pinctrl: Add third argument label for pinctrl_gpio_request() function
This change allows to use pinctrl_gpio_request() function as a direct
pointer for dm_gpio_ops's .request callback.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Jul 2022 11:56:10 +0000 (13:56 +0200)]
arm: mvebu: Add gpio-ranges into Armada 38x device tree file
This allows U-Boot mvebu-gpio.c driver to switch particular MPP pin into
GPIO mode and enable GPIO support.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Jul 2022 11:56:09 +0000 (13:56 +0200)]
mvebu: pinctrl: Add Armada 38x driver
This new Armada 38x driver is based on Linux kernel driver. It can set any
pin to any valid function specified in DT like Linux kernel, it provides
support for 'pinmux status -a' command and also for pinctrl_gpio_request().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Jul 2022 11:56:08 +0000 (13:56 +0200)]
pinctrl: Add new function pinctrl_generic_set_state_prefix()
This new function pinctrl_generic_set_state_prefix() behaves like
pinctrl_generic_set_state() but it takes third string argument which is
used as the prefix for each device tree string property.
This is needed for Marvell pinctrl drivers, becase Linux device tree files
have pinmux properties prefixed by "marvell," string.
This change allows to use generic U-Boot pinctrl functions for Armada 38x
pinctrl driver without need to copy+paste of the majority U-Boot pinctrl
code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Wed, 27 Jul 2022 11:00:54 +0000 (07:00 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Wed, 27 Jul 2022 11:00:24 +0000 (07:00 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-pmic
Tom Rini [Wed, 27 Jul 2022 10:59:55 +0000 (06:59 -0400)]
Merge tag 'dm-pull-26jul22' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm.git
minor dm- and fdt-related fixes
start of test for fdt command
Heinrich Schuchardt [Sun, 12 Jun 2022 12:53:48 +0000 (12:53 +0000)]
mmc: pci_mmc.c should build with ACPIGEN=n
sandbox_defconfig builds the PCI MMC driver. It should be possible to
build the sandbox without ACPI support.
ACPI support in the PCI MMC driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.
Fixes:
dba7ee419d9d ("acpi: mmc: Generate ACPI info for the PCI SD Card")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ying-Chun Liu (PaulLiu) [Mon, 25 Apr 2022 13:59:03 +0000 (21:59 +0800)]
cmd: mmc: allow to write protect single boot partition
add arguments for mmc wp to assign which boot partition to protect.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Ying-Chun Liu (PaulLiu) [Mon, 25 Apr 2022 13:59:02 +0000 (21:59 +0800)]
drivers: mmc: write protect single boot area
Add features to write protect single boot area rather than all boot
areas.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Jim Liu [Tue, 24 May 2022 08:55:33 +0000 (16:55 +0800)]
mmc: nuvoton: Add NPCM7xx mmc driver
Add Nuvoton BMC NPCM750 mmc control driver.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Pali Rohár [Fri, 29 Apr 2022 18:27:34 +0000 (20:27 +0200)]
mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
fixed amount of time like it was before commit
6f883e501b65 ("mmc:
fsl_esdhc: Add emmc hs200 support").
This change fixes error 'Internal clock never stabilised.' which is printed
on P2020 board at every access to SD card.
Fixes:
6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Heiko Thiery [Mon, 20 Jun 2022 03:49:49 +0000 (05:49 +0200)]
pmic: pca9450: permit config on all bucks and LDOs
In order to have the possibility to configure the regulators at system
startup through DM support, all LDOs and bucks must be able to be
changeable. Currently there is a limitation to change the values when
the output is enabled. Since the driver is based on the ROHM BD71837 and a
comment that describes a limitation about switching while the output is
enabled can also be found there, the limitation probably comes from this type.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Andre Przywara [Tue, 12 Jul 2022 11:00:23 +0000 (12:00 +0100)]
ARM: relocate: Fix Thumb code by using proper label type
The generic ARM relocate_code function was using its own function entry
point as a relocation base, and it was obtaining that address by using
the "adr" instruction on that entry point label.
However that label is not just an ordinary label, instead we explicitly
mark it as a function start address. Normally that doesn't change much
(other than for debugging), but when assembled in Thumb mode, newer
versions of the GNU assembler prepare everything for this address being
used as the argument to a "bx" call, so make sure bit 0 is set in there
to mark this function as Thumb code. Of course this doesn't end up very
well when we use this address for the ensuing memcpy operation.
To avoid this problem, and to solve it in a robust way, add an extra
label, which is not marked as a function entry, and use that for the adr
instruction. This lets all assemblers generate the right immediate offset
in the "adr" instruction.
This fixes in particular ARMv7-M ports when using GNU binutils v2.37 or
newer (commit
d3e52e120b68 seems to trigger the change in behaviour).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Jesse Taube <mr.bossman075@gmail.com>
Tom Rini [Tue, 26 Jul 2022 14:26:00 +0000 (10:26 -0400)]
Merge tag 'u-boot-imx-
20220726' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-
20220726
-------------------
i.MX for 2022.10
- Added i.MX93 architecture
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12891
Tom Rini [Tue, 26 Jul 2022 12:32:37 +0000 (08:32 -0400)]
Merge tag 'xilinx-for-v2022.10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.10-rc2
fpga:
- Convert SYS_FPGA_CHECK_CTRLC and SYS_FPGA_PROG_FEEDBACK to Kconfig
- Add support for secure bitstream loading
spi:
- xilinx_spi: Add support for memopers and supports_op
- zynq_qspi: Add support for supports_op/child_pre_probe
- zynq_qspi: Fix dummy cycle and qspi speed calculations
xilinx:
- Get rid of #stream-id-cells
- Use fixed partitions for SOM
- Add support for UUID reading from FRU
- Use strlcpy instead of strncpy
- Add reset driver support for ZynqMP and Versal
- Enable power domain driver in ZynqMP and Versal
zynqmp:
- Do no place BSS at 0 which have issue with NULL pointer
- Enable SLG gpio driver
- Disable LMB for mini configurations
- Remove duplicate PMIO_NODE_ID_BASE macro
versal:
- Add xlnx-versal-resets.h header
mmc:
- zynq_sdhci: Fix macro for MMC HS
relocate-rela:
- Fix support for BE hosts
- Define all macros for e_machine and reloc types
misc:
- Get rid of guard macros from ARM and RISC-V
lmb:
- Add support for disabling LMB
serial:
- zynq: Fix baudrate calculation
tests:
- Mark bind tests to run only on sandbox
- List also dm uclass and devres
Peng Fan [Tue, 26 Jul 2022 08:41:23 +0000 (16:41 +0800)]
imx: imx8mm-icore: migrate to use BINMAN
Use BINMAN instead of imx specific packing method.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Peng Fan [Tue, 26 Jul 2022 08:41:22 +0000 (16:41 +0800)]
arm: dts: imx8m: shrink ddr firmware size to actual file size
After we switch to use BINMAN_SYMBOLS, there is no need to pad
the file size to 0x8000 and 0x4000. After we use BINMAN_SYMBOLS,
the u-boot-spl-ddr.bin shrink about 36KB with i.MX8MP-EVK.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Peng Fan [Tue, 26 Jul 2022 08:41:21 +0000 (16:41 +0800)]
ddr: imx8m: helper: load ddr firmware according to binman symbols
By reading binman symbols, we no need hard coded IMEM_LEN/DMEM_LEN after
we update the binman dtsi to drop 0x8000/0x4000 length for the firmware.
And that could save binary size for many KBs.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Check BINMAN_SYMS_OK instead]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Peng Fan [Tue, 26 Jul 2022 08:41:20 +0000 (16:41 +0800)]
arm: dts: imx8m: update binman ddr firmware node name
We are migrating to use binman symbols, the current names are
inconsistent across different boards, so unify them.
Also add `type = "blob-ext";`, since the new names are not valid binman
types.
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Edit commit message]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Peng Fan [Tue, 26 Jul 2022 08:41:19 +0000 (16:41 +0800)]
tools: image: support i.MX93
Support build i.MX93 container image with mkimage
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:18 +0000 (16:41 +0800)]
board: freescale: imx93_evk: support ethernet
Add ethernet support
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:17 +0000 (16:41 +0800)]
net: dwc_eth_qos: introduce eqos hook eqos_get_enetaddr
i.MX has specific hook to get MAC address, so introduce a hook and move
i.MX code to its own driver
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:16 +0000 (16:41 +0800)]
net: eqos: add function to get phy node and address
Since new atheros PHY driver needs to access its PHY node through
phy device, we have to assign the phy node in ethernet controller
driver. Otherwise the PHY driver will fail to get some nodes
and properties.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:15 +0000 (16:41 +0800)]
net: dwc_eth_qos: move i.MX code out
Move i.MX code to a standalone file to make it easy for adding new
platform support
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:14 +0000 (16:41 +0800)]
net: dwc_eth_qos: public some functions
Move macros and structures to header file and make some functions
public, so that could used by other files, this is to
prepare split platform specific config to one file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:13 +0000 (16:41 +0800)]
net: dwc_eth_qos: fix build break when CLK not enabled
When CONFIG_CLK is not enabled, there will be buil break:
"error: ‘eqos’ undeclared (first use in this function)"
Take eqos definition out the CONFIG_CLK ifdef.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:12 +0000 (16:41 +0800)]
net: fec_mxc: support i.MX93
Support i.MX93 in fec_mxc driver
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:11 +0000 (16:41 +0800)]
imx: imx93_evk: Set ARM clock to 1.7Ghz
Set ARM clock to OD frequency 1.7Ghz, since we have set PMIC VDD_SOC
to Overdrive voltage 0.9V
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:10 +0000 (16:41 +0800)]
imx: imx93_evk: Add basic board support
Add basic board codes and defconfig for i.MX93 11x11 EVK board.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:09 +0000 (16:41 +0800)]
arm: dts: Add i.MX93 SoC DTSi file
Add the DTSi file and DT header files for i.MX93 SoC
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:08 +0000 (16:41 +0800)]
ddr: imx9: enable Performance monitor counter
Add Kconfig for enabling reference events counter in DDRC performance
monitor by default
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:07 +0000 (16:41 +0800)]
ddr: imx: Add i.MX9 DDR controller driver
Since i.MX9 uses same DDR PHY with i.MX8M, split the DDRPHY to a common
directory under imx, then use dedicated ddr controller driver for each
iMX9 and iMX8M.
The DDRPHY registers are space compressed, so it needs conversion to
access the DDRPHY address. Introduce a common PHY address remap function
for both iMX8M and iMX9 for all PHY registers accessing.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:06 +0000 (16:41 +0800)]
imx: imx9: clock: Add DDR clock support
Implement the DDR driver clock interfaces for set DDR rate and
bypass DDR PLL
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:05 +0000 (16:41 +0800)]
imx: imx9: Support multiple env storages at runtime
Select env storages according to boot device at runtime
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:04 +0000 (16:41 +0800)]
imx: imx9: Support booting m33 from Acore
Add bootaux command to support on-demand booting M33 from u-boot.
It kicks M33 via ATF by "bootaux 0x201e0000 0"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:03 +0000 (16:41 +0800)]
imx: imx9: Add M33 release prepare function
To support on-demand booting M33 image from A core. SPL needs
to follow M33 kick up sequence to release M33 firstly,
then set M33 CPUWAIT signal. ATF will clear CPUWAIT to kick
M33 to run.
The prepare function also works around the M33 TCM ECC issue by
clean the TCM. Also enable sentinel handshake and WDOG1 clock
for M33 stop and reset.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:41:02 +0000 (16:41 +0800)]
imx: imx9: Add MIX power init
Add power init of MEDIAMIX, MLMIX and DDRMIX. And clear isolation
of MIPI DSI/CSI, USBPHY after the power up.
SPL should call the power init in its boot sequence before accessing
above three MIX and USB.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:41:01 +0000 (16:41 +0800)]
imx: imx9: Add gpio registers structure
Add GPIO registers structure for iMX93, so that we can enable lpgpio
driver
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Alice Guo [Tue, 26 Jul 2022 08:41:00 +0000 (16:41 +0800)]
misc: fuse: update the code for accessing fuse of i.MX93
Sentinel have read access of OTP shadow register 0-511, and fsb have
read access of shadow 0-51/312-511.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Alice Guo [Tue, 26 Jul 2022 08:40:59 +0000 (16:40 +0800)]
misc: fuse: support to access fuse on i.MX93
i.MX93 fuse can be accessed through FSB and s400-api. Add mapping tables
for i.MX93. The offset address of FSB accessing OTP shadow registers is
different between i.MX8ULP and i.MX93, so use macro to define the offset
address instead of hardcode.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Alice Guo [Tue, 26 Jul 2022 08:40:58 +0000 (16:40 +0800)]
misc: imx8ulp: move fuse.c from imx8ulp to sentinel
The i.MX93 platform wants to reuse drivers/misc/imx8ulp/fuse.c. Moving
fuse.c from the folder imx8ulp to sentinel makes it can be used by other
platforms.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:57 +0000 (16:40 +0800)]
misc: S400_API: Rename imx8ulp_s400_msg to sentinel_msg
Use more generic name for S40x msg structure
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:56 +0000 (16:40 +0800)]
imx: imx9: Get the chip revision through S400 API
Update the get chip revision methond to use S400 API, also record
other information like lifecycle and UID to global data.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:55 +0000 (16:40 +0800)]
imx: imx9: Add AHAB boot support
Add AHAB driver for iMX9 to do authentication by calling sentinel API
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:54 +0000 (16:40 +0800)]
imx: imx9: Add TRDC driver for TRDC init
Add TRDC driver to iMX9. The TRDC init splits to two phases:
1. Early init phase will release TRDC from Sentinel and open write
permission to the memory where SPL image runs. Sentinel will set
the memory to RX only after ROM authentication for the OEM
closed part.
2. Init phase will configure TRDC to allow non-secure master to
access DDR. So the peripherals can work in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:53 +0000 (16:40 +0800)]
misc: s400_api: introduce ahab_release_m33_trout
Introduce Sentinel API ahab_release_m33_trout to make sure sentinel
release M33 trout and make sure M33 could boot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:52 +0000 (16:40 +0800)]
misc: S400_API: New API for FW status and chip info
Add new API to get sentinel FW status and SoC chip info
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:51 +0000 (16:40 +0800)]
misc: S400_API: Update release RDC API
To support more RDC instances on i.MX93, update API to latest
definition.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:50 +0000 (16:40 +0800)]
misc: s4mu: Support iMX93 with Sentinel MU
Support iMX93 communicate with Sentinel
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:49 +0000 (16:40 +0800)]
misc: imx: S400_API: Move S400 MU and API to a common place
Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400
MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:48 +0000 (16:40 +0800)]
imx: imx9: support romapi
i.MX9 shares same ROM API with i.MX8ULP, so make the i.MX8ULP the function
prototype common and usable by i.MX9.
Also include mmc env functions that use ROM API.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:47 +0000 (16:40 +0800)]
imx: imx9: disable watchdog
Disable all 3 wdogs on AIPS2 and unmask SRC reset trigger for WDOG3-5
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Jian Li [Tue, 26 Jul 2022 08:40:46 +0000 (16:40 +0800)]
imx: imx9: Add function to initialize timer
Add timer_init to update ARM arch timer with correct frequency
from system counter and enable system counter.
Signed-off-by: Jian Li <jian.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:45 +0000 (16:40 +0800)]
spl: Use SPL_FIT_IMAGE_TINY for iMX9
Select SPL_FIT_IMAGE_TINY for i.MX9
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:44 +0000 (16:40 +0800)]
mmc: fsl_esdhc_imx: Support i.MX9
Support i.MX9 for fsl_esdhc_imx driver
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:43 +0000 (16:40 +0800)]
imx: imx9: Add CCM and clock API support
Add clock API to support CCM root clock and LPCG setting
Set the CCM AUTHEN register to allow non-secure world to set
root clock and lpcg.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:42 +0000 (16:40 +0800)]
imx: pinctrl: add pinctrl and pinfunc file for i.MX93
Add the pinctrl driver and pinfunc header file to support iMX93
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:41 +0000 (16:40 +0800)]
gpio: pca953x: support pcal6524
Support pcal6524 IO expander driver
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:40 +0000 (16:40 +0800)]
fsl_lpuart: add i.MX9 support
i.MX9 shares same register layout as i.MX7ULP, so
add the i.MX9 define here.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:39 +0000 (16:40 +0800)]
imx: add basic i.MX9 support
Add i.MX9 Kconfig and basic files for the new SoC
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:38 +0000 (16:40 +0800)]
imx: add USB2_BOOT type
Add USB2_BOOT type for i.MX8ULP and i.MX9
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:37 +0000 (16:40 +0800)]
imx: move get_boot_device to common file
i.MX8MN/P/ULP supports ROM API, they have almost same get_boot_device
implementation, so move to a common file. And when support i.MX9,
no need to include the other function copy.
Since sys_proto.h is included in imx_romapi.c, there will be build
warning for i.MX8M because wdog_regs not defined, so include imx-regs.h
in i.MX8M sys_proro.h
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:36 +0000 (16:40 +0800)]
imx: move get_boot_device to common header
Most i.MX implements get_boot_device, move it to common header to
simplify code
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:35 +0000 (16:40 +0800)]
imx: simplify dependency with SPL_BOOTROM_SUPPORT
For SoCs support ROM API, CONFIG_SPL_BOOTROM_SUPPORT is needed,
so use this macro to guard the code to avoid extend the list.
And drop the guard with structure definition, there is no need.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:34 +0000 (16:40 +0800)]
imx: spl: Allow iMX7/8/8M to overwrite spl_board_boot_device
Move the default mapping of spl_boot_device to weak function of
spl_board_boot_device. So that every board of iMX7/8/8M can overwrite
this function to implement specific mapping.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 26 Jul 2022 08:40:33 +0000 (16:40 +0800)]
imx: Change USB boot device type
The SPL SDP is configured as BOOT_DEVICE_BOARD, so when booting from
USB, change its type to BOOT_DEVICE_BOARD, so we can use SDP.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:32 +0000 (16:40 +0800)]
arm: makefile: cleanup mach-imx usage
All the SoCs use mach-imx has CONFIG_MACH_IMX selected, so
the macro could be the gate to build arch/arm/mach-imx to simplify
the rules.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 26 Jul 2022 08:40:31 +0000 (16:40 +0800)]
spl: imx8mm: enlarge SPL_MAX_SIZE
The CONFIG_SPL_MAX_SIZE could be 0x27000 for i.MX8MM when SPL_TEXT_BASE
set to 0x7E1000.
The DDR firmware max uses 96KB, there is a 4KB padding header before
SPL_TEXT_BASE, so the SPL MAX SIZE is `256KB - 96KB - 4KB`.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Martyn Welch [Thu, 21 Jul 2022 13:47:56 +0000 (14:47 +0100)]
MAINTAINERS: Update file list for ARM Freescale IMX
The MAINTAINERS file currently lists files in
arch/arm/include/asm/arch-imx/ being part of the IMX maintainers
purview, however the arch/arm/include/asm/ directory also contains the
directories arch-imx8, arch-imx8m, arch-imx8ulp and arch-imxrt which
would also appear to be relevant to the team. Tweak the entry to cover
these directories so that tools like get_maintainers.pl will suggest
relevant maintainers when making changes just in these directories.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Jun Nie [Thu, 21 Jul 2022 10:30:05 +0000 (18:30 +0800)]
imx: syscounter: support timer_get_boot_us
With supporting timer_get_boot_us, we can profile boot up time with below
configs and function bootstage_mark_name().
CONFIG_BOOTSTAGE=y
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Douglas Anderson [Tue, 19 Jul 2022 21:56:27 +0000 (14:56 -0700)]
patman: By default don't pass "--no-tree" to checkpatch for linux
When you pass "--no-tree" to checkpatch it disables some extra checks
that are important for Linux. Specifically I want checks like:
warning: DT compatible string "boogie,woogie" appears un-documented
check ./Documentation/devicetree/bindings/
Let's make the default for Linux to _not_ pass --no-tree. We'll have a
config option and command line flag to override.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Oleksandr Suvorov [Wed, 13 Jul 2022 16:42:49 +0000 (19:42 +0300)]
dm: fix mis-word in SPL_DM description
Replace logically correct word in the description.
Fixes:
91a91ff804d ("dm: Add Kconfig options for driver model SPL support")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 13 Jul 2022 12:07:00 +0000 (06:07 -0600)]
doc: Make a start on docs for fdt command
Add some information about the 'fdt addr' subcommand, to get things
started.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 13 Jul 2022 12:06:59 +0000 (06:06 -0600)]
fdt: Start a test for the fdt command
Add a basic test of the 'fdt addr' command, to kick things off.
This includes a new convenience function to run a command from a printf()
string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 13 Jul 2022 12:06:58 +0000 (06:06 -0600)]
addrmap: Support on sandbox
Update this feature so that it works on sandbox, using a basic identity
mapping. This allows us to run the 'ut addrmap' test.
Also fix up the test to use the correct macros to access the linker
list, so that the 'ut addrmap' command actually works.
Signed-off-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Tue, 12 Jul 2022 17:41:29 +0000 (19:41 +0200)]
binman: Increase default fitImage data section resize step from 1k to 64k
Currently the fitImage data area is resized in 1 kiB steps. This works
when bundling smaller images below some 1 MiB, but when bundling large
images into the fitImage, this make binman spend extreme amount of time
and CPU just spinning in pylibfdt FdtSw.check_space() until the size
grows enough for the large image to fit into the data area. Increase
the default step to 64 kiB, which is a reasonable compromise -- the
U-Boot blobs are somewhere in the 64kiB...1MiB range, DT blob are just
short of 64 kiB, and so are the other blobs. This reduces binman runtime
with 32 MiB blob from 2.3 minutes to 5 seconds.
The following can be used to trigger the problem if rand.bin is some 32 MiB.
"
/ {
itb {
fit {
images {
test {
compression = "none";
description = "none";
type = "flat_dt";
blob {
filename = "rand.bin";
type = "blob-ext";
};
};
};
};
};
configurations {
binman_configuration: config {
loadables = "test";
};
};
};
"
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Tue, 12 Jul 2022 07:39:49 +0000 (09:39 +0200)]
log: force DEBUG when LOG_DEBUG is activated
When CONFIG_LOG is activated, if LOG_DEBUG is defined in a file and
DEBUG is not defined the trace with debug() macro are not displayed,
because the parameter cond : _DEBUG = 0 is checked in debug_cond().
With this patch the define DEBUG, used to force the trace generated by
debug() macro, is linked with the define LOG_DEBUG, used to force the
trace generated by other macros (log_debug, dev_dbg, pr_debug).
We only need to define LOG_DEBUG in a file to activate all the
traces generated by any U-Boot debug macro, as it is described in
/doc/develop/logging.rst
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Heinrich Schuchardt [Mon, 11 Jul 2022 06:25:33 +0000 (08:25 +0200)]
dm: fix logic of lists_bind_fdt()
If parameter drv of lists_bind_fdt() is specified, we shall bind only to
this very driver and to no other.
If the driver drv has an of_match property, we shall only bind to the
driver if it matches the compatible string of the device.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 11 Jul 2022 06:21:32 +0000 (08:21 +0200)]
configs: sandbox_defconfig: CONFIG_LOG_MAX_LEVEL=9
Without setting CONFIG_LOG_MAX_LEVEL to a value above 6 we will not detect
NULL dereferences and other errors in log_debug() calls.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 11 Jul 2022 06:21:31 +0000 (08:21 +0200)]
dm: avoid NULL dereference in lists_bind_fdt()
If parameter drv of lists_bind_fdt() is specified, we want to bind to this
specific driver even if its field of_match is NULL.
If entry->of_match is NULL, we should not dereference it in a debug
statement.
Fixes:
d3e773613b6d ("dm: core: Use U-Boot logging instead of pr_debug()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 11 Jul 2022 06:21:30 +0000 (08:21 +0200)]
test: fix log tests
Consider CONFIG_LOG_MAX_LEVEL and gd->default_log_level in
* do_log_test_helpers()
* log_test_dropped()
* log_test_level_deny()
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Sun, 10 Jul 2022 13:40:22 +0000 (15:40 +0200)]
dm: avoid NULL dereference in add_item()
acpi_add_other_item() passes dev = NULL. Instead of dev->name write the
string "other" to the debug log:
ACPI: Writing ACPI tables at 1fd3000
0base: writing table '<NULL>'
* other: Added type 3,
0000000011fd4000, size 240
1facs: writing table 'FACS'
* other: Added type 3,
0000000011fd4240, size 40
5csrt: writing table 'CSRT'
* other: Added type 3,
0000000011fd4280, size 30
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ashok Reddy Soma [Fri, 15 Jul 2022 14:01:19 +0000 (19:31 +0530)]
spi: zynq_qspi: Fix programming qspi speed
When programming qspi flash speed we need to check the requested flash
speed not to exceed the spi max frequency. In the current implementation
we are checking qspi ref clk instead. This commit fixes the issue by
checking the requested speed and programs the specified max frequency.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-5-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ashok Reddy Soma [Fri, 15 Jul 2022 14:01:18 +0000 (19:31 +0530)]
spi: zynq_qspi: Add support for zynq_qspi_mem_exec_op
Add support_ops function zynq_qspi_mem_exec_op to check controller
supported operations by spi-mem framework. Current default support ops
function does not allow dummy buswidth no more than 1, unless we are
using buswidth is 4 for TX.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-4-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Fri, 15 Jul 2022 14:01:17 +0000 (19:31 +0530)]
spi: zynq_qspi: Use dummy buswidth in dummy byte calculation
Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Siva Durga Prasad Paladugu [Fri, 15 Jul 2022 14:01:16 +0000 (19:31 +0530)]
spi: zynq_qspi: Add child pre probe function
Add child pre probe function in the driver. Update max_hz of priv from
spi_slave structure.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Sat, 16 Jul 2022 06:58:47 +0000 (12:28 +0530)]
spi: xilinx_spi: Add support ops to axi qspi driver
Add support_ops function to check controller supported operations by
spi-mem framework. Current default support ops function does not allow
dummy buswidth no more than 1, unless we are using buswidth is 4 for TX.
In order to support dummy buswidth > 1 by spi-nor framework we are adding
explicit support_ops to check controller supported operations.
Fix dummy bytes calculation incase of valid dummy bytes when dummy
buswidth is > 1. Current dummy bytes calculation does not provide
correct dummy values for dummy buswidth > 1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657954727-31972-3-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Sat, 16 Jul 2022 06:58:46 +0000 (12:28 +0530)]
spi: xilinx_spi: Add support for spi memory operations
Add support for spi memory operations for xilinx AXI qspi driver.
This provides an high-level interface to execute SPI memory
operations by the controller.
Remove existing spi transfer based implementation and use
spi memory based exec_op() implementation for qspi IO operations.
Simplified existing startup_block implementation.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657954727-31972-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Adrian Fiergolski [Fri, 22 Jul 2022 14:16:14 +0000 (17:16 +0300)]
fpga: zynqmp: support loading encrypted bitfiles
Add supporting new compatible string "u-boot,zynqmp-fpga-enc" to
handle loading encrypted bitfiles.
This feature requires encrypted FSBL, as according to UG1085:
"The CSU automatically locks out the AES key, stored in either BBRAM
or eFUSEs, as a key source to the AES engine if the FSBL is not
encrypted. This prevents using the BBRAM or eFUSE as the key source
to the AES engine during run-time applications."
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-14-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:13 +0000 (17:16 +0300)]
fpga: zynqmp: support loading authenticated images
Add supporting new compatible string "u-boot,zynqmp-fpga-ddrauth" to
handle loading authenticated images (DDR).
Based on solution by Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Link: https://lore.kernel.org/r/20220722141614.297383-13-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:12 +0000 (17:16 +0300)]
fpga: zynqmp: add bitstream compatible checking
Check whether the FPGA ZynqMP driver supports the given bitstream
image type.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-12-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:11 +0000 (17:16 +0300)]
fpga: zynqmp: reduce zynqmppl_load() code
Reduce the function code by calling xilinx_pm_request() once only.
Use the same variable bsize_req to store either bstream size in bytes
or an address of bstream size according to a type required by the
firmware version. Remove obsolete debug().
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-11-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:10 +0000 (17:16 +0300)]
fpga: xilinx: pass compatible flags to load() callback
These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-10-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:09 +0000 (17:16 +0300)]
spl: fit: pass real compatible flags to fpga_load()
Convert taken FPGA image "compatible" string to a binary compatible
flag and pass it to an FPGA driver.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-9-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
Oleksandr Suvorov [Fri, 22 Jul 2022 14:16:08 +0000 (17:16 +0300)]
fpga: add fpga_compatible2flag
Add a "compatible" string to binary flag converter, which uses
a callback str2flag() of given FPGA driver if available.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-8-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>