Heinrich Schuchardt [Mon, 18 Jan 2021 19:24:02 +0000 (20:24 +0100)]
doc: move test/README to HTML documentation
Move test/README to the 'Develop U-Boot' chapter of the HTML documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 18 Jan 2021 19:24:01 +0000 (20:24 +0100)]
doc: structure doc/develop/index.rst
Provide sub-chapters for 'Develop U-Boot'
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Thu, 14 Jan 2021 11:04:04 +0000 (12:04 +0100)]
doc: update help message
Update the help message used for 'make help':
Documentation targets:
Linux kernel internal documentation in different formats from ReST:
=>
U-Boot documentation in different formats from ReST:
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Heinrich Schuchardt [Fri, 1 Jan 2021 00:21:11 +0000 (01:21 +0100)]
doc: update Kernel documentation build system
Update the docomentation build system according to Linux v5.11-rc1.
With this patch we can build the HTML documentation using either of
Sphinx 2 and Sphinx 3.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Fix warning in b4860qds.rst about "Switch Settings"]
Signed-off-by: Tom Rini <trini@konsulko.com>
Alexandru Gagniuc [Tue, 15 Dec 2020 19:15:43 +0000 (13:15 -0600)]
doc: FIT image: Clarify format and simplify syntax
** Introduction
There are currently four ways to load an OS image with u-boot
1. SPL -> u-boot -> bootm
2. SPL blue falcon mode
3. "Basic" FIT image (CONFIG_LOAD_FIT)
4. "Full-featured" FIT image (CONFIG_LOAD_FIT_FULL)
These four code paths were developed independently, and share very
little code. (3) and (4), behave very differently, are littered with
special cases. They even have different DTS syntax and properties.
The cause of this divergence is that the FIT format specification
leaves a number of things open to interpretation. The purpose of this
change is to enable the reduction of code size, duplication, and
complexity by updating and streamlining the FIT format.
We are only marginally concerned with backwards compatibility, because
we don't have inter-compatibility. For example, CONFIG_LOAD_FIT is
able to load images that CONFIG_LOAD_FIT_FULL won't. This is a direct
result of the incompatible syntax between the two implementations.
Ideally, these changes would enable "simple" FIT to be a subset of the
"full" fit implementation, and share most code. These changes should
also eliminate the need for falcon mode (although we are not
advocating for the removal of falcon mode at this time).
** Description of changes
* The "configurations" node is now mandatory
Guessing how to load components based on their "os" and "type" invites
confusion and superfluous heuristics. Instead, require each FIT image
to be explicit on how components should be loaded.
* Eliminate "ramdisk", "setup", "standalone", and "fpga" properties
Having too many special purpose properties requires special-casing
FIT loading code. When a special property can be handled by another
property, it is redundant.
- A "ramdisk" is identical to a loadable. Thus ramdisk images should
be placed under "loadables".
- A "setup" node can be achieved by using a "kernel" or "firmware"
property instead.
- "standalone" is used for u-boot nodes. The correct property to use
in this case is "firmware".
- "fpga" is a loadable
* Prioritize control between "firmware" and "kernel"
"firmware" and "kernel" are special nodes in that control is passed
to the "entry-point" of the image. Both can be present, for example,
an OP-TEE firmware with a linux kernel. When both are present,
control is passed to the "firmware" image.
** Further generalizations (not included herein)
The "firmware" and "kernel" properties could be generalized as a
"next-boot-stage", or similar name. This "next" stage would be special
in that it is both executable, and is the stage that is passed
control. For example, "next-stage" could be an op-tee image, with
linux as a loadable, or a u-boot image.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tom Rini [Thu, 21 Jan 2021 12:39:47 +0000 (07:39 -0500)]
Merge tag 'u-boot-rockchip-
20210121' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- New board: rk3328 NanoPi R2S board;
- Fix init voltage for some rk3399 boards;
- enable rng for rk3399 by default;
- set default to SPI bus 1 for SPI-flash for some board;
- add dwc PCIe controller driver on rockchip platform;
Shawn Lin [Fri, 15 Jan 2021 10:01:22 +0000 (18:01 +0800)]
pci: Add Rockchip dwc based PCIe controller driver
Add Rockchip dwc based PCIe controller driver for rk356x platform.
Driver support Gen3 by operating as a Root complex.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Shawn Lin [Fri, 15 Jan 2021 10:01:21 +0000 (18:01 +0800)]
phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY
Add the Rockchip Synopsys based PCIe 3.0 PHY driver as
part of Generic PHY framework.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
David Bauer [Wed, 6 Jan 2021 23:06:11 +0000 (00:06 +0100)]
rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
This adds support for the NanoPi R2S from FriendlyArm.
Rockchip RK3328 SoC
1GB DDR4 RAM
Gigabit Ethernet (WAN)
Gigabit Ethernet (USB3) (LAN)
USB 2.0 Host Port
MicroSD slot
Reset button
WAN - LAN - SYS LED
Signed-off-by: David Bauer <mail@david-bauer.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Peter Robinson [Wed, 16 Dec 2020 15:48:43 +0000 (15:48 +0000)]
configs: rk3399: enable rng on firefly/rock960/rockpro64
Enable the RNG on the Firefly, rock960 and RockPro64 devices
to enable KASLR on devices that support it.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Akash Gajjar <akash@openedev.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Peter Robinson [Wed, 16 Dec 2020 15:48:42 +0000 (15:48 +0000)]
arm: dts: rockchip: rk3399: enable rng at the SoC level
The rng is embedded in the SoC so enable it in the device tree
universally, the use of it can be controlled by enabling/disabling
at the device config level.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Kever Yang [Mon, 7 Dec 2020 02:52:53 +0000 (10:52 +0800)]
rockchip: leez-rk3399: Provide init voltage
Add missing regulator-init-microvolt property to vdd_log regulator.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Mon, 7 Dec 2020 02:52:52 +0000 (10:52 +0800)]
rockchip: firefly-rk3399: Provide init voltage
Add missing regulator-init-microvolt property to vdd_log regulator.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Mon, 7 Dec 2020 02:52:51 +0000 (10:52 +0800)]
rockchip: evb-rk3399: Provide init voltage
Add missing regulator-init-microvolt property to vdd_center regulator.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Hugh Cole-Baker [Sun, 22 Nov 2020 13:03:46 +0000 (13:03 +0000)]
rockchip: puma-haikou: default to SPI bus 1 for SPI-flash
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0. Formerly the alias spi1
pointed to &spi5, use an alias spi5 for this instead.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Hugh Cole-Baker [Sun, 22 Nov 2020 13:03:45 +0000 (13:03 +0000)]
rockchip: rk3399-roc-pc: default to SPI bus 1 for SPI-flash
SPI flash on this board is located on bus 1, default to using bus 1 for
SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to
bus 0.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes:
c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Tom Rini [Wed, 20 Jan 2021 21:45:21 +0000 (16:45 -0500)]
Merge branch '2021-01-20-fs-fixes'
- Minor SquashFS, BTRFS ubifs fixes
Heinrich Schuchardt [Fri, 25 Dec 2020 14:19:39 +0000 (15:19 +0100)]
ubifs: do not decide upon uninitialized variable
Before 'if (err)' we have to initialize the variable otherwise we use a
random value from the stack.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Fri, 25 Dec 2020 12:45:25 +0000 (13:45 +0100)]
fs: btrfs: simplify close_ctree_fs_info()
At the beginning of close_ctree_fs_info() the value 0 is assigned to err
and never changed before testing it.
Let's get rid of the superfluous variable.
Fixes:
f06bfcf54d0e ("fs: btrfs: Crossport open_ctree_fs_info() from btrfs-progs")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Campbell Suter [Mon, 23 Nov 2020 02:40:03 +0000 (15:40 +1300)]
Fix squashfs failing to load sparse files
SquashFS supports sprase blocks in files - that is, if a given block is
composed only of zeros, it's not written to the output file to save
space and it's on-disk length field is set to zero to indicate that.
Previously the squashfs driver did not recognise that, and would attempt
to read and decompress a zero-sized block, which obviously failed.
The following command may be used to create a file for testing:
cat <(dd if=/dev/urandom of=/dev/stdout bs=1M count=1) \
<(dd if=/dev/zero of=/dev/stdout bs=1M count=1) \
<(dd if=/dev/urandom of=/dev/stdout bs=1k count=200) >test_file
Signed-off-by: Campbell Suter <campbell@snapit.group>
Qu Wenruo [Sat, 31 Oct 2020 01:07:50 +0000 (09:07 +0800)]
fs: btrfs: volumes: prevent overflow for multiplying
In __btrfs_map_block() we do a int * int and assign it to u64.
This is not safe as the result (int * int) is still evaluated as (int)
thus it can overflow.
Convert one of the multiplier to u64 to prevent such problem.
In real world, this should not cause problem as we have device number
limit thus it won't go beyond 4G for a single stripe.
But it's harder to teach coverity about all these hidden limits, so just
fix the possible overflow.
Reported-by: Coverity CID 312957
Reported-by: Coverity CID 312948
Signed-off-by: Qu Wenruo <wqu@suse.com>
Tom Rini [Wed, 20 Jan 2021 15:49:23 +0000 (10:49 -0500)]
Merge tag 'efi-2021-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-04-rc1-2
* Provide a test tool for initial RAM disk provided via load file2 protocol.
* Make more items configurable to reduce code size:
* Boot manager
* EFI_DT_FIXUP_PROTOCOL
* EFI_DEVICE_PATH_UTILITIES_PROTOCOL
* Bug fixes
* avoid EFI runtime symbols in global symbol table
Tom Rini [Wed, 20 Jan 2021 15:49:05 +0000 (10:49 -0500)]
Merge tag 'xilinx-for-v2021.04-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2021.04-v2
env:
- Unlock redundant variable configuration for all
xilinx:
- Enable seps525 by default
- Export bootseq via variable
- Update board_fdt_blob_setup()
mmc:
- Xenon macro removal
Michal Simek [Wed, 13 Jan 2021 09:25:50 +0000 (10:25 +0100)]
env: Remove all dependencies for SYS_REDUNDAND_ENVIRONMENT
CONFIG_SYS_REDUNDAND_ENVIRONMENT is changing in env_internal.h how u-boot
works with variables. struct environment_s has one byte flags property
which also affects ENV_SIZE macro.
I have reached the case where CONFIG_ENV_IS_NOWHERE is default setup
but custom scripts can be designed in a way that u-boot is asked to
import/export variables from/to file which can be in certain format.
That's why also for this configuration make sense to enable
CONFIG_SYS_REDUNDAND_ENVIRONMENT because it depends on environment file
format.
The patch is removing dependency on this configuration to support selecting
environment file format without any specific dependency where variables are
stored.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Michal Simek [Mon, 4 Jan 2021 10:07:28 +0000 (11:07 +0100)]
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL
This hook is used in full U-Boot that's why there is no reason to touch
this location from SPL. The hook was introduced for QEMU usage but none is
really running SPL on QEMU that's why it shouldn't break any usecase.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 4 Jan 2021 10:03:36 +0000 (11:03 +0100)]
xilinx: common: Change macro handling in board_fdt_blob_setup()
Remove ifdef logic which is handled by preprocessor and move it link time
optimization to get full compile code coverage.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 11 Jan 2021 12:46:58 +0000 (13:46 +0100)]
xilinx: zynqmp: Save bootseq number for SD/EMMC boot modes
For systems which has both sdhci controllers enable it is worth to export
bootseq number for variables. Then the variable can be used in custom
scripts to tune logic for OS.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 5 Jan 2021 13:27:45 +0000 (14:27 +0100)]
mmc: xenon_sdhci: Remove duplicated macros
There is no need to define the same macros in drivers.
All macros have been added by commit
17a42abb40dd ("mmc: Define timing
macro's").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Michal Simek [Thu, 7 Jan 2021 13:05:23 +0000 (14:05 +0100)]
arm64: zynqmp: Enable seps and related video configs
Enable this driver to get build and probe for our platform.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Ilias Apalodimas [Sat, 16 Jan 2021 15:28:04 +0000 (17:28 +0200)]
efi_loader: Avoid emitting efi_var_buf to .GOT
Atish reports that on RISC-V, accessing the EFI variables causes
a kernel panic. An objdump of the file verifies that, since the
global pointer for efi_var_buf ends up in .GOT section which is
not mapped in virtual address space for Linux.
<snip of efi_var_mem_find>
0000000000000084 <efi_var_mem_find>:
84: 715d addi sp,sp,-80
* objdump -dr
0000000000000086 <.LCFI2>:
86: e0a2 sd s0,64(sp)
88: fc26 sd s1,56(sp)
8a: e486 sd ra,72(sp)
8c: f84a sd s2,48(sp)
8e: f44e sd s3,40(sp)
90: f052 sd s4,32(sp)
92: ec56 sd s5,24(sp)
94:
00000497 auipc s1,0x0
94: R_RISCV_GOT_HI20 efi_var_buf
98:
0004b483 ld s1,0(s1) # 94 <.LCFI2+0xe>
98: R_RISCV_PCREL_LO12_I .L0
98: R_RISCV_RELAX *ABS*
* objdump -t
0000000000000084 g F .text.efi_runtime
00000000000000b8 efi_var_mem_find
With the patch applied:
* objdump -dr
0000000000000086 <.LCFI2>:
86: e0a2 sd s0,64(sp)
88: fc26 sd s1,56(sp)
8a: e486 sd ra,72(sp)
8c: f84a sd s2,48(sp)
8e: f44e sd s3,40(sp)
90: f052 sd s4,32(sp)
92: ec56 sd s5,24(sp)
94:
00000497 auipc s1,0x0
94: R_RISCV_PCREL_HI20 .LANCHOR0
94: R_RISCV_RELAX *ABS*
98:
00048493 mv s1,s1
98: R_RISCV_PCREL_LO12_I .L0
98: R_RISCV_RELAX *ABS*
* objdump -t
0000000000000008 l O .data.efi_runtime
0000000000000008 efi_var_buf
On arm64 this works, because there's no .GOT entries for this
and everything is converted to relative references.
* objdump -dr (identical pre-post patch, only the new function shows up)
00000000000000b4 <efi_var_mem_find>:
b4:
aa0003ee mov x14, x0
b8:
9000000a adrp x10, 0 <efi_var_mem_compare>
b8: R_AARCH64_ADR_PREL_PG_HI21 .data.efi_runtime
bc:
91000140 add x0, x10, #0x0
bc: R_AARCH64_ADD_ABS_LO12_NC .data.efi_runtime
c0:
aa0103ed mov x13, x1
c4:
79400021 ldrh w1, [x1]
c8:
aa0203eb mov x11, x2
cc:
f9400400 ldr x0, [x0, #8]
d0:
b940100c ldr w12, [x0, #16]
d4:
8b0c000c add x12, x0, x12
So let's switch efi_var_buf to static and create a helper function for
anyone that needs to update it.
Fixes:
e01aed47d6a0 ("efi_loader: Enable run-time variable support for tee based variables")
Reported-by: Atish Patra <atishp@atishpatra.org>
Tested-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 17 Jan 2021 06:52:09 +0000 (07:52 +0100)]
efi_loader: efi_size_in_pages() missing parentheses
Add parentheses around size to avoid possible operator precedence problems.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 19 Jan 2021 09:06:00 +0000 (10:06 +0100)]
efi_selftest: use CRLF as line endings in dtbdump
EFI applications must use CR LF as line endings.
Provide a print() function to reduce code size.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 17 Jan 2021 06:30:26 +0000 (07:30 +0100)]
efi_selftest: provide initrddump test tool
Provide an UEFI application to save the initial RAM disk provided by U-Boot
via the Load File2 protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Sun, 17 Jan 2021 04:41:41 +0000 (05:41 +0100)]
efi_selftest: don't compile dtbdump if GENERATE_ACPI_TABLE
If we are using ACPI tables instead of a device tree, we don't need the
dtbdump.efi test tool.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 17 Jan 2021 04:13:21 +0000 (05:13 +0100)]
efi_selftest: ask before overwriting in dtbdump.efi
Before overwriting an existing file ask the user.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 16 Jan 2021 08:58:06 +0000 (09:58 +0100)]
efi_loader: remove EFI_UNICODE_COLLATION_PROTOCOL
In EFI 1.10 a version of the Unicode collation protocol using ISO 639-2
language codes existed. This protocol is not part of the UEFI specification
any longer. It was however required to run the UEFI Self Certification Test
(SCT) II, version 2.6, 2017. So we implemented it for the sole purpose of
running the SCT.
As the SCT does not need the protocol anymore it is time for removal.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 16 Jan 2021 08:44:25 +0000 (09:44 +0100)]
efi_loader: EFI_DEVICE_PATH_UTILITIES_PROTOCOL configurable
Allow the EFI_DEVICE_PATH_UTILITIES_PROTOCOL to be disabled via
configuration.
On systems that are very tight on U-Boot image size we may want to disable
the protocol. As it is required to run the UEFI Shell enable it by default.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 16 Jan 2021 08:33:24 +0000 (09:33 +0100)]
efi_loader: make EFI_DT_FIXUP_PROTOCOL configurable
Allow EFI_DT_FIXUP_PROTOCOL to be disabled via configuration.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 16 Jan 2021 07:50:10 +0000 (08:50 +0100)]
efi_loader: fixup protocol, avoid forward declaration
Avoid a forward declaration.
Add a missing function description.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Fri, 15 Jan 2021 18:02:50 +0000 (19:02 +0100)]
efi_loader: make the UEFI boot manager configurable
Some boards are very tight on the binary size. Booting via UEFI is possible
without using the boot manager.
Provide a configuration option to make the boot manager available.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Tue, 19 Jan 2021 20:35:00 +0000 (15:35 -0500)]
Revert "net: eth-uclass: Change uclass driver name to ethernet"
This reverts commit
1231184caacad32c180d7e2338a645f7dfe9571a.
While the change is fine in theory, a number of tests need to be updated
to match.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 19 Jan 2021 19:46:45 +0000 (14:46 -0500)]
Merge branch '2021-01-19-networking-improvements'
- e1000, ftgmac100: Add support for getting the MAC
- General networking improvements
- dwc_eth_qos, ks8851 fixes
Heinrich Schuchardt [Fri, 15 Jan 2021 18:02:49 +0000 (19:02 +0100)]
efi_loader: move load options to new module
Move all load options related functions to a new module. So that they can
be compiled independently.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
David Wu [Fri, 8 Jan 2021 02:53:05 +0000 (10:53 +0800)]
net: eth-uclass: Change uclass driver name to ethernet
dev_read_alias_seq() used uc_drv->name compared to alias
stem string, Ethernet's alias stem uses "ethernet", which
does not match the eth-uclass driver name "eth", can not
get the correct index of ethernet alias namer. So it seems
change uclass driver name to match the alias stem is a more
reasonable way.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Thu, 7 Jan 2021 10:12:16 +0000 (11:12 +0100)]
net: dwc_eth_qos: Pad descriptors to cacheline size
The DWMAC4 IP has the possibility to skip up to 7 AXI bus width size words
after the descriptor. Use this to pad the descriptors to cacheline size and
remove the need for noncached memory altogether. Moreover, this lets Tegra
use the generic cache flush / invalidate operations.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Wed, 6 Jan 2021 14:16:01 +0000 (15:16 +0100)]
net: ks8851: Reset internal RXFC count on bad packet
A sporadic condition occurs when the "bad packet" error is triggered
repeatedly, which results in "bad packet" messages scrolling on the
console during transfer. To avoid triggering this, reset the internal
RXFC count on the first occurance of the "bad packet", which forces
the code to re-read the RX packet count from the MAC, and prevents
any additional "bad packet" messages if there are no more packets in
the MAC. Also print better debug information if this condition occurs.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Tom Rini <trini@konsulko.com>
Matthias Brugger [Fri, 18 Dec 2020 09:28:04 +0000 (10:28 +0100)]
net: Use NDRNG device in srand_mac()
When calling srand_mac we use a weak seed dependent on the
mac address. If present, use a RNG device instead to incerase entropy.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Matthias Brugger [Fri, 18 Dec 2020 09:28:03 +0000 (10:28 +0100)]
lib: uuid: use RNG device if present
When calculating a random UUID we use a weak seed.
Use a RNG device if present to increase entropy.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Hongwei Zhang [Thu, 10 Dec 2020 23:11:09 +0000 (18:11 -0500)]
net: ftgmac100: Read and retain MAC address
Read and retain MAC address across flash and QEMU support.
Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Jorge Ramirez-Ortiz [Fri, 4 Dec 2020 19:59:58 +0000 (20:59 +0100)]
net: eth_legacy - fix build CMD_PCAP
Fix typo which would cause a build error.
Fixes:
3eaac6307df ("net: introduce packet capture support")
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Harm Berntsen [Fri, 27 Nov 2020 21:45:56 +0000 (21:45 +0000)]
net: tftp: Fix incorrect tftp_next_ack on no OACK
When the tftp server did not send any OACK, the tftp_next_ack variable
was not set to the correct value . As the server was transmitting
blocks we generated a lot of 'Received unexpected block: $n, expected
$n+1' error messages. Depending on the timeout setting the transfer
could still complete though.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Ramon Fried <rfried.dev@gmail.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
David Rivshin [Sun, 15 Nov 2020 03:12:47 +0000 (22:12 -0500)]
net: Do not respond to ICMP_ECHO_REQUEST if we do not have an IP address
While doing DHCP the interface IP is set to 0.0.0.0. This causes the
check in net.c on dst_ip to be effectively skipped, and all IP datagrams
are accepted up the IP stack. In the case of an ICMP_ECHO_REQUEST for the
matching MAC address (regardless of destination IP), the result is that
an ICMP_ECHO_REPLY is sent. The source address of the ICMP_ECHO_REPLY is
0.0.0.0, which is an illegal source address.
This can happen in common practice with the following sequence:
DHCP (U-Boot or OS) acquires IP address 10.0.0.1
System reboots
U-Boot starts DHCP and send DHCP DISCOVER
DHCP server decides to OFFER 10.0.0.1 again
(perhaps because of existing lease or manual configuration)
DHCP server tries to PING 10.0.0.1 to see if anyone is squatting on it
DHCP server still has our MAC address in its ARP table for 10.0.0.1
U-Boot receives PING, and responds with an illegal source address
This may further result in a the DHCP server seeing the response as
confirmation that someone is squatting on 10.0.0.1, and picking a
new IP address from the pool to try again
Signed-off-by: David Rivshin <drivshin@allworx.com>
Ian Ray [Wed, 4 Nov 2020 16:26:01 +0000 (17:26 +0100)]
net: e1000: implement eth_write_hwaddr for DM_ETH
Implement programming MAC address to the hardware also for device model
configuration.
Fixes:
b565b18a294f ("board: ge: bx50v3: Enable DM for PCI and ethernet")
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Matthias Schiffer [Wed, 4 Nov 2020 13:45:14 +0000 (14:45 +0100)]
net: eth-uclass: avoid running start() twice without stop()
Running the start() handler twice without a stop() inbetween completely
breaks communication for some ethernet drivers like fec_mxc.
eth_halt() is called before each eth_init(). Due to the switch to
eth_is_active() in commit
68acb51f442f ("net: Only call halt on a driver
that has been init'ed"), this is not sufficient anymore when netconsole
is active: eth_init_state_only()/eth_halt_state_only() manipulate the
state check that is performed by eth_is_active() without actually
calling into the driver.
The issue can be triggered by starting a network operation (e.g. ping or
tftp) while netconsole is active.
Add an additional "running" flag that reflects the actual state of the
driver and use it to ensure that eth_halt() actually stops the device as
it is supposed to.
Fixes:
68acb51f442f ("net: Only call halt on a driver that has been init'ed")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Tom Rini [Tue, 19 Jan 2021 12:56:59 +0000 (07:56 -0500)]
Merge branch '2021-01-18-assorted-platform-updates'
- Assorted MediaTek, AST2x00 updates
- Assorted driver fixes for various platforms
- Keymile platform updates
- Add pwm command, mp5416 pmic driver
Weijie Gao [Tue, 12 Jan 2021 05:44:11 +0000 (13:44 +0800)]
dts: mt7622: use accurate clock source fot mtk_timer
The input system clock for mt7622 timer is 10MHz and can be retrieved
through the clk driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 12 Jan 2021 05:44:02 +0000 (13:44 +0800)]
timer: mtk_timer: initialize the timer before use
The timer being used by this driver may have already been used by first
stage bootloader (e.g. ATF/preloader), and it's settings may differ from
what this driver is going to use.
This may cause issues, such as inaccurate timer frequency due to
incorrect clock divider.
This patch adds the initialization code to avoid them.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Heinrich Schuchardt [Sun, 27 Dec 2020 20:18:26 +0000 (21:18 +0100)]
pinctrl: mediatek: correct error handling
If no GPIO controller is found, the return value should not depend on a
random value on the stack. Initialize variable ret.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Heinrich Schuchardt [Sun, 27 Dec 2020 10:54:23 +0000 (11:54 +0100)]
mtd: remove drivers/mtd/mw_eeprom.c
drivers/mtd/mw_eeprom.c contains code that never worked. mw_eeprom_write()
and mw_eeprom_read() have incorrect loop conditions:
while (len <= 2) {
CONFIG_MW_EEPROM is not set anywhere. So let's simply drop the module.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 27 Dec 2020 10:48:49 +0000 (11:48 +0100)]
drivers: qe: avoid double free()
Avoid calling free(addr) twice if the device for ucode is not found.
The problem was indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 27 Dec 2020 09:50:26 +0000 (10:50 +0100)]
mmc: fsl_esdhc_spl: remove superfluous free()
Freeing a buffer before calling hang() is superfluous. Removing the call
reduces the SPL size.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Andrey Zhizhikin [Sun, 13 Dec 2020 20:36:06 +0000 (20:36 +0000)]
doc: board: freescale: advise to use newer atf and firmware
Update branch and version information of ATF and DDR firmware files to
point to latest releases provided by NXP.
This is especially critical for imx8mp evk, as the ATF support for that
SoC is only available in latest releases.
Align all SoCs from imx8m family to use identical revisions of ATF and
DDR firmware.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Heinrich Schuchardt [Sun, 27 Dec 2020 09:26:00 +0000 (10:26 +0100)]
dma: bcm6348: incorrect buffer allocation
Calling calloc() for 0 members does not make any sense.
Setting ch_priv->busy_desc = NULL for ch_priv->desc_cnt > 0 is equally
unreasonable.
The current code will lead to a NULL dereference in bcm6348_iudma_enable().
The assignments for ch_priv->busy_desc are obviously swapped.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Pragnesh Patel [Tue, 22 Dec 2020 06:00:05 +0000 (11:30 +0530)]
cmd: Add a pwm command
Add the command "pwm" for controlling the pwm channels. This
command provides pwm invert/config/enable/disable functionalities
via PWM uclass drivers
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tim Harvey [Mon, 21 Dec 2020 16:19:39 +0000 (08:19 -0800)]
power: pmic: add driver for Monolithic Power mp5416
This adds basic register access and child regulator binding
for the Monolithic MP5416 Power Management IC which integrates
four DC/DC switching converters and five LDO regulators.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Chia-Wei, Wang [Mon, 14 Dec 2020 05:54:29 +0000 (13:54 +0800)]
configs: aspeed: Add defconfig for AST2600 EVB
Add the default configuration for the AST2600 EVB.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Chia-Wei, Wang [Mon, 14 Dec 2020 05:54:28 +0000 (13:54 +0800)]
aspeed: Add AST2600 platform support
Add low level platform initialization for the AST2600 SoC.
The 2-stage booting with U-Boot SPL are leveraged to support
different booting mode.
However, currently the patch supports only the booting from
memory-mapped SPI flash.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Chia-Wei, Wang [Mon, 14 Dec 2020 05:54:27 +0000 (13:54 +0800)]
ARM: dts: aspeed: Add AST2600 SoC support
AST2600 is the 7th generation of Aspeed SoC designated for
Interated Remote Management Processor.
AST2600 has significant performance improvement by integrating
1.2GHz dual-core ARM Cortex A7 (r0p5) CPU with FPU. Most of the
controllers are also improved with more features and better
performance than preceding AST24xx/AST25xx.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Chia-Wei, Wang [Mon, 14 Dec 2020 05:54:26 +0000 (13:54 +0800)]
reset: aspeed: Add AST2600 reset support
Add controller reset support through the
System Control Unit (SCU) of AST2600 SoC.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Chia-Wei, Wang [Mon, 14 Dec 2020 05:54:25 +0000 (13:54 +0800)]
wdt: aspeed: Add AST2600 watchdog support
AST2600 has 8 watchdog timers including 8 sets of
32-bit decrement counters, based on 1MHz clock.
A 64-bit reset mask is also supported to specify
which controllers should be reset by the WDT reset.
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Dylan Hung [Mon, 14 Dec 2020 05:54:24 +0000 (13:54 +0800)]
ram: aspeed: Add AST2600 DRAM control support
AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600.
The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb),
512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Ryan Chen [Mon, 14 Dec 2020 05:54:23 +0000 (13:54 +0800)]
clk: aspeed: Add AST2600 clock support
This patch adds the clock control driver
for the AST2600 SoC.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Kate Liu [Fri, 11 Dec 2020 21:46:13 +0000 (13:46 -0800)]
board: presidio: Add Parallel NAND support
Set environment for Nand flash (U-boot 2020.04):
- add nand flash in the device tree
- add new default configuration file for G3 using parallel Nand
- set nand parameters in presidio_asic.h
Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Kate Liu [Fri, 11 Dec 2020 21:46:12 +0000 (13:46 -0800)]
mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC support
Add Cortina Access parallel Nand support for CAxxxx SOCs
Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
CC: Scott Wood <oss@buserror.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
Holger Brunck [Fri, 6 Nov 2020 09:42:08 +0000 (10:42 +0100)]
km/arm: cleanup defconfig files
Disable some unneeded config options and adapt the ident string.
CC: Stefan Roese <sr@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Holger Brunck [Tue, 3 Nov 2020 14:41:25 +0000 (15:41 +0100)]
km/kirkwood: enable USB support and the host controller driver
Our kirkwood device embeds a USB host controller that is now used
on some boards. This enables the support of USB and the corresponding
driver.
Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com>
CC: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Harm Berntsen [Fri, 6 Nov 2020 12:20:44 +0000 (12:20 +0000)]
mmc: Only retrieve cd pin when GPIO is enabled
The driver only needs to retrieve the pin for the ACPI info. The driver
itself works without depending on GPIO.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Harm Berntsen [Fri, 6 Nov 2020 12:24:17 +0000 (12:24 +0000)]
acpi: Add missing ARM acpi_table header
The pci_mmc.c driver can generate ACPI info and therefore includes
asm/acpi_table.h by proxy. This file does not exist for the ARM
architecture and thus code compilation failed when using this
driver on ARM.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Harm Berntsen [Fri, 30 Oct 2020 08:45:15 +0000 (08:45 +0000)]
gpio: do not include <asm/arch/gpio.h> on ARCH_QEMU
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
QEMU.
Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
Fabien Parent [Sat, 17 Oct 2020 10:52:15 +0000 (12:52 +0200)]
clk: mediatek: Add MT8183 clock driver
Add the topckgen, apmixedsys and infracfg clock driver for the MT8183
SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Fri, 16 Oct 2020 17:52:37 +0000 (19:52 +0200)]
tools: mtk_image: add support for booting ARM64 images
mkimage is only able to package aarch32 binaries. Add support for
AArch64 images.
One can create a ARM64 image using the following command line:
mkimage -T mtk_image -a 0x201000 -e 0x201000 -n "media=emmc;arm64=1"
-d bl2.bin bl2.img
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Fri, 16 Oct 2020 15:40:09 +0000 (17:40 +0200)]
configs: pumpkin: enable fastboot
Enable fastboot commands for mt8516 pumpkin board.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Fri, 16 Oct 2020 15:40:08 +0000 (17:40 +0200)]
configs: pumpkin: enable USB gadget
Enable USB gadget on pumpkin. This requires to also enable
BOARD_LATE_INIT since the init is done in board_late_init function.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Fri, 16 Oct 2020 15:40:07 +0000 (17:40 +0200)]
board: mediatek: pumpkin: initialize usb device
Initialize USB device on pumpkin if it is enabled in the config.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Fri, 16 Oct 2020 15:40:06 +0000 (17:40 +0200)]
arm: dts: mt8516-pumpkin: enable usb port
Enable the USB port for MT8516 Pumpkin Board.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fabien Parent [Fri, 16 Oct 2020 15:40:05 +0000 (17:40 +0200)]
arm: dts: mt8516: add support for USB
Add support for USB on mt8516 based SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Tom Rini [Mon, 18 Jan 2021 17:37:55 +0000 (12:37 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- R-Car pinctrl updates
Tom Rini [Mon, 18 Jan 2021 13:04:28 +0000 (08:04 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Update qemu-riscv.rst build instructions.
- Add support for SPI on Kendryte K210.
- Add Microchip PolarFire SoC Icicle Kit support.
- Add support for an early timer.
- Select TIMER_EARLY to avoid infinite recursion for Trace.
Tom Rini [Mon, 18 Jan 2021 13:04:05 +0000 (08:04 -0500)]
Merge tag 'doc-2021-04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for documentation tag doc-2021-04-rc1
* document man-page base command
* move README.fdt-overlays to HTML documentation
* add synopsis for pstore command
Tom Rini [Mon, 18 Jan 2021 12:55:54 +0000 (07:55 -0500)]
Merge branch '2021-01-16-assorted-improvements'
- Assorted testing improvements and fixes
- Assorted code cleanups
Lad Prabhakar [Sun, 29 Nov 2020 13:21:53 +0000 (13:21 +0000)]
ARM: dts: renesas: Remove leading 0x from rpc node
Remove the leading "0x" from rpc node to fix the below dtc warning:
Warning (simple_bus_reg): Node /soc/rpc@0xee200000 simple-bus unit
address format error, expected "
ee200000"
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Lad Prabhakar [Sat, 28 Nov 2020 13:13:09 +0000 (13:13 +0000)]
pinctrl: renesas: Implement get_pin_muxing() callback
Implement get_pin_muxing() callback so that pinmux status
command can be used on Renesas platforms.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Lad Prabhakar [Sat, 28 Nov 2020 13:13:08 +0000 (13:13 +0000)]
pinctrl: renesas: Make sure the pin type is updated after setting the MUX
By default on startup all the pin types are configured to
PINMUX_TYPE_NONE (in sh_pfc_map_pins()), when pin is set as GPIO the
pin type is updated to PINMUX_TYPE_GPIO. But the type is not updated
when the pin is set as a function in sh_pfc_pinctrl_pin_set() or
sh_pfc_pinctrl_group_set() calls (these calls only set the MUX if
the pin type is PINMUX_TYPE_NONE ie unused).
So with the current implementation pin functionality could be overwritten
silently, for example if the same pin is added for SPI and serial.
This patch makes sure of updating pin type after every successful call to
sh_pfc_config_mux() and thus fixing from pin functionality to be
overwritten. Also a warning message is printed if the current pin is being
overwritten before abort.
This also avoids pin re-muxing to same type that is for example from
command line device is asked to re-probe/select (mmc dev x) we return
early with success in this case as the pin is already muxed.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Padmarao Begari [Fri, 15 Jan 2021 02:50:41 +0000 (08:20 +0530)]
doc: board: Add Microchip MPFS Icicle Kit doc
This doc describes the procedure to build, flash and
boot Linux using U-boot on Microchip MPFS Icicle Kit.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Padmarao Begari [Fri, 15 Jan 2021 02:50:40 +0000 (08:20 +0530)]
riscv: Add Microchip MPFS Icicle Kit support
This patch adds Microchip MPFS Icicle Kit support. For now, only
NS16550 Serial, Microchip clock, Cadence eMMC and MACB drivers are
enabled. The Microchip MPFS Icicle defconfig by default builds
U-Boot for S-Mode because U-Boot on Microchip PolarFire SoC will run
in S-Mode as payload of HSS + OpenSBI.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Padmarao Begari [Fri, 15 Jan 2021 02:50:39 +0000 (08:20 +0530)]
riscv: dts: Add device tree for Microchip Icicle Kit
Add device tree for Microchip PolarFire SoC Icicle Kit.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Padmarao Begari [Fri, 15 Jan 2021 02:50:38 +0000 (08:20 +0530)]
clk: Add Microchip PolarFire SoC clock driver
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Padmarao Begari [Fri, 15 Jan 2021 02:50:37 +0000 (08:20 +0530)]
net: macb: Add phy address to read it from device tree
Read phy address from device tree and use it to find the phy device
if not found then search in the range of 0 to 31.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Padmarao Begari [Fri, 15 Jan 2021 02:50:36 +0000 (08:20 +0530)]
net: macb: Add DMA 64-bit address support for macb
Enable 32-bit or 64-bit DMA in the macb driver based on the macb
hardware compatibility and it is configured with structure macb_config
in the driver.
The Microchip PolarFire SoC Memory Protection Unit(MPU) gives the 64-bit
DMA access with the GEM, the MPU transactions on the AXI bus is 64-bit
not 32-bit So 64-bit DMA is enabled for the Microchip PolarFire SoC GEM.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Padmarao Begari [Fri, 15 Jan 2021 02:50:35 +0000 (08:20 +0530)]
riscv: Add DMA 64-bit address support
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit
addresses, dma_addr_t need only be 32/64 bits wide.
Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>