Erik Faye-Lund [Wed, 17 Nov 2021 12:11:38 +0000 (13:11 +0100)]
docs: link to gitlab instead of cgit
While we're at it, let's update the releasing article as well.
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13836>
Erik Faye-Lund [Wed, 17 Nov 2021 12:08:12 +0000 (13:08 +0100)]
docs: master -> main
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13836>
Erik Faye-Lund [Wed, 17 Nov 2021 12:01:21 +0000 (13:01 +0100)]
docs: Virgl -> VirGL
The name used for this project is usually stylized as VirGL instead of
"Virgil" or "Virgil 3D" these days. Let's be consistent.
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13836>
Erik Faye-Lund [Wed, 17 Nov 2021 11:48:45 +0000 (12:48 +0100)]
docs: qemu -> QEMU
This is the official syling of the name, let's use that instead of
lower-case for consistensy.
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13836>
Erik Faye-Lund [Wed, 17 Nov 2021 11:55:17 +0000 (12:55 +0100)]
docs: add missing get
This sentence doesn't make sense without a 'get' or something similar
here.
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13836>
Erik Faye-Lund [Wed, 17 Nov 2021 11:22:50 +0000 (12:22 +0100)]
docs: remove a few repeated words
It doesn't make sense to repeat these, let's fix that.
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13836>
Erik Faye-Lund [Wed, 17 Nov 2021 11:16:05 +0000 (12:16 +0100)]
docs: import virgl docs
The docuentation has been imported verbatim from
https://virgil3d.github.io/.
Acked-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13836>
Mike Blumenkrantz [Wed, 23 Feb 2022 18:46:30 +0000 (13:46 -0500)]
zink: don't free non-fbfetch dsl structs when switching to fbfetch
this triggers invalid access when recycling in-flight non-fbfetch sets
cc: mesa-stable
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15173>
Mike Blumenkrantz [Wed, 23 Feb 2022 17:36:30 +0000 (12:36 -0500)]
zink: free push descriptor pools on deinit
these are owned by the context, so destroy them when the context
requests destruction
cc: mesa-stable
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15173>
Mike Blumenkrantz [Wed, 23 Feb 2022 17:31:40 +0000 (12:31 -0500)]
zink: fix cached descriptor set invalidation for array bindings
need to iterate over the descriptors in the binding to invalidate the whole
thing here
=================================================================
==546534==ERROR: AddressSanitizer: heap-use-after-free on address 0x61a0000ae6c0 at pc 0x7fe20e26fd9d bp 0x7ffd92be6bc0 sp 0x7ffd92be6bb8
READ of size 8 at 0x61a0000ae6c0 thread T0
#0 0x7fe20e26fd9c in zink_descriptor_set_refs_clear ../src/gallium/drivers/zink/zink_descriptors.c:950
#1 0x7fe20e401304 in zink_destroy_surface ../src/gallium/drivers/zink/zink_surface.c:340
#2 0x7fe20e21311b in zink_surface_reference ../src/gallium/drivers/zink/zink_surface.h:106
#3 0x7fe20e21a5b9 in zink_sampler_view_destroy ../src/gallium/drivers/zink/zink_context.c:835
#4 0x7fe20c41d35f in tc_sampler_view_destroy ../src/gallium/auxiliary/util/u_threaded_context.c:1848
#5 0x7fe20e210ff7 in pipe_sampler_view_reference ../src/gallium/auxiliary/util/u_inlines.h:216
#6 0x7fe20e22d592 in zink_set_sampler_views ../src/gallium/drivers/zink/zink_context.c:1532
#7 0x7fe20c41a3d8 in tc_call_set_sampler_views ../src/gallium/auxiliary/util/u_threaded_context.c:1393
#8 0x7fe20c411706 in tc_batch_execute ../src/gallium/auxiliary/util/u_threaded_context.c:211
#9 0x7fe20c4124ba in _tc_sync ../src/gallium/auxiliary/util/u_threaded_context.c:362
#10 0x7fe20c42b728 in tc_destroy ../src/gallium/auxiliary/util/u_threaded_context.c:4250
#11 0x7fe20b65176a in st_destroy_context_priv ../src/mesa/state_tracker/st_context.c:387
#12 0x7fe20b65669f in st_destroy_context ../src/mesa/state_tracker/st_context.c:1009
#13 0x7fe20b7055ab in st_context_destroy ../src/mesa/state_tracker/st_manager.c:944
#14 0x7fe20a9c75bd in dri_destroy_context ../src/gallium/frontends/dri/dri_context.c:256
#15 0x7fe20a9d4bef in driDestroyContext ../src/gallium/frontends/dri/dri_util.c:534
#16 0x7fe22361f25c in drisw_destroy_context ../src/glx/drisw_glx.c:429
#17 0x7fe223625d95 in glXDestroyContext ../src/glx/glxcmds.c:523
#18 0x7fe22636aaeb in glXDestroyContext /home/zmike/src/libglvnd-v1.3.2/src/GLX/libglx.c:332
#19 0x7fe2269d9e7d in glXDestroyContext /home/zmike/src/libglvnd-v1.3.2/src/GL/g_libglglxwrapper.c:384
#20 0x41b88a in tcu::lnx::x11::glx::GlxRenderContext::~GlxRenderContext() /home/zmike/src/VK-GL-CTS/framework/platform/lnx/X11/tcuLnxX11GlxPlatform.cpp:734
#21 0x41b8e9 in tcu::lnx::x11::glx::GlxRenderContext::~GlxRenderContext() /home/zmike/src/VK-GL-CTS/framework/platform/lnx/X11/tcuLnxX11GlxPlatform.cpp:735
#22 0x2323aa7 in deqp::gles31::Context::destroyRenderContext() /home/zmike/src/VK-GL-CTS/modules/gles31/tes31Context.cpp:77
#23 0x2323969 in deqp::gles31::Context::~Context() /home/zmike/src/VK-GL-CTS/modules/gles31/tes31Context.cpp:55
#24 0x232278e in deqp::gles31::TestPackage::deinit() /home/zmike/src/VK-GL-CTS/modules/gles31/tes31TestPackage.cpp:102
#25 0x2c866c2 in tcu::DefaultHierarchyInflater::leaveTestPackage(tcu::TestPackage*) /home/zmike/src/VK-GL-CTS/framework/common/tcuTestHierarchyIterator.cpp:75
#26 0x2c87058 in tcu::TestHierarchyIterator::next() /home/zmike/src/VK-GL-CTS/framework/common/tcuTestHierarchyIterator.cpp:252
#27 0x2c365da in tcu::TestSessionExecutor::iterate() /home/zmike/src/VK-GL-CTS/framework/common/tcuTestSessionExecutor.cpp:122
#28 0x2c00b0c in tcu::App::iterate() /home/zmike/src/VK-GL-CTS/framework/common/tcuApp.cpp:221
#29 0x4141b7 in main /home/zmike/src/VK-GL-CTS/framework/platform/tcuMain.cpp:58
#30 0x7fe2263e155f in __libc_start_call_main (/lib64/libc.so.6+0x2d55f)
#31 0x7fe2263e160b in __libc_start_main_impl (/lib64/libc.so.6+0x2d60b)
#32 0x413fa4 in _start (/home/zmike/src/VK-GL-CTS/build/external/openglcts/modules/glcts+0x413fa4)
0x61a0000ae6c0 is located 64 bytes inside of 1328-byte region [0x61a0000ae680,0x61a0000aebb0)
freed by thread T0 here:
#0 0x7fe226cb6627 in free (/usr/lib64/libasan.so.6+0xae627)
#1 0x7fe20aab1751 in unsafe_free ../src/util/ralloc.c:302
#2 0x7fe20aab16c8 in unsafe_free ../src/util/ralloc.c:295
#3 0x7fe20aab13c3 in ralloc_free ../src/util/ralloc.c:265
#4 0x7fe20e269234 in descriptor_pool_free ../src/gallium/drivers/zink/zink_descriptors.c:286
#5 0x7fe20e26937d in descriptor_pool_delete ../src/gallium/drivers/zink/zink_descriptors.c:296
#6 0x7fe20e26ff53 in zink_descriptor_pool_reference ../src/gallium/drivers/zink/zink_descriptors.c:967
#7 0x7fe20e270db2 in zink_descriptor_program_deinit ../src/gallium/drivers/zink/zink_descriptors.c:1071
#8 0x7fe20e3b6536 in zink_destroy_gfx_program ../src/gallium/drivers/zink/zink_program.c:695
#9 0x7fe20e1eaaf9 in zink_gfx_program_reference ../src/gallium/drivers/zink/zink_program.h:242
#10 0x7fe20e20d386 in zink_shader_free ../src/gallium/drivers/zink/zink_compiler.c:2099
#11 0x7fe20e3b9f0b in zink_delete_shader_state ../src/gallium/drivers/zink/zink_program.c:1074
#12 0x7fe20c3e29ad in util_shader_reference ../src/gallium/auxiliary/util/u_live_shader_cache.c:188
#13 0x7fe20e3ba11e in zink_delete_cached_shader_state ../src/gallium/drivers/zink/zink_program.c:1093
#14 0x7fe20c41709e in tc_call_delete_fs_state ../src/gallium/auxiliary/util/u_threaded_context.c:998
#15 0x7fe20c411706 in tc_batch_execute ../src/gallium/auxiliary/util/u_threaded_context.c:211
#16 0x7fe20c4124ba in _tc_sync ../src/gallium/auxiliary/util/u_threaded_context.c:362
#17 0x7fe20c423683 in tc_flush ../src/gallium/auxiliary/util/u_threaded_context.c:3003
#18 0x7fe20b62d996 in st_flush ../src/mesa/state_tracker/st_cb_flush.c:60
#19 0x7fe20b62dbe3 in st_glFlush ../src/mesa/state_tracker/st_cb_flush.c:94
#20 0x7fe20ae4bded in _mesa_make_current ../src/mesa/main/context.c:1493
#21 0x7fe20ae49702 in _mesa_free_context_data ../src/mesa/main/context.c:1187
#22 0x7fe20b65668b in st_destroy_context ../src/mesa/state_tracker/st_context.c:1005
#23 0x7fe20b7055ab in st_context_destroy ../src/mesa/state_tracker/st_manager.c:944
#24 0x7fe20a9c75bd in dri_destroy_context ../src/gallium/frontends/dri/dri_context.c:256
#25 0x7fe20a9d4bef in driDestroyContext ../src/gallium/frontends/dri/dri_util.c:534
#26 0x7fe22361f25c in drisw_destroy_context ../src/glx/drisw_glx.c:429
#27 0x7fe223625d95 in glXDestroyContext ../src/glx/glxcmds.c:523
#28 0x7fe22636aaeb in glXDestroyContext /home/zmike/src/libglvnd-v1.3.2/src/GLX/libglx.c:332
#29 0x7fe2269d9e7d in glXDestroyContext /home/zmike/src/libglvnd-v1.3.2/src/GL/g_libglglxwrapper.c:384
previously allocated by thread T0 here:
#0 0x7fe226cb691f in __interceptor_malloc (/usr/lib64/libasan.so.6+0xae91f)
#1 0x7fe20aab0c81 in ralloc_size ../src/util/ralloc.c:120
#2 0x7fe20aab0e33 in rzalloc_size ../src/util/ralloc.c:153
#3 0x7fe20aab12c8 in rzalloc_array_size ../src/util/ralloc.c:233
#4 0x7fe20e26c76d in allocate_desc_set ../src/gallium/drivers/zink/zink_descriptors.c:657
#5 0x7fe20e26e9cb in zink_descriptor_set_get ../src/gallium/drivers/zink/zink_descriptors.c:840
#6 0x7fe20e2747aa in zink_descriptors_update ../src/gallium/drivers/zink/zink_descriptors.c:1424
#7 0x7fe20e36fc48 in void zink_draw<(zink_multidraw)1, (zink_dynamic_state)2, true, false>(pipe_context*, pipe_draw_info const*, unsigned int, pipe_draw_indirect_info const*, pipe_draw_start_count_bias const*, unsigned int, pipe_vertex_state*, unsigned int) ../src/gallium/drivers/zink/zink_draw.cpp:788
#8 0x7fe20e29166d in zink_draw_vbo<(zink_multidraw)1, (zink_dynamic_state)2, true> ../src/gallium/drivers/zink/zink_draw.cpp:907
#9 0x7fe20c424982 in tc_call_draw_single ../src/gallium/auxiliary/util/u_threaded_context.c:3155
#10 0x7fe20c411706 in tc_batch_execute ../src/gallium/auxiliary/util/u_threaded_context.c:211
#11 0x7fe20c4124ba in _tc_sync ../src/gallium/auxiliary/util/u_threaded_context.c:362
#12 0x7fe20c41f7a9 in tc_texture_map ../src/gallium/auxiliary/util/u_threaded_context.c:2279
#13 0x7fe20b630757 in pipe_texture_map_3d ../src/gallium/auxiliary/util/u_inlines.h:572
#14 0x7fe20b6341f6 in st_ReadPixels ../src/mesa/state_tracker/st_cb_readpixels.c:546
#15 0x7fe20b42fea7 in read_pixels ../src/mesa/main/readpix.c:1178
#16 0x7fe20b42fea7 in _mesa_ReadnPixelsARB ../src/mesa/main/readpix.c:1195
#17 0x7fe20b42ffc0 in _mesa_ReadPixels ../src/mesa/main/readpix.c:1210
#18 0x2a6d094 in glu::readPixels(glu::RenderContext const&, int, int, tcu::PixelBufferAccess const&) /home/zmike/src/VK-GL-CTS/framework/opengl/gluPixelTransfer.cpp:61
#19 0x29eaa06 in deqp::gls::ShaderExecUtil::FragmentOutExecutor::execute(int, void const* const*, void* const*) /home/zmike/src/VK-GL-CTS/modules/glshared/glsShaderExecUtil.cpp:677
#20 0x25a600b in iterate /home/zmike/src/VK-GL-CTS/modules/gles31/functional/es31fOpaqueTypeIndexingTests.cpp:585
#21 0x2322b53 in deqp::gles31::TestCaseWrapper<deqp::gles31::TestPackage>::iterate(tcu::TestCase*) /home/zmike/src/VK-GL-CTS/modules/gles31/tes31TestCaseWrapper.hpp:86
#22 0x2c376fd in tcu::TestSessionExecutor::iterateTestCase(tcu::TestCase*) /home/zmike/src/VK-GL-CTS/framework/common/tcuTestSessionExecutor.cpp:302
#23 0x2c366e3 in tcu::TestSessionExecutor::iterate() /home/zmike/src/VK-GL-CTS/framework/common/tcuTestSessionExecutor.cpp:139
#24 0x2c00b0c in tcu::App::iterate() /home/zmike/src/VK-GL-CTS/framework/common/tcuApp.cpp:221
#25 0x4141b7 in main /home/zmike/src/VK-GL-CTS/framework/platform/tcuMain.cpp:58
#26 0x7fe2263e155f in __libc_start_call_main (/lib64/libc.so.6+0x2d55f)
cc: mesa-stable
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15173>
Mike Blumenkrantz [Wed, 23 Feb 2022 16:05:15 +0000 (11:05 -0500)]
zink: set shader key size to 0 for non-generated tcs
Test case 'dEQP-GLES31.functional.shaders.builtin_functions.common.modf.vec2_mediump_tess_control'..
=================================================================
==539161==ERROR: AddressSanitizer: unknown-crash on address 0x60400008cfef at pc 0x7fffdb47b2d6 bp 0x7fffffffa490 sp 0x7fffffffa488
READ of size 4 at 0x60400008cfef thread T0
#0 0x7fffdb47b2d5 in XXH_read32 ../src/util/xxhash.h:531
#1 0x7fffdb47bfbf in XXH_readLE32 ../src/util/xxhash.h:608
#2 0x7fffdb47bfbf in XXH_readLE32_align ../src/util/xxhash.h:620
#3 0x7fffdb47bfbf in XXH32_endian_align ../src/util/xxhash.h:797
#4 0x7fffdb47bfbf in XXH32 ../src/util/xxhash.h:831
#5 0x7fffdb480b49 in _mesa_hash_data ../src/util/hash_table.c:631
#6 0x7fffded8c10a in shader_module_hash ../src/gallium/drivers/zink/zink_program.c:82
#7 0x7fffded8cad8 in get_shader_module_for_stage ../src/gallium/drivers/zink/zink_program.c:144
#8 0x7fffded8cf64 in update_gfx_shader_modules ../src/gallium/drivers/zink/zink_program.c:182
#9 0x7fffded8dcc2 in zink_update_gfx_program ../src/gallium/drivers/zink/zink_program.c:257
#10 0x7fffdec63463 in update_gfx_program ../src/gallium/drivers/zink/zink_draw.cpp:223
#11 0x7fffded7aab9 in update_gfx_pipeline<true> ../src/gallium/drivers/zink/zink_draw.cpp:445
#12 0x7fffded4a88b in void zink_draw<(zink_multidraw)1, (zink_dynamic_state)2, true, false>(pipe_context*, pipe_draw_info const*, unsigned int, pipe_draw_indirect_info const*, pipe_draw_start_count_bias const*, unsigned int, pipe_vertex_state*, unsigned int) ../src/gallium/drivers/zink/zink_draw.cpp:777
#13 0x7fffdec6c5b2 in zink_draw_vbo<(zink_multidraw)1, (zink_dynamic_state)2, true> ../src/gallium/drivers/zink/zink_draw.cpp:907
#14 0x7fffdcdff982 in tc_call_draw_single ../src/gallium/auxiliary/util/u_threaded_context.c:3155
#15 0x7fffdcdec706 in tc_batch_execute ../src/gallium/auxiliary/util/u_threaded_context.c:211
#16 0x7fffdcded4ba in _tc_sync ../src/gallium/auxiliary/util/u_threaded_context.c:362
#17 0x7fffdcdfa492 in tc_buffer_map ../src/gallium/auxiliary/util/u_threaded_context.c:2251
#18 0x7fffdb7f2439 in pipe_buffer_map_range ../src/gallium/auxiliary/util/u_inlines.h:393
#19 0x7fffdb7f56c2 in _mesa_bufferobj_map_range ../src/mesa/main/bufferobj.c:488
#20 0x7fffdb803300 in map_buffer_range ../src/mesa/main/bufferobj.c:3734
#21 0x7fffdb8036e7 in _mesa_MapBufferRange ../src/mesa/main/bufferobj.c:3817
#22 0x29ecb02 in deqp::gls::ShaderExecUtil::BufferIoExecutor::readOutputBuffer(void* const*, int) /home/zmike/src/VK-GL-CTS/modules/glshared/glsShaderExecUtil.cpp:1069
#23 0x29ee499 in deqp::gls::ShaderExecUtil::TessControlExecutor::execute(int, void const* const*, void* const*) /home/zmike/src/VK-GL-CTS/modules/glshared/glsShaderExecUtil.cpp:1390
#24 0x246264c in deqp::gles31::Functional::CommonFunctionCase::iterate() /home/zmike/src/VK-GL-CTS/modules/gles31/functional/es31fShaderCommonFunctionTests.cpp:400
#25 0x2322b53 in deqp::gles31::TestCaseWrapper<deqp::gles31::TestPackage>::iterate(tcu::TestCase*) /home/zmike/src/VK-GL-CTS/modules/gles31/tes31TestCaseWrapper.hpp:86
#26 0x2c376fd in tcu::TestSessionExecutor::iterateTestCase(tcu::TestCase*) /home/zmike/src/VK-GL-CTS/framework/common/tcuTestSessionExecutor.cpp:302
#27 0x2c366e3 in tcu::TestSessionExecutor::iterate() /home/zmike/src/VK-GL-CTS/framework/common/tcuTestSessionExecutor.cpp:139
#28 0x2c00b0c in tcu::App::iterate() /home/zmike/src/VK-GL-CTS/framework/common/tcuApp.cpp:221
#29 0x4141b7 in main /home/zmike/src/VK-GL-CTS/framework/platform/tcuMain.cpp:58
#30 0x7ffff6dbc55f in __libc_start_call_main (/lib64/libc.so.6+0x2d55f)
#31 0x7ffff6dbc60b in __libc_start_main_impl (/lib64/libc.so.6+0x2d60b)
#32 0x413fa4 in _start (/home/zmike/src/VK-GL-CTS/build/external/openglcts/modules/glcts+0x413fa4)
0x60400008cff1 is located 0 bytes to the right of 33-byte region [0x60400008cfd0,0x60400008cff1)
allocated by thread T0 here:
#0 0x7ffff769191f in __interceptor_malloc (/usr/lib64/libasan.so.6+0xae91f)
#1 0x7fffded8c608 in get_shader_module_for_stage ../src/gallium/drivers/zink/zink_program.c:115
#2 0x7fffded8cf64 in update_gfx_shader_modules ../src/gallium/drivers/zink/zink_program.c:182
#3 0x7fffded8dcc2 in zink_update_gfx_program ../src/gallium/drivers/zink/zink_program.c:257
#4 0x7fffdec63463 in update_gfx_program ../src/gallium/drivers/zink/zink_draw.cpp:223
#5 0x7fffded7aab9 in update_gfx_pipeline<true> ../src/gallium/drivers/zink/zink_draw.cpp:445
#6 0x7fffded4a88b in void zink_draw<(zink_multidraw)1, (zink_dynamic_state)2, true, false>(pipe_context*, pipe_draw_info const*, unsigned int, pipe_draw_indirect_info const*, pipe_draw_start_count_bias const*, unsigned int, pipe_vertex_state*, unsigned int) ../src/gallium/drivers/zink/zink_draw.cpp:777
#7 0x7fffdec6c5b2 in zink_draw_vbo<(zink_multidraw)1, (zink_dynamic_state)2, true> ../src/gallium/drivers/zink/zink_draw.cpp:907
#8 0x7fffdcdff982 in tc_call_draw_single ../src/gallium/auxiliary/util/u_threaded_context.c:3155
#9 0x7fffdcdec706 in tc_batch_execute ../src/gallium/auxiliary/util/u_threaded_context.c:211
#10 0x7fffdcded4ba in _tc_sync ../src/gallium/auxiliary/util/u_threaded_context.c:362
#11 0x7fffdcdfa492 in tc_buffer_map ../src/gallium/auxiliary/util/u_threaded_context.c:2251
#12 0x7fffdb7f2439 in pipe_buffer_map_range ../src/gallium/auxiliary/util/u_inlines.h:393
#13 0x7fffdb7f56c2 in _mesa_bufferobj_map_range ../src/mesa/main/bufferobj.c:488
#14 0x7fffdb803300 in map_buffer_range ../src/mesa/main/bufferobj.c:3734
#15 0x7fffdb8036e7 in _mesa_MapBufferRange ../src/mesa/main/bufferobj.c:3817
#16 0x29ecb02 in deqp::gls::ShaderExecUtil::BufferIoExecutor::readOutputBuffer(void* const*, int) /home/zmike/src/VK-GL-CTS/modules/glshared/glsShaderExecUtil.cpp:1069
#17 0x29ee499 in deqp::gls::ShaderExecUtil::TessControlExecutor::execute(int, void const* const*, void* const*) /home/zmike/src/VK-GL-CTS/modules/glshared/glsShaderExecUtil.cpp:1390
#18 0x246264c in deqp::gles31::Functional::CommonFunctionCase::iterate() /home/zmike/src/VK-GL-CTS/modules/gles31/functional/es31fShaderCommonFunctionTests.cpp:400
#19 0x2322b53 in deqp::gles31::TestCaseWrapper<deqp::gles31::TestPackage>::iterate(tcu::TestCase*) /home/zmike/src/VK-GL-CTS/modules/gles31/tes31TestCaseWrapper.hpp:86
#20 0x2c376fd in tcu::TestSessionExecutor::iterateTestCase(tcu::TestCase*) /home/zmike/src/VK-GL-CTS/framework/common/tcuTestSessionExecutor.cpp:302
#21 0x2c366e3 in tcu::TestSessionExecutor::iterate() /home/zmike/src/VK-GL-CTS/framework/common/tcuTestSessionExecutor.cpp:139
#22 0x2c00b0c in tcu::App::iterate() /home/zmike/src/VK-GL-CTS/framework/common/tcuApp.cpp:221
#23 0x4141b7 in main /home/zmike/src/VK-GL-CTS/framework/platform/tcuMain.cpp:58
#24 0x7ffff6dbc55f in __libc_start_call_main (/lib64/libc.so.6+0x2d55f)
cc: mesa-stable
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15173>
Mike Blumenkrantz [Tue, 15 Feb 2022 14:15:57 +0000 (09:15 -0500)]
zink: skip extra descriptor lookups for images during barrier updates
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15173>
Mike Blumenkrantz [Tue, 15 Feb 2022 14:15:22 +0000 (09:15 -0500)]
zink: add layout to sampler descriptor hash
this can have more than one value, so avoid stale cache entries
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15173>
Mike Blumenkrantz [Tue, 15 Feb 2022 14:14:54 +0000 (09:14 -0500)]
zink: fix typo for image descriptor rebinds
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15173>
Mike Blumenkrantz [Mon, 7 Feb 2022 19:33:02 +0000 (14:33 -0500)]
zink: update descriptor refs after starting renderpass
this ensures that swapchain images will have been acquired before potentially
accessing swapchain images bound as descriptors
fixes caselist like:
dEQP-GLES31.functional.fbo.color.texcubearray.r8ui
dEQP-GLES31.functional.primitive_bounding_box.blit_fbo.blit_default_to_fbo
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15173>
Jonathan Gray [Wed, 20 Oct 2021 01:41:12 +0000 (12:41 +1100)]
radv: use MAJOR_IN_SYSMACROS for sysmacros.h include
fixes build on OpenBSD
../src/amd/vulkan/radv_device.c:35:10: fatal error: 'sys/sysmacros.h' file not found
Fixes:
7aaa54feb53 ("radv: implement VK_EXT_physical_device_drm")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13448>
Jonathan Gray [Wed, 20 Oct 2021 00:58:01 +0000 (11:58 +1100)]
util: fix util_cpu_detect_once() build on OpenBSD
Correct type for sysctl argument to fix the build.
../src/util/u_cpu_detect.c:631:29: error: incompatible pointer types passing 'int *' to parameter of type 'size_t *' (aka 'unsigned long *') [-Werror,-Wincompatible-pointer-types]
sysctl(mib, 2, &ncpu, &len, NULL, 0);
^~~~
Fixes:
5623c75e40b ("util: Fix setting nr_cpus on some BSD variants")
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13448>
Jonathan Gray [Wed, 20 Oct 2021 00:50:57 +0000 (11:50 +1100)]
util: fix u_print.cpp build on OpenBSD
move include so va_list will be picked up via stdarg.h
In file included from ../src/util/u_printf.cpp:24:
../src/util/u_printf.h:43:41: error: unknown type name 'va_list'; did you mean '__va_list'?
size_t u_printf_length(const char *fmt, va_list untouched_args);
^~~~~~~
__va_list
/usr/include/machine/_types.h:126:27: note: '__va_list' declared here
typedef __builtin_va_list __va_list;
^
and add includes to u_printf.h as suggested by Ilia Mirkin
stdarg.h for va_list and stddef.h for size_t
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13448>
Jonathan Gray [Fri, 25 Feb 2022 12:17:32 +0000 (23:17 +1100)]
util: unbreak non-linux mips64 build
Put linux specific path inside an ifdef. Unbreaks mips64 build on
OpenBSD and likely other systems without Elf64_auxv_t.
Fixes:
88b234d7a7c ("gallivm: add basic mips64 support and set mcpu to mips64r5 on ls3a4000")
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15166>
Marcin Ślusarz [Thu, 24 Feb 2022 16:09:25 +0000 (17:09 +0100)]
intel/compiler: optimize flat inputs mask calculation
Don't bother looking at urb if variable is not flat.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15169>
Marcin Ślusarz [Thu, 24 Feb 2022 16:06:33 +0000 (17:06 +0100)]
intel/compiler: ignore per-primitive attrs when calculating flat input mask
If we say that per-primitive attributes are flat (which is communicated by
3DSTATE_SBE.ConstantInterpolationEnable), GPU freaks out and applies it
to other (non-flat) attributes.
Fixes:
be89ea3231c ("intel/compiler: Handle per-primitive inputs in FS")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15169>
Alyssa Rosenzweig [Fri, 25 Feb 2022 17:28:52 +0000 (12:28 -0500)]
pan/va: Add TEX_FETCH assembler case
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15182>
Alyssa Rosenzweig [Fri, 25 Feb 2022 17:29:00 +0000 (12:29 -0500)]
pan/va: Handle sr_write_count in the disassembler
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15182>
Alyssa Rosenzweig [Thu, 17 Feb 2022 19:05:18 +0000 (14:05 -0500)]
pan/va: Fix definitions of TEX_SINGLE and TEX_FETCH
Fix the definitions of the basic texturing instructions. In particular, a
register format and a write mask were previously missing, as well as incorrect
handling of staging registers.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15182>
Alyssa Rosenzweig [Fri, 25 Feb 2022 21:26:57 +0000 (16:26 -0500)]
pan/va: Don't use staging index as a sideband
It would cause us to get incorrect disassembly when the syntax is flipped.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15182>
Alyssa Rosenzweig [Fri, 25 Feb 2022 17:34:11 +0000 (12:34 -0500)]
pan/va: Handle extended staging counts in assembler
Needed for texturing.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15182>
Alyssa Rosenzweig [Fri, 25 Feb 2022 16:51:56 +0000 (11:51 -0500)]
pan/va: Allow forcing enums for 1-bit modifiers
Ocassionally the 0 value has a meaningful value that's not meaningfully default,
so we want an enum to encode both possible states.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15182>
Alyssa Rosenzweig [Fri, 25 Feb 2022 19:18:44 +0000 (14:18 -0500)]
pan/va: Add MUX.v2i16 and MUX.v4i8 opcodes
Basically identical to MUX.i32, slight differences in opcode and swizzling only.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15182>
Alyssa Rosenzweig [Fri, 25 Feb 2022 21:48:53 +0000 (16:48 -0500)]
pan/va: Remove incorrect TEX test cases
Not close enough to salvage; TEX is going to be redefined.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15182>
Emma Anholt [Wed, 15 Dec 2021 03:26:21 +0000 (19:26 -0800)]
nir: Allow the _replicates opcodes to have num_components != 4.
This required relaxing a core NIR assertion which I don't think is doing
any important validation.
The shader-db effects here are small, but they're important for avoiding a
regression when we start doing per-component DCE in opt_shrink_vectors
(https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12468)
softpipe shader-db:
total instructions in shared programs: 2859777 -> 2859454 (-0.01%)
instructions in affected programs: 18881 -> 18558 (-1.71%)
total temps in shared programs: 293994 -> 293914 (-0.03%)
temps in affected programs: 418 -> 338 (-19.14%)
i915g:
total instructions in shared programs: 407562 -> 407544 (<.01%)
instructions in affected programs: 570 -> 552 (-3.16%)
r300:
total instructions in shared programs: 1414450 -> 1414459 (<.01%)
instructions in affected programs: 44494 -> 44503 (0.02%)
total vinst in shared programs: 473782 -> 473727 (-0.01%)
vinst in affected programs: 1102 -> 1047 (-4.99%)
total sinst in shared programs: 231224 -> 231216 (<.01%)
sinst in affected programs: 432 -> 424 (-1.85%)
total temps in shared programs: 197605 -> 197607 (<.01%)
temps in affected programs: 103 -> 105 (1.94%)
crocus hsw:
total instructions in shared programs: 8158185 -> 8158134 (<.01%)
instructions in affected programs: 10927 -> 10876 (-0.47%)
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15178>
Daniel Schürmann [Fri, 27 Nov 2020 14:23:34 +0000 (15:23 +0100)]
aco: relax condition to remove branches in case of few instructions
This patch relaxes the conditions under which
we remove branch instructions.
Totals from 27246 (20.20% of 134913) affected shaders: (GFX10.3)
CodeSize:
193413312 ->
192924928 (-0.25%)
Instrs:
36146788 ->
36024692 (-0.34%)
Latency:
528374112 ->
528469044 (+0.02%); split: -0.01%, +0.02%
InvThroughput:
106198759 ->
106216583 (+0.02%); split: -0.00%, +0.02%
Branches: 1040640 -> 918543 (-11.73%)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8647>
Samuel Pitoiset [Thu, 24 Feb 2022 09:13:51 +0000 (10:13 +0100)]
radv,drirc: move RADV workarounds to 00-radv-defaults.conf
Because we have to maintain two different packages of Mesa, one
specific to RADV and another one for RadeonSI and such, it's a bit
annoying to have to synchronize the drirc entries. Currently, only our
Mesa package installs 00-mesa-defaults.conf which means we have to
backport the drirc RADV changes.
This splits 00-mesa-defaults.conf in two to move the drirc RADV entries
to src/amd/vulkan/00-radv-defaults.conf. Meson will install the file
only if RADV is built.
There is still a caveat for common drirc workarounds like for WSI but
they are rare enough and we could still duplicate them if needed.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15152>
Timur Kristóf [Fri, 25 Feb 2022 08:23:31 +0000 (09:23 +0100)]
aco: Support memory modes properly with load/store_buffer_amd.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15161>
Timur Kristóf [Fri, 25 Feb 2022 08:22:41 +0000 (09:22 +0100)]
aco: Support task_payload with barriers, refactor allowed storage class.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15161>
Timur Kristóf [Fri, 25 Feb 2022 08:22:04 +0000 (09:22 +0100)]
aco: Add storage class for Task Shader payload.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15161>
Timur Kristóf [Tue, 8 Feb 2022 01:59:31 +0000 (02:59 +0100)]
spirv: Use task_payload mode for generic task outputs and mesh inputs.
This new mode will be only used for the actual payload variables and
not the number of launched mesh shader workgroups, which will still
be treated as an output.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14930>
Timur Kristóf [Tue, 8 Feb 2022 01:55:18 +0000 (02:55 +0100)]
nir: Add new variable mode for task/mesh payload.
Task shader outputs work differently than other shaders, so they
need special consideration. Essentially, they have two kinds of
outputs:
1. Number of mesh shader workgroups to launch.
Will be still represented by a shader output.
2. Optional payload of up to (at least) 16K bytes.
These payload variables behave similarly to shared memory, but
the spec doesn't actually define them as shared memory (also, they
may be implemented differently by each backend), so we need to add
a new NIR variable mode for them.
These payload variables can't be represented by shader outputs
because the 16K bytes don't fit the 32x vec4 model that NIR uses
for its output variables.
This patch adds a new NIR variable mode: nir_var_mem_task_payload
and corresponding explicit I/O intrinsics, as well as support for
this new mode in nir_lower_io.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14930>
Timur Kristóf [Fri, 21 Jan 2022 17:08:34 +0000 (18:08 +0100)]
radv: Refactor mesh shader draws and add num_workgroups.
Several of the new draw packets need this argument
including all of the taskmesh commands, so it's
best to always declare it.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
Timur Kristóf [Thu, 17 Feb 2022 15:05:09 +0000 (16:05 +0100)]
ac/nir: Refactor mesh shader output code to smaller functions.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
Timur Kristóf [Thu, 20 Jan 2022 15:43:45 +0000 (16:43 +0100)]
ac/nir: Make sure to exclude special outputs from arrayed output masks.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
Timur Kristóf [Mon, 14 Feb 2022 14:17:58 +0000 (15:17 +0100)]
ac/nir: Sanitize mesh shader primitive indices using umin.
This makes our implementation friendlier to potentially buggy shaders,
meaning that it will less likely to hang the GPU.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
Timur Kristóf [Thu, 10 Feb 2022 22:55:51 +0000 (23:55 +0100)]
ac/nir: Properly handle when mesh API workgroup size is smaller than HW.
The problem is that the real workgroup launched on NGG HW
can be larger than the size specified by the API, and the
extra waves need to keep up with barriers in the API waves.
There are 2 different cases:
1. The whole API workgroup fits in a single wave.
We can shrink the barriers to subgroup scope and
don't need to insert any extra ones.
2. The API workgroup occupies multiple waves, but not
all. In this case, we emit code that consumes every
barrier on the extra waves.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
Timur Kristóf [Mon, 14 Feb 2022 14:11:54 +0000 (15:11 +0100)]
ac/nir: Move LDS area for primitive count to the beginning.
This makes it impossible for out of bounds vertex and primitive
attribute stores and indices stores to overwrite this.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
Timur Kristóf [Fri, 21 Jan 2022 18:23:15 +0000 (19:23 +0100)]
aco: Fix multiview view index for mesh shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
Timur Kristóf [Sat, 12 Feb 2022 19:29:50 +0000 (20:29 +0100)]
aco: Fix workgroup_id.y and .z for NV_mesh_shader.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
Timur Kristóf [Thu, 10 Feb 2022 22:53:24 +0000 (23:53 +0100)]
aco: Allow 1-byte loads and stores with load/store_buffer_amd
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
Timur Kristóf [Fri, 21 Jan 2022 17:05:54 +0000 (18:05 +0100)]
radv: Better exclude special MS outputs from driver location assignment.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15034>
Guilherme Gallo [Fri, 21 Jan 2022 05:43:03 +0000 (02:43 -0300)]
ci: skqp: Add Vulkan support for a630_skqp job
This commit adds support for Vulkan backend on a630_skqp job.
= Needed changes
- Needed to install libvulkan-dev package on system
- Refactored the way the available skqp reports are printed
tested in development builds with skia tools
Piglit expectations had to be updated in various drivers due to !14750 not
having bumped the tags when it tried to uprev.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14686>
Guilherme Gallo [Thu, 27 Jan 2022 04:28:51 +0000 (01:28 -0300)]
ci: skqp: Build skqp from android-cts-10.0_r11 tag with Clang
The Android CTS 10 version is relative old when compared with skia main
branch, which was being used before. Some modifications in the skqp
build/runner scripts were needed to make it run on CI.
- skqp versions from android-cts have already all assets inside
platform_tools folder.
- along with the assets, are the render and unit files which are
expected to pass in the Android CTS execution.
- removed custom test files from the a630 folder, to make it comply
with the CTS expectations.
- include new patches to remove Python2 dependencies and avoid the
installation of it in rootfs.
- strip binariesthe built binaries `skqp` and `list_gpu_unit_tests`, as
`is_debug = false` gn argument did not work, maybe it is not well
tested in development builds with skia tools
- use Clang instead of GCC. The GCC support is not so graceful as it is
in the skia main branch, some NEON instructions needs to be turned off
in the GCC compilation, causing different tests result. This change
does not imply a bigger rootfs, since the built skqp binary uses GCC
libc++ and other library runtimes. So clang is just a build
dependency.
= Changes in skqp results =
Some errors were found for GL backend and unit tests. GLES and VK tests are green.
All the failed tests were classified as expected to fail in the render and unit tests list.
```
gl_blur2rectsnonninepatch
gl_bug339297_as_clip
gl_bug6083
gl_dashtextcaps
```
```
SRGBReadWritePixels (../../tests/SRGBReadWritePixelsTest.cpp:214 Could not create sRGB surface context. [OpenGL])
```
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14686>
Mike Blumenkrantz [Fri, 25 Feb 2022 05:26:12 +0000 (00:26 -0500)]
features: VK_EXT_depth_clip_control for lavapipe
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15126>
Mike Blumenkrantz [Tue, 22 Feb 2022 23:17:58 +0000 (18:17 -0500)]
lavapipe: EXT_depth_clip_control
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15126>
Emma Anholt [Wed, 23 Feb 2022 01:34:34 +0000 (17:34 -0800)]
ci/zink: Add testing of dEQP GLES3.1/3.2.
I think this has been kind of just an oversight. Increases runtime by a
minute, to 5:30.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15159>
Emma Anholt [Tue, 8 Feb 2022 21:21:50 +0000 (13:21 -0800)]
ci/zink: Move testing to shared 64-core runners at Google.
Now the main deqp and piglit run takes about 4:30 of runner time in a
single job.
Added a couple of flakes that hit this MR, but which I think predate it
(probably due to not having #zink-ci until recently).
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15159>
Erik Faye-Lund [Wed, 23 Feb 2022 11:04:05 +0000 (12:04 +0100)]
docs: remove incorrect drivers from extension
This extension isn't wired up in Gallium, so there's just no way a
Gallium driver like Panfrost exposes it.
While there were support in i965 for this for the cancelled Broxton GPU,
thre's no such support in the Iris driver. And since Broxton has been
cancelled, it's unlikely to be wired up any time soon.
Fixes:
da23a31726f ("docs/features: Update ASTC entries for Panfrost")
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15145>
Alyssa Rosenzweig [Sat, 23 Oct 2021 14:13:51 +0000 (10:13 -0400)]
panfrost: Flush resources when shadowing
When we shadow a resource, the backing BO is changed; as such,
existing references to the resource become invalid. So batches accessing the
resource need to be flushed (or otherwise have their references invalidated).
The wrong behaviour change (not flushing) was introduced when we started
tracking resources instead of BOs. The issue manifested as a severe performance
regression in glmark2's -bbuffer test, particular the subdata subtest. The issue
is magnified on slow CPUs; without the fix, the test becomes completely CPU
bound
Relevant glmark2 -bbuffer test from 43fps to 84fps.
Apparently, this causes functional issues too -- this performance-minded change
also fixes a few piglits.
Fixes:
cecb889481d ("panfrost: Do tracking of resources, not BOs")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: Chris Healy <cphealy@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13502>
Alyssa Rosenzweig [Tue, 28 Sep 2021 00:26:54 +0000 (20:26 -0400)]
panfrost: Handle NULL samplers
Fixes a NULL dereference in Piglit fp-fragment-position, getting the
test to pass.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13203>
Alyssa Rosenzweig [Tue, 28 Sep 2021 00:24:01 +0000 (20:24 -0400)]
panfrost: Handle NULL sampler views
Fixes a NULL dereference in Piglit fp-fragment-position.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13203>
Alyssa Rosenzweig [Tue, 28 Sep 2021 00:24:38 +0000 (20:24 -0400)]
panfrost: Fix set_sampler_views for big GL
Roughly use the freedreno logic to handle all the extra things that will
come up in our Piglit sooner than later.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13203>
Alyssa Rosenzweig [Thu, 24 Feb 2022 22:43:31 +0000 (17:43 -0500)]
panfrost/ci: Update xfails list
These tests seem to be passing now.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13203>
Kenneth Graunke [Thu, 24 Feb 2022 18:16:27 +0000 (10:16 -0800)]
blorp: Add blorp_measure hooks to the blitter codepaths
I had missed these when hooking up the original support.
Fixes:
31eeb72e45b ("blorp: Add support for blorp_copy via XY_BLOCK_COPY_BLT")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15157>
Kenneth Graunke [Fri, 18 Feb 2022 11:02:53 +0000 (03:02 -0800)]
iris: Set MI_FLUSH_DW::PostSyncOperation correctly
The MI_FLUSH_DW post-sync operation uses the same encoding as the
PIPE_CONTROL one so we can use the same helper. Write PS Depth Count
is not supported, of course, as the blitter has no depth pipeline.
This means that we can write the timestamp register from the blitter.
Fixes:
604d97671b6 ("iris: Add support for flushing the blitter (hackily)")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15157>
Pavel Ondračka [Fri, 18 Feb 2022 10:48:23 +0000 (11:48 +0100)]
r300: add predicate instructions to statistics of vertex shaders
All of IF, ELSE, ENDIF, BREAK and CONTINUE were already translated
to the predication instructions in rc_vert_fc so all the flow control
we count at the moment is just BGNLOOP and ENDLOOP.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15077>
Pavel Ondračka [Fri, 18 Feb 2022 08:32:00 +0000 (09:32 +0100)]
r300: report number of loops in shader statistics
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15077>
Pavel Ondračka [Fri, 18 Feb 2022 07:53:53 +0000 (08:53 +0100)]
r300: use %u specifiers when printing unsigned stats values
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6019
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15077>
Pavel Ondračka [Fri, 18 Feb 2022 07:48:23 +0000 (08:48 +0100)]
r300: only print shader statistics when compilation succeeds
This allows to disregard the huge shaders that won't run anyway
and hopefully make catching shader regressions that result in a
compile failure easier.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15077>
Mike Blumenkrantz [Wed, 23 Feb 2022 02:11:46 +0000 (21:11 -0500)]
zink: add a flake channel
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15129>
Alyssa Rosenzweig [Thu, 24 Feb 2022 18:36:24 +0000 (13:36 -0500)]
pan/bi: Unit test message preloading optimization
To make sure it is applied in the cases we expect it to be, to avoid code
generation regressions. Functional regressions are expected to be caught by
integration-testing, so that is not focused on here.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9438>
Alyssa Rosenzweig [Wed, 23 Feb 2022 18:50:54 +0000 (13:50 -0500)]
pan/bi: Support message preloading
Preload LD_VAR_IMM or VAR_TEX instructions in the first block of fragment
shaders on v7. Preloaded messages write to fixed registers; when replacing
instructions we insert moves from the registers at the start of the program and
hope coalescing goes to town. (Admittedly we don't do any coalescing yet...)
The extra moves hurts instruction count in some cases; the win for cycle count
should cancel this out. When we get smarter copy prop or RA, those moves should
go away anyway.
This optimization may hurt register pressure by extending the lifetime of up to
eight registers written in the first block. This is expected to be acceptable:
on a large shader-db, there are no additional spills/fills, and only two shaders
are hurt on thread count.
This optimization only applies to v7, as the hardware was not introduced on v6
and was removed for Valhall.
total instructions in shared programs: 2451624 -> 2454286 (0.11%)
instructions in affected programs: 909046 -> 911708 (0.29%)
helped: 4719
HURT: 3341
helped stats (abs) min: 1.0 max: 10.0 x̄: 1.49 x̃: 1
helped stats (rel) min: 0.08% max: 33.33% x̄: 6.79% x̃: 3.92%
HURT stats (abs) min: 1.0 max: 50.0 x̄: 2.90 x̃: 2
HURT stats (rel) min: 0.12% max: 66.67% x̄: 6.39% x̃: 3.45%
95% mean confidence interval for instructions value: 0.27 0.39
95% mean confidence interval for instructions %-change: -1.55% -1.11%
Inconclusive result (value mean confidence interval and %-change mean confidence interval disagree).
total tuples in shared programs: 1969529 -> 1963429 (-0.31%)
tuples in affected programs: 601327 -> 595227 (-1.01%)
helped: 5907
HURT: 1297
helped stats (abs) min: 1.0 max: 8.0 x̄: 1.41 x̃: 1
helped stats (rel) min: 0.07% max: 33.33% x̄: 7.25% x̃: 5.26%
HURT stats (abs) min: 1.0 max: 40.0 x̄: 1.73 x̃: 1
HURT stats (rel) min: 0.16% max: 31.75% x̄: 3.38% x̃: 2.02%
95% mean confidence interval for tuples value: -0.88 -0.81
95% mean confidence interval for tuples %-change: -5.52% -5.15%
Tuples are helped.
total clauses in shared programs: 401689 -> 387830 (-3.45%)
clauses in affected programs: 136944 -> 123085 (-10.12%)
helped: 8427
HURT: 4
helped stats (abs) min: 1.0 max: 4.0 x̄: 1.65 x̃: 2
helped stats (rel) min: 0.49% max: 50.00% x̄: 19.88% x̃: 18.18%
HURT stats (abs) min: 1.0 max: 4.0 x̄: 2.50 x̃: 2
HURT stats (rel) min: 1.96% max: 19.05% x̄: 14.18% x̃: 17.86%
95% mean confidence interval for clauses value: -1.66 -1.63
95% mean confidence interval for clauses %-change: -20.15% -19.58%
Clauses are helped.
total cycles in shared programs: 202735.83 -> 201862.21 (-0.43%)
cycles in affected programs: 16295.46 -> 15421.83 (-5.36%)
helped: 3349
HURT: 1962
helped stats (abs) min: 0.
041665999999999315 max: 1.0 x̄: 0.32 x̃: 0
helped stats (rel) min: 0.24% max: 100.00% x̄: 40.77% x̃: 33.33%
HURT stats (abs) min: 0.
041665999999999315 max: 1.
5833329999999997 x̄: 0.10 x̃: 0
HURT stats (rel) min: 0.09% max: 31.40% x̄: 2.95% x̃: 1.94%
95% mean confidence interval for cycles value: -0.17 -0.16
95% mean confidence interval for cycles %-change: -25.48% -23.76%
Cycles are helped.
total arith in shared programs: 74665.50 -> 74920.00 (0.34%)
arith in affected programs: 16059.92 -> 16314.42 (1.58%)
helped: 860
HURT: 3409
helped stats (abs) min: 0.
041665999999999315 max: 0.25 x̄: 0.06 x̃: 0
helped stats (rel) min: 0.24% max: 37.50% x̄: 4.73% x̃: 2.56%
HURT stats (abs) min: 0.
041665999999999315 max: 1.
5833329999999997 x̄: 0.09 x̃: 0
HURT stats (rel) min: 0.09% max: 100.00% x̄: 8.99% x̃: 4.21%
95% mean confidence interval for arith value: 0.06 0.06
95% mean confidence interval for arith %-change: 5.83% 6.62%
Arith are HURT.
total texture in shared programs: 13083.50 -> 11877 (-9.22%)
texture in affected programs: 1663 -> 456.50 (-72.55%)
helped: 2377
HURT: 3
helped stats (abs) min: 0.5 max: 1.0 x̄: 0.51 x̃: 0
helped stats (rel) min: 6.25% max: 100.00% x̄: 87.12% x̃: 100.00%
HURT stats (abs) min: 0.5 max: 0.5 x̄: 0.50 x̃: 0
HURT stats (rel) min: 0.00% max: 25.00% x̄: 16.67% x̃: 25.00%
95% mean confidence interval for texture value: -0.51 -0.50
95% mean confidence interval for texture %-change: -87.98% -86.00%
Texture are helped.
total vary in shared programs: 10220.62 -> 4183.88 (-59.06%)
vary in affected programs: 10126.50 -> 4089.75 (-59.61%)
helped: 8538
HURT: 0
helped stats (abs) min: 0.125 max: 1.0 x̄: 0.71 x̃: 0
helped stats (rel) min: 7.14% max: 100.00% x̄: 74.74% x̃: 87.50%
95% mean confidence interval for vary value: -0.71 -0.70
95% mean confidence interval for vary %-change: -75.32% -74.16%
Vary are helped.
total quadwords in shared programs: 1766717 -> 1757161 (-0.54%)
quadwords in affected programs: 553801 -> 544245 (-1.73%)
helped: 6760
HURT: 711
helped stats (abs) min: 1.0 max: 11.0 x̄: 1.58 x̃: 1
helped stats (rel) min: 0.09% max: 29.41% x̄: 5.31% x̃: 4.84%
HURT stats (abs) min: 1.0 max: 33.0 x̄: 1.54 x̃: 1
HURT stats (rel) min: 0.10% max: 31.13% x̄: 2.53% x̃: 1.61%
95% mean confidence interval for quadwords value: -1.31 -1.25
95% mean confidence interval for quadwords %-change: -4.67% -4.46%
Quadwords are helped.
total threads in shared programs: 52899 -> 52897 (<.01%)
threads in affected programs: 4 -> 2 (-50.00%)
helped: 0
HURT: 2
total preloads in shared programs: 0 -> 116492
preloads in affected programs: 0 -> 116492
helped: 0
HURT: 8604
HURT stats (abs) min: 2.0 max: 24.0 x̄: 13.54 x̃: 14
HURT stats (rel) min: 0.00% max: 0.00% x̄: 0.00% x̃: 0.00%
95% mean confidence interval for preloads value: 13.45 13.63
95% mean confidence interval for preloads %-change: 0.00% 0.00%
Preloads are HURT.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9438>
Alyssa Rosenzweig [Wed, 23 Feb 2022 18:49:54 +0000 (13:49 -0500)]
pan/bi: Account for message preloading in shaderdb
If a message-passing instruction like LD_VAR is preloaded, it will no longer be
counted in the shader cycle counts. Add a special message preload counter that
approximates the cost of preloading, so this information doesn't get a lost.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9438>
Alyssa Rosenzweig [Wed, 23 Feb 2022 18:47:08 +0000 (13:47 -0500)]
pan/bi: Add bi_before_nonempty_block helper
To be used in the message preloading pass.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9438>
Alyssa Rosenzweig [Wed, 23 Feb 2022 18:49:16 +0000 (13:49 -0500)]
panfrost: Pack message preloads from compiler
Include full message preload descriptors in the RSD on v7, and do the obvious
packing for fragment shader message preloads.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9438>
Alyssa Rosenzweig [Wed, 23 Feb 2022 18:47:37 +0000 (13:47 -0500)]
panfrost: Add an unpacked message preload struct
The compiler will soon produce preloaded messages, but it should not pack them
itself, as this would require depending on GenXML or handcoding bitfields / bit
packs in the compiler. Instead, add a struct encoding the unpacked form of the
message, used as ABI between the compiler and the common driver.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9438>
Alyssa Rosenzweig [Tue, 22 Feb 2022 21:01:17 +0000 (16:01 -0500)]
panfrost: Remove Message Preload Descriptor from v6.xml
It is an anachronism, as this descriptor was added in v7 and, seemingly, removed
immediately after. Good work.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9438>
Igor Torrente [Thu, 17 Feb 2022 13:57:51 +0000 (10:57 -0300)]
venus: add macros to help with future extensions
Currently we have to add almost the same code to the
`vn_physical_device_init_{features, properties}` to add
the extension to the `physical_dev->{features, properties}`
list.
These macros improves the code reusage.
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15059>
Alyssa Rosenzweig [Thu, 24 Feb 2022 14:49:13 +0000 (09:49 -0500)]
panfrost/ci: Move T860 flake to skip
Actually an xfail but occassionally passes and gives us no new information, only
noise.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-and-acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15154>
Alyssa Rosenzweig [Thu, 24 Feb 2022 14:47:05 +0000 (09:47 -0500)]
panfrost/ci: Move T720 flakes to skips
Doesn't seem like these will be resolved anytime soon..
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-and-acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15154>
Tomeu Vizoso [Thu, 24 Feb 2022 12:44:09 +0000 (13:44 +0100)]
Revert "ci: Disable jobs to the Collabora lab"
This reverts commit
f692bda484384a5932dc42ce940ad3ea6b9a8741.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15153>
Iago Toral Quiroga [Thu, 17 Feb 2022 09:29:14 +0000 (10:29 +0100)]
broadcom/compiler: move uniforms right before their first use after scheduling
On V3D the quality of the code we generate is significantly affected by
how we decide to assign accumulators during register allocation, which
is determined by liveness, favoring short-lived temps.
There are many shaders that end up doing a whole lot of uniform loads
first, and using them later, which is very inconvenient for our register
allocation process because this increases uniform liveness and causes
us to use accumulators less efficientely, leading to significant churn.
To fix this, we move uniforms right before their first use in the same
block, but we need to do this after NIR scheduling, which means we are
doing it in non-SSA form, since the scheduler has a tendency to undo
this optimization and it is not easy to modify it to avoid it, since it
works in more abstract terms, using instruction dependencies, estimated
register pressure and instruction delay information to do its work,
which are very different concepts.
total instructions in shared programs:
13316738 ->
13033613 (-2.13%)
instructions in affected programs:
10389172 ->
10106047 (-2.73%)
helped: 55442
HURT: 16144
total threads in shared programs: 413722 -> 415048 (0.32%)
threads in affected programs: 1428 -> 2754 (92.86%)
helped: 680
HURT: 17
total loops in shared programs: 1716 -> 1690 (-1.52%)
loops in affected programs: 26 -> 0
helped: 26
HURT: 0
total uniforms in shared programs: 3704313 -> 3705181 (0.02%)
uniforms in affected programs: 687730 -> 688598 (0.13%)
helped: 2920
HURT: 7384
total max-temps in shared programs: 2364785 -> 2175190 (-8.02%)
max-temps in affected programs: 1215387 -> 1025792 (-15.60%)
helped: 49667
HURT: 1556
total spills in shared programs: 4241 -> 4248 (0.17%)
spills in affected programs: 642 -> 649 (1.09%)
helped: 11
HURT: 19
total fills in shared programs: 6115 -> 6125 (0.16%)
fills in affected programs: 1276 -> 1286 (0.78%)
helped: 11
HURT: 21
total sfu-stalls in shared programs: 34381 -> 36578 (6.39%)
sfu-stalls in affected programs: 16055 -> 18252 (13.68%)
helped: 3647
HURT: 5206
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15056>
Iago Toral Quiroga [Fri, 18 Feb 2022 10:23:32 +0000 (11:23 +0100)]
nir/nir_opt_move: handle non-SSA defs
We just skip register defs and avoid moving register reads across them.
This allows us to run this pass in non-SSA form.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15056>
Iago Toral Quiroga [Thu, 17 Feb 2022 09:25:48 +0000 (10:25 +0100)]
nir: add a nir_instr_def_is_register helper
This returns true if the instruction has a dest that is not an SSA value.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15056>
Iago Toral Quiroga [Thu, 17 Feb 2022 09:14:45 +0000 (10:14 +0100)]
nir/nir_opt_move: allow to move uniform loads
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15056>
Tomeu Vizoso [Thu, 24 Feb 2022 06:34:09 +0000 (07:34 +0100)]
ci: Disable jobs to the Collabora lab
In anticipation of infrastructure work.
This commit is to be reverted later in the day.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15150>
Tomeu Vizoso [Thu, 24 Feb 2022 05:40:20 +0000 (06:40 +0100)]
ci: Allow disabling the whole of the Collabora farm
Add a global-level variable that allows disabling all jobs that would
have gone to the Collabora lab, to be used in case of outages.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15150>
Emma Anholt [Wed, 23 Feb 2022 01:46:55 +0000 (17:46 -0800)]
ci/lvp: Update the asan fails list.
Many tests had been fixed but weren't being run due to test reshuffles
from uprevs. Add some explanations for what remains.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15133>
Alyssa Rosenzweig [Sat, 11 Dec 2021 17:54:01 +0000 (12:54 -0500)]
pan/bi: Reorder pushed uniforms to avoid moves
On Bifrost and Valhall, push uniforms are loaded into Fast Access Uniform
Random Access Memory (FAU-RAM). FAU-RAM is organized as an array of 64-bit
slots. A given tuple (Bifrost) or instruction (Valhall) may access at most a
single 64-bit slot. If an instruction requires uniforms from multiple 64-bit
slots, a uniform-to-register move must be inserted to avoid the hazard. However,
if an instruction requires a pair of 32-bit uniforms from the same 64-bit slot,
no move is required.
To reduce the number of moves we emit, this commit adds an optimization pass
that reorders pushed uniforms, trying to group uniforms used by the same
instruction. The pass works by creating a graph of pushed uniforms, where edges
denote the "both 32-bit uniforms required by the same instruction" relationship.
We perform depth-first search on this graph to find the connected components,
where each connected component is a cluster of uniforms that are used together.
We then select pairs of uniforms from each connected component. The remaining
unpaired uniforms (from components of odd sizes) are paired together
arbitrarily.
In principle, we should weight the graph by number of occurences and choose
pairs that maximize the total selected edge weight. This is left for
future work, as it is nontrivial -- selecting these edges optimally appears to
be NP-hard at first blush.
Implementation note: As position and varying shaders share FAU on Bifrost, extra
care is taken with a `push_offset` shader stage info parameter that ensures
varying shaders do not reorder uniforms selected by the previous position
shader.
total instructions in shared programs: 2503343 -> 2451758 (-2.06%)
instructions in affected programs: 1553309 -> 1501724 (-3.32%)
helped: 14256
HURT: 8
helped stats (abs) min: 1.0 max: 80.0 x̄: 3.62 x̃: 3
helped stats (rel) min: 0.06% max: 36.36% x̄: 7.31% x̃: 6.67%
HURT stats (abs) min: 1.0 max: 2.0 x̄: 1.38 x̃: 1
HURT stats (rel) min: 1.30% max: 12.50% x̄: 4.99% x̃: 3.85%
95% mean confidence interval for instructions value: -3.66 -3.58
95% mean confidence interval for instructions %-change: -7.41% -7.20%
Instructions are helped.
total tuples in shared programs: 2008399 -> 1969627 (-1.93%)
tuples in affected programs: 1146344 -> 1107572 (-3.38%)
helped: 12867
HURT: 147
helped stats (abs) min: 1.0 max: 61.0 x̄: 3.03 x̃: 2
helped stats (rel) min: 0.17% max: 42.86% x̄: 6.79% x̃: 4.65%
HURT stats (abs) min: 1.0 max: 3.0 x̄: 1.20 x̃: 1
HURT stats (rel) min: 0.29% max: 20.00% x̄: 2.12% x̃: 1.19%
95% mean confidence interval for tuples value: -3.03 -2.93
95% mean confidence interval for tuples %-change: -6.82% -6.57%
Tuples are helped.
total clauses in shared programs: 408005 -> 401708 (-1.54%)
clauses in affected programs: 90760 -> 84463 (-6.94%)
helped: 6006
HURT: 164
helped stats (abs) min: 1.0 max: 9.0 x̄: 1.08 x̃: 1
helped stats (rel) min: 0.45% max: 33.33% x̄: 12.44% x̃: 14.29%
HURT stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
HURT stats (rel) min: 1.64% max: 25.00% x̄: 9.81% x̃: 5.26%
95% mean confidence interval for clauses value: -1.03 -1.01
95% mean confidence interval for clauses %-change: -12.03% -11.66%
Clauses are helped.
total cycles in shared programs: 203308.37 -> 202737.83 (-0.28%)
cycles in affected programs: 19264.71 -> 18694.17 (-2.96%)
helped: 3024
HURT: 41
helped stats (abs) min: 0.
041665999999999315 max: 2.
5416680000000014 x̄: 0.19 x̃: 0
helped stats (rel) min: 0.17% max: 33.33% x̄: 3.83% x̃: 2.83%
HURT stats (abs) min: 0.
041665999999999315 max: 0.125 x̄: 0.06 x̃: 0
HURT stats (rel) min: 0.30% max: 5.88% x̄: 1.41% x̃: 0.93%
95% mean confidence interval for cycles value: -0.19 -0.18
95% mean confidence interval for cycles %-change: -3.89% -3.64%
Cycles are helped.
total arith in shared programs: 76265.67 -> 74669.25 (-2.09%)
arith in affected programs: 45001.50 -> 43405.08 (-3.55%)
helped: 12945
HURT: 97
helped stats (abs) min: 0.
041665999999999315 max: 2.
5416680000000014 x̄: 0.12 x̃: 0
helped stats (rel) min: 0.17% max: 50.00% x̄: 8.06% x̃: 4.88%
HURT stats (abs) min: 0.
041665999999999315 max: 0.125 x̄: 0.05 x̃: 0
HURT stats (rel) min: 0.21% max: 33.33% x̄: 2.16% x̃: 0.96%
95% mean confidence interval for arith value: -0.12 -0.12
95% mean confidence interval for arith %-change: -8.16% -7.81%
Arith are helped.
total quadwords in shared programs: 1796563 -> 1766803 (-1.66%)
quadwords in affected programs: 948830 -> 919070 (-3.14%)
helped: 12078
HURT: 219
helped stats (abs) min: 1.0 max: 42.0 x̄: 2.49 x̃: 2
helped stats (rel) min: 0.10% max: 33.33% x̄: 5.57% x̃: 5.26%
HURT stats (abs) min: 1.0 max: 4.0 x̄: 1.21 x̃: 1
HURT stats (rel) min: 0.33% max: 6.67% x̄: 2.00% x̃: 1.14%
95% mean confidence interval for quadwords value: -2.46 -2.38
95% mean confidence interval for quadwords %-change: -5.52% -5.36%
Quadwords are helped.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14163>
Timothy Arceri [Wed, 16 Feb 2022 03:41:45 +0000 (14:41 +1100)]
glsl/nir: free GLSL IR right after we convert to NIR
Gives us memory back faster which is useful for pathalogical CTS
tests.
The GLSL IR was previously used after converting to NIR for things
like building the GL resource list but we have had a NIR version
for this for some time and I don't believe there are any other
use cases left for keeping the old IR hanging around this long.
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15127>
Emma Anholt [Wed, 9 Feb 2022 21:56:31 +0000 (13:56 -0800)]
ci/virgl: Drop the bvec4_from_mat4x2_vs xfail.
The fix has landed in VK-GL-CTS 1.3.1.0, we were just not noticing it
because this is also in the flakes list.
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14962>
Emma Anholt [Tue, 8 Feb 2022 21:48:52 +0000 (13:48 -0800)]
ci/softpipe: Move most of testing to shared 64-core runners at Google.
The single job takes about 3:30 of runner time. I don't have a good
explanation for the crash->fail test changes.
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14962>
Emma Anholt [Tue, 8 Feb 2022 21:12:42 +0000 (13:12 -0800)]
ci/lavapipe: Test 1/3 of lavapipe on the shared 64-core google runners.
Now we can get through 1/3 of the testsuite in about 3:30, while
previously we did 1/10th.
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14962>
Emma Anholt [Tue, 8 Feb 2022 20:37:37 +0000 (12:37 -0800)]
ci/llvmpipe: Move most of testing to shared 64-core runners at Google.
These runners are configured to have a single job take up the whole
runner, which means we get to use threads to our hearts content. The pile
of cores means we don't need to spawn separate jobs to try to load-balance
across fdo's shared runner capacity. Having dedicated runners means we
won't get our MRs blocked as much waiting on non-Mesa testing happening on
fd.o.
We manage to complete all of this llvmpipe testing in about 6:15.
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14962>
Emma Anholt [Tue, 8 Feb 2022 20:52:56 +0000 (12:52 -0800)]
ci: Stash the ldd and ccache stats output under collapsed sections.
You rarely need to look at these, they're just nice to have sometimes.
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14962>
Samuel Pitoiset [Thu, 28 Oct 2021 13:50:31 +0000 (15:50 +0200)]
radv: initialize extra state for internal pipelines at one place
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650>
Samuel Pitoiset [Thu, 28 Oct 2021 12:50:10 +0000 (14:50 +0200)]
radv: remove useless radv_blend_state::single_cb_enable field
This was only used for meta operations. DCC/FMASK/FCE pipelines
only declare one color attachment and the color writemask of the
second color attachment is 0 for the HW CB resolve.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650>
Samuel Pitoiset [Thu, 28 Oct 2021 13:27:38 +0000 (15:27 +0200)]
radv: initialize VGT_GS_OUT_PRIM_TYPE earlier
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650>
Samuel Pitoiset [Thu, 28 Oct 2021 13:17:59 +0000 (15:17 +0200)]
radv: initialize more depth/stencil states earlier
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14650>
Dmitry Baryshkov [Wed, 16 Feb 2022 22:15:12 +0000 (01:15 +0300)]
freedreno/regs: remove 5nm DSI PHY regs
5nm PHY is a variation of 7nm PHY, they use the same register
definitions. To remove duplication, drop 5nm defs.
Cc: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15051>
Eric Engestrom [Wed, 23 Feb 2022 19:05:20 +0000 (19:05 +0000)]
docs: update calendar and link releases notes for 21.3.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15149>
Eric Engestrom [Wed, 23 Feb 2022 18:19:19 +0000 (18:19 +0000)]
docs: add release notes for 21.3.7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15149>
Dave Airlie [Wed, 23 Feb 2022 01:35:52 +0000 (11:35 +1000)]
draw/so: don't use pre clip pos if we have a tes either.
This check for geom shader needed to be expanded for tess support.
dEQP-VK.transform_feedback.simple.depth_clip_control_tese with lvp
Fixes:
dacf8f5f5c82 ("draw: hook up final bits of tessellation")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15128>
Alyssa Rosenzweig [Wed, 23 Feb 2022 14:29:28 +0000 (09:29 -0500)]
pan/mdg: Fix overflow in intra-bundle interference
There are up to 4 instructions in the latter stage (if a branch is included),
not 3. Bump the limit to fix memory corruption.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15147>