ac/llvm: Implement load_num_subgroups for NGG shaders.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17706>

radv: Simplify the meta init fail path

Move most of the the cleanup into radv_device_init_meta.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17652>

radv: Use RADV_META_SUSPEND_PREDICATING

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17625>

radv: Add meta saving/restoring for predicating

There are a bunch of places, where this is done manually.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17625>

llvmpipe: fix aniso cube map arrays.

There was a coordinate missing when you have cube map arrays,
and aniso sampling.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Fixes: ce2b711c0a5d ("gallivm: add support for anisotropic sampling.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17704>

Revert "venus: suballocate more for layering"

This reverts commit f96e25ae0530be62e8c4b0ca6631643725753190.

It's causing vkbench oom failure on radv.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17701>

zink: Mark depth/stencil visual tests as flakes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17696>

vulkan: Don't assert VkGraphicsPipelineLibraryCreateInfoEXT::Flags == 0

There are VUs that imply that this is a requirement but the CTS seems to
ignore it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17696>

vulkan: Input assembly and depth/stencil can also be fully dynamic

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17696>

vulkan: Fix pipeline libraries with dynamic-only VI or FSR state

When we initialize the graphics pipeline state, we skip VI and FSR state
if they're 100% dynamic.  We need to do this if the current set of
dynamic things contains VI/FSR or if the set of dynamic state already in
the vk_graphics_pipeline_state has them dynamic.  Look state->dynamic
after we've merged instead of just looking at the dynamic set from the
VkGraphicsPipelineCreateInfo we were passed.

Also, when we validate, we need to assume that VI and FSR exist or else
we'll assert if dynamic VI or FSR are set.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17696>

vulkan: Add a fully_dynamic_state_groups() helper

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17696>

vulkan: Depth/stencil isn't fragment output state but multisample is

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17696>

vulkan: Multisample state isn't always included in fragment shader state

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17696>

vulkan: Record shader stages in vk_graphics_pipeline_state

Some of our asserts and other checks depend on the total set of stages,
not just the stages set in the current pCreateInfo.  Recording the stage
mask lets us combine them in vk_graphics_pipeline_state_merge().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17696>

vulkan: Allow up to 12 pointers in multialloc

vk_graphics_pipeline_state_init() may allocate up to 12 things so expand
vk_multialloc accordingly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17696>

turnip: fix an assertion with drm-shim

Fixes

  deqp-vk: ../src/vulkan/runtime/vk_device.c:49:
  get_timeline_mode: Assertion `timeline_type == NULL' failed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17571>

freedreno/drm-shim: add a660

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17571>

Revert "ci/freedreno: Switch a630 to manual/disabled for lab maintenance."

This reverts commit 7e381ba9fcc4b2cba0ab72fdfbe5535561e23f6c.  2 new
boards are in place, bringing us from 7 to 9.  We hoped for 12, but have
ongoing power stability issues.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17662>

ci/turnip: Add a couple of missing a630 fails.

Same as a618.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17662>

ci/turnip: Bump up the a630 full run timeout.

Test runtime has crept up with more CTS tests and more features.  The last
vk_full 1/2 run I tried timed out at:

Pass: 268488, Fail: 2, ExpectedFail: 7, Warn: 1, Skip: 602571, Duration: 1:29:29, Remaining: 45

Rude.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17662>

ci/freedreno: Add some more known flakes for a630 from our IRC logs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17662>

d3d12: Support clip halfz

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17567>

d3d12: Enable VPP rotation, flip, alpha blend, crop, scaling via pipe_video_codec::process_frame

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17557>

d3d12: Add pipe_video_codec::process_frame implementation

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17557>

va: Add support for VPP rotation, flip, alpha blend, crop, scaling

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17557>

gallium/video: Add video post processing interface

Add process_frame to pipe_video codec
Add new structures/caps for video post-processing with rotation,
flip, alpha blending, crop, and scaling, via the video engine.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17557>

va: Replace usage of entrypoint UNKNOWN with PROCESSING for VP

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17557>

vl: Replace usage of entrypoint UNKNOWN with PROCESSING for VP

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17557>

pipe/video: Add PIPE_VIDEO_ENTRYPOINT_PROCESSING

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17557>

d3d12: Video - Remove unused spCopyQueues from enc/dec objects

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17557>

anv: allocate RT scratch in local memory

Like a 100x (not joking) improvement.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17674>

ac/nir/ngg: Create output variable for primitive ID export.

This makes the RADV/LLVM backend happy and mitigates a crash.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17581>

aco: Remove hack for primitive ID export.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17581>

ac/nir/ngg: Move primitive ID workgroup barrier to proper place.

Previously, it was in a divergent branch, therefore
it could hang the GPU when a workgroup had a primitive-only wave.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17581>

ac/nir/ngg: Decouple primitive ID store and primitive export.

There's no dependency between them.

This can simplify the compiler backend translation by
always storing prim id before vertex export, which also
benefits the LLVM backend in latter changes.

Signed-off-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17581>

lavapipe: Use more Vulkan NIR heleprs

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17644>

vulkan: Call gather_xfb_info in vk_spirv_to_nir

In particular, we now call it before running dead variables so we get
the XFB info even for things which are never written.  This fixes a 102
Vulkan CTS tests on ANV and probably turnip as well.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17644>

vulkan/nir: Don't remove dead XFB outputs

Fixes: 21b405fbbc53 ("vulkan: Add a vk_shader_module_to_nir() helper")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17644>

vulkan: Call lower_clip_cull_distance_arrays in vk_spirv_to_nir

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17644>

iris/bufmgr: Add assert and TODO comment for future small BAR uapi

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

anv/allocator: Add assert and TODO comment for future small BAR uapi

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

iris: Set clear_color_unknown if the bo is not mappable

Rework:
 * Ken: Check bo for IRIS_MMAP_NONE rather than the global
   intel_vram_all_mappable

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

iris/bufmgr: Set mmap_mode to IRIS_MMAP_NONE for lmem in small-BAR mode

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

iris/bufmgr: Add all_vram_mappable which is currently always true

This can be false on systems where the PCI Base Address Register (BAR)
is too small for the amount of VRAM. Eventually the kernel will be
able to tell us that a system can't map all of VRAM, and
`all_vram_mappable` will then be false.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

iris/resource: Avoid mapping when not needed in iris_resource_init_aux_buf()

We might not be able to map all vram buffers in the future, so only
map the buffer when actually required.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

iris/resource: Assert that DG2 CCS buffers don't also try to set BO_ALLOC_SMEM

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

intel/dev: Add intel_vram_all_mappable()

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

intel/tools: Print unmappable region info in intel_dev_info

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

intel/dev: Add vram.unmappable.size region info

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

intel/dev: deal with i915 unallocated_size on smem

We cannot rely on unallocated_size on system memory for
VK_EXT_memory_budget.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4aecfbf0f4ab ("intel/dev: Add devinfo::mem to store i915 regions information")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17349>

ttn: set dest_type for TXQ

It was failing an assertion in tgsi_to_nir and NIR validation.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17691>

ir3: Stop using nir_legalize_16bit_sampler_srcs.

nir_fold_16bit_tex_image's only_fold_all option ensures that there is never
a mix of bit sizes.

Closes https://gitlab.freedesktop.org/mesa/mesa/-/issues/6899

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16978>

nir/lower_mediump: Add an option to only fold if all tex sources can be folded.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16978>

nir: Rewrite and merge 16bit tex folding pass with 16bit image folding pass.

Allow folding constants/undef sources by sharing more code with the image_store
16bit folding pass.

Allow more than one set of sources because RADV wants two, one for
G16 (ddx/ddy) and one for A16 (all other sources).

Allow folding cube sampling destination conversions on radeonsi/radv because
I think the limitation only applies to sources.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16978>

ir3: Lower alu to scalar if nir_legalize_16bit_sampler_srcs made progress.

Fixes: 003327dd95b ("freedreno/ir3: Pass 16-bit sampler coordinates when possible.")
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16978>

ir3: Only run 16bit tex NIR passes on a5xx+.

16bit types aren't yet supported on older hardware.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16978>

zink: add env var to abort on device-lost if no reset callback is set

the alternative here is to just spin aimlessly until the process ooms,
which causes problems when trying to detect failures in cts caselists

a separate env var is used so that it can be exported without affecting
ZINK_DEBUG

Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17525>

gallium/tests: Remove format desc null checks

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

util/format: Remove format desc null checks

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

pvr: Remove format desc null check

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

virgl: Remove format desc null checks

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

softpipe: Remove format desc null check

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

radeonsi: Remove format desc null checks

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

r600: Remove format desc null checks

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

r300: Remove format desc null check

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

panfrost: Remove format desc null check

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

llvmpipe: Remove format desc null checks

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

etnaviv: Remove format desc null check

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

agx: Remove format desc null check

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

util: Remove format desc null check

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

tgsi: Remove format desc null check

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

gallivm: Remove format desc null checks

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

turnip: Remove format desc null assert

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

v3dv: Remove format desc null asserts

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

radv: Use desc->format

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

radv: Remove format desc null checks

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

util/format: Assert that formats are valid

It should be the responsibility of the driver to make sure, that "format" is a valid pipe_format.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

util/format: Use an explicit length for the descs

The script that generates the format tables does not set every pipe_format.
In practice, the length of the format tables is equal to PIPE_FORMAT_COUNT.
I just added the explicit size to future-proof it.

(If the largest valid format is not part of the format tables,
 there will be a mismatch between the array length and PIPE_FORMAT_COUNT)

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17490>

radv: only force 1x sample for Bresenham lines when pipeline draws lines

Otherwise, this would affect non-line draws. While we are at it,
adjust a comment.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6303
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17657>

ci/lava: Increase boot timeout

Empirically, a successful LAVA boot time should take less than 3
minutes.

LAVA itself is configured to attempt thrice to boot the device,
summing up to 9 minutes.

It is better to retry the boot than cancel the job and re-submit to
avoid the enqueue delay.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17646>

ci/turnip: Add a bit of spilling-vs-ballot testing on a618.

The shared reg usage involved in the subgroup-related macros can cause
trouble for the spiller, and spilling may be implicated in CTS failures
with old versions of the subgroup tests, so let's make sure we get some
coverage.  It does seem to catch a couple of failures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17642>

freedreno: Enable A619

Enable A619 as found in various SKUs of the SM Lagoon SoC, such as
SM6350 and SM7225.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17495>

util: Gate simple_mtx_assert_locked on !NDEBUG

..Instead of DEBUG so these work in debugoptimized builds.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17408>

util: Enable list_assert in debugoptimized builds

In debugoptimized builds, DEBUG is not set (and neither is NDEBUG). The
intention of NDEBUG is to disable assertions. As such, list assertions should be
gated on !NDEBUG as opposed to on DEBUG.

But assert() is already disabled in that case, so we don't need our own special
assert (Eric).

This would have caught an assertion failure (due to the wrong iterator used)
sooner for the Valhall compiler.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17408>

vulkan/wsi: return VK_SUBOPTIMAL_KHR for sw/x11 on window resize

the other codepaths all end up checking geometry in one way or another
in order to validate the extents, so add a check here to do the same

fixes #6893

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17638>

glsl: Remove optimize_swizzles.

It will get turned into SSA and copy-propagated in NIR, no need to walk
the IR collapsing it here.

iris shader-db results appear to be noise:

total instructions in shared programs: 8932195 -> 8932147 (<.01%)
instructions in affected programs: 537 -> 489 (-8.94%)
LOST:   12
GAINED: 11

lost/gained are simd32 switches in unigine, l4d2, portal2, asphalt9.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17613>

zink: invoke descriptor_program_deinit for programs on context destroy

this should make multi-context shutdown more stable

affects:
glx@glx-visuals-depth -pixmap
glx@glx-visuals-stencil

cc: mesa-stable

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17658>

glsl: Use the same NIR path for shared mem lowering as SPIRV does.

Now that we have no non-NIR drivers, we can retire the old code.  We just
need to pass the variable accesses through to it.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17610>

radv: Enable task shader feature for NV_mesh_shader.

Still hidden behind RADV_PERFTEST=nv_ms but now advertises
task shader support too.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Copy BO list to ACE internal CS.

This is necessary to make sure the ACE internal cmdbuf
can access the same memory as the GFX cmdbuf.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Submit internal compute cmdbuf.

Use scheduled dependencies to create two submissions:
first we submit ACE then GFX.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Workaround MEC taskmesh dispatch hang when count buffer has zero.

The DISPATCH_TASKMESH_INDIRECT_MULTI_ACE packet has a firmware bug,
it hangs the GPU when the draw count is zero.

This commit adds a workaround sequence using COND_EXEC packets
which make sure that this indirect packet is never executed when
the draw count is zero.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Support task shaders in secondary cmd buffers.

Special consideration is needed to keep ACE and GFX in sync.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Synchronization for task shaders.

Add a separate flush_bits field for tracking cache
flushes in the ACE internal cmdbuf.
In barriers and image transitions we add these flush bits to ACE.

Create a semaphore in the upload BO which makes it possible
for ACE to wait for GFX for the purpose of synchronization.
This is necessary when a barrier needs to block task shaders.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Implement mesh shading draw calls with task shaders.

This implements NV_mesh_shader draw calls with task shaders.

- On the GFX side:
  DISPATCH_TASKMESH_GFX for all draws
- On the ACE side:
  DISPATCH_TASKMESH_DIRECT_ACE for direct draws
  DISPATCH_TASKMESH_INDIRECT_MULTI_ACE for indirect draws

Additionally, the NV_mesh_shader indirect BO layout is
incompatible with AMD HW, so we add a function that copies
that into a suitable layout.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Introduce radv_before_taskmesh_draw.

This includes additional code that takes care of
handling the internal ACE cmdbuf.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Flush descriptors and push constants for task shaders.

Task shaders are executed on the internal compute cmdbuf, so they
need special consideration.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Create internal cmdbuf when a graphics pipeline needs compute.

This is mainly going to be used by task shaders, because
the HW implementation mismatches the API:

- In the API, task shaders are considered graphics shaders which
  are part of a graphics pipeline and the draws are submitted to
  a graphics queue.
- The HW requires the driver to dispatch task shaders on
  an async compute queue.

When a pipeline is bound that has a task shader, create a
driver-internal ACE (async compute engine) cmdbuf which
we are going to submit to an ACE queue.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Add dispatch_initiator_task field to radv_device.

This is going to be used with task shader dispatches.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

radv: Allow reusing pipeline compute state emit functions.

We are going to reuse them outside of radv_pipeline.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>