Tom Stellard [Thu, 3 Nov 2022 22:12:50 +0000 (15:12 -0700)]
clang/cmake: Simplify lit detection for standalone builds
Reviewed By: mgorny, phosek, Ericson2314
Differential Revision: https://reviews.llvm.org/D137224
George Hu [Wed, 2 Nov 2022 19:19:22 +0000 (12:19 -0700)]
Override CalculateFrameVariableError in SymbolFileOnDemand
Differential Revision: https://reviews.llvm.org/D137284
Med Ismail Bennani [Thu, 3 Nov 2022 21:42:34 +0000 (14:42 -0700)]
[lldb/Plugins] Use default initializers for StructuredData::*SP (NFC)
This patch replaces the ScriptedProcessInterface getters to return
default initializers for StructureData shared pointers instead of
returning a null pointer.
Differential Revision: https://reviews.llvm.org/D137359
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Thu, 3 Nov 2022 21:27:28 +0000 (14:27 -0700)]
[lldb/crashlog] Add support for Application Specific Backtraces & Information
For an exception crashlog, the thread backtraces aren't usually very helpful
and instead, developpers look at the "Application Specific Backtrace" that
was generated by `objc_exception_throw`.
LLDB could already parse and symbolicate these Application Specific Backtraces
for regular textual-based crashlog, so this patch adds support to parse them
in JSON crashlogs, and materialize them a HistoryThread extending the
crashed ScriptedThread.
This patch also includes the Application Specific Information messages
as part of the process extended crash information log. To do so, the
ScriptedProcess Python interface has a new GetMetadata method that
returns an arbitrary dictionary with data related to the process.
rdar://
93207586
Differential Revision: https://reviews.llvm.org/D126260
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Thu, 3 Nov 2022 18:25:40 +0000 (11:25 -0700)]
[lldb/Utility] Add GetDescription(Stream&) to StructureData::*
This patch improves the StructuredData classes to provide a
GetDescription(lldb_private::Stream&) affordance.
This is very convenient compared to the Dump method because this try to
pretty print the structure instead of just serializing it into a JSON.
This patch also updates some parts of lldb (i.e. extended crash info) to
use this new affordance instead of StructuredData::Dump.
Differential Revision: https://reviews.llvm.org/D135547
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Mon, 10 Oct 2022 20:45:45 +0000 (13:45 -0700)]
[lldb/Utility] Fix StructuredData::ParseJSONValue for null items
This patch fixes the JSON parser for StructuredData to handle JSON null
entries.
Differential Revision: https://reviews.llvm.org/D135616
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Sat, 8 Oct 2022 01:20:17 +0000 (18:20 -0700)]
[lldb/Commands] Add newline for extended backtrace thread (NFCI)
This adds a new line between the real thread and the extended backtrace
thread when it's available. This should improve readability for the user.
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Fri, 7 Oct 2022 23:11:49 +0000 (16:11 -0700)]
[lldb/Plugins] Cleanup error handling in Scripted{Process,Thread} (NFC)
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Fri, 7 Oct 2022 23:08:52 +0000 (16:08 -0700)]
[lldb/crashlog] Fix the image_regex_uuid to skip null UUID images
This patch updates the image_regex_uuid matcher to match null-UUID
images in the plain text crashlog parser.
It updates the regex to match one or more '?' characters or the image
full path.
rdar://
100904019
Differential Revision: https://reviews.llvm.org/D135482
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Fri, 7 Oct 2022 23:12:52 +0000 (16:12 -0700)]
[lldb/crashlog] Add support for 32bit frame addresses
This patch adds support for 32bit stack frame addresses in the `crashlog`
command.
For crash reports that are generated from a arm64_32 process, `PAGEZERO`
is loaded at 0x00004000 so no code address will be less than 0x4000.
This patch changes the crashlog frame address regex group to match
addresses as small as 4 hex characters.
rdar://
100805026
Differential Revision: https://reviews.llvm.org/D135310
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
varconst [Thu, 3 Nov 2022 21:25:40 +0000 (14:25 -0700)]
[libcxx] Fix the support requirements for `std::function` Objective-C++ test.
The test requires two features to be supported but only checked for one
of them.
Differential Revision: https://reviews.llvm.org/D137294
Joseph Huber [Thu, 27 Oct 2022 16:13:22 +0000 (16:13 +0000)]
[Binary] Support extracting offloading files from COFF
This patch adds initial support for extracting offloading binaries from
`COFF` objects. This is a first step to allow building offloading files
on Windows targets with the new driver.
Depends on D136796
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D136855
Joseph Huber [Wed, 26 Oct 2022 21:07:12 +0000 (21:07 +0000)]
[llvm-objdump][Offload] Use common offload extraction method
A previous patch introduced a common function used to extract offloading
binaries from an image. Therefore we no longer need to duplicate the
functionality in the `llvm-objdump` implementation. Functionally, this
removes the old warning behaviour when given malformed input. This has
been changed to a hard error, which is effectively the same.
This required a slight tweak in the linker wrapper to filter out the
user passing shared objects directly.
Reviewed By: tra
Differential Revision: https://reviews.llvm.org/D136796
Tom Stellard [Thu, 3 Nov 2022 20:59:46 +0000 (13:59 -0700)]
DebugInfo: Move missing-abstract-variable.ll test from Generic to X86
This test is XFAIL'd on most arches, and seems too fragile to be run on non-X86.
Reviewed By: jmorse, probinson
Differential Revision: https://reviews.llvm.org/D109806
Manoj Gupta [Tue, 25 Oct 2022 19:29:03 +0000 (12:29 -0700)]
Define _GNU_SOURCE for arm baremetal in C++ mode.
This matches other C++ drivers e.g. Linux that define
_GNU_SOURCE. This lets clang compiler more code by default
without explicitly passing _GNU_SOURCE on command line.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D136712
Mahesh Ravishankar [Thu, 3 Nov 2022 20:38:34 +0000 (20:38 +0000)]
[mlir][Arith] Fix folder of CmpIOp to not fail when element type is not integer.
The folder used `cast<IntegerType>` which would segfault if the type were
a vector type. Handle this case appropriately and avoid failure.
Reviewed By: hanchung
Differential Revision: https://reviews.llvm.org/D137345
Mahesh Ravishankar [Thu, 3 Nov 2022 20:30:12 +0000 (20:30 +0000)]
[mlir][Tensor] Allow builders of `tensor.empty` to accept encoding attribute.
The `RankedTensorType` can have an optional encoding
attribute. Allowing the builders of `tensor.empty` to accept the
encoding attribute (optionally), allows building empty tensors with
the type having the encoding attribute.
Reviewed By: nicolasvasilache, hanchung, springerm
Differential Revision: https://reviews.llvm.org/D137297
Rafael Auler [Tue, 1 Nov 2022 21:21:23 +0000 (14:21 -0700)]
[test-release] Build BOLT by default for x86/arm
Make BOLT build by default in X86 and AArch64 Linux boxes.
Reviewed By: thieta, xbolva00
Differential Revision: https://reviews.llvm.org/D137305
Sam James [Wed, 19 Oct 2022 19:12:10 +0000 (20:12 +0100)]
Link libclangBasic against libatomic when necessary.
This is necessary at least on PPC32.
Depends on D136280.
Bug: https://bugs.gentoo.org/874024
Thanks-to: Arfrever Frehtes Taifersar Arahesis <Arfrever@Apache.Org>
Tested-by: erhard_f@mailbox.org <erhard_f@mailbox.org>
Differential Revision: https://reviews.llvm.org/D136282
Sam James [Wed, 19 Oct 2022 19:09:34 +0000 (20:09 +0100)]
Link liblldCOFF against libatomic when necessary
Also simplify code for liblldCommon using the new LLVM_ATOMIC_LIB variable.
Depends on D136280.
Bug: https://bugs.gentoo.org/832675
Thanks-to: Arfrever Frehtes Taifersar Arahesis <Arfrever@Apache.Org>
Tested-by: erhard_f@mailbox.org <erhard_f@mailbox.org>
Differential Revision: https://reviews.llvm.org/D136281
Sam James [Wed, 19 Oct 2022 18:50:20 +0000 (19:50 +0100)]
Set LLVM_ATOMIC_LIB variable for convenient linking against libatomic
* Set LLVM_ATOMIC_LIB to keep track of when we need to link against libatomic.
* Add detection of mold linker which is required for this.
* Use --as-needed when linking against libatomic as a bonus. On some platforms,
libatomic may be required only sometimes.
Bug: https://bugs.gentoo.org/832675
Thanks-to: Arfrever Frehtes Taifersar Arahesis <Arfrever@Apache.Org>
Tested-by: erhard_f@mailbox.org <erhard_f@mailbox.org>
Differential Revision: https://reviews.llvm.org/D136280
Mingming Liu [Wed, 2 Nov 2022 23:28:49 +0000 (16:28 -0700)]
[AArch64] Compare BFI and ORR with left-shifted operand for OR instruction selection.
Before this patch:
- For `r = or op0, op1`, `tryBitfieldInsertOpFromOr` combines it to BFI when
1) one of the two operands is bit-field-positioning or bit-field-extraction op; and
2) bits from the two operands don't overlap
After this patch:
- Right before OR is combined to BFI, evaluates if ORR with left-shifted operand is better.
A motivating example (https://godbolt.org/z/rnMrzs5vn, which is added as a test case in `test_orr_not_bfi` in `CodeGen/AArch64/bitfield-insert.ll`)
For IR:
```
define i64 @test_orr_not_bfxil(i64 %0) {
%2 = and i64 %0, 127
%3 = lshr i64 %0, 1
%4 = and i64 %3, 16256
%5 = or i64 %4, %2
ret i64 %5
}
```
Before:
```
lsr x8, x0, #1
and x8, x8, #0x3f80
bfxil x8, x0, #0, #7
```
After:
```
ubfx x8, x0, #8, #7
and x9, x0, #0x7f
orr x0, x9, x8, lsl #7
```
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D135102
Florian Hahn [Thu, 3 Nov 2022 19:05:45 +0000 (19:05 +0000)]
[ConstraintElim] Drop bail out for scalable vectors after using getTrue
ConstantInt::getTrue/getFalse can materialize scalable vectors with all
lanes true/false.
Mats Petersson [Thu, 3 Nov 2022 13:24:13 +0000 (13:24 +0000)]
[flang]Fix build failure in tests
After submitting the DataLayout fix, some tests fail when they didn't
before. This has to do with the target essentially being ignored when
these tests were run earlier, as the --target x86-unknown-linux-gnu
only has to be correctly formed to be accepted.
Now the target triple is actually being used to get the targetmachine
earlier - before MLIR is generated - so the test that has a valid target
but not available on the platform fails.
Fix is to require x86 registered target when running those tests.
Reviewed By: awarzynski
Differential Revision: https://reviews.llvm.org/D137335
Nathan Chancellor [Thu, 3 Nov 2022 18:33:50 +0000 (11:33 -0700)]
Revert "[AArch64] Improve codegen for shifted mask op"
This reverts commit
b4e1466c35d3ca3e04244e8e8b4ffaf0784d6d37.
This causes a crash while building the Linux kernel. See the original
Phabricator review for a reduced C and LLVM IR reproducer.
Mingming Liu [Thu, 3 Nov 2022 17:45:18 +0000 (10:45 -0700)]
[NFC][AArch64]Precommit test for D135102
- Run auto updater for 'trunc-to-tbl.ll' and 'build-pair-isel.ll'
- Add the motivating test of D135102 to 'bitfield-insert.ll'
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D137296
Jason Molenda [Thu, 3 Nov 2022 17:46:48 +0000 (10:46 -0700)]
Have GetSupportedArchitectures report all supported arches
PlatformDarwinKernel::GetSupportedArchitectures returns a list
of architectures that are possible for this platform; it was using
a compile-time check for the debug host to decide the list of arches
that were valid. This was copied from a codepath doing native process
debugging, and was clearly wrong for kernel debugging, but it had
not happened to cause problems so it went unnoticed for a long time.
Small NFC change to the logging messages of Target::SetArchitecture
to make them a little more explicit about how the architecture is
being modified/replaced.
Differential Revision: https://reviews.llvm.org/D137301
rdar://
101690111
Emilio Cota [Thu, 3 Nov 2022 14:47:25 +0000 (10:47 -0400)]
[mlir][bufferize] Add filterFn option to BufferResultsToOutParams
This allows users to restrict the transformation to a
subset of the functions in a module.
For example, a user might want to apply the transformation to
a module's entry point, but not to the calls in the module
because those calls might refer to external C functions outside
of their control.
Reviewed By: springerm, nicolasvasilache
Differential Revision: https://reviews.llvm.org/D137264
Renaud-K [Wed, 2 Nov 2022 23:02:04 +0000 (16:02 -0700)]
Fixing flang's definition of MLIR_MAIN_SRC_DIR
Petar Avramovic [Thu, 3 Nov 2022 16:41:41 +0000 (17:41 +0100)]
GlobalISel: Fix artifact combine value finder look through copy
Search for COPY source in instruction we get from look through (not copy dst).
Differential Revision: https://reviews.llvm.org/D137273
Peter Steinfeld [Wed, 2 Nov 2022 21:31:14 +0000 (14:31 -0700)]
[Flang] Run clang-format on all flang files
This will make it easier for me to do reviews.
Differential Revision: https://reviews.llvm.org/D137291
Slava Zakharin [Thu, 3 Nov 2022 16:07:44 +0000 (09:07 -0700)]
[mlir][llvmir] Add support for llvm.signext/zeroext function attributes.
This change-set adds basic support for llvm.signext and llvm.zeroext
attributes, and makes sure that the attributes are translated to LLVM IR
when attached to arguments.
This is needed for https://github.com/llvm/llvm-project/issues/58579
Differential Revision: https://reviews.llvm.org/D137048
Michael Maitland [Wed, 26 Oct 2022 01:43:00 +0000 (18:43 -0700)]
[RISCV][CodeGen] Account for LMUL for Vector Integer Arithmetic Instructions
It is likley that subtargets act differently for a vector integer arithmetic instruction based on the LMUL.
This patch creates seperate SchedRead, SchedWrite, WriteRes, ReadAdvance for each relevant LMUL. It also
introduces the concept of an "UpperBound LMUL" which allows us to describe how an instruction should behave
when the LMUL is unknown. All base instructions use the UpperBound resources because they are not tied to
a specific LMUL. This gives subtargetes the flexibility to describe their own upper bounds on each vector
instruction.
I have a series of patches for the rest of the vector instruction set ready to go, but I would like to first
get feedback on the first one of the series (this one).
Differential Revision: https://reviews.llvm.org/D136730
David Green [Thu, 3 Nov 2022 16:06:35 +0000 (16:06 +0000)]
[AArch64] Alter arm_fp16.h to be target-based, not preprocessor based.
As the other recent patches, this alters the arm_fp16 intrinsics to be
target based, not preprocessor based. Apparently arm_fp16.h is AArch64
only under clang, making this mostly trivial with the TargetGuard
infrastructure.
Differential Revision: https://reviews.llvm.org/D137256
Slava Zakharin [Wed, 2 Nov 2022 19:47:50 +0000 (12:47 -0700)]
[mlir][llvmir] Convert attributes for functions without bodies.
So far the function argument attributes were only translated
for functions with bodies. This change makes sure that this
happens for functions without bodies (declarations) as well.
This is needed for https://github.com/llvm/llvm-project/issues/58579
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D137047
rkayaith [Thu, 20 Oct 2022 05:04:34 +0000 (01:04 -0400)]
[mlir][python] Include anchor op in PassManager constructor
This adds an extra argument for specifying the pass manager's anchor op,
with a default of `any`. Previously the anchor was always defaulted to
`builtin.module`.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D136406
rkayaith [Thu, 20 Oct 2022 03:36:15 +0000 (23:36 -0400)]
[mlir][python] Include anchor op in PassManager.parse
The pipeline string must now include the pass manager's anchor op. This
makes the parse API properly roundtrip the printed form of a pass
manager.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D136405
rkayaith [Thu, 20 Oct 2022 02:37:12 +0000 (22:37 -0400)]
[mlir][CAPI] Include anchor op in mlirParsePassPipeline
The pipeline string must now include the pass manager's anchor op. This
makes the parse API properly roundtrip the printed form of a pass
manager. Since this is already an API break, I also added an extra
callback argument which is used for reporting errors.
The old functionality of appending to an existing pass manager is
available through `mlirOpPassManagerAddPipeline`.
Reviewed By: mehdi_amini, ftynse
Differential Revision: https://reviews.llvm.org/D136403
rkayaith [Wed, 21 Sep 2022 00:20:44 +0000 (20:20 -0400)]
[mlir] Include anchor op in reproducer pipeline string
Including the anchor op ensures that all pass manager settings are fully
specified, and makes the string consistent with the printed form.
Depends on D134622
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D134623
Jan Sjodin [Thu, 3 Nov 2022 15:41:21 +0000 (11:41 -0400)]
[OpenMP][OMPIRBuilder] Migrate createOffloadEntriesAndInfoMetadata from clang to OpenMPIRBuilder
Remove unused [this] capture in lambda.
rkayaith [Tue, 18 Oct 2022 18:44:11 +0000 (14:44 -0400)]
[mlir][Pass] Include anchor op in -pass-pipeline
In D134622 the printed form of a pass manager is changed to include the
name of the op that the pass manager is anchored on. This updates the
`-pass-pipeline` argument format to include the anchor op as well, so
that the printed form of a pipeline can be directly passed to
`-pass-pipeline`. In most cases this requires updating
`-pass-pipeline='pipeline'` to
`-pass-pipeline='builtin.module(pipeline)'`.
This also fixes an outdated assert that prevented running a
`PassManager` anchored on `'any'`.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D134900
Jay Foad [Thu, 3 Nov 2022 15:33:07 +0000 (15:33 +0000)]
[AMDGPU] Fix duplicated words in comments
David Green [Thu, 3 Nov 2022 15:18:36 +0000 (15:18 +0000)]
[AArch64] Add a baseline test for fp16 target intrinsics. NFC
LiDongjin [Tue, 18 Oct 2022 15:28:34 +0000 (23:28 +0800)]
[LoopVectorize] Fix crash on "Cannot dereference end iterator!"(PR56627)
Check hasOneUser before user_back().
Differential Revision: https://reviews.llvm.org/D136227
Nikita Popov [Thu, 3 Nov 2022 09:54:16 +0000 (10:54 +0100)]
[InstCombine] Perform memset -> load forwarding
InstCombine does some basic store to load forwarding. One case it
currently misses is the case where the store is actually a memset.
This patch adds support for this case. This is a minimal
implementation that only handles a load at the memset base address,
without an offset.
GVN is already capable of performing this optimization. Having it
in InstCombine can help with phase ordering issues, similar to the
existing store to load forwarding.
Differential Revision: https://reviews.llvm.org/D137323
Nikita Popov [Thu, 3 Nov 2022 14:46:23 +0000 (15:46 +0100)]
[SimplifyCFG] Add tests for block speculation with assumes (NFC)
zhijian [Thu, 3 Nov 2022 14:36:44 +0000 (10:36 -0400)]
[XCOFF] change the decoding of External symbol's function auxiliary entry in XCOFF32 for llvm-readobj
Summary:
llvm-readobj decide whether to decode the external symbol's function auxiliary entry based on whether symbol is function or not currently. But the XCOFFSymbolRef::isFunction() do not work properly when -ffunction-sections is enabled. we will not decode the function auxiliary entry based on the XCOFFSymbolRef::isFunction()
we will decode the function auxiliary entry based on following:
According to the https://www.ibm.com/docs/en/aix/7.2?topic=formats-xcoff-object-file-format#XCOFF__c0f91ad419jbau
In XCOFF32, there are only "one csect Auxiliary Entry" and "a function auxiliary symbol table entry" for the C_EXT, C_WEAKEXT, and C_HIDEXT Symbols. and By convention, the csect auxiliary entry in an XCOFF32 file must be the last auxiliary entry for any external symbol that has more than one auxiliary entry( that means for the C_EXT, C_WEAKEXT, and C_HIDEXT Symbols. if there more than one auxiliary Entries. we look the last one as csect auxiliary entry. and others auxiliary entries as function entries).
Reviewers: Hubert Tong, James Henderson
Differential Revision: https://reviews.llvm.org/D136950
Nikita Popov [Wed, 2 Nov 2022 10:25:42 +0000 (11:25 +0100)]
[CVP] Simplify comparisons without constant operand
CVP currently only tries to simplify comparisons if there is a
constant operand. However, even if both are non-constant, we may
be able to determine the result of the comparison based on range
information.
IPSCCP is already capable of doing this, but because it runs very
early, it may miss some cases.
Differential Revision: https://reviews.llvm.org/D137253
bipmis [Thu, 3 Nov 2022 14:32:07 +0000 (14:32 +0000)]
[AggressiveInstCombine] Avoid load merge/widen if stores are present b/w loads
This patch is to address the test cases in which the load has to be inserted at a right point. This happens when there is a store b/w the loads.
This patch reverts the loads merge in all cases when stores are present b/w loads and will eventually be replaced with proper fix and test cases.
Differential Revision: https://reviews.llvm.org/D137333
Jan Sjodin [Wed, 2 Nov 2022 14:18:48 +0000 (10:18 -0400)]
[OpenMP][OMPIRBuilder] Migrate createOffloadEntriesAndInfoMetadata from clang to OpenMPIRBuilder
This patch moves the createOffloadEntriesAndInfoMetadata to OpenMPIRBuilder,
the createOffloadEntry helper function. The clang specific error handling is
invoked using a callback. This code will also be used by flang in the future.
Aaron Ballman [Thu, 3 Nov 2022 14:14:30 +0000 (10:14 -0400)]
Silence a "not all control paths return" MSVC warning; NFC
Nikita Popov [Thu, 3 Nov 2022 12:16:24 +0000 (13:16 +0100)]
[SimplifyCFG] Use range based for loop (NFC)
Stefan Gränitz [Thu, 3 Nov 2022 14:02:11 +0000 (15:02 +0100)]
[JITLink] Fix check-line in Windows X86 COFF COMDAT test
This test caught my attention because it's the only one in JITLink that XFAILs. Running it in isolation showed that the output doesn't meet the CHECK-LINES, i.e. the block address didn't match:
```
error: CHECK-NEXT: expected string not found in input
CHECK-NEXT: block 0xfff02000 size = 0x00000001, align = 16, alignment-offset = 0
<stdin>:22:2: note: possible intended match here
block 0xfff01000 size = 0x00000001, align = 16, alignment-offset = 0
```
Though, that doesn't appear to be the reason the test XFAILs. What we really want to check here is that llvm-jitlink doesn't fail with a duplicate section error yet.
In order to avoid issues like this in the future we can match a placeholder to check for some valid address within the slab (64Kb == last 4 digits).
The patch also drops the duplicate -noexec argument, removes an empty RUN-line, fixes indentation and adds a newline at EOF.
Reviewed By: sunho
Differential Revision: https://reviews.llvm.org/D137148
OCHyams [Thu, 3 Nov 2022 13:46:00 +0000 (13:46 +0000)]
Revert "[Assignment Tracking][3/*] Add DIAssignID metadata boilerplate"
This reverts commit
c285df77e9b78f971f9cd9d025248c20b030cc2a.
A sanitizer bot found an issue:
https://lab.llvm.org/buildbot/#/builders/5/builds/28809/steps/13/logs/stdio
Michael Buch [Wed, 2 Nov 2022 17:18:57 +0000 (10:18 -0700)]
[lldb][Test] Make TestFrameFormatNameWithArgs.test more compatible across platforms
On Linux the `std::function` behaved differently to that on Darwin.
This patch removes usage of `std::function` in the test but attempts
to retain the test-coverage. We mainly want function types appearing
in the template argument and function argument lists.
Also add a `char const*` overload to one of the test functions to
cover the "format function argument using ValueObject formatter" code-path.
Differential Revision: https://reviews.llvm.org/D137272
Stefan Pintilie [Wed, 2 Nov 2022 14:55:54 +0000 (09:55 -0500)]
[PowerPC] Add new DMR register classes to Future CPU.
A new register class as well as a number of related subregisters are being added
to Future CPU. These registers are Dense Math Registers (DMR) and are 1024 bits
long. These regsiters can also be used in consecutive pairs which leads to a
register that is 2048 bits.
This patch also adds 7 new instructions that use these registers. More
instructions will be added in future patches.
Reviewed By: amyk, saghir
Differential Revision: https://reviews.llvm.org/D136366
Nikita Popov [Thu, 3 Nov 2022 12:08:14 +0000 (13:08 +0100)]
[SimplifyCFG] Extract code for tracking ephemeral values (NFC)
To allow reusing this in more places in SimplifyCFG.
Haojian Wu [Thu, 3 Nov 2022 12:57:46 +0000 (13:57 +0100)]
Remove an unused local variable, NFC.
Alexey Bataev [Thu, 3 Nov 2022 12:30:41 +0000 (05:30 -0700)]
[SLP]Fix write after bounds.
Need to use comma instead of + symbol to prevent writing after bounds.
Alexey Bataev [Wed, 2 Nov 2022 21:29:24 +0000 (14:29 -0700)]
[SLP][NFC]Formatting and reduce number of iterations, NFC.
Aaron Ballman [Thu, 3 Nov 2022 12:27:56 +0000 (08:27 -0400)]
[C++20] Diagnose invalid and reserved module names
[module.unit]p1 specifies that module and import are invalid components
of a module name, that module names cannot contain reserved
identifiers, and that std followed by zero or more digits is reserved.
The first issue (module and import pseudo-keywords) requires a
diagnostic, the second issue (use of reserved identifiers) does not
require a diagnostic. We diagnose both the same -- the code is ill-
formed unless the module declaration is in a system "header". This
allows STL implementations to use the reserved module names while
preventing users from stealing them out from under us.
Differential Revision: https://reviews.llvm.org/D136953
bipmis [Thu, 3 Nov 2022 12:28:24 +0000 (12:28 +0000)]
Add another test which breaks the load insert point
Corentin Jabot [Tue, 1 Nov 2022 16:37:06 +0000 (17:37 +0100)]
[Clang] Implement CWG2358 Explicit capture of value
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D137172
Florian Hahn [Thu, 3 Nov 2022 12:20:23 +0000 (12:20 +0000)]
[ConstraintElim] Use ConstantInt::getTrue to create constants (NFC).
Use existing ConstantInt::getTrue/getFalse functionality instead of
custom getScalarConstOrSplat as suggested by @nikic.
Mats Petersson [Fri, 2 Sep 2022 09:18:12 +0000 (10:18 +0100)]
[Flang][Driver]Add datalayout before doing LLVM-IR transformation
The earlier available datalyaout allows MLIR to LLVM-IR transformation
to use the datalayout for decisions, such as comparing sizes for
different types of integers.
This should solve https://github.com/llvm/llvm-project/issues/57230
Reviewed By: awarzynski, vzakhari
Differential Revision: https://reviews.llvm.org/D133568
Yusuke Kadowaki [Thu, 3 Nov 2022 12:10:48 +0000 (13:10 +0100)]
[clang-format][NFC] Fix document of AlignTrailingComments
The documentation of the patch https://reviews.llvm.org/D132131 looks
disorganized on the website
https://clang.llvm.org/docs/ClangFormatStyleOptions.html.
This patch tries to fix that.
Differential Revision: https://reviews.llvm.org/D137075
Björn Schäpers [Mon, 24 Oct 2022 19:21:31 +0000 (21:21 +0200)]
[clang-format] Don't misannotate in CTor init list
They were annotated with TrailingAnnotation, which they are not. And
that resulted in some quirky formatting in some cases.
Differential Revision: https://reviews.llvm.org/D136635
Björn Schäpers [Thu, 13 Oct 2022 21:19:16 +0000 (23:19 +0200)]
[clang-format] Fix lambda formatting in conditional
Without the patch UnwrappedLineFormatter::analyzeSolutionSpace just ran
out of possible formattings and would put everything just on one line.
The problem was that the the line break was forbidden, but putting the
conditional colon on the same line is also forbidden.
Differential Revision: https://reviews.llvm.org/D135918
OCHyams [Thu, 3 Nov 2022 09:50:31 +0000 (09:50 +0000)]
[Assignment Tracking][3/*] Add DIAssignID metadata boilerplate
The Assignment Tracking debug-info feature is outlined in this RFC:
https://discourse.llvm.org/t/
rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir
Add the DIAssignID metadata attachment boilerplate. Includes a textual-bitcode
roundtrip test and tests that the verifier and parser catch badly formed IR.
This piece of metadata links together stores (used as an attachment) and the
yet-to-be-added llvm.dbg.assign debug intrinsic (used as an operand).
Reviewed By: jmorse
Differential Revision: https://reviews.llvm.org/D132222
Valery Pykhtin [Thu, 27 Oct 2022 12:38:00 +0000 (14:38 +0200)]
[AMDGPU] Fix GCNDownwardRPTracker::advanceBeforeNext at the end of MBB
The problem with GCNDownwardRPTracker::advanceBeforeNext is that it doesn't allow to get register pressure
after the last instruction in a MBB.
However when we track RP through the boundary of a MBB we need the state that is after the last instruction
of the MBB and before the first instruction of the successor MBB. Currently we stop traking RP in the state
'at' the last instruction of the MBB which is incorrect.
This patch fixes 27 lit tests with EXPENSIVE_CHECKS enabled.
Reviewed By: rampitec, arsenm
Differential Revision: https://reviews.llvm.org/D136927
Tom Eccles [Mon, 17 Oct 2022 17:16:24 +0000 (17:16 +0000)]
[flang] Add -f[no-]honor-infinities and -menable-no-infs
Only add the option processing and store the result. No attributes are
added to FIR yet.
This patch follows Clang in forwarding -fno-honor-infinities as
-menable-no-infs.
Reviewed By: kiranchandramohan awarzynski vzakhari
Differential Revision: https://reviews.llvm.org/D137072
Nikita Popov [Thu, 3 Nov 2022 09:55:30 +0000 (10:55 +0100)]
[InstCombine] Add more memset->load forwarding tests (NFC)
Simi Pallipurath [Fri, 28 Oct 2022 15:06:00 +0000 (16:06 +0100)]
[AArch64] Add support for the Cortex-A715 CPU
Cortex-A715 is an Armv9-A AArch64 CPU.
This patch introduces support for Cortex-A715.
Technical Reference Manual: https://developer.arm.com/documentation/101590/latest.
Reviewed By: vhscampos
Differential Revision: https://reviews.llvm.org/D136957
Nikita Popov [Thu, 3 Nov 2022 09:20:38 +0000 (10:20 +0100)]
[InstCombine] Add tests for memset -> load forward with offset (NFC)
Nikita Popov [Thu, 3 Nov 2022 09:15:10 +0000 (10:15 +0100)]
[InstCombine] Add tests for memset -> load forwarding (NFC)
We currently only forward store -> load, but could do the same
for memset as well.
Nikita Popov [Thu, 3 Nov 2022 08:56:29 +0000 (09:56 +0100)]
[CVP] Add vector icmp test (NFC)
Caroline Concatto [Thu, 3 Nov 2022 08:30:09 +0000 (08:30 +0000)]
[AArch64] SME2 -Fix failing buildbots because of warning
This patch is to solve this:
https://lab.llvm.org/buildbot#builders/36/builds/26801
Created by this patch:
a20112a74cb34f
[AArch64]SME2 instructions that use ZTO operand
Kristina Bessonova [Thu, 3 Nov 2022 08:27:10 +0000 (10:27 +0200)]
[DebugInfo][Metadata] Make AllEnumTypes holding TrackingMDNodeRef
Having AllEnumtypes to be a vector of TrackingMDNodeRef makes it possible
to reflect changes in metadata in the vector if they took place before DIBuilder
being finalized.
Otherwise, we end up with heap-use-after-free because AllEnumTypes contains
metadata that no longer valid.
Consider a case where we have a class containing a definition of a enum,
so this enum has the class as a scope. For some reason (doesn't matter for
the current issue), we create a temporary debug metadata for this class, and
then resolve it while finalizing CGDebugInfo.
In the case of collision during uniqifying the temporary, we then need
to replace its uses with a new pointer. If a temporary's user is unique
(this is the enum mentioned above), we may need re-uniquefying it,
which may return a new pointer in the case of another collision.
If so, the pointer we stored in AllEnumTypes vector become dangling.
Making AllEnumTypes hodling TrackingMDNodeRef should solve this problem
(see debug-info-enum-metadata-collision.cpp test for details).
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D137067
Jannik Silvanus [Wed, 2 Nov 2022 15:51:01 +0000 (16:51 +0100)]
[llvm-diff] Precommit: Add loop test case with forward reference
Diffing phi nodes was recently added to llvm-diff.
However, there currently is a limitation where equivalent values
cannot be detected as such, leading to false positive diff reports.
If a phi node refers a value defined in a basic block dominated by
the current basic block, for example a phi node in a loop header referring
a value defined in the loop body, we cannot prove equivalence of the referred
values, because the basic block containing the variable definition has
not yet been processed.
This commit adds a test case showing this behavior, serving as a precommit
for an upcoming fix of the above.
Differential Revision: https://reviews.llvm.org/D137262
Pierre van Houtryve [Fri, 21 Oct 2022 11:23:55 +0000 (11:23 +0000)]
[GISel] Add (fsub +-0.0, X) -> fneg combine
Allows for better matching of VOP3 mods.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D136442
Peter Waller [Thu, 3 Nov 2022 07:56:03 +0000 (07:56 +0000)]
Revert "[InstCombine] Remove redundant splats in InstCombineVectorOps"
This reverts commit
957eed0b1af2cb88edafe1ff2643a38165c67a40.
Peter Waller [Wed, 2 Nov 2022 10:19:34 +0000 (10:19 +0000)]
[AArch64] Install arm_neon_sve_bridge.h
arm_neon_sve_bridge.h is not generated, so the rules which ensure the
generated files get copied into the installation prefix don't apply to
this one.
Add it to the aarch64_only_files set instead, which ensures it ends up
both in the build directory and the installation directory.
Tested with build targets `clang-resource-headers` and
`install-clang-resource-headers`.
Differential Revision: https://reviews.llvm.org/D137239
Serge Pavlov [Thu, 3 Nov 2022 05:26:49 +0000 (12:26 +0700)]
[Clang] Check for response file existence prior to check for recursion
As now errors in file operation are handled, check for file existence
must be done prior to check for recursion, otherwise reported errors are
misleading.
Differential Revision: https://reviews.llvm.org/D136090
Caroline Concatto [Fri, 28 Oct 2022 14:51:20 +0000 (15:51 +0100)]
[AArch64]SME2 instructions that use ZTO operand
This patch adds the assembly/disassembly for the following instructions:
ZERO (ZT0): Zero ZT0.
LDR (ZT0): Load ZT0 register.
STR (ZT0): Store ZT0 register.
MOVT (scalar to ZT0): Move 8 bytes from general-purpose register to ZT0.
(ZT0 to scalar): Move 8 bytes from ZT0 to general-purpose register.
Consecutive:
LUTI2 (single): Lookup table read with 2-bit indexes.
(two registers): Lookup table read with 2-bit indexes.
(four registers): Lookup table read with 2-bit indexes.
LUTI4 (single): Lookup table read with 4-bit indexes.
(two registers): Lookup table read with 4-bit indexes.
(four registers): Lookup table read with 4-bit indexes.
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09
This patch also adds a new register class and operand for zt0
and a another index operand uimm3s8
Differential Revision: https://reviews.llvm.org/D136088
Adrian Kuegel [Thu, 3 Nov 2022 07:12:19 +0000 (08:12 +0100)]
[mlir][Bazel] Add mlir-translate as data for dialect tests.
Ye Luo [Thu, 3 Nov 2022 05:01:51 +0000 (00:01 -0500)]
Revert "[AAPointerInfo] refactor how offsets and Access objects are tracked"
This reverts commit
b756096b0cbef0918394851644649b3c28a886e2.
See regression https://github.com/llvm/llvm-project/issues/58774
Slava Zakharin [Tue, 1 Nov 2022 22:12:43 +0000 (15:12 -0700)]
[NFC][flang] Lowering options clean-up.
This change-set defines the LoweringOptions the same way
other options are defined in Flang.
Differential Revision: https://reviews.llvm.org/D137207
wanglei [Thu, 3 Nov 2022 03:10:41 +0000 (11:10 +0800)]
[LoongArch] Fix codegen for [su]itofp instructions
This patch fixes codegen for `[su]itofp` instructions.
In LoongArch, a legal int-to-float conversion is done in two steps:
1. Move the data from `GPR` to `FPR`. (FRLen >= GRLen)
2. Conversion in `FPR`. (the data in `FPR` is treated as a signed value)
Based on the above features, when the type's BitWidth meets the
requirements, all `SINT_TO_FP` are legal, all `UINT_TO_FP` are expand
and lowered to libcall when appropriate.
The only special case is, LoongArch64 with `+f,-d` features. At this
point, custom processing is required for `[SU]INT_TO_FP`. Of course, we
can also ignore it and use libcall directly.
Differential Revision: https://reviews.llvm.org/D136916
Phoebe Wang [Thu, 3 Nov 2022 02:39:31 +0000 (10:39 +0800)]
[X86] Remove `IntrArgMemOnly` from cmpccxadd intrinsics
CMPSXADD will modify memory, so we can't use `IntrArgMemOnly` here.
Found it during review D137250.
Xi Ruoyao [Thu, 3 Nov 2022 03:07:53 +0000 (11:07 +0800)]
[sanitizer] Fix vfork interception on loongarch64
Fix a brown paper bag error made by me in D129418. I didn't set
ASAN_INTERCEPT_VFORK correctly for loongarch64, but created an all-zero
object for __interception::real_vfork. This caused anything calling
vfork() to die instantly.
Fix this issue by setting ASAN_INTERCEPT_VFORK and remove the bad
all-zero definition. Other ports have an all-zero common definition but
we don't need it at least for now.
And, enable ASAN vfork test for loongarch64 to prevent regression in the
future.
Differential Revision: https://reviews.llvm.org/D137160
Youling Tang [Thu, 3 Nov 2022 03:03:37 +0000 (11:03 +0800)]
[asan] Use proper shadow offset for loongarch64 in instrumentation passes
Instrumentation passes now use the proper shadow offset. There will be many
asan test failures without this patch. For example:
```
$ ./lib/asan/tests/LOONGARCH64LinuxConfig/Asan-loongarch64-calls-Test
AddressSanitizer:DEADLYSIGNAL
=================================================================
==651209==ERROR: AddressSanitizer: SEGV on unknown address 0x1ffffe2dfa9b (pc 0x5555585e151c bp 0x7ffffb9ec070 sp 0x7ffffb9ebfd0 T0)
==651209==The signal is caused by a UNKNOWN memory access.
```
Before the patch:
```
$ make check-asan
Testing Time: 36.13s
Unsupported : 205
Passed : 83
Expectedly Failed: 1
Failed : 239
```
After the patch:
```
$ make check-asan
Testing Time: 58.98s
Unsupported : 205
Passed : 421
Expectedly Failed: 1
Failed : 89
```
Differential Revision: https://reviews.llvm.org/D137013
Fangrui Song [Thu, 3 Nov 2022 02:21:33 +0000 (19:21 -0700)]
[asan] Default to -fsanitize-address-use-odr-indicator for non-Windows
This enables odr indicators on all platforms and private aliases on non-Windows.
Note that GCC also uses private aliases: this fixes bogus
`The following global variable is not properly aligned.` errors for interposed global variables
Fix https://github.com/google/sanitizers/issues/398
Fix https://github.com/google/sanitizers/issues/1017
Fix https://github.com/llvm/llvm-project/issues/36893 (we can restore D46665)
Global variables of non-hasExactDefinition() linkages (i.e.
linkonce/linkonce_odr/weak/weak_odr/common/external_weak) are not instrumented.
If an instrumented variable gets interposed to an uninstrumented variable due to
symbol interposition (e.g. in issue 36893, _ZTS1A in foo.so is resolved to _ZTS1A in
the executable), there may be a bogus error.
With private aliases, the register code will not resolve to a definition in
another module, and thus prevent the issue.
Cons: minor size increase. This is mainly due to extra `__odr_asan_gen_*` symbols.
(ELF) In addition, in relocatable files private aliases replace some relocations
referencing global symbols with .L symbols and may introduce some STT_SECTION symbols.
For lld, with -g0, the size increase is 0.07~0.09% for many configurations I
have tested: -O0, -O1, -O2, -O3, -O2 -ffunction-sections -fdata-sections
-Wl,--gc-sections. With -g1 or above, the size increase ratio will be even smaller.
This patch obsoletes D92078.
Don't migrate Windows for now: the static data member of a specialization
`std::num_put<char>::id` is a weak symbol, as well as its ODR indicator.
Unfortunately, link.exe (and lld without -lldmingw) generally doesn't support
duplicate weak definitions (weak symbols in different TUs likely pick different
defined external symbols and conflict).
Differential Revision: https://reviews.llvm.org/D137227
Peixin-Qiao [Thu, 3 Nov 2022 01:00:52 +0000 (09:00 +0800)]
[flang][RFC] Add lowering design for procdure pointers
This document aims to give insights at the representation of procdure
pointers in FIR.
Reviewed By: PeteSteinfeld, jeanPerier, kiranchandramohan
Differential Revision: https://reviews.llvm.org/D136840
Matt Arsenault [Wed, 2 Nov 2022 23:13:12 +0000 (16:13 -0700)]
LangRef: Fix typo in backtick placement
Alex Brachet [Thu, 3 Nov 2022 00:12:10 +0000 (00:12 +0000)]
[Driver] Don't preprocess source files when reproducing linker crashes
It's not necessary to redo the source file preprocessing for reproducing linker
crashes because we must have successfully created the object file by this point.
Skip this step, and also don't report the preprocessed source file or create
the clang invocation shell script. The latter is no longer sensible without the
preprocessed source, or helpful given the linker reproducer will have it's own
shell script.
Differential Revision: https://reviews.llvm.org/D137289
Florian Hahn [Wed, 2 Nov 2022 23:57:06 +0000 (23:57 +0000)]
[ConstraintElimination] Skip compares with scalable vector types.
Materializing scalable vectors with boolean values is not implemented
yet. Skip those cases for now and leave a TODO.
Yuanfang Chen [Wed, 2 Nov 2022 18:54:19 +0000 (11:54 -0700)]
[Clang] follow-up D128745, remove ClangABICompat checks
Per discussions in D128745, remove ClangABICompat checks for implementations
of DR692/DR1395/DR1432. This is a potentially breaking changes, so the release
note is updated accordingly.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D136120
Matt Arsenault [Sat, 29 Oct 2022 19:52:24 +0000 (12:52 -0700)]
SPARC: Register null target streamer
Fixes null dereference in emitFunctionBodyStart for 64-bit
Matt Arsenault [Wed, 2 Nov 2022 21:29:14 +0000 (14:29 -0700)]
WebAssembly: Remove unnecessary set check
The empty set will be default constructed if this wasn't
in the map already.
Matt Arsenault [Wed, 2 Nov 2022 20:44:57 +0000 (13:44 -0700)]
WebAssembly: Move exception handling code together