Kazu Hirata [Sun, 20 Nov 2022 07:22:48 +0000 (23:22 -0800)]
[lldb] Use Optional::has_value instead of Optional::hasValue (NFC)
Kazu Hirata [Sun, 20 Nov 2022 05:11:10 +0000 (21:11 -0800)]
[Analysis] Use llvm::Optional::value_or (NFC)
Phoebe Wang [Sun, 20 Nov 2022 02:42:26 +0000 (10:42 +0800)]
[X86] Use lock or/and/xor for cases that we only care about the EFLAGS
This is a follow up of D137711 to fix the reset of #58685.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D138294
Vitaly Buka [Sun, 20 Nov 2022 01:12:32 +0000 (17:12 -0800)]
[test][asan] Rename variables for less confusion
Kazu Hirata [Sat, 19 Nov 2022 23:36:50 +0000 (15:36 -0800)]
[Analysis] Teach getOptionalIntLoopAttribute to return std::optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
Kazu Hirata [Sat, 19 Nov 2022 23:00:19 +0000 (15:00 -0800)]
[SelectionDAG] Teach getRegistersForValue to return std::optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716/11
Fangrui Song [Sat, 19 Nov 2022 22:09:05 +0000 (22:09 +0000)]
Remove unused llvm/IRPrinter/IRPrintingPasses.h or reorder #include after D137768
Simon Pilgrim [Sat, 19 Nov 2022 21:46:14 +0000 (21:46 +0000)]
[MCA][X86] Add test coverage for BF16 instructions
Simon Pilgrim [Sat, 19 Nov 2022 21:20:31 +0000 (21:20 +0000)]
[MCA][X86] Add test coverage for VP2INTERSECT instructions
NOTE: For IceLakeServer we actually test TigerLake as that's the only target that supports it (we do something similar for F16C on IvyBridge in the SandyBridge tests).
Kazu Hirata [Sat, 19 Nov 2022 21:45:27 +0000 (13:45 -0800)]
[ADT] Remove deprecated Any::hasValue
Note that I deprecated Any::hasValue on August 20, 2022 in commit
abb6271d809b37d3c3318894d697d5820032bec8.
David Green [Sat, 19 Nov 2022 21:25:18 +0000 (21:25 +0000)]
[AArch64] Disable aarch64-enable-gep-opt
This option was enabled in D128582, and whilst it seems to be a net
improvement in many cases, at least a couple of issues have been
reported from D135957 and from the CSE added to the backend causing more
instructions in executed blocks. Revert for the time being, until we can
improve the precision.
Med Ismail Bennani [Sat, 19 Nov 2022 21:20:11 +0000 (13:20 -0800)]
[lldb/Plugins] Fix build failure with GCC in ScriptedPythonInterface::Dispatch
This patch should fix the build failures following 7e01924 when building
with GCC. These failures were mostly caused by GCC's poor support of C++
templates (namely, partial template specialization).
To work around that problem, this patch makes use of overloading and get
rid of the templated structs and specialized structs.
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Kazu Hirata [Sat, 19 Nov 2022 21:21:27 +0000 (13:21 -0800)]
[ADT] Remove deperecated methods in OptionalStorage
Note that I deprecated these methods on August 7, 2022 in commit
commit
b5f8d42efe3e246d582d4a1a328fac915e4ce8dc.
Tue Ly [Thu, 17 Nov 2022 22:49:16 +0000 (17:49 -0500)]
[libc][math] Remove UInt<128>::operation* specialization.
Remove UInt<128>::operation* specialization since the generic implementation
works well enough:
https://quick-bench.com/q/Bz_J5HgAsz5m5V5Ze-X1fI77hPo
Reviewed By: michaelrj, sivachandra
Differential Revision: https://reviews.llvm.org/D138239
Tue Ly [Thu, 17 Nov 2022 05:56:56 +0000 (00:56 -0500)]
[libc] Add sub_with_borrow to builtin_wrapper.h
Add sub_with_borrow to builtin_wrapper.h to be used in UInt.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D138182
Simon Pilgrim [Sat, 19 Nov 2022 21:02:10 +0000 (21:02 +0000)]
[MCA][X86] Add test coverage for VAES instructions
Kazu Hirata [Sat, 19 Nov 2022 20:54:05 +0000 (12:54 -0800)]
[mlir] Remove deprecated methods in OptionalParseResult
Note that I deprecated these methods on August 12, 2022 in commit
commit
5c4674d67b06c5b4a845f26a614fc453a6bfb1f6.
Kazu Hirata [Sat, 19 Nov 2022 20:33:31 +0000 (12:33 -0800)]
[Basic] Remove deprecated methods in MapEntryOptionalStorage
Note that I deprecated these methods on August 8, 2022 in commit
commit
8e207e4c096e89fa5410b519715aba8c20701061.
Alexandre Ganea [Sat, 19 Nov 2022 17:34:58 +0000 (12:34 -0500)]
[CodeView] Replace GHASH hasher by BLAKE3
Previously, we used SHA-1 for hashing the CodeView type records.
SHA-1 in `GloballyHashedType::hashType()` is coming top in the profiles. By simply replacing with BLAKE3, the link time is reduced in our case from 15 sec to 13 sec. I am only using MSVC .OBJs in this case. As a reference, the resulting .PDB is approx 2.1GiB and .EXE is approx 250MiB.
Differential Revision: https://reviews.llvm.org/D137101
Florian Hahn [Sat, 19 Nov 2022 19:17:42 +0000 (19:17 +0000)]
[ConstraintElim] Add add nsw tests with negative constant.
Fangrui Song [Sat, 19 Nov 2022 18:51:35 +0000 (18:51 +0000)]
[ELF][test] Clean up PT_OPENBSD tests
Simon Pilgrim [Sat, 19 Nov 2022 18:15:32 +0000 (18:15 +0000)]
[X86] Remove unnecessary STC instruction overrides
Reported by D138359
Simon Pilgrim [Sat, 19 Nov 2022 18:15:08 +0000 (18:15 +0000)]
[X86] Remove unnecessary STD + CLD instruction overrides
Reported by D138359
Vitaly Buka [Sat, 19 Nov 2022 17:58:14 +0000 (09:58 -0800)]
Revert "[XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file."
Use of uninitialized value.
This reverts commit
037f5c283a2278ef156189be48db0738323206bd.
Nico Weber [Sat, 19 Nov 2022 16:54:34 +0000 (11:54 -0500)]
[gn build] Reformat all build files
Ran:
git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format
Florian Hahn [Sat, 19 Nov 2022 16:53:39 +0000 (16:53 +0000)]
[ConstraintElim] Split up large gep-arithmetic.ll test.
This should help avoid getting a single test file too large with future
additions.
Simon Pilgrim [Sat, 19 Nov 2022 16:49:06 +0000 (16:49 +0000)]
[TableGen] SubtargetEmitter.cpp - clang-format includes sorting. NFC.
Florian Hahn [Sat, 19 Nov 2022 16:15:48 +0000 (16:15 +0000)]
[ConstraintElim] Rename test file to match contents.
The test file contains tests with chained/nested GEPs. Reflect that in
the name.
Simon Pilgrim [Sat, 19 Nov 2022 15:37:52 +0000 (15:37 +0000)]
[X86] Remove some unnecessary cvt overrides
All of these match the default WriteCvtI2PS class defs
Simon Pilgrim [Sat, 19 Nov 2022 14:38:53 +0000 (14:38 +0000)]
[X86] Ensure we're testing the misched-matrix.ll tests with the generic cpu
Noticed when experimenting with using tuning parameters to control ILP mode
Simon Pilgrim [Sat, 19 Nov 2022 14:30:00 +0000 (14:30 +0000)]
[X86] Regenerate memcpy-2.ll test checks
Simon Pilgrim [Sat, 19 Nov 2022 11:35:31 +0000 (11:35 +0000)]
[MCA][X86] Add test coverage for BITALG instructions
Alex Richardson [Fri, 18 Nov 2022 21:15:01 +0000 (21:15 +0000)]
Fix incorrect cast in VisitSYCLUniqueStableNameExpr
Clang language-level address spaces and LLVM pointer address spaces are
not the same thing (even though they will both have a numeric value of
zero in many cases). LangAS is a enum class to avoid implicit conversions,
but
eba69b59d1a30dead07da2c279c8ecfd2b62ba9f avoided the compiler error by
adding a `static_cast<>`. While touching this code, simplify it by using
CreatePointerBitCastOrAddrSpaceCast() which is already a no-op if the types
match.
This changes the code generation for spir64 to place the globals in
the sycl_global addreds space, which maps to `addrspace(1)`.
Reviewed By: bader
Differential Revision: https://reviews.llvm.org/D138284
Peixin Qiao [Sat, 19 Nov 2022 11:26:17 +0000 (19:26 +0800)]
[flang] Support lowering of intrinsic GET_COMMAND
As Fortran 2018 16.9.82, all the arguments of GET_COMMAND are optional.
When they are all absent, do nothing so to be consistent with gfortran
and ifort. The semantic analysis and runtime have been supported.
This intrinsic was introduced from F2003, and this supports the lowering
of it.
Reviewed By: PeteSteinfeld, jeanPerier
Differential Revision: https://reviews.llvm.org/D137887
Vitaly Buka [Sat, 19 Nov 2022 09:51:52 +0000 (01:51 -0800)]
[test][asan] Simplify __sanitizer_verify_contiguous_container test
Brad Smith [Sat, 19 Nov 2022 09:34:25 +0000 (04:34 -0500)]
[llvm-objdump] Left justify display of OpenBSD headers
This looks the same as OpenBSD's GNU objdump.
wanglei [Sat, 19 Nov 2022 06:55:25 +0000 (14:55 +0800)]
[LoongArch] Add support for tail call optimization
This patch adds tail call support to the LoongArch backend. When
appropriate, use the `b` or `jr` instruction for tail calls (the
`pcalau12i+jirl` instruction pair when use medium codemodel).
This patch also modifies the inappropriate operand name:
simm26_bl -> simm26_symbol
This has been modeled after RISCV's tail call opt.
Reviewed By: SixWeining
Differential Revision: https://reviews.llvm.org/D137889
Vitaly Buka [Sat, 19 Nov 2022 08:35:27 +0000 (00:35 -0800)]
[test][asan] Simplify loops in test
Vitaly Buka [Sat, 19 Nov 2022 08:23:08 +0000 (00:23 -0800)]
[test][asan] Simplify test
We don't need to iterate off_end, just need to check a granule after the
end.
yronglin [Thu, 17 Nov 2022 15:06:21 +0000 (23:06 +0800)]
[CodeGen][ARM] Fix ARMABIInfo::EmitVAAarg crash with empty record type variadic arg
Fix ARMABIInfo::EmitVAAarg crash with empty record type variadic arg
Open issue: https://github.com/llvm/llvm-project/issues/58794
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D138137
Uday Bondhugula [Thu, 17 Nov 2022 10:18:25 +0000 (15:48 +0530)]
[MLIR] Fix incorrect assertion in memref replacement utility
The assertion had an unchecked use of getDefiningOp. The condition
itself is stale and not needed. This is a trivial/obvious fix - the
buggy path wasn't exercised since the current passes/users of this
utility always passed the result of an op as an "extra index".
Differential Revision: https://reviews.llvm.org/D138191
wanglei [Sat, 19 Nov 2022 06:35:14 +0000 (14:35 +0800)]
[LoongArch] Add emergency spill slot for CFR spill/reload
When all registers have been allocated and CFR needs to be saved on the
stack, an emergency spill slot is required. Because CFR's spill and
reload require a general purpose register to transfer.
The attached test case was bugpoint-reduced down from
`MultiSource/Benchmarks/mafft/Lalignmm.c` in the test-suite.
Without this patch, llc will crash and report the following errors:
```
LLVM ERROR: Error while trying to spill R4 from class GPR: Cannot scavenge register without an emergency spill slot!
```
Reviewed By: SixWeining
Differential Revision: https://reviews.llvm.org/D138007
Slava Zakharin [Sat, 19 Nov 2022 04:12:33 +0000 (20:12 -0800)]
Revert "[flang] Use proper attributes for runtime calls with 'i1' arguments/returns."
Buildbot might be failing because of this:
https://lab.llvm.org/buildbot/#/builders/65/builds/7283
This reverts commit
396ead93e3cead59727947afdea1fc2b49f0fc34.
Peixin Qiao [Sat, 19 Nov 2022 03:51:25 +0000 (11:51 +0800)]
Revert "[flang] Support lowering of intrinsic GET_COMMAND"
This reverts commit
86ea67ed4e89cc042818bd8e53066fdd96ff96e4.
Nick Kreeger [Sat, 19 Nov 2022 03:22:27 +0000 (21:22 -0600)]
[MLIR] Add FieldParser implementation for Optional<> integer types.
This patch introduces a templated FieldParser to handle optional signed and unsigned integer types - NFC. Additionally, I've added an extra test to ensure that both signed and unsigned integers are properly tested in the templated integer types for FieldParser as well.
Peixin Qiao [Sat, 19 Nov 2022 03:03:52 +0000 (11:03 +0800)]
[flang] Support lowering of intrinsic GET_COMMAND
As Fortran 2018 16.9.82, all the arguments of GET_COMMAND are optional.
When they are all absent, do nothing so to be consistent with gfortran
and ifort. The semantic analysis and runtime have been supported.
This intrinsic was introduced from F2003, and this supports the lowering
of it.
Reviewed By: PeteSteinfeld, jeanPerier
Differential Revision: https://reviews.llvm.org/D137887
Jennifer Yu [Fri, 18 Nov 2022 06:03:00 +0000 (22:03 -0800)]
[OPENMP5.1] Initial support for message clause.
Brad Smith [Fri, 18 Nov 2022 09:44:33 +0000 (04:44 -0500)]
[llvm] - Recognizing 'PT_OPENBSD_MUTABLE' segment type.
Recognizing 'PT_OPENBSD_MUTABLE' segment type.
https://github.com/openbsd/src/commit/
bd249b5664da50f0178adea78250a7a0d8ea6566
Reviewed By: jhenderson, MaskRay
Differential Revision: https://reviews.llvm.org/D137903
chenglin.bi [Sat, 19 Nov 2022 01:11:47 +0000 (09:11 +0800)]
[GlobalISel] Fix crash in applyShiftOfShiftedLogic caused by CSEMIRBuilder reuse instruction
If LogicNonShiftReg is the same to Shift1Base, and shift1 const is the same to MatchInfo.Shift2 const, CSEMIRBuilder will reuse the old shift1 when build shift2.
So, if we erase MatchInfo.Shift2 at the end, actually we remove old shift1. And it will cause crash later.
Solution for this issue is just erase it earlier to avoid the crash.
Fix #58423
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D138187
Fangrui Song [Sat, 19 Nov 2022 01:06:26 +0000 (01:06 +0000)]
[asan] Keep Itanium mangled names in global metadata
The runtime calls `MaybeDemangleGlobalName` for error reporting and
`__cxxabiv1::__cxa_demangle` is called if available, so demanging Itanium
mangled names in global metadata is unnecessary and wastes data size.
Add `MaybeDemangleGlobalName` in ODR violation detection to support demangled
names in a suppressions file. `MaybeDemangleGlobalName` may call
`DemangleCXXABI` and leak memory. Use an internal allocation to prevent lsan
leak (in case there is no fatal asan error).
The debug feature `report_globals=2` prints information for all instrumented
global variables. `MaybeDemangleGlobalName` would be slow, so don't do that.
The output looks like `Added Global[0x56448f092d60]: beg=0x56448fa66d60 size=4/32 name=_ZL13test_global_2`
and I think the mangled name is fine.
Other mangled schemes e.g. Windows (see win-string-literal.ll) remain the
current behavior.
Reviewed By: hctim
Differential Revision: https://reviews.llvm.org/D138095
Matt Arsenault [Tue, 15 Nov 2022 22:07:07 +0000 (14:07 -0800)]
GlobalISel: Try to fold G_SEXT_INREG to G_AND with mask
Copies the same transform from the DAG. Helps eliminate some codegen
diffs to allowed shared checks in a future change.
Not sure if apply supports anything better than C++ fragments for
the result. It's also not really reasonable that every combine has
to set the default insertion point.
Fazlay Rabbi [Fri, 18 Nov 2022 23:21:49 +0000 (15:21 -0800)]
[OpenMP] Initial parsing/sema for 'strict' modifier with 'num_tasks' clause
This patch gives basic parsing and semantic analysis support for 'strict'
modifier with 'num_tasks' clause of 'taskloop' construct introduced in
OpenMP 5.1 (section 2.12.2)
Differential Revision: https://reviews.llvm.org/D138328
Matt Arsenault [Mon, 14 Nov 2022 23:22:45 +0000 (15:22 -0800)]
AMDGPU/GlobalISel: Add some end-to-end g_sext_inreg tests
Matt Arsenault [Mon, 14 Nov 2022 23:44:22 +0000 (15:44 -0800)]
AMDGPU/GlobalISel: Insert freeze when splitting vector G_SEXT_INREG
This transform is broken for undef or poison inputs without a freeze.
This is also broken in lots of other places where shifts are split
into 32-bit pieces.
Amt < 32 case:
; Broken: https://alive2.llvm.org/ce/z/7bb4vc
; Freezing the low half of the bits makes it correct
; Fixed: https://alive2.llvm.org/ce/z/zJAZFr
define i64 @src(i64 %val) {
%shl = shl i64 %val, 55
%shr = ashr i64 %shl, 55
ret i64 %shr
}
define i64 @tgt(i64 %val) {
%lo32 = trunc i64 %val to i32
%shr.half = lshr i64 %val, 32
%hi32 = trunc i64 %shr.half to i32
%inreg.0 = shl i32 %lo32, 23
%new.lo = ashr i32 %inreg.0, 23
%new.hi = ashr i32 %new.lo, 31
%zext.lo = zext i32 %new.lo to i64
%zext.hi = zext i32 %new.hi to i64
%hi.ins = shl i64 %zext.hi, 32
%or = or i64 %hi.ins, %zext.lo
ret i64 %or
}
Amt == 32 case:
Broken: https://alive2.llvm.org/ce/z/5f4qwQ
Fixed: https://alive2.llvm.org/ce/z/A2hWWF
This one times out alive; works if argument is made noundef or
scaled down to a smaller bitwidth.
define i64 @src(i64 %val) {
%shl = shl i64 %val, 32
%shr = ashr i64 %shl, 32
ret i64 %shr
}
define i64 @tgt(i64 %val) {
%lo32 = trunc i64 %val to i32
%shr.half = lshr i64 %val, 32
%hi32 = trunc i64 %shr.half to i32
%new.hi = ashr i32 %lo32, 31
%zext.lo = zext i32 %lo32 to i64
%zext.hi = zext i32 %new.hi to i64
%hi.ins = shl i64 %zext.hi, 32
%or = or i64 %hi.ins, %zext.lo
ret i64 %or
}
Amt > 32 case:
; Correct: https://alive2.llvm.org/ce/z/tvrhPf
define i64 @src(i64 %val) {
%shl = shl i64 %val, 9
%shr = ashr i64 %shl, 9
ret i64 %shr
}
define i64 @tgt(i64 %val) {
%lo32 = trunc i64 %val to i32
%lshr = lshr i64 %val, 32
%hi32 = trunc i64 %lshr to i32
%inreg.0 = shl i32 %hi32, 9
%new.hi = ashr i32 %inreg.0, 9
%zext.lo = zext i32 %lo32 to i64
%zext.hi = zext i32 %new.hi to i64
%hi.ins = shl i64 %zext.hi, 32
%or = or i64 %hi.ins, %zext.lo
ret i64 %or
}
Peter Rong [Thu, 17 Nov 2022 23:12:48 +0000 (15:12 -0800)]
[FuzzMutate] Update InstModifierStrategy
We can randomly switch two operands of an instruction now
Signed-off-by: Peter Rong <PeterRong96@gmail.com>
Philip Reames [Fri, 18 Nov 2022 23:30:39 +0000 (15:30 -0800)]
[RISCV] Optimize scalable frame setup when VLEN is precisely known
If we know the exact value of VLEN, the frame offset adjustment for scalable stack slots becomes a fixed constant. This avoids the need to read vlenb, and may allow the offset to be folded into the immediate field of an add/sub.
We could go further here, and fold the offset into a single larger frame adjustment - instead of having a separate scalable adjustment step - but that requires a bit more code reorganization. I may (or may not) return to that in a future patch.
Differential Revision: https://reviews.llvm.org/D137593
Philip Reames [Fri, 18 Nov 2022 23:29:14 +0000 (15:29 -0800)]
Revert "[SDAG] Allow scalable vectors in ComputeKnownBits"
This reverts commit
bc0fea0d551b5182c541c43070830bfdcaa33ef2.
There was a "timeout for a Halide Hexagon test" reported. Revert until investigation complete.
Philip Reames [Fri, 18 Nov 2022 23:14:18 +0000 (15:14 -0800)]
Revert "[SDAG] Allow scalable vectors in ComputeNumSignBits" and follow up
This reverts commits
3fb08d14a63f5f745d3fec2b5f6ffef4cf0a398c and
f8c63a7fbf50fb5883bd566c7539d0ac18c7700f.
There was a "timeout for a Halide Hexagon test" reported. Revert until investigation complete.
Matt Arsenault [Fri, 18 Nov 2022 07:03:23 +0000 (23:03 -0800)]
GlobalISel: Legalize strict_fsub
In the future should probably have a more convenient
way to switch between building strict and non-strict ops.
Teresa Johnson [Thu, 17 Nov 2022 02:07:07 +0000 (18:07 -0800)]
[MemProf] Defer profile file setup until dump time
With all of the writing of the memprof profile consolidated into one
place, there is no need to set up the profile file (which creates the
file and also redirects all printing from the runtime to it) until we
are ready to dump the profile.
This allows errors and other messages to be dumped to stderr instead of
the profile file, which by default is in a binary format. Additionally,
reset the output file to stderr after dumping the profile so that any
requested memprof allocator statistics are printed to stderr.
Differential Revision: https://reviews.llvm.org/D138175
Michael Jones [Fri, 11 Nov 2022 22:08:58 +0000 (14:08 -0800)]
[libc][reland] Fix builtin definition for memory functions
The memory functions are highly performance sensitive and use builtins
where possible, but also need to define those functions names when they
don't exist to avoid compilation errors. Previously all those
redefinitions were behind the SSE2 flag for x86, which caused errors on
CPUs that supported SSE2 but not AVX512. This patch splits the various
CPU extensions out to avoid errors on such CPUs.
Reviewed By: gchatelet
Differential Revision: https://reviews.llvm.org/D138163
Doru Bercea [Thu, 17 Nov 2022 21:30:53 +0000 (15:30 -0600)]
[Clang][OpenMP] Add support for default to/from map types on target enter/exit data
Med Ismail Bennani [Fri, 18 Nov 2022 21:56:19 +0000 (13:56 -0800)]
[lldb/Python] Unify PythonFormat & GetPythonValueFormatString (NFC)
This patch removes all occurences to GetPythonValueFormatString and
use the template specialization of PythonFormat structs instead.
Differential Revision: https://reviews.llvm.org/D134033
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Fri, 18 Nov 2022 21:53:57 +0000 (13:53 -0800)]
[lldb/Plugins] Improve error reporting with reading memory in Scripted Process
This patch improves the ScriptedPythonInterface::Dispatch method to
support passing lldb_private types to the python implementation.
This will allow, for instance, the Scripted Process python implementation
to report errors when reading memory back to lldb.
To do so, the Dispatch method will transform the private types in the
parameter pack into `PythonObject`s to be able to pass them down to the
python methods.
Then, if the call succeeded, the transformed arguments will be converted
back to their original type and re-assigned in the parameter pack, to
ensure pointers and references behaviours are preserved.
This patch also updates various scripted process python class and tests
to reflect this change.
rdar://
100030995
Differential Revision: https://reviews.llvm.org/D134033
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Med Ismail Bennani [Fri, 18 Nov 2022 07:55:52 +0000 (23:55 -0800)]
[lldb/Python] Make use of PythonObject and PythonFormat in callbacks (NFC)
This patch extends the template specialization of PythonFormat structs
and makes use of the pre-existing PythonObject class to format arguments
and pass them to the right method, before calling it.
This is a preparatory patch to merge PythonFormat with SWIGPythonBridge's
GetPythonValueFormatString methods.
Differential Revision: https://reviews.llvm.org/D138248
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Sami Tolvanen [Fri, 18 Nov 2022 21:23:04 +0000 (21:23 +0000)]
[X86][KCFI] Don't fold loads into indirect calls that need a KCFI check
Avoid unnecessary folding as X86KCFIPass would have to unfold these
anyway when emitting the KCFI_CHECK.
Krzysztof Parzyszek [Fri, 18 Nov 2022 21:45:07 +0000 (13:45 -0800)]
[Hexagon] Remove non-existent instructions
Some instructions that don't actually exist in hardware were emitted
by the generator script in error. Delete them from the .td files.
Arthur Eubanks [Fri, 18 Nov 2022 21:35:51 +0000 (13:35 -0800)]
[Bye] Remove legacy pipeline registration
D137915 has somehow caused a flang bot to fail: https://lab.llvm.org/buildbot/#/builders/191/builds/11279.
Given that the issue is with the legacy pipeline registration code and the legacy pipeline registration infrastructure is to be removed soon, remove this part of Bye.
Peiming Liu [Wed, 16 Nov 2022 23:18:16 +0000 (23:18 +0000)]
[mlir][sparse] refactoring: move genAffine to loopEmitter
This is the beginning patch of a sequence of dependent patches that in together provide the affine expression on matched indexing mapping for sparse tensors.
This patch itself simply move `genAffine` into loop emitter to be prepared for upcoming patches.
D138169 provides support for affine expression on dense dimensions only (except for constant affine expression)
D138170 provides support for constant affine expressions on dense dimensions
D138171 provides **merger** support for affine expression on sparse dimension (without codegen)
D138172 provides **codegen** support (by generating a "filter" loop) for affine expression on sparse dimensions.
D138173 fixes a crash on resolveCycle when dealing with affine expressions.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D138168
Simon Pilgrim [Fri, 18 Nov 2022 21:10:46 +0000 (21:10 +0000)]
[MCA][X86] Add test coverage for VPCLMULQDQ instructions
Evgenii Stepanov [Thu, 3 Nov 2022 19:42:37 +0000 (12:42 -0700)]
[scudo] Detect double free when running with MTE.
Try to trigger an MTE fault on double/invalid free by touching the first
byte of the allocation with the provided pointer.
Differential Revision: https://reviews.llvm.org/D137352
Sanjay Patel [Fri, 18 Nov 2022 20:56:38 +0000 (15:56 -0500)]
[VectorCombine] check instruction type before dispatching to folds
This is no externally visible change intended, but appears to be a
noticeable (surprising) improvement in compile-time based on:
https://llvm-compile-time-tracker.com/compare.php?from=
0f3e72e86c8c7c6bf0ec24bf1e2acd74b4123e7b&to=
5e8c2026d10e8e2c93c038c776853bed0e7c8fc1&stat=instructions:u
The early returns in the individual fold functions are not good
enough to avoid the overhead of the many "fold*" calls, so this
speeds up the main instruction loop enough to make a difference.
Simon Pilgrim [Thu, 17 Nov 2022 21:20:37 +0000 (21:20 +0000)]
[MCA][X86] Add missing IceLake test coverage for VPOPCNTDQ instructions
Simon Pilgrim [Thu, 17 Nov 2022 20:56:19 +0000 (20:56 +0000)]
[MCA][X86] Add test coverage for AVX512CD instructions
Slava Zakharin [Fri, 18 Nov 2022 20:08:02 +0000 (12:08 -0800)]
[flang] Use proper attributes for runtime calls with 'i1' arguments/returns.
Clang uses signext/zeroext attributes for integer arguments shorter than
the default 'int' type on a target. So Flang has to match this for functions
from Fortran runtime and also for BIND(C) routines. This patch implements
ABI adjustments only for Fortran runtime calls. BIND(C) part will be done
separately.
This resolves https://github.com/llvm/llvm-project/issues/58579
Differential Revision: https://reviews.llvm.org/D137050
Philip Reames [Fri, 18 Nov 2022 20:28:22 +0000 (12:28 -0800)]
[SDAG] Address post commit review feedback from
f8c63a7f
The major change is falling through to ComputeKnownBits when we don't have an implementation of ComputeNumSignBits due to conservatism over scalable vectors. Right now, we're mostly conservative in the same cases, but this allows our results to improve when we change ComputeKnownBits without also needing to improve ComputeNumSignBits at the same time.
Valentin Clement [Fri, 18 Nov 2022 20:16:50 +0000 (21:16 +0100)]
[flang] Add ClassIs runtime function
Add a `ClassIs` function that takes a descriptor and a
type desc to implement the check needed by the CLASS IS type guard
in SELECT TYPE construct.
Since the kind type parameter are directly folded in the type itself
in Flang and the type descriptor is a global, the function just check
if the type descriptor address of the descriptor is equivalent to
the type descriptor address of the global. If not, it check in the
parents of the descriptor's type descriptor.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D138279
Slava Zakharin [Mon, 7 Nov 2022 20:48:32 +0000 (12:48 -0800)]
[mlir][llvmir] Translate function result attributes to LLVM IR.
Translate align, noalias, noundef, signext and zeroext result
attributes from llvm.func to LLVM IR.
This is needed for https://github.com/llvm/llvm-project/issues/58579
Differential Revision: https://reviews.llvm.org/D137049
Rob Suderman [Fri, 18 Nov 2022 19:43:55 +0000 (11:43 -0800)]
[mlir][tosa] Fix tosa.slice shape inference for ShapedType:kDynamicShape
Change for kDynamicShape means the size needs to be updated to a new value
for slice operation shape inference. Landing fix.
Reviewed By: NatashaKnk
Differential Revision: https://reviews.llvm.org/D138314
Nico Weber [Fri, 18 Nov 2022 19:28:59 +0000 (14:28 -0500)]
[bolt] Fix std::prev()-past-begin in veneer handling code
matchLinkerVeneer() returns 3 if `Instruction` and the last
two instructions in `[Instructions.begin, Instructions.end())`
match the pattern
ADRP x16, imm
ADD x16, x16, imm
BR x16
BinaryContext.cpp used to use
--Count;
for (auto It = std::prev(Instructions.end()); Count != 0;
It = std::prev(It), --Count) {
...use It...
}
to walk these instructions. The first `--Count` skips the
instruction that's in `Instruction` instead of in `Instructions`.
The loop then walks over `Instructions`.
However, on the last iteration, this calls `std::prev()` on an
iterator that points at the container's begin(), which can blow
up.
Instead, use rbegin(), which sidesteps this issue.
Fixes test/AArch64/veneer-gold.s on a macOS host.
With this, check-bolt passes on macOS.
Differential Revision: https://reviews.llvm.org/D138313
Kelvin Li [Mon, 7 Nov 2022 19:20:53 +0000 (14:20 -0500)]
[flang] Add more diagnostic for MAX/MIN intrinsic
Fix https://github.com/llvm/llvm-project/issues/56303
Differential Revision: https://reviews.llvm.org/D137742
Valentin Clement [Fri, 18 Nov 2022 19:32:18 +0000 (20:32 +0100)]
[flang][NFC] Remove unused DispatchTableop fct
Remove `appendTableEntry` as it is not used.
Reviewed By: jeanPerier, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D138293
Bill Wendling [Fri, 18 Nov 2022 00:07:15 +0000 (16:07 -0800)]
Revert "Reapply: Add an error message to the default SIGPIPE handler"
This patch is spamming compiles with unhelpful and confusing messages.
E.g. the Linux kernel uses "grep -q" in several places. It's meant to
quit with a return code of zero when the first match is found. This can
cause a SIGPIPE signal, but that's expected, and there's no way to turn
this error message off to avoid spurious error messages.
UNIX03 apparently doesn't require printing an error message on SIGPIPE,
but specifically when there's an error on the stdout stream in a normal
program flow, e.g. when SIGPIPE trap is disabled.
A separate patch is planned to address the specific case we care most
about (involving llvm-nm).
This reverts commit
b89bcefa6202e310eb3167dd1c37f1807377ec8d.
Link: https://github.com/llvm/llvm-project/issues/59037
Link: https://github.com/ClangBuiltLinux/linux/issues/1651
Differential Revision: https://reviews.llvm.org/D138244
Aaron Ballman [Fri, 18 Nov 2022 19:15:02 +0000 (14:15 -0500)]
Add more tests for C DRs and update the status page
Krzysztof Parzyszek [Thu, 17 Nov 2022 23:16:06 +0000 (15:16 -0800)]
[Hexagon] Add checks for immediate arguments for remaining builtins
Checks for builtins for the following instructions were aded:
V6_v6mpyhubs10
V6_v6mpyhubs10_vxx
V6_v6mpyvubs10
V6_v6mpyvubs10_vxx
V6_vlutvvbi
V6_vlutvvb_oracci
V6_vlutvwhi
V6_vlutvwh_oracci
Peter Rong [Fri, 18 Nov 2022 18:53:29 +0000 (10:53 -0800)]
[FuzzMutate] change of format and comment for further code
Signed-off-by: Peter Rong <PeterRong96@gmail.com>
Philip Reames [Fri, 18 Nov 2022 17:57:42 +0000 (09:57 -0800)]
[SDAG] Allow scalable vectors in ComputeNumSignBits
This is a continuation of the series of patches adding lane wise support for scalable vectors in various knownbit-esq routines.
The basic idea here is that we track a single lane for scalable vectors which corresponds to an unknown number of lanes at runtime. This is enough for us to perform lane wise reasoning on many arithmetic operations.
Differential Revision: https://reviews.llvm.org/D137141
Abhina Sreeskantharajan [Fri, 18 Nov 2022 18:38:53 +0000 (13:38 -0500)]
[SystemZ][z/OS] Set text flag correctly for llvm-reduce tool
This patch sets the text flag correctly for llvm-reduce files
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D138304
Matt Arsenault [Fri, 11 Nov 2022 19:35:14 +0000 (11:35 -0800)]
ConstantFolding: Constant fold some canonicalizes
+/-0 is obviously foldable. Other non-special, non-subnormal
values are also probably OK. For denormal values, check
the calling function's denormal mode. For now, don't fold
denormals to the input for IEEE mode because as far as I know
the langref is still pretending LLVM's float isn't IEEE.
Also folds undef to 0, although NaN may make more sense. Skips
folding nans and infinities, although it should be OK to fold those
in a future change.
Michael Maitland [Fri, 18 Nov 2022 18:09:50 +0000 (10:09 -0800)]
[RISCV][CodeGen] Chapter of vector instruction type corresponds with chapters in RISCV vector specification. NFC
The [vector spec](https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc) is organized in chapters
based on instruction type. The comments in the tablegen marked the incorrect chapters. This change
updates the comments with the correct chapter numbers.
Differential Revision: https://reviews.llvm.org/D138311
Diego Caballero [Fri, 18 Nov 2022 18:06:49 +0000 (18:06 +0000)]
[mlir][NFC] Add static ShapedType::isDynamicShape utility
This utility is useful when we need to know if shape is dynamic and
we don't have a Type itself.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D138267
Matt Arsenault [Fri, 18 Nov 2022 17:36:38 +0000 (09:36 -0800)]
AMDGPU: Fix fcanonicalize constant folding not correctly handling -0.0
Philip Reames [Fri, 18 Nov 2022 17:52:01 +0000 (09:52 -0800)]
[RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
When we have a precisely known VLEN, we can replace runtime usage of VLENB with compile time constants. This converts offsets involving both fixed and scalable components into fixed offsets. The result is that we avoid the csr read of vlenb, and can often fold the multiply as well.
Differential Revision: https://reviews.llvm.org/D137591
Michael Maitland [Fri, 4 Nov 2022 15:51:39 +0000 (08:51 -0700)]
[RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
On x86 and AArch, SIMD instructions encode all of the scheduling information in the instruction
itself. For example, VADD.I16 q0, q1, q2 is a neon instruction that operates on 16-bit integer
elements stored in 128-bit Q registers, which leads to eight 16-bit lanes in parallel. This kind
of information impacts how the instruction takes to execute and what dependencies this may cause.
On RISCV however, the data that impacts scheduling is encoded in CSR registers such as vtype or
vl, in addition with the instruction itself. But MCA does not track or use the data in these
registers. This patch fixes this problem by introducing Instruments into MCA.
* Replace `CodeRegions` with `AnalysisRegions`
* Add `Instrument` and `InstrumentManager`
* Add `InstrumentRegions`
* Add RISCV Instrument and `InstrumentManager`
* Parse `Instruments` in driver
* Use instruments to override schedule class
* RISCV use lmul instrument to override schedule class
* Fix unit tests to pass empty instruments
* Add -ignore-im clopt to disable this change
A prior version of this patch was commited in
5e82ee537321.
2323a4ee610f reverted
that change because the unit test files caused build errors. The change with fixes
were committed in
b88b8307bf9e but reverted once again
e8e92c8313a0 due to more
build errors.
This commit adds the prior changes and fixes the build error.
Differential Revision: https://reviews.llvm.org/D137440
Krzysztof Parzyszek [Thu, 17 Nov 2022 23:16:06 +0000 (15:16 -0800)]
[Hexagon] Add clang flags for v71, v71t, v73
Mirko Brkusanin [Fri, 18 Nov 2022 17:09:24 +0000 (18:09 +0100)]
[AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11
Differential Revision: https://reviews.llvm.org/D133012
Matt Arsenault [Wed, 16 Nov 2022 20:49:00 +0000 (12:49 -0800)]
AMDGPU: Add some baseline tests for llvm.amdgcn.trig.preop folding
zhijian [Fri, 18 Nov 2022 17:10:16 +0000 (12:10 -0500)]
[XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file.
Reviewers: James Henderson, Esme Yi
Differential Revision: https://reviews.llvm.org/D135887
Nico Weber [Fri, 18 Nov 2022 16:35:35 +0000 (11:35 -0500)]
[bolt] Pass %cflags in test/X86/is-strip.s
Without this, clang builds a binary for macOS on a macOS host, and
then the linker complains that it doesn't know the -q flag.
Differential Revision: https://reviews.llvm.org/D138306
Nico Weber [Fri, 18 Nov 2022 16:33:23 +0000 (11:33 -0500)]
[bolt] Make test/X86/end-symbol.test not use "tac"
"tac" doesn't exist on macOS, so this makes the test pass there.
Differential Revision: https://reviews.llvm.org/D138305