platform/kernel/linux-starfive.git
2 years agoriscv:defconfig: enable CAN,IPMS_CAN
Clivia.Cai [Thu, 14 Apr 2022 03:36:20 +0000 (20:36 -0700)]
riscv:defconfig: enable CAN,IPMS_CAN

Enable can/canfd config in defconfig.

Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2 years agodt-bindings:net:can:ipms-can: add ipms-can.yaml references
Clivia.Cai [Thu, 14 Apr 2022 02:18:41 +0000 (19:18 -0700)]
dt-bindings:net:can:ipms-can: add ipms-can.yaml references

Add CAN/CANFD binding documentation for jh7110 SoC.

Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2 years agocan:ipms_can: fix code style
Clivia.Cai [Sat, 2 Apr 2022 08:58:16 +0000 (01:58 -0700)]
can:ipms_can: fix code style

Optimize the can driver code to conform to the upstream specification

Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2 years agodt-bindings: Add vendor prefix
Clivia.Cai [Fri, 15 Apr 2022 02:49:35 +0000 (19:49 -0700)]
dt-bindings: Add vendor prefix

Add vendor prefix for can device

Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2 years agoMerge branch 'CR_864_update_pinctrl_jianlong' into 'jh7110_fpga_dev_5.15'
andy.hu [Tue, 19 Apr 2022 10:10:05 +0000 (10:10 +0000)]
Merge branch 'CR_864_update_pinctrl_jianlong' into 'jh7110_fpga_dev_5.15'

update pinctrl marco to more lines

See merge request sdk/sft-riscvpi-linux-5.10!12

2 years agoupdate pinctrl marco to more lines
jianlong.huang [Tue, 19 Apr 2022 09:23:01 +0000 (17:23 +0800)]
update pinctrl marco to more lines

Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2 years agoMerge branch 'CR_870_Reset_samin.guo' into 'jh7110_fpga_dev_5.15'
andy.hu [Tue, 19 Apr 2022 09:29:59 +0000 (09:29 +0000)]
Merge branch 'CR_870_Reset_samin.guo' into 'jh7110_fpga_dev_5.15'

Cr 870 reset samin.guo

See merge request sdk/sft-riscvpi-linux-5.10!11

2 years agoMerge branch 'CR_833_VDEC_samin.guo' into 'jh7110_fpga_dev_5.15'
andy.hu [Tue, 19 Apr 2022 09:23:19 +0000 (09:23 +0000)]
Merge branch 'CR_833_VDEC_samin.guo' into 'jh7110_fpga_dev_5.15'

CR 833 vdec samin.guo

See merge request sdk/sft-riscvpi-linux-5.10!10

2 years agoreset:starfive:jh7110: Fix wrong macro definition.
samin [Tue, 19 Apr 2022 07:42:35 +0000 (15:42 +0800)]
reset:starfive:jh7110: Fix wrong macro definition.

Fix wrong macro definition.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agoreset:starfive:jh7110: Macro definitions are rearranged in order.
samin [Tue, 19 Apr 2022 08:01:47 +0000 (16:01 +0800)]
reset:starfive:jh7110: Macro definitions are rearranged in order.

Macro definitions are rearranged in order, for better coding style.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agoreset:starfive:jh7110: change how to obtain an assert address
samin [Thu, 13 Jan 2022 03:48:56 +0000 (11:48 +0800)]
reset:starfive:jh7110: change how to obtain an assert address

Get assert addresses dynamically to reduce static array memory usage

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodt-bingings:clk: remove dec_rootclk fixed clk define.
samin [Fri, 15 Apr 2022 02:15:59 +0000 (10:15 +0800)]
dt-bingings:clk: remove dec_rootclk fixed clk define.

The clktree is ready. The VDEC uses the clock signal defined by the
clock tree, fixed-clk is not required.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodt-bingings:vdec:jh7110: Add CLK signals to Vdec
samin [Fri, 15 Apr 2022 01:56:09 +0000 (09:56 +0800)]
dt-bingings:vdec:jh7110: Add CLK signals to Vdec

Vdec uses the Clock framework API.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodrivers:soc:starfive: support driver for starfive soc.
samin [Fri, 15 Apr 2022 01:37:06 +0000 (09:37 +0800)]
drivers:soc:starfive: support driver for starfive soc.

Add Kconfig/Makefile support for starfive soc.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agoMerge branch 'CR_783_dts_hal.feng' into 'jh7110_fpga_dev_5.15'
andy.hu [Thu, 14 Apr 2022 08:18:46 +0000 (08:18 +0000)]
Merge branch 'CR_783_dts_hal.feng' into 'jh7110_fpga_dev_5.15'

riscv: dts: starfive: Improve the structure of device tree

See merge request sdk/sft-riscvpi-linux-5.10!5

2 years agoriscv: dts: starfive: Improve the structure of device tree
Hal Feng [Sat, 2 Apr 2022 09:11:50 +0000 (17:11 +0800)]
riscv: dts: starfive: Improve the structure of device tree

Divide the old device tree into several files according to different layers.
Make the device tree clearer and more readable.

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2 years agoMerge branch 'CR_792_PINCTRL_jianlong' into 'jh7110_fpga_dev_5.15'
andy.hu [Thu, 14 Apr 2022 03:16:39 +0000 (03:16 +0000)]
Merge branch 'CR_792_PINCTRL_jianlong' into 'jh7110_fpga_dev_5.15'

modify pinctrl about vin_dvp function sel

See merge request sdk/sft-riscvpi-linux-5.10!7

2 years agomodify vin pinctrl dts
jianlong.huang [Thu, 14 Apr 2022 02:29:04 +0000 (10:29 +0800)]
modify vin pinctrl dts

Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2 years agoadd dvp pinctrl dts
jianlong.huang [Wed, 13 Apr 2022 11:07:58 +0000 (19:07 +0800)]
add dvp pinctrl dts

Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2 years agomodify pinctrl about vin_dvp function sel
jianlong.huang [Wed, 13 Apr 2022 10:27:52 +0000 (18:27 +0800)]
modify pinctrl about vin_dvp function sel

Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2 years agoMerge branch 'CR_737_CLOCK_TREE_Xingyu.Wu' into 'jh7110_fpga_dev_5.15'
andy.hu [Wed, 13 Apr 2022 10:34:08 +0000 (10:34 +0000)]
Merge branch 'CR_737_CLOCK_TREE_Xingyu.Wu' into 'jh7110_fpga_dev_5.15'

Cr 737 clock tree xingyu.wu

See merge request sdk/sft-riscvpi-linux-5.10!6

2 years agoarch:riscv:Kconfig: Add choice with SOC board type
xingyu.wu [Wed, 13 Apr 2022 08:45:38 +0000 (16:45 +0800)]
arch:riscv:Kconfig: Add choice with SOC board type

Add config about user can choose the board type about FPGA,
EVB or Visionfive

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2 years agoclk:starfive: Add vout clock tree driver
xingyu.wu [Wed, 13 Apr 2022 08:36:57 +0000 (16:36 +0800)]
clk:starfive: Add vout clock tree driver

Clock references refer to include/dt-bindings/clock/starfive-jh7110-vout.h

Change the value about 'status' of clkvout node in dts file when want to
use vout clock.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2 years agoclk:starfive: Add JH7110 clock tree driver for kernel 5.15
xingyu.wu [Wed, 13 Apr 2022 08:10:47 +0000 (16:10 +0800)]
clk:starfive: Add JH7110 clock tree driver for kernel 5.15

Add clock driver about sys, stg and aon clock for JH7110.
Clock references refer to include/dt-bindings/clock/starfive-jh7110-clkgen.h

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2 years agoMerge branch 'CR_792_PINCTRL_jianlong' into 'jh7110_fpga_dev_5.15'
andy.hu [Wed, 13 Apr 2022 08:15:54 +0000 (08:15 +0000)]
Merge branch 'CR_792_PINCTRL_jianlong' into 'jh7110_fpga_dev_5.15'

add jh7110 pinctrl dts and driver

See merge request sdk/sft-riscvpi-linux-5.10!4

2 years agoenable sdio pinctrcl
jianlong.huang [Tue, 12 Apr 2022 01:28:54 +0000 (09:28 +0800)]
enable sdio pinctrcl

Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2 years agoenable pinctrl and modify gpio irq init
jianlonghuang [Thu, 7 Apr 2022 03:53:37 +0000 (11:53 +0800)]
enable pinctrl and modify gpio irq init

Signed-off-by: jianlonghuang <jianlong.huang@starfivetech.com>
2 years ago[pinctrl]Synchronize vic7100&jh7110 pinctrl subsystem
“jenny.zhang” [Thu, 3 Mar 2022 06:20:18 +0000 (22:20 -0800)]
[pinctrl]Synchronize vic7100&jh7110 pinctrl subsystem

2 years ago[pinctrl] Update parse gpio dts node
“jenny.zhang” [Tue, 28 Dec 2021 06:42:59 +0000 (22:42 -0800)]
[pinctrl] Update parse gpio dts node

2 years ago[pinctrl]Update gpio control code
“jenny.zhang” [Tue, 28 Dec 2021 03:39:48 +0000 (19:39 -0800)]
[pinctrl]Update gpio control code

2 years ago[pinctrl] disable jh7110 pinctrl
“jenny.zhang” [Wed, 22 Dec 2021 08:34:09 +0000 (00:34 -0800)]
[pinctrl] disable jh7110 pinctrl

2 years ago[pinctrl] 1.Update jh7110 pinctrl dts; 2.Adjust pinctrl coding style;
“jenny.zhang” [Wed, 22 Dec 2021 03:34:45 +0000 (19:34 -0800)]
[pinctrl] 1.Update jh7110 pinctrl dts; 2.Adjust pinctrl coding style;

2 years ago[pinctrl] add jh7110 pinctrl dts and driver
“jenny.zhang” [Tue, 30 Nov 2021 06:45:05 +0000 (22:45 -0800)]
[pinctrl] add jh7110 pinctrl dts and driver

2 years agoMerge branch 'CR_730_RTC_samin.guo' into 'jh7110_dev_5.15'
andy.hu [Wed, 23 Mar 2022 13:33:51 +0000 (13:33 +0000)]
Merge branch 'CR_730_RTC_samin.guo' into 'jh7110_dev_5.15'

rtc: starfive: Get the interrupt status using Completion.

See merge request sdk/sft-riscvpi-linux-5.10!3

2 years agortc: starfive: Get the interrupt status using Completion.
samin [Mon, 24 Jan 2022 01:40:33 +0000 (09:40 +0800)]
rtc: starfive: Get the interrupt status using Completion.

starfiv rtc needs to get interrupt status when setting rtc clock and
configuring hardware calibration. Use completion to identify states in
interrupt handlers.

In addition, when clearing the interrupt, you need to pull to determine
whether to clear the state, otherwise the clearing will be unsuccessful.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agoMerge branch 'CR_722_DRM_keith.zhao' into 'jh7110_dev_5.15'
andy.hu [Tue, 15 Mar 2022 01:28:14 +0000 (01:28 +0000)]
Merge branch 'CR_722_DRM_keith.zhao' into 'jh7110_dev_5.15'

riscv:driver:drm:DC8200

See merge request sdk/sft-riscvpi-linux-5.10!2

2 years agoriscv:driver:drm:DC8200
keith.zhao [Mon, 14 Mar 2022 03:09:02 +0000 (11:09 +0800)]
riscv:driver:drm:DC8200

fix build error caused by vs-drm.h
modify SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note

Signed-off-by:keith.zhao <keith.zhao@statfivetech.com>

2 years agoriscv::starfive:driver:dc8200
keith.zhao [Fri, 14 Jan 2022 12:58:47 +0000 (20:58 +0800)]
riscv::starfive:driver:dc8200

add head file vs-drm.h

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>

2 years agoriscv:uboot:starfive:dc8200
keith.zhao [Fri, 14 Jan 2022 12:46:25 +0000 (20:46 +0800)]
riscv:uboot:starfive:dc8200

update  drdc8200iver kenerl version from 5.10 to 5.13

Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>

2 years agosoc:starfive: add jh7110 pmu driver.
samin [Fri, 14 Jan 2022 07:10:00 +0000 (15:10 +0800)]
soc:starfive: add jh7110 pmu driver.

The JH7110 PMU can dynamically switch on or off power domians and set
the power-on and power-off sequence.

API Instructions refer to include/soc/starfive/jh7110_pmu.h

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodt-bingings:pmu:add jh7110 pmu dt-bingings.
samin [Fri, 14 Jan 2022 07:35:43 +0000 (15:35 +0800)]
dt-bingings:pmu:add jh7110 pmu dt-bingings.

Add jh7110 pmu support.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years ago1.add mailbox driver; 2.add mailbox test driver.
shanlong.li [Thu, 13 Jan 2022 10:32:53 +0000 (18:32 +0800)]
1.add mailbox driver; 2.add mailbox test driver.

2 years agoadd patches for libkcapi tool
Huan.Feng [Thu, 13 Jan 2022 10:11:09 +0000 (18:11 +0800)]
add patches for libkcapi tool

2 years agov4l2: add mipi pipeline suppport and ov13850 sensor
changhuang.liang [Wed, 12 Jan 2022 06:27:34 +0000 (14:27 +0800)]
v4l2: add mipi pipeline suppport and ov13850 sensor

2 years ago[v4l2][update kernel5.15]
david.li [Thu, 6 Jan 2022 05:04:28 +0000 (13:04 +0800)]
[v4l2][update kernel5.15]

2 years agoreset: starfive-jh7110: Add isp/vout reset support.
samin [Wed, 5 Jan 2022 07:12:44 +0000 (15:12 +0800)]
reset: starfive-jh7110: Add isp/vout reset support.

Add isp/vout reset support for jh7110.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agoreset: starfive-jh7110: use platform_ioremap_iomem_byname.
samin [Wed, 5 Jan 2022 06:57:25 +0000 (14:57 +0800)]
reset: starfive-jh7110: use platform_ioremap_iomem_byname.

The reset module is scattered in several domains, and each address
segment may be located in the module device management.

Using devm_platform_get_and_ioremap_resource->devm_ioremap_resource will
cause the address of this segment to be occupied by the reset driver,
and other modules cannot be used, so use ioremap that can be mapped
multiple times instead.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodt-bingings:reset:jh7110: Add isp/vout reg reset node.
samin [Wed, 5 Jan 2022 06:43:19 +0000 (14:43 +0800)]
dt-bingings:reset:jh7110: Add isp/vout reg reset node.

Add isp/vout reg reset node for jh7110.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodt-bingings:reset:jh7110: Add isp/vout domain reset define.
samin [Wed, 5 Jan 2022 06:27:50 +0000 (14:27 +0800)]
dt-bingings:reset:jh7110: Add isp/vout domain reset define.

isp/vout domain are independent of other CRGS.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years ago[v4l2] [add vin path]
david.li [Wed, 5 Jan 2022 03:07:47 +0000 (11:07 +0800)]
[v4l2] [add vin path]

2 years agoopen pcie
david.li [Thu, 23 Dec 2021 07:08:34 +0000 (15:08 +0800)]
open pcie

2 years agodt-bingings:reset: Add reset node for vdec&&jpeg.
samin [Wed, 22 Dec 2021 07:34:41 +0000 (15:34 +0800)]
dt-bingings:reset: Add reset node for vdec&&jpeg.

Add reset bindings for the vdec&jpeg.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodt-bingings:reset: Add Starfive JH7110 reset bindings
samin [Mon, 20 Dec 2021 02:04:36 +0000 (10:04 +0800)]
dt-bingings:reset: Add Starfive JH7110 reset bindings

Add bindings for the reset controller on the JH7110 RISC-V SoC by
StarFive Ltd.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agoreset: starfive-jh7110: Add StarFive JH7110 reset driver
samin [Thu, 16 Dec 2021 10:25:49 +0000 (18:25 +0800)]
reset: starfive-jh7110: Add StarFive JH7110 reset driver

Add a driver for the StarFive JH7110 reset controller.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years ago[pwm] Add jh7110 pwm driver code
“jenny.zhang” [Mon, 20 Dec 2021 08:05:23 +0000 (00:05 -0800)]
[pwm] Add jh7110 pwm driver code

2 years ago[can] Add jh7110 can driver code
“jenny.zhang” [Thu, 16 Dec 2021 07:40:17 +0000 (23:40 -0800)]
[can] Add jh7110 can driver code

2 years ago[trng] Add jh7110 trng driver code
“jenny.zhang” [Thu, 16 Dec 2021 06:55:08 +0000 (22:55 -0800)]
[trng] Add jh7110 trng driver code

2 years ago[alsa] Add jh7110 audio module driver code
“jenny.zhang” [Thu, 16 Dec 2021 06:14:04 +0000 (22:14 -0800)]
[alsa] Add jh7110 audio module driver code

2 years agov4l2 add dvp modify
david.li [Wed, 15 Dec 2021 07:02:38 +0000 (15:02 +0800)]
v4l2 add dvp modify

2 years ago[add v4l2 driver && close pcie]
david.li [Tue, 14 Dec 2021 06:21:27 +0000 (14:21 +0800)]
[add v4l2 driver && close pcie]

2 years agomodified dts file for jh7110 i2c
Huan.Feng [Mon, 13 Dec 2021 05:45:00 +0000 (13:45 +0800)]
modified dts file for jh7110 i2c

2 years agomodified gpio driver for jh7110
Huan.Feng [Fri, 10 Dec 2021 09:51:30 +0000 (17:51 +0800)]
modified gpio driver for jh7110

2 years agomodified i2c driver for jh7110
Huan.Feng [Fri, 10 Dec 2021 09:50:41 +0000 (17:50 +0800)]
modified i2c driver for jh7110

2 years agoremove IMG-rogue and null-disp and drm_legacy
vincent.zhang [Fri, 10 Dec 2021 06:30:37 +0000 (14:30 +0800)]
remove IMG-rogue and null-disp and drm_legacy

Signed-off-by: vincent.zhang <vincent.zhang@starfivetech.com>
2 years agoadd IMG-rogue, DRM, GEM & KMS, enable DRM legacy for default config
vincent.zhang [Fri, 10 Dec 2021 06:19:47 +0000 (14:19 +0800)]
add IMG-rogue, DRM, GEM & KMS, enable DRM legacy for default config

2 years agochange the IRQ number of GPU
vincent.zhang [Fri, 10 Dec 2021 05:54:59 +0000 (13:54 +0800)]
change the IRQ number of GPU

Signed-off-by: vincent.zhang <vincent.zhang@starfivetech.com>
2 years agoMerge branch 'jh7110_dev_5.15' of http://192.168.110.45/sdk/sft-riscvpi-linux-5.10...
Huan.Feng [Fri, 3 Dec 2021 03:12:49 +0000 (11:12 +0800)]
Merge branch 'jh7110_dev_5.15' of 192.168.110.45/sdk/sft-riscvpi-linux-5.10 into jh7110_dev_5.15

2 years agomodify jh7110 gpio driver irq register function
Huan.Feng [Fri, 3 Dec 2021 03:12:02 +0000 (11:12 +0800)]
modify jh7110 gpio driver irq register function

2 years agoMerge branch 'jh7110_dev_5.15' of http://192.168.110.45/sdk/sft-riscvpi-linux-5.10...
ke.zhu [Fri, 3 Dec 2021 02:55:51 +0000 (10:55 +0800)]
Merge branch 'jh7110_dev_5.15' of 192.168.110.45/sdk/sft-riscvpi-linux-5.10 into jh7110_dev_5.15

2 years agomodify jh7110 gpio driver
Huan.Feng [Fri, 3 Dec 2021 02:54:10 +0000 (10:54 +0800)]
modify jh7110 gpio driver

2 years agoPLIC cannot EOI masked interrupts,so Re-enable the interrupt before completion if...
ke.zhu [Fri, 3 Dec 2021 02:54:10 +0000 (10:54 +0800)]
PLIC cannot EOI masked interrupts,so Re-enable the interrupt before completion if it has been masked during the handling and remask it afterwards.

2 years agoKconfig/dw-axi-dmac-starfive: selected by SOC_STARFIVE
samin [Wed, 1 Dec 2021 06:36:18 +0000 (14:36 +0800)]
Kconfig/dw-axi-dmac-starfive: selected by SOC_STARFIVE

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agoclocksource: add starfive hw-timer driver
Samin Guo [Wed, 1 Sep 2021 09:42:14 +0000 (17:42 +0800)]
clocksource: add starfive hw-timer driver

This driver applies to JH7100|JH7110

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agowatchdog: add starfive watchdog driver
Samin Guo [Wed, 8 Sep 2021 03:27:49 +0000 (11:27 +0800)]
watchdog: add starfive watchdog driver

This driver applies to JH7100|JH7110

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodt-bingings: Add dt-bingings support for StarFive JH7110 Timers.
SaminGuo [Fri, 19 Nov 2021 04:05:19 +0000 (12:05 +0800)]
dt-bingings: Add dt-bingings support for StarFive JH7110 Timers.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodt-bingings: Add dt-bingings support for StarFive JH71xx WatchDog
SaminGuo [Fri, 19 Nov 2021 04:02:34 +0000 (12:02 +0800)]
dt-bingings: Add dt-bingings support for StarFive JH71xx WatchDog

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years ago1.Add plda pcie host controller driver.
ke.zhu [Thu, 25 Nov 2021 09:15:51 +0000 (17:15 +0800)]
1.Add plda pcie host controller driver.
2.Add PCIe host controller DT bingdings of starfive JH7110.

2 years agospi: support spi-pl022.
ke.zhu [Thu, 25 Nov 2021 06:02:50 +0000 (14:02 +0800)]
spi: support spi-pl022.

2 years agoMerge branch 'jh7110_dev_5.15' of http://192.168.110.45/sdk/sft-riscvpi-linux-5.10...
ke.zhu [Thu, 25 Nov 2021 03:24:50 +0000 (11:24 +0800)]
Merge branch 'jh7110_dev_5.15' of 192.168.110.45/sdk/sft-riscvpi-linux-5.10 into jh7110_dev_5.15

2 years agodt-bingings: Update dt-bingings for jh7110 jpu/vdec.
samin [Tue, 23 Nov 2021 06:32:44 +0000 (14:32 +0800)]
dt-bingings: Update dt-bingings for jh7110 jpu/vdec.

1) rename jpu/vdec match strings.
2) add axi/apb clock-names define for jpu/vdec.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodma: Added DMA misc driver interface for data transfer
samin [Mon, 22 Nov 2021 10:08:40 +0000 (18:08 +0800)]
dma: Added DMA misc driver interface for data transfer

1)add async_memcpy api kernel space.
2)add dma-misc driver for user space.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodma: Added DMA misc driver interface for data transfer
samin [Mon, 22 Nov 2021 10:08:40 +0000 (18:08 +0800)]
dma: Added DMA misc driver interface for data transfer

1)add async_memcpy api kernel space.
2)add dma-misc driver for user space.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodmaengine: dw-axi-dmac: Add support for StarFive ALSA device.
samin [Mon, 22 Nov 2021 09:52:04 +0000 (17:52 +0800)]
dmaengine: dw-axi-dmac: Add support for StarFive ALSA device.

Solve the problem of audio DMA transmission and playback
failure.

Signed-off-by: jenny.zhang <jenny.zhang@starfivetech.com>
Signed-off-by: michael.yan <michael.yan@starfivetech.com>
Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodmaengine: dw-axi-dmac: add burst_trans_len support.
samin [Mon, 22 Nov 2021 09:21:34 +0000 (17:21 +0800)]
dmaengine: dw-axi-dmac: add burst_trans_len support.

Different peripherals may require different burst_trans_len.
Some ALSA devices may require BURST_TRANS_LEN_16, but this
parameter may not work properly on some peripherals (spi, etc.).

This patch will allow BURST_TRANS_LEN to be passed in from DTS.

    dmas = <&dma hs_nu burst_trans_len>

    burst_trans_len:
    <-1> defalut
    <0>  BURST_TRANS_LEN_1
    <1>  BURST_TRANS_LEN_4    /*defalut value*/
    <2>  BURST_TRANS_LEN_8
    <3>  BURST_TRANS_LEN_16
    <4>  BURST_TRANS_LEN_32
    <5>  BURST_TRANS_LEN_64
    <6>  BURST_TRANS_LEN_128
    <7>  BURST_TRANS_LEN_256

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodmaengine: dw-axi-dmac: Add StarFive JHxxx AxiDMA support
samin [Mon, 22 Nov 2021 08:52:21 +0000 (16:52 +0800)]
dmaengine: dw-axi-dmac: Add StarFive JHxxx AxiDMA support

Add support for StarFive AxiDMA to the .compatible field.
The AxiDMA Apb region will be accessible if the compatible
string matches the "starfive,axi-dma".

Add "starfive_flush_dcache" due to VIC7100 Cache
Coherency issues.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodmaengine: dw-axi-dmac: Supports channels > 8 or hardware handshakes > 16.
samin [Mon, 22 Nov 2021 06:14:37 +0000 (14:14 +0800)]
dmaengine: dw-axi-dmac: Supports channels > 8 or hardware handshakes > 16.

1)Different num of chan/hw-handshakes  have different register offsets.
When the channel > 8, DMA uses DMAC_CHENREG2 instead of DMAC_CHENREG.
When the channel > 8 or hw-handshake > 16, DMA uses CHx_CFG2 instead of CHx_CFG.

2)add OSR(Outstanding Request Limit) configuration
OSR can greatly improve performance in dma-memcpy.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodt-bingings: Add dt-bingings support for StarFive JH7110 DMA.
samin [Mon, 22 Nov 2021 06:34:59 +0000 (14:34 +0800)]
dt-bingings: Add dt-bingings support for StarFive JH7110 DMA.

Signed-off-by: samin <samin.guo@starfivetech.com>
2 years agodt-bingings: Adjust the line feed to be more intuitive
SaminGuo [Fri, 19 Nov 2021 05:33:34 +0000 (13:33 +0800)]
dt-bingings: Adjust the line feed to be more intuitive

Signed-off-by: SaminGuo <samin.guo@starfivetech.com>
2 years agortc: starfive-rtc: Add RTC support for StarFive JH7110.
SaminGuo [Wed, 17 Nov 2021 07:55:45 +0000 (15:55 +0800)]
rtc: starfive-rtc: Add RTC support for StarFive JH7110.

1)32.768k-RTC device.
2)sw/hw calibration support;
3)alarm support;
4)5.15 Use "devm_rtc_register_device" instead of  "rtc_register_device"

Signed-off-by: SaminGuo <samin.guo@starfivetech.com>
2 years agodt-bingings: Add dt-bingings support for StarFive JH7110 RTC.
SaminGuo [Fri, 19 Nov 2021 02:11:33 +0000 (10:11 +0800)]
dt-bingings: Add dt-bingings support for StarFive JH7110 RTC.

RTC fixed operating frequency is 32.768KHz, refclk for hardware
calibration

Signed-off-by: SaminGuo <samin.guo@starfivetech.com>
2 years ago[config]:Update default config
yanhong.wang [Fri, 19 Nov 2021 00:57:22 +0000 (08:57 +0800)]
[config]:Update default config

2 years ago[board]:Init board config for JH7110
yanhong.wang [Thu, 18 Nov 2021 06:06:27 +0000 (14:06 +0800)]
[board]:Init board config for JH7110

2 years agoMerge branch 'worklym' into jh7110_dev_5.15
yanhong.wang [Wed, 17 Nov 2021 09:34:12 +0000 (17:34 +0800)]
Merge branch 'worklym' into jh7110_dev_5.15

3 years agoLinux 5.15 v5.15
Linus Torvalds [Sun, 31 Oct 2021 20:53:10 +0000 (13:53 -0700)]
Linux 5.15

3 years agoMerge tag 'perf-tools-fixes-for-v5.15-2021-10-31' of git://git.kernel.org/pub/scm...
Linus Torvalds [Sun, 31 Oct 2021 18:24:06 +0000 (11:24 -0700)]
Merge tag 'perf-tools-fixes-for-v5.15-2021-10-31' of git://git./linux/kernel/git/acme/linux

Pull perf tools fixes from Arnaldo Carvalho de Melo:

 - Fix compilation of callchain related code on powerpc with gcc11+

 - Fix PERF_SAMPLE_WEIGHT_STRUCT support in 'perf script'

 - Check session->header.env.arch before using it, fixing a segmentation
   fault

 - Suppress 'rm dlfilter' build messages

* tag 'perf-tools-fixes-for-v5.15-2021-10-31' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux:
  perf script: Fix PERF_SAMPLE_WEIGHT_STRUCT support
  perf callchain: Fix compilation on powerpc with gcc11+
  perf script: Check session->header.env.arch before using it
  perf build: Suppress 'rm dlfilter' build message

3 years agoMerge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Linus Torvalds [Sun, 31 Oct 2021 18:19:02 +0000 (11:19 -0700)]
Merge tag 'for-linus' of git://git./virt/kvm/kvm

Pull kvm fixes from Paolo Bonzini:

 - Fixes for s390 interrupt delivery

 - Fixes for Xen emulator bugs showing up as debug kernel WARNs

 - Fix another issue with SEV/ES string I/O VMGEXITs

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: x86: Take srcu lock in post_kvm_run_save()
  KVM: SEV-ES: fix another issue with string I/O VMGEXITs
  KVM: x86/xen: Fix kvm_xen_has_interrupt() sleeping in kvm_vcpu_block()
  KVM: x86: switch pvclock_gtod_sync_lock to a raw spinlock
  KVM: s390: preserve deliverable_mask in __airqs_kick_single_vcpu
  KVM: s390: clear kicked_mask before sleeping again

3 years agoperf script: Fix PERF_SAMPLE_WEIGHT_STRUCT support
Kan Liang [Wed, 29 Sep 2021 15:38:13 +0000 (08:38 -0700)]
perf script: Fix PERF_SAMPLE_WEIGHT_STRUCT support

-F weight in perf script is broken.

  # ./perf mem record
  # ./perf script -F weight
  Samples for 'dummy:HG' event do not have WEIGHT attribute set. Cannot
print 'weight' field.

The sample type, PERF_SAMPLE_WEIGHT_STRUCT, is an alternative of the
PERF_SAMPLE_WEIGHT sample type. They share the same space, weight. The
lower 32 bits are exactly the same for both sample type. The higher 32
bits may be different for different architecture. For a new kernel on
x86, the PERF_SAMPLE_WEIGHT_STRUCT is used. For an old kernel or other
ARCHs, the PERF_SAMPLE_WEIGHT is used.

With -F weight, current perf script will only check the input string
"weight" with the PERF_SAMPLE_WEIGHT sample type. Because the commit
ea8d0ed6eae3 ("perf tools: Support PERF_SAMPLE_WEIGHT_STRUCT") didn't
update the PERF_SAMPLE_WEIGHT_STRUCT sample type for perf script. For a
new kernel on x86, the check fails.

Use PERF_SAMPLE_WEIGHT_TYPE, which supports both sample types, to
replace PERF_SAMPLE_WEIGHT

Fixes: ea8d0ed6eae37b01 ("perf tools: Support PERF_SAMPLE_WEIGHT_STRUCT")
Reported-by: Joe Mario <jmario@redhat.com>
Reviewed-by: Kajol Jain <kjain@linux.ibm.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Tested-by: Jiri Olsa <jolsa@redhat.com>
Tested-by: Joe Mario <jmario@redhat.com>
Acked-by: Jiri Olsa <jolsa@redhat.com>
Acked-by: Joe Mario <jmario@redhat.com>
Cc: Andi Kleen <ak@linux.intel.com>
Link: https://lore.kernel.org/r/1632929894-102778-1-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
3 years agoperf callchain: Fix compilation on powerpc with gcc11+
Jiri Olsa [Tue, 28 Sep 2021 19:52:53 +0000 (21:52 +0200)]
perf callchain: Fix compilation on powerpc with gcc11+

Got following build fail on powerpc:

    CC      arch/powerpc/util/skip-callchain-idx.o
  In function ‘check_return_reg’,
      inlined from ‘check_return_addr’ at arch/powerpc/util/skip-callchain-idx.c:213:7,
      inlined from ‘arch_skip_callchain_idx’ at arch/powerpc/util/skip-callchain-idx.c:265:7:
  arch/powerpc/util/skip-callchain-idx.c:54:18: error: ‘dwarf_frame_register’ accessing 96 bytes \
  in a region of size 64 [-Werror=stringop-overflow=]
     54 |         result = dwarf_frame_register(frame, ra_regno, ops_mem, &ops, &nops);
        |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  arch/powerpc/util/skip-callchain-idx.c: In function ‘arch_skip_callchain_idx’:
  arch/powerpc/util/skip-callchain-idx.c:54:18: note: referencing argument 3 of type ‘Dwarf_Op *’
  In file included from /usr/include/elfutils/libdwfl.h:32,
                   from arch/powerpc/util/skip-callchain-idx.c:10:
  /usr/include/elfutils/libdw.h:1069:12: note: in a call to function ‘dwarf_frame_register’
   1069 | extern int dwarf_frame_register (Dwarf_Frame *frame, int regno,
        |            ^~~~~~~~~~~~~~~~~~~~
  cc1: all warnings being treated as errors

The dwarf_frame_register args changed with [1],
Updating ops_mem accordingly.

[1] https://sourceware.org/git/?p=elfutils.git;a=commit;h=5621fe5443da23112170235dd5cac161e5c75e65

Reviewed-by: Kajol Jain <kjain@linux.ibm.com>
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Acked-by: Mark Wieelard <mjw@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Michael Petlan <mpetlan@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Link: https://lore.kernel.org/r/20210928195253.1267023-1-jolsa@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
3 years agoperf script: Check session->header.env.arch before using it
Song Liu [Mon, 4 Oct 2021 05:32:38 +0000 (22:32 -0700)]
perf script: Check session->header.env.arch before using it

When perf.data is not written cleanly, we would like to process existing
data as much as possible (please see f_header.data.size == 0 condition
in perf_session__read_header). However, perf.data with partial data may
crash perf. Specifically, we see crash in 'perf script' for NULL
session->header.env.arch.

Fix this by checking session->header.env.arch before using it to determine
native_arch. Also split the if condition so it is easier to read.

Committer notes:

If it is a pipe, we already assume is a native arch, so no need to check
session->header.env.arch.

Signed-off-by: Song Liu <songliubraving@fb.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: kernel-team@fb.com
Cc: stable@vger.kernel.org
Link: http://lore.kernel.org/lkml/20211004053238.514936-1-songliubraving@fb.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
3 years agoperf build: Suppress 'rm dlfilter' build message
Adrian Hunter [Thu, 30 Sep 2021 06:28:49 +0000 (09:28 +0300)]
perf build: Suppress 'rm dlfilter' build message

The following build message:

rm dlfilters/dlfilter-test-api-v0.o

is unwanted.

The object file is being treated as an intermediate file and being
automatically removed. Mark the object file as .SECONDARY to prevent
removal and hence the message.

Requested-by: Arnaldo Carvalho de Melo <acme@kernel.org>
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Link: http://lore.kernel.org/lkml/20210930062849.110416-1-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>