Matt Arsenault [Fri, 15 Jul 2016 21:33:02 +0000 (21:33 +0000)]
AMDGPU: Update for rsq intrinsic changes
llvm-svn: 275622
Kostya Serebryany [Fri, 15 Jul 2016 21:28:58 +0000 (21:28 +0000)]
[sanitizers] add interceptor for memmem; add weak hooks for strncasecmp, strcasecmp, strstr, strcasestr, memmem
llvm-svn: 275621
Matt Arsenault [Fri, 15 Jul 2016 21:27:13 +0000 (21:27 +0000)]
AMDGPU: Remove brev intrinsic
llvm-svn: 275620
Matt Arsenault [Fri, 15 Jul 2016 21:27:08 +0000 (21:27 +0000)]
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
llvm-svn: 275619
Matt Arsenault [Fri, 15 Jul 2016 21:26:56 +0000 (21:26 +0000)]
AMDGPU: Remove AMDGPU.ldexp
llvm-svn: 275618
Matt Arsenault [Fri, 15 Jul 2016 21:26:52 +0000 (21:26 +0000)]
AMDGPU: Remove legacy rsq.clamped intrinsic
Mesa still has a use of llvm.AMDGPU.rsq.f64 remaining.
Also fix mismatch with non-IEEE rsq selecting to IEEE rsq.
llvm-svn: 275617
Matt Arsenault [Fri, 15 Jul 2016 21:26:46 +0000 (21:26 +0000)]
AMDGPU/R600: Delete dead code.
Dead or the same as the base implementation.
llvm-svn: 275616
Saleem Abdulrasool [Fri, 15 Jul 2016 21:10:31 +0000 (21:10 +0000)]
DebugInfo: reorder some initializers
Fix a few initialization ordering warnings from gcc from `-Wreorder`. NFC.
llvm-svn: 275615
Saleem Abdulrasool [Fri, 15 Jul 2016 21:10:29 +0000 (21:10 +0000)]
CodeGen: avoid emitting unnecessary CFI
Remove unnecessary clutter in assembly output. When using SjLj EH, the CFI is
not actually used for anything. Do not emit the CFI needlessly. The minor test
adjustments are interesting. The prologue test was just overzealous matcching.
The interesting case is the LSDA change. It was originally added to ensure that
various compilations did not mangle the name (it explicitly checked the name!).
However, subsequent cleanups made it more reliant on the CFI to find the name.
Parse the generated code flow to generically find the label still.
llvm-svn: 275614
Michael Zolotukhin [Fri, 15 Jul 2016 21:08:41 +0000 (21:08 +0000)]
Make processInstruction from LCSSA.cpp externally available.
Summary:
When a pass tries to keep LCSSA form it's often convenient to be able to update
LCSSA for a set of instructions rather than for the entire loop. This patch makes the
processInstruction from LCSSA externally available under a name
formLCSSAForInstruction.
Reviewers: chandlerc, sanjoy, hfinkel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22378
llvm-svn: 275613
Richard Smith [Fri, 15 Jul 2016 20:53:25 +0000 (20:53 +0000)]
Push alias-declarations and alias-template declarations into scope even if
they're redeclarations. This is necessary in order for name lookup to correctly
find the most recent declaration of the name (which affects default template
argument lookup and cross-module merging, among other things).
llvm-svn: 275612
Zachary Turner [Fri, 15 Jul 2016 20:43:38 +0000 (20:43 +0000)]
[pdb] Introduce MsfBuilder for laying out PDB files.
Reviewed by: ruiu
Differential Revision: https://reviews.llvm.org/D22308
llvm-svn: 275611
Saleem Abdulrasool [Fri, 15 Jul 2016 20:41:10 +0000 (20:41 +0000)]
Sema: support __declspec(dll*) on ObjC interfaces
Extend the __declspec(dll*) attribute to cover ObjC interfaces. This was
requested by Microsoft for their ObjC support. Cover both import and export.
This only adds the semantic analysis portion of the support, code-generation
still remains outstanding. Add some basic initial documentation on the
attributes that were previously empty. Tweak the previous tests to use the
relative expected-warnings to make the tests easier to read.
llvm-svn: 275610
Argyrios Kyrtzidis [Fri, 15 Jul 2016 20:40:24 +0000 (20:40 +0000)]
[test/objcmt] Add a follow-up test case for r275600.
llvm-svn: 275609
Rui Ueyama [Fri, 15 Jul 2016 20:38:28 +0000 (20:38 +0000)]
ELF: Include filenames in error messages.
llvm-svn: 275608
Nico Weber [Fri, 15 Jul 2016 20:18:37 +0000 (20:18 +0000)]
Teach fast isel about the win64 calling convention.
This mostly just works.
Vectorcall rets are still not supported.
The win64_eh test change is because fast isel doesn't use rsi for temporary
computations, so it doesn't need to be pushed. The test case I'm changing was
originally added to test pushes, but by now there are other test cases in that
file exercising that code path.
https://reviews.llvm.org/D22422
llvm-svn: 275607
Krzysztof Parzyszek [Fri, 15 Jul 2016 20:16:03 +0000 (20:16 +0000)]
[Hexagon] Make MI scheduler check for stalls in previous packet on v60
Patch by Ikhlas Ajbar.
llvm-svn: 275606
Rui Ueyama [Fri, 15 Jul 2016 20:05:05 +0000 (20:05 +0000)]
Remove variables. NFC.
llvm-svn: 275605
George Burgess IV [Fri, 15 Jul 2016 20:02:49 +0000 (20:02 +0000)]
[CFLAA] Add attributes handling for CFLAnders.
This patch adds proper handling of stratified attributes into our
anders-style CFLAA implementation. It also comes bundled with more
CFLAnders tests. :)
Patch by Jia Chen.
Differential Revision: https://reviews.llvm.org/D22325
llvm-svn: 275604
Nemanja Ivanovic [Fri, 15 Jul 2016 19:56:32 +0000 (19:56 +0000)]
[PowerPC] Set kill flag for scratch register when spilling the link register
This fixes PR 28526.
llvm-svn: 275603
George Burgess IV [Fri, 15 Jul 2016 19:53:25 +0000 (19:53 +0000)]
[CFLAA] Add an initial CFLAnders implementation.
This adds an incomplete anders-style implementation for CFLAA. It's
incomplete in that it's missing interprocedural analysis, attrs
handling, etc. and that it needs more tests. More tests and features
will be added in future commits.
Patch by Jia Chen.
Differential Revision: https://reviews.llvm.org/D22291
llvm-svn: 275602
Derek Schuff [Fri, 15 Jul 2016 19:35:43 +0000 (19:35 +0000)]
Fix calls to SelectionDAG::getStore
It was refactored in r275592. NFC
llvm-svn: 275601
Argyrios Kyrtzidis [Fri, 15 Jul 2016 19:22:34 +0000 (19:22 +0000)]
[objcmt] Fix a buffer overflow crash than can occur while modernizing enums.
Note that due to the nature of the crash it requires libgmalloc or asan for it to crash consistently.
rdar://
19932927
llvm-svn: 275600
Vitaly Buka [Fri, 15 Jul 2016 19:14:57 +0000 (19:14 +0000)]
Revert "[AMDGPU] Add metadata for runtime"
This reverts commit r275566.
llvm-svn: 275599
Krzysztof Parzyszek [Fri, 15 Jul 2016 19:09:37 +0000 (19:09 +0000)]
[Hexagon] Replace postprocessDAG with a more elaborate DAG mutation
llvm-svn: 275598
Xinliang David Li [Fri, 15 Jul 2016 18:48:14 +0000 (18:48 +0000)]
[Profile] instroduce portability macro for dir separator(s
llvm-svn: 275597
Jingyue Wu [Fri, 15 Jul 2016 18:47:17 +0000 (18:47 +0000)]
[ReassociateGEP] Update tests to allow missing "inbounds" on certain GEPs.
With r275532 fixing miscompilation of GVN, "inbounds" on certain GEPs in these
tests cannot be preserved any more. Left a TODO in the tests for future
reference.
llvm-svn: 275596
Sjoerd Meijer [Fri, 15 Jul 2016 18:41:56 +0000 (18:41 +0000)]
[MBP] Clean up of the comments, and a first attempt to better describe a part
of the algorithm.
Differential Revision: https://reviews.llvm.org/D22364
llvm-svn: 275595
Sanjay Patel [Fri, 15 Jul 2016 18:39:02 +0000 (18:39 +0000)]
add tests for associative ops blocked by a cast
These are more generalized versions of the cases added in
r275302 and r275297.
llvm-svn: 275594
Davide Italiano [Fri, 15 Jul 2016 18:33:16 +0000 (18:33 +0000)]
[SCCP] Merge two conditions into one. NFCI.
llvm-svn: 275593
Justin Lebar [Fri, 15 Jul 2016 18:27:10 +0000 (18:27 +0000)]
[SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, getStore, and friends.
Summary:
Instead, we take a single flags arg (a bitset).
Also add a default 0 alignment, and change the order of arguments so the
alignment comes before the flags.
This greatly simplifies many callsites, and fixes a bug in
AMDGPUISelLowering, wherein the order of the args to getLoad was
inverted. It also greatly simplifies the process of adding another flag
to getLoad.
Reviewers: chandlerc, tstellarAMD
Subscribers: jholewinski, arsenm, jyknight, dsanders, nemanjai, llvm-commits
Differential Revision: http://reviews.llvm.org/D22249
llvm-svn: 275592
Justin Lebar [Fri, 15 Jul 2016 18:26:59 +0000 (18:26 +0000)]
[CodeGen] Take a MachineMemOperand::Flags in MachineFunction::getMachineMemOperand.
Summary:
Previously we took an unsigned.
Hooray for type-safety.
Reviewers: chandlerc
Subscribers: dsanders, llvm-commits
Differential Revision: http://reviews.llvm.org/D22282
llvm-svn: 275591
Argyrios Kyrtzidis [Fri, 15 Jul 2016 18:11:33 +0000 (18:11 +0000)]
[AST] Keep track of the left brace source location of a tag decl.
This is useful for source modification tools. There will be a follow-up commit using it.
llvm-svn: 275590
Argyrios Kyrtzidis [Fri, 15 Jul 2016 18:11:27 +0000 (18:11 +0000)]
[objcmt] Don't add an #import of Foundation unnecessarily, if the NS_ENUM macro is already defined.
llvm-svn: 275589
Rong Xu [Fri, 15 Jul 2016 18:10:49 +0000 (18:10 +0000)]
[PGO] IRPGO pre-cleanup pass changes
This patch adds a selected set of cleanup passes including a pre-inline pass
before LLVM IR PGO instrumentation. The inline is only intended to apply those
obvious/trivial ones before instrumentation so that much less instrumentation
is needed to get better profiling information. This will drastically improve
the instrumented code performance for large C++ applications. Another benefit
is the context sensitive counts that can potentially improve the PGO
optimization.
Differential Revision: http://reviews.llvm.org/D21405
llvm-svn: 275588
Sanjay Patel [Fri, 15 Jul 2016 18:03:59 +0000 (18:03 +0000)]
fix documentation comments; NFC
llvm-svn: 275587
Krzysztof Parzyszek [Fri, 15 Jul 2016 17:48:09 +0000 (17:48 +0000)]
[Hexagon] Add a scheduling DAG mutation
- Remove output dependencies on USR_OVF register.
- Update chain edge latencies between v60 vector loads/stores.
llvm-svn: 275586
Etienne Bergeron [Fri, 15 Jul 2016 17:28:10 +0000 (17:28 +0000)]
[compiler-rt] Fix 64-bits exception handlers in ASAN 64-bits runtime
Summary:
This is adding the appropriate suport for exception handling for
64-bits ASAN on windows.
Reviewers: rnk
Subscribers: kubabrecka, llvm-commits, wang0109, chrisha
Differential Revision: https://reviews.llvm.org/D22395
llvm-svn: 275585
Etienne Bergeron [Fri, 15 Jul 2016 17:26:33 +0000 (17:26 +0000)]
[compiler-rt] Fix incorrect handling of indirect load.
Summary:
Indirect load are relative offset from RIP.
The current trampoline implementation is incorrectly
copying these instructions which make some unittests
crashing.
This patch is not fixing the unittests but it's fixing
the crashes. The functions are no longer hooked.
Patches will come soon to fix these unittests.
Reviewers: rnk
Subscribers: llvm-commits, wang0109, chrisha
Differential Revision: https://reviews.llvm.org/D22410
llvm-svn: 275584
Adam Nemet [Fri, 15 Jul 2016 17:23:20 +0000 (17:23 +0000)]
[OptRemark,LDist] RFC: Add hotness attribute
Summary:
This is the first set of changes implementing the RFC from
http://thread.gmane.org/gmane.comp.compilers.llvm.devel/98334
This is a cross-sectional patch; rather than implementing the hotness
attribute for all optimization remarks and all passes in a patch set, it
implements it for the 'missed-optimization' remark for Loop
Distribution. My goal is to shake out the design issues before scaling
it up to other types and passes.
Hotness is computed as an integer as the multiplication of the block
frequency with the function entry count. It's only printed in opt
currently since clang prints the diagnostic fields directly. E.g.:
remark: /tmp/t.c:3:3: loop not distributed: use -Rpass-analysis=loop-distribute for more info (hotness: 300)
A new API added is similar to emitOptimizationRemarkMissed. The
difference is that it additionally takes a code region that the
diagnostic corresponds to. From this, hotness is computed using BFI.
The new API is exposed via an analysis pass so that it can be made
dependent on LazyBFI. (Thanks to Hal for the analysis pass idea.)
This feature can all be enabled by setDiagnosticHotnessRequested in the
LLVM context. If this is off, LazyBFI is not calculated (D22141) so
there should be no overhead.
A new command-line option is added to turn this on in opt.
My plan is to switch all user of emitOptimizationRemark* to use this
module instead.
Reviewers: hfinkel
Subscribers: rcox2, mzolotukhin, llvm-commits
Differential Revision: http://reviews.llvm.org/D21771
llvm-svn: 275583
Kostya Serebryany [Fri, 15 Jul 2016 17:19:43 +0000 (17:19 +0000)]
[libFuzzer] add ThreadedLeakTest
llvm-svn: 275582
David Majnemer [Fri, 15 Jul 2016 17:19:24 +0000 (17:19 +0000)]
[AliasAnalysis] Give back AA results for fence instructions
Calling getModRefInfo with a fence resulted in crashes because fences
don't have a memory location. Add a new predicate to Instruction
called isFenceLike which indicates that the instruction mutates memory
but not any single memory location in particular. In practice, it is a
proxy for the set of instructions which "mayWriteToMemory" but cannot be
used with MemoryLocation::get.
This fixes PR28570.
llvm-svn: 275581
Etienne Bergeron [Fri, 15 Jul 2016 17:16:37 +0000 (17:16 +0000)]
TestCase null_deref was failing in Win64:
c:\lipo\work\asan\b_llvm>c:\lipo\work\asan\b_llvm\projects\compiler-rt\test\asan\X86_64WindowsConfig\TestCases\Output\null_deref.cc.tmp
=================================================================
==5488==ERROR: AddressSanitizer: access-violation on unknown address 0x000000000028 (pc 0x7ff701f91067 bp 0x000c8cf8fbf0 sp 0x000c8cf8fbb0 T0)
==5488==The signal is caused by a READ memory access.
==5488==Hint: address points to the zero page.
#0 0x7ff701f91066 in NullDeref(int *) C:\lipo\work\asan\llvm\projects\compiler-rt\test\asan\TestCases\null_deref.cc:15:10
#1 0x8a0388830a67 (<unknown module>)
The reason was symbols was not initilized. In fact, it was first inited
with a call to stack.Print(), which calls
WinSymbolizerTool::SymbolizePC, then InitializeDbgHelpIfNeeded().
Since the StackWalk was performed before the stack.Print(), stack frames
where not gathered correctly.
There should be a better place to initialize symbols. For now, this
patch makes the test happy.
Patch by Wei Wang
Differential Revision: https://reviews.llvm.org/D22410
llvm-svn: 275580
Tobias Grosser [Fri, 15 Jul 2016 17:12:41 +0000 (17:12 +0000)]
GPGPU: Format statements scheduled on the host ourselves
Otherwise ppcg would try to call into pet functionality that this not available,
which obviously will cause trouble. As we can easily print these statements
ourselves, we just do so.
llvm-svn: 275579
Krzysztof Parzyszek [Fri, 15 Jul 2016 16:58:34 +0000 (16:58 +0000)]
[Hexagon] Update instruction itineraries
llvm-svn: 275578
Wei Ding [Fri, 15 Jul 2016 16:43:03 +0000 (16:43 +0000)]
AMDGPU: Add Clang Builtin for v_lerp_u8
Differential Revision: http://reviews.llvm.org/D22380
llvm-svn: 275577
Dehao Chen [Fri, 15 Jul 2016 16:42:11 +0000 (16:42 +0000)]
[PM] Convert LoopInstSimplify Pass to new PM
Summary: Convert LoopInstSimplify to new PM. Unfortunately there is no exisiting unittest for this pass.
Reviewers: davidxl, silvas
Subscribers: silvas, llvm-commits, mzolotukhin
Differential Revision: https://reviews.llvm.org/D22280
llvm-svn: 275576
Justin Bogner [Fri, 15 Jul 2016 16:31:37 +0000 (16:31 +0000)]
IR: Sort generic intrinsics before target specific ones
This splits out the intrinsic table such that generic intrinsics come
first and target specific intrinsics are grouped by target. From here
we can find out which target an intrinsic is for or differentiate
between generic and target intrinsics.
The motivation here is to make it easier to move target specific
intrinsic handling out of generic code.
llvm-svn: 275575
Krzysztof Parzyszek [Fri, 15 Jul 2016 16:29:02 +0000 (16:29 +0000)]
[Hexagon] Fixes/changes to instruction selection
- Add patterns for rr/abs addressing modes.
- Set addrMode to PostInc where necessary.
- Misc fixes.
llvm-svn: 275574
Tobias Grosser [Fri, 15 Jul 2016 16:15:47 +0000 (16:15 +0000)]
GPGPU: Use schedule whole components for scheduler
This option increases the scalability of the scheduler and allows us to remove
the 'gisting' workaround we introduced in r275565 to handle a more complicated
test case. Another benefit of using this option is also that the generated
code looks a lot more streamlined.
Thanks to Sven Verdoolaege for reminding me of this option.
llvm-svn: 275573
Jun Bum Lim [Fri, 15 Jul 2016 16:14:34 +0000 (16:14 +0000)]
[DSE]Enhance shorthening MemIntrinsic based on OverlapIntervals
Summary:
This change use the overlap interval map built from partial overwrite tracking to perform shortening MemIntrinsics.
Add test cases which was missing opportunities before.
Reviewers: hfinkel, eeckstein, mcrosier
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D21909
llvm-svn: 275571
Dean Michael Berris [Fri, 15 Jul 2016 15:46:39 +0000 (15:46 +0000)]
XRay: Remove duplicate checks for xray instrumentation flags
llvm-svn: 275570
Krzysztof Parzyszek [Fri, 15 Jul 2016 15:35:52 +0000 (15:35 +0000)]
[Hexagon] Improve patterns with stack-based addressing
- Treat bitwise OR with a frame index as an ADD wherever possible, fold it
into addressing mode.
- Extend patterns for memops to allow memops with frame indexes as address
operands.
llvm-svn: 275569
Nico Weber [Fri, 15 Jul 2016 15:30:18 +0000 (15:30 +0000)]
In dag-optnone.ll, use varargs instead of win64 to fast SDIsel.
The test used to rely on targeting win64 to disable fast isel,
but I'd like to teach fast isel about win64 rets. Change the
test to use varargs to disable fast isel.
llvm-svn: 275568
Matthew Simpson [Fri, 15 Jul 2016 15:22:43 +0000 (15:22 +0000)]
[LV] Swap A and B in interleaved access analysis (NFC)
This patch swaps A and B in the interleaved access analysis and clarifies
related comments. The algorithm is more intuitive if we let access A precede
access B in program order rather than the reverse. This change was requested in
the review of D19984.
llvm-svn: 275567
Yaxun Liu [Fri, 15 Jul 2016 14:58:21 +0000 (14:58 +0000)]
[AMDGPU] Add metadata for runtime
Added emitting metadata to elf for runtime.
Runtime requires certain information (metadata) about kernels to be able to execute and query them. Such information is emitted to an elf section as a key-value pair stream.
Differential Revision: https://reviews.llvm.org/D21849
llvm-svn: 275566
Tobias Grosser [Fri, 15 Jul 2016 14:43:04 +0000 (14:43 +0000)]
GPGPU: Drop domain constraints from flow dependences
This works around a shortcoming of the isl scheduler, which even for some
smaller test cases does not terminate in case domain constraints are part
of the flow dependences.
llvm-svn: 275565
Jacques Pienaar [Fri, 15 Jul 2016 14:41:04 +0000 (14:41 +0000)]
Rename AnalyzeBranch* to analyzeBranch*.
Summary: NFC. Rename AnalyzeBranch/AnalyzeBranchPredicate to analyzeBranch/analyzeBranchPredicate to follow LLVM coding style and be consistent with TargetInstrInfo's analyzeCompare and analyzeSelect.
Reviewers: tstellarAMD, mcrosier
Subscribers: mcrosier, jholewinski, jfb, arsenm, dschuff, jyknight, dsanders, nemanjai
Differential Revision: https://reviews.llvm.org/D22409
llvm-svn: 275564
Igor Laevsky [Fri, 15 Jul 2016 14:31:16 +0000 (14:31 +0000)]
Re-submit r272891 "Prevent dangling pointer problems in BranchProbabilityInfo"
Most possibly problem was caused by the same reason as PR28400. This change
bypasses it by using CallbackVH instead of AssertingVH.
Differential Revision: https://reviews.llvm.org/D20957
llvm-svn: 275563
Daniel Sanders [Fri, 15 Jul 2016 13:54:20 +0000 (13:54 +0000)]
Revert r275141 - Mips: Avoid implicit iterator conversions, NFC
It appears to have caused some failures in our buildbots.
llvm-svn: 275562
Sebastian Pop [Fri, 15 Jul 2016 13:45:20 +0000 (13:45 +0000)]
code hoisting pass based on GVN
This pass hoists duplicated computations in the program. The primary goal of
gvn-hoist is to reduce the size of functions before inline heuristics to reduce
the total cost of function inlining.
Pass written by Sebastian Pop, Aditya Kumar, Xiaoyu Hu, and Brian Rzycki.
Important algorithmic contributions by Daniel Berlin under the form of reviews.
Differential Revision: http://reviews.llvm.org/D19338
llvm-svn: 275561
Aaron Ballman [Fri, 15 Jul 2016 13:13:45 +0000 (13:13 +0000)]
Removing a few more :option: tags that we do not have corresponding .. option directives for; these are causing the sphinx bot to fail (lab.llvm.org:8011/builders/clang-sphinx-docs/builds/15214/steps/docs-clang-html/logs/stdio).
llvm-svn: 275560
Nitesh Jain [Fri, 15 Jul 2016 12:56:37 +0000 (12:56 +0000)]
[LLVM][MIPS] Fix createStubFunction to emit JR encoding based on Arch.
Reviewers: vkalintiris, dsanders
Subscribers: jaydeep, bhushan, mohit.bhakkad, slthakur, llvm-commits
Differential Revision: https://reviews.llvm.org/D21172
llvm-svn: 275559
Aaron Ballman [Fri, 15 Jul 2016 12:55:47 +0000 (12:55 +0000)]
Removing a few more :option: tags that we do not have corresponding .. option directives for; these are causing the sphinx bot to fail (lab.llvm.org:8011/builders/clang-sphinx-docs/builds/15213/steps/docs-clang-html/logs/stdio).
llvm-svn: 275558
Tobias Grosser [Fri, 15 Jul 2016 12:44:27 +0000 (12:44 +0000)]
GPGPU: Add memory reference tag ids to tagged accesses
It seems we forgot to actually add the memory access ids to the tagged accesses,
but instead just tagged the accesses with empty isl_ids. This issue was found
by inspection and without code generation it is difficult to test just by
itself. We fix it for now without test case and expect our code generation
tests to cover this later on.
llvm-svn: 275557
Kirill Bobyrev [Fri, 15 Jul 2016 12:22:38 +0000 (12:22 +0000)]
[clang-rename] fix testset
Make yet unsupported tests marked with FIXME pass so that buildbot doesn't fail.
llvm-svn: 275556
Pavel Labath [Fri, 15 Jul 2016 12:19:28 +0000 (12:19 +0000)]
Fix TestDarwinNSLogOutput for windows
pexpect python package does not exist on windows
llvm-svn: 275555
Simon Pilgrim [Fri, 15 Jul 2016 11:51:46 +0000 (11:51 +0000)]
[X86][AVX] Added shuffle tests for UNPCK+PERMUTE
lowerVectorShuffleAsPermuteAndUnpack could solve this if it worked with 256-bit vectors
llvm-svn: 275554
Tobias Grosser [Fri, 15 Jul 2016 11:42:53 +0000 (11:42 +0000)]
GPGPU: Do not check for hidden declarations
We do not have them in Polly and the code to check for them is directly
referring to pet data structures which we do not have available.
This commit avoids undefined behavior. As such issues are difficult to
reproduce, this commit comes without a test case.
llvm-svn: 275553
Simon Pilgrim [Fri, 15 Jul 2016 11:40:27 +0000 (11:40 +0000)]
[X86][AVX2] Added a memory version of test_mm256_broadcastsi128_si256
This should lower to vbroadcasti128
llvm-svn: 275552
Tobias Grosser [Fri, 15 Jul 2016 11:33:47 +0000 (11:33 +0000)]
GPGPU: Test scalar/array types i1/i3/i8/i32/i60/i64/i80/i120/i128/i3000
Arrays with integer base type are similar to arrays with floating point types,
with the exception that LLVM's integer types can take some odd values. We
add a selection of different values to make sure we correctly round these
types when necessary.
References to scalar integer types are special, as we currently do not model
these types as array accesses as they are considered 'synthesizable' by Polly.
As a result, we do not generate explicit data-transfers for them, but instead
will need to keep track of all references to 'synthesizable' values separately.
At the current stage, this is only visible by missing host-to-device
data-transfer calls. In the future, we will also require special code generation
strategies.
llvm-svn: 275551
Kirill Bobyrev [Fri, 15 Jul 2016 11:29:16 +0000 (11:29 +0000)]
[clang-rename] apply stylistic fixes
llvm-svn: 275550
Eugene Leviant [Fri, 15 Jul 2016 11:20:04 +0000 (11:20 +0000)]
[ELF] Overriding reserved symbols in linker script
llvm-svn: 275549
Tobias Grosser [Fri, 15 Jul 2016 11:12:29 +0000 (11:12 +0000)]
GPGPU: Test scalar parameters of type half/float/double/fp128/x86_fp80/ppc_fp128
We currently only test that the code structure we generate for these scalar
parameters is correct and we add these types to make sure later code generation
additions have sufficient test coverage.
In case some of these types cannot be mapped due to missing hardware support
on the GPU some of these test cases may need to be updated later on.
llvm-svn: 275548
Tobias Grosser [Fri, 15 Jul 2016 10:51:14 +0000 (10:51 +0000)]
GPGPU: Make sure scops with more than one array work
We use this opportunity to add a test case containing a scalar parameter.
llvm-svn: 275547
Tobias Grosser [Fri, 15 Jul 2016 10:32:22 +0000 (10:32 +0000)]
GPGPU: Free options to avoid memory leak
ppcg does not free the option structs for us. To avoid a memory leak we do this
ourselves.
llvm-svn: 275546
Kirill Bobyrev [Fri, 15 Jul 2016 10:21:33 +0000 (10:21 +0000)]
[clang-rename] add few tests
Thiis patch introduces few additional tests including one case the tool does not handle yet, which should be fixed in the future.
Differential Revision: https://reviews.llvm.org/D22102
llvm-svn: 275545
Pavel Labath [Fri, 15 Jul 2016 10:18:15 +0000 (10:18 +0000)]
[NPL] Simplify process launch code
Summary:
This removes one level of indirection, which was just packing and repacking launch args into
different structures. NFC.
Reviewers: tberghammer
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D22357
llvm-svn: 275544
Simon Pilgrim [Fri, 15 Jul 2016 09:49:12 +0000 (09:49 +0000)]
[X86][AVX2] Improve lowerShuffleAsRepeatedMaskAndLanePermute permutation of 64-bit sub-lanes
As discussed on PR28136, lowerShuffleAsRepeatedMaskAndLanePermute was attempting to match repeated masks at the 128-bit level and then permute the resultant lanes at the 128-bit (AVX1) or 64-bit (AVX2) sub-lane level.
This change allows us to create the repeated masks at the sub-lane level (and then concat them together to create a 128-bit repeated mask) and then select which sub-lane to permute. This has no effect on the AVX1 codegen.
Fixes PR28136.
llvm-svn: 275543
Haojian Wu [Fri, 15 Jul 2016 08:12:48 +0000 (08:12 +0000)]
[include-fixer] Always add as few as possible qualifiers to the unidentified symbol.
Reviewers: bkramer
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D22367
llvm-svn: 275542
James Molloy [Fri, 15 Jul 2016 08:12:44 +0000 (08:12 +0000)]
[ARM] Fix build after r275540
A rebase seemed so innocent before committing. Turns out someone changed a pointer to a reference in the mean time :(
llvm-svn: 275541
James Molloy [Fri, 15 Jul 2016 08:03:56 +0000 (08:03 +0000)]
[Thumb-1] Select post-increment load and store where possible
Thumb-1 doesn't have post-inc or pre-inc load or store instructions. However the LDM/STM instructions with writeback can function as post-inc load/store:
ldm r0!, {r1} @ load from r0 into r1 and increment r0 by 4
Obviously, this only works if the post increment is 4.
llvm-svn: 275540
Maxim Ostapenko [Fri, 15 Jul 2016 07:57:43 +0000 (07:57 +0000)]
[asan] Reduce flakiness of halt_on_error-torture.cc testcase.
It seems in some situations we have clashes on very first error so test only prints "nested bug in the same thread, aborting" rather than "use-after-poison", so remove corresponding " RUN: FileCheck %s < 10.txt" line.
Also, the two last " RUN: FileCheck --check-prefix=CHECK-COLLISION %s < 1.txt || FileCheck --check-prefix=CHECK-NO-COLLISION %s < 1.txt" look wrong, they should check 10.txt. Fix these lines too.
Differential Revision: https://reviews.llvm.org/D22309
llvm-svn: 275539
James Molloy [Fri, 15 Jul 2016 07:57:35 +0000 (07:57 +0000)]
[ARM] Followup to r275537 addressing review comments
Address Chad's comment in D22216 which I missed due to tunnel vision on the "LGTM" comment.
llvm-svn: 275538
James Molloy [Fri, 15 Jul 2016 07:55:21 +0000 (07:55 +0000)]
[ARM] Prefer indirect calls in minsize mode
... When we emit several calls to the same function in the same basic block.
An indirect call uses a "BLX r0" instruction which has a 16-bit encoding. If many calls are made to the same target, this can enable significant code size reductions.
llvm-svn: 275537
Tobias Grosser [Fri, 15 Jul 2016 07:50:36 +0000 (07:50 +0000)]
GPGPU: Shorten ppcg include paths to avoid conflict with cuda.h
Instead of directly linking to ppcg's main source directory, we link to the
parent director. This allows us to access ppcg's include files with
'ppcg/cuda.h' and avoids a conflict with NVIDIA's cuda.h header.
Also drop an include directory that is currently not used.
llvm-svn: 275536
Tobias Grosser [Fri, 15 Jul 2016 07:05:54 +0000 (07:05 +0000)]
GPGPU: Model array access information
This allows us to derive host-device and device-host data-transfers.
llvm-svn: 275535
Tobias Grosser [Fri, 15 Jul 2016 07:05:49 +0000 (07:05 +0000)]
GPGPU: Use CHECK-NEXT to harden test cases
A sequence of CHECK lines allows additional statements to appear in the
output of the tested program without any test failures appearing. As we do
not want this to happen, switch this test case to use CHECK-NEXT.
llvm-svn: 275534
David Majnemer [Fri, 15 Jul 2016 05:37:22 +0000 (05:37 +0000)]
XFAIL two SeparateConstOffsetFromGEP tests
They appear to have relied on bugs hidden in copyIRFlags/andIRFlags.
This has been filed as PR28564.
llvm-svn: 275533
David Majnemer [Fri, 15 Jul 2016 05:02:31 +0000 (05:02 +0000)]
[IR] andIRFlags and copyIRFlags needs to handle GEP
We didn't consider the inbounds flag on GEPs leading to downstream users
introducing UB.
This fixes PR28562.
llvm-svn: 275532
Rui Ueyama [Fri, 15 Jul 2016 04:57:46 +0000 (04:57 +0000)]
Inline traceUndefined function.
llvm-svn: 275531
Rui Ueyama [Fri, 15 Jul 2016 04:57:44 +0000 (04:57 +0000)]
Update comments.
llvm-svn: 275530
Kelvin Li [Fri, 15 Jul 2016 04:39:07 +0000 (04:39 +0000)]
[OpenMP] add check for both simdlen and safelen clauses specified
This patch adds the check for specifying both simdlen and safelen clauses on the 'distribute simd' or 'distribute parallel for simd' constructs.
Differential Revision: https://reviews.llvm.org/D22384
llvm-svn: 275529
Rui Ueyama [Fri, 15 Jul 2016 04:32:11 +0000 (04:32 +0000)]
Remove redundant `return`.
llvm-svn: 275528
Rui Ueyama [Fri, 15 Jul 2016 04:19:37 +0000 (04:19 +0000)]
Merge SymbolAssignmentKind and ExprKind.
In a linker script, `.` is a special symbol indicating a counter.
Previously, we had two expression types, ExprKind and SymbolAssignmentKind
for `.` and all the other symbol names, respectively. But we could merge
them because the former is a special case of the latter.
llvm-svn: 275527
Rui Ueyama [Fri, 15 Jul 2016 03:06:42 +0000 (03:06 +0000)]
ELF: Remove member variables that are used only in one function.
Differential Revision: https://reviews.llvm.org/D22396
llvm-svn: 275526
Rui Ueyama [Fri, 15 Jul 2016 02:51:05 +0000 (02:51 +0000)]
Avoid writing to errs().
We should write to ErrorOS instead. Normaly, *ErrorOS == errs(),
but they can be different if LLD is embedded.
llvm-svn: 275525
Rui Ueyama [Fri, 15 Jul 2016 02:42:18 +0000 (02:42 +0000)]
Inline a vairable that is used only once. NFC.
llvm-svn: 275524
Rui Ueyama [Fri, 15 Jul 2016 02:17:13 +0000 (02:17 +0000)]
ELF: Simplify path constructions for -save-temps. NFC.
llvm-svn: 275523
Vedant Kumar [Fri, 15 Jul 2016 02:11:37 +0000 (02:11 +0000)]
[llvm-cov] Relax a test for Windows
Attempt to address this bot failure:
http://bb.pgr.jp/builders/ninja-clang-i686-msc19-R/builds/4967
llvm-svn: 275522