Beniamino Galvani [Sun, 8 May 2016 06:30:17 +0000 (08:30 +0200)]
arm: meson: implement calls to secure monitor
Implement calls to secure monitor to read the MAC address from e-fuse.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Beniamino Galvani [Sun, 8 May 2016 06:30:16 +0000 (08:30 +0200)]
arm: add initial support for Amlogic Meson and ODROID-C2
This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].
[1] https://patchwork.ozlabs.org/patch/603583/
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Beniamino Galvani [Sun, 8 May 2016 06:30:15 +0000 (08:30 +0200)]
net: designware: fix descriptor layout and warnings on 64-bit archs
All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Use phys_addr_t not unsigned long long to test that we're within
DMA'able memory]
Signed-off-by: Tom Rini <trini@konsulko.com>
Beniamino Galvani [Sun, 8 May 2016 06:30:14 +0000 (08:30 +0200)]
arm: implement generic PSCI reset call for armv8
Add a psci_system_reset() which calls the SYSTEM_RESET function of
PSCI 0.2 and can be used by boards that support it to implement
reset_cpu().
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Fri, 6 May 2016 19:01:07 +0000 (21:01 +0200)]
distro: Add efi pxe boot code
Now that we can expose network functionality to EFI applications,
the logical next step is to load them via pxe to execute them as
well.
This patch adds the necessary bits to the distro script to automatically
load and execute EFI payloads. It identifies the dhcp client as a uEFI
capable PXE client, hoping the server returns a tftp path to a workable
EFI binary that we can then execute.
To enable boards that don't come with a working device tree preloaded,
this patch also adds support to load a device tree from the /dtb directory
on the remote tftp server.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Alexander Graf [Fri, 6 May 2016 19:01:05 +0000 (21:01 +0200)]
net: Move CONFIG_SPL_NET_VCI_STRING into Kconfig
This patch also adds the SPL time VCI string into Kconfig.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Alexander Graf [Fri, 6 May 2016 19:01:04 +0000 (21:01 +0200)]
net: Fix client identifiers for ARM
There are client identifiers specifically reserved for ARM U-Boot
according to http://www.ietf.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml#processor-architecture.
So let's actually make use of them rather than the bogus 0x100 that
we emitted so far.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Drop the Xilinx define to 0x100 as it's not the correct value to
use].
Signed-off-by: Tom Rini <trini@konsulko.com>
Alexander Graf [Fri, 6 May 2016 19:01:03 +0000 (21:01 +0200)]
net: Move the VCI and client arch values to Kconfig
We have a bunch of boards that define their vendor class identifier and
client archs in the board files or in the distro config. Move everything
to the generic Kconfig options.
We're missing the distinction between i386 and x86_64, as I couldn't find
any config variable that would tell us the difference. Is that really important
to people? I guess not, so I left it out.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Alexander Graf [Fri, 6 May 2016 19:01:02 +0000 (21:01 +0200)]
bootp: Move vendor class identifier set to function
Both the dhcp as well as the bootp case add vendor class identifier
parameters into their packets. Let's move that into a separate function
to make overlaying easier.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Alexander Graf [Fri, 6 May 2016 19:01:01 +0000 (21:01 +0200)]
efi_loader: Add network access support
We can now successfully boot EFI applications from disk, but users
may want to also run them from a PXE setup.
This patch implements rudimentary network support, allowing a payload
to send and receive network packets.
With this patch, I was able to successfully run grub2 with network
access inside of QEMU's -M xlnx-ep108.
Signed-off-by: Alexander Graf <agraf@suse.de>
Heiko Schocher [Fri, 6 May 2016 05:33:51 +0000 (07:33 +0200)]
test/py: fix NameError exception if bdi cmd is not supported
test/py raises an error, if a board has not enabled bdi command
> pytest.skip('bdinfo command not supported')
E NameError: global name 'pytest' is not defined
import pytest in test/py/u_boot_utils.py fixes this.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Kunihiko Hayashi [Wed, 4 May 2016 05:20:04 +0000 (14:20 +0900)]
cmd: replace the cast of the memory access to a fixed bit type in itest
This patch fixes a bug that long word(.l) memory access in 'itest'
command reads the 8bytes of the actual memory on 64-bit architecture.
The cast to the memory pointer should use a fixed bit type.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Mon, 2 May 2016 12:43:33 +0000 (14:43 +0200)]
disk: part_efi: fix check of the max partition size
the last value acceptable value for offset is last_usable_lba + 1
and not last_usable_lba - 1
issue found with SDCARD partition commands on u-boot 2015.10
but this part of code don't change
1- create GPT partion on all the card
> gpt write mmc 0 name=test,start=0,size=0
> part list mmc 0
Partition Map for MMC device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000022 0x003a9fde "test"
attrs: 0x0000000000000000
type:
ebd0a0a2-b9e5-4433-87c0-
68b6b72699c7
type: data
guid:
b710eb04-45b9-e94a-8d0b-
21458d596f54
=> Start = 0x22*512 = 0x4400
=> Size = (0x003a9fde-0x22+1) * 512 = 0x753F7A00
2- try to recreate the same partition with the next command
(block size:512 bytes = 0x200)
> gpt write mmc 0 name=test,start=0x4400,size=0x753F7A00
Writing GPT: Partitions layout exceds disk size
> gpt write mmc 0 name=test,start=0x4400,size=0x753F7800
Writing GPT: Partitions layout exceds disk size
> gpt write mmc 0 name=test,start=0x4400,size=0x753F7600
Writing GPT: success!
Partition Map for MMC device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000022 0x003a9fdc "test"
attrs: 0x0000000000000000
type:
ebd0a0a2-b9e5-4433-87c0-
68b6b72699c7
type: data
guid:
36ec30ef-7ca4-cd48-97cd-
ea9fb95185d0
the max LBA when the size is indicated (0x003a9fdc) is lower than
when u-boot compute the max allowed value with size=0 (0x003a9fde)
in the code :
/* partition ending lba */
if ((i == parts - 1) && (partitions[i].size == 0))
/* extend the last partition to maximuim */
gpt_e[i].ending_lba = gpt_h->last_usable_lba;
else
gpt_e[i].ending_lba = cpu_to_le64(offset - 1);
so offset = gpt_h->last_usable_lba + 1 is acceptable !
but the test (offset >= last_usable_lba) cause the error
END
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>disk: part_efi: fix check of the max partition size
the last value acceptable value for offset is (last_usable_lba + 1)
and not (last_usable_lba - 1)
issue found with SDCARD partition commands on u-boot 2015.10
but this part of code don't change
1- I create GPT partion on all the card (start and size undefined)
> gpt write mmc 0 name=test,start=0,size=0
> part list mmc 0
Partition Map for MMC device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000022 0x003a9fde "test"
attrs: 0x0000000000000000
type:
ebd0a0a2-b9e5-4433-87c0-
68b6b72699c7
type: data
guid:
b710eb04-45b9-e94a-8d0b-
21458d596f54
=> Start = 0x22*512 = 0x4400
=> Size = (0x003a9fde-0x22+1) * 512 = 0x753F7A00
2- I try to recreate the same partition with the command gpt write
and with start and size values (block size:512 bytes = 0x200)
> gpt write mmc 0 name=test,start=0x4400,size=0x753F7A00
Writing GPT: Partitions layout exceds disk size
> gpt write mmc 0 name=test,start=0x4400,size=0x753F7800
Writing GPT: Partitions layout exceds disk size
> gpt write mmc 0 name=test,start=0x4400,size=0x753F7600
Writing GPT: success!
I check the partition created :
> part list mmc 0
Partition Map for MMC device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000022 0x003a9fdc "test"
attrs: 0x0000000000000000
type:
ebd0a0a2-b9e5-4433-87c0-
68b6b72699c7
type: data
guid:
36ec30ef-7ca4-cd48-97cd-
ea9fb95185d0
=> but the max LBA when the size is indicated (0x003a9fdc) is lower than
when u-boot compute the max allowed value with size=0 (0x003a9fde)
3- in the code, just after my patch, line 446
/* partition ending lba */
if ((i == parts - 1) && (partitions[i].size == 0))
/* extend the last partition to maximuim */
gpt_e[i].ending_lba = gpt_h->last_usable_lba;
else
gpt_e[i].ending_lba = cpu_to_le64(offset - 1);
so offset = gpt_h->last_usable_lba + 1 is acceptable !
(it the value used when size is 0)
but today the test (offset >= last_usable_lba) cause the error
my patch only solve this issue
END
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Marek Vasut [Sat, 30 Apr 2016 22:35:54 +0000 (00:35 +0200)]
cmd: disk: Fix unused variable warning
If serial support is not compiled into U-Boot, which may be the case
for some SPL builds, the following warning will be generated in disk.c:
cmd/disk.c: In function 'common_diskboot':
cmd/disk.c:16:6: warning: variable 'dev' set but not used [-Wunused-but-set-variable]
int dev, part;
^
The warning is a result of printf() calls being optimized away, and
thus the whole dev variable becomes indeed unused. Mark the variable
as __maybe_unused .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Michal Simek [Thu, 28 Apr 2016 08:36:11 +0000 (10:36 +0200)]
SPL: FIT: Align loading address for header
If bl_len is not aligned it can caused a problem because another code
expects that start is aligned.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
mario.six@gdsys.cc [Mon, 25 Apr 2016 13:25:37 +0000 (15:25 +0200)]
dm: gpio: pca953x: Support PCA953X with 40 GPIOs
A DM driver for PCA953x was recently introduced by Peng Fan, which lacked
support for the 40 GPIO versions.
This patch adds support for these chips.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andreas Fenkart [Tue, 19 Apr 2016 20:43:42 +0000 (22:43 +0200)]
tools/env: compute size of usable area only once
for double buffering to work, redundant buffers must have equal size
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
Andreas Fenkart [Tue, 19 Apr 2016 20:43:41 +0000 (22:43 +0200)]
tools/env: fw_printenv pass value_only as argument
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
Andreas Fenkart [Tue, 19 Apr 2016 20:43:40 +0000 (22:43 +0200)]
tools/env: remove 'extern' from function prototype in fw_env.h
checkpatch complains about in succeding patch. Prefer to fix all
declarations in a dedicated patch.
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
Andreas Fenkart [Tue, 19 Apr 2016 20:43:39 +0000 (22:43 +0200)]
tools/env: pass key as argument to env_aes_cbc_crypt
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
Tom Rini [Thu, 26 May 2016 00:22:48 +0000 (20:22 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Wills Wang [Sun, 22 May 2016 03:59:49 +0000 (11:59 +0800)]
mips: ath79: ar933x: Avoid warning with gcc5
GCC 5.3 report a warning: 'upper' and 'lower' may be used
uninitialized in this function [-Wmaybe-uninitialized].
Compiler might need explicit initializer.
Signed-off-by: Wills Wang <wills.wang@live.com>
Wills Wang [Sun, 22 May 2016 03:59:50 +0000 (11:59 +0800)]
mips: ath79: ar933x: Fix ethernet PHY mismatch
We need reset the Ethernet Switch analog part before operation,
or the build-in Ethernet PHY don't work.
Signed-off-by: Wills Wang <wills.wang@live.com>
Acked-by: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 25 May 2016 00:17:07 +0000 (02:17 +0200)]
mips: Drop JZ4740 remnants
Remove the remnants of JZ4740 support.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Marek Vasut [Wed, 25 May 2016 00:17:42 +0000 (02:17 +0200)]
mips: Allow overriding start.S in SPL
Certain chips, like the JZ47xx, have extreme size constraints on the
SPL size and require custom start.S . Allow overriding the start.S
the same way ARM MXS does it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Tue, 17 May 2016 10:56:39 +0000 (11:56 +0100)]
MIPS: Move CONFIG_SYS_TEXT_BASE to Kconfig
Move CONFIG_SYS_TEXT_BASE to Kconfig, and add default values in board
Kconfig files matching what was present in their config headers. This
will make it cleaner to conditionalise the value for Malta based on 32
vs 64 bit builds.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Tue, 17 May 2016 06:43:28 +0000 (07:43 +0100)]
malta: Use device model & tree for UART
Make use of device model & device tree to probe the UART driver. This is
the initial step in bringing Malta up to date with driver model, and
allows for cleaner handling of the different I/O addresses for different
system controllers by specifying the ISA bus address instead of a
translated memory address.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Paul Burton [Tue, 17 May 2016 06:43:27 +0000 (07:43 +0100)]
malta: Tidy up UART address selection
The address of the UART differs based upon the system controller because
it's actually within the I/O port region, which is in a different
location for each system controller. Rather than handling this as 2
UARTs with the correct one selected at runtime, use I/O port accessors
for the UART such that access to it gets translated into the I/O port
region automatically.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Paul Burton [Tue, 17 May 2016 06:43:26 +0000 (07:43 +0100)]
dm: ns16550: Don't map_physmem for I/O ports
If the UART is to be accessed using I/O port accessors (inb & outb) then
using map_physmem doesn't make sense, since it operates in a different
memory space. Remove the call to map_physmem when
CONFIG_SYS_NS16550_PORT_MAPPED is defined, allowing I/O port addresses
to not be mangled by the incorrect mapping.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Paul Burton [Tue, 17 May 2016 06:43:25 +0000 (07:43 +0100)]
fdt: Document the rest of struct of_bus
Provide some documentation for the fields of struct of_bus, for
consistency with that provided for the new match field.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Paul Burton [Tue, 17 May 2016 06:43:24 +0000 (07:43 +0100)]
fdt: Support for ISA busses
Support ISA busses in much the same way as Linux does. This allows for
ISA bus addresses to be translated, and only if CONFIG_OF_ISA_BUS is
selected in order to avoid including the code in builds which won't need
it.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Wed, 25 May 2016 08:48:14 +0000 (09:48 +0100)]
arm64: fix arm64 Linux boot image header field sizes
The arm64 Linux boot protocol [1] describes the fields in the Image
header as being 64-bit little endian values.
So fix the endianess conversion to use 64-bit sized operations, for
both image_size and text_offset.
Also we use a local variable for the image_size to avoid both writing
to the header and also accessing it after we actually unmapped it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[1] https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/arm64/booting.txt
Tom Rini [Wed, 25 May 2016 16:32:56 +0000 (12:32 -0400)]
Merge branch 'master' of git.denx.de/u-boot-sunxi
Tom Rini [Wed, 25 May 2016 16:27:44 +0000 (12:27 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Stefan Mavrodiev [Mon, 23 May 2016 06:49:47 +0000 (09:49 +0300)]
sunxi: Olimex A20 boards: Enable LDO3 and LDO4 regulators
Sets LDO3 and LDO4 regulators at 2.8V. In the current config
these are off. This causes kernel to hang during
axp209 initialization.
Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Sun, 15 May 2016 11:51:58 +0000 (13:51 +0200)]
sunxi: Enable a bunch of commands by default on sunxi
Recently a set of CONFIG_CMD_FOO defines was moved from being defined
in config_distro_defaults to Kconfig, and added to all sunxi defconfigs
to compensate.
Instead of explictly selecting these in all sunxi defconfigs,
simply always select these for sunxi boards. This makes the defconfigs
simpler and ensures a consistent set of available commands across all
sunxi boards.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Andre Przywara [Wed, 4 May 2016 21:15:33 +0000 (22:15 +0100)]
arm64: Pine64: update FDT files
The originally committed .dts files for the Pine64 were from an early
proof-of-concept version and should have never been committed upstream.
Replace them with much more mature versions, which also use a different
naming scheme.
Please note that at this point there is at least one binding which has
not been agreed upon, so this is subject to change.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Andre Przywara [Wed, 4 May 2016 21:15:32 +0000 (22:15 +0100)]
arm64: sunxi: adjust default load addresses
As arm64 has slightly different expectations about load addresses, lets
use a different set of default addresses for things like the kernel.
As arm64 kernels don't come with a decompressor right now, reserve some
more space for really big uncompressed kernels.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Andre Przywara [Wed, 4 May 2016 21:15:30 +0000 (22:15 +0100)]
Revert "sunxi: Reserve ATF memory space on A64"
The ARM Trusted Firmware (ATF) code now lives in SRAM on the Pine64/A64,
so we can claim the whole of DRAM for OS use.
This reverts commit
3ffe39ed2b66af71c7271d0cef2a248b5bf7dfdb.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Bernhard Nortmann [Sun, 3 Apr 2016 11:58:00 +0000 (13:58 +0200)]
sunxi: Properly announce BOOT_DEVICE_BOARD as "FEL"
This addresses a cosmetic issue when booting a sunxi device
over USB (FEL mode), where the SPL currently would just print
"Trying to boot from ". The patch fixes that to properly read
"Trying to boot from FEL".
Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Siarhei Siamashka [Sat, 14 May 2016 01:13:26 +0000 (04:13 +0300)]
sunxi: Increase SPL header size to 64 bytes to avoid code corruption
The current SPL header, created by the 'mksunxiboot' tool, has size
32 bytes. But the code in the boot ROM stores the information about
the boot media at the offset 0x28 before passing control to the SPL.
For example, when booting from the SD card, the magic number written
by the boot ROM is 0. And when booting from the SPI flash, the magic
number is 3. NAND and eMMC probably have their own special magic
numbers too.
Currently the corrupted byte is a part of one of the instructions in
the reset vectors table:
b reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt <- Corruption happens here
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq
In practice this does not cause any visible problems, but it's still
better to fix it. As a bonus, the reported boot media type can be
later used in the 'spl_boot_device' function, but this is out of
the scope of this patch.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Mon, 2 May 2016 02:28:15 +0000 (10:28 +0800)]
sunxi: power: add AXP809 support
The A80 uses the AXP809 as its primary PMIC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Mon, 2 May 2016 02:28:14 +0000 (10:28 +0800)]
sunxi: Implement poweroff support for axp818 pmic
Adds poweroff support for axp818 pmic.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Mon, 2 May 2016 02:28:13 +0000 (10:28 +0800)]
sunxi: Enable AXP818 SW for Sinovoip BPI M3
The SW output of the PMIC supplies the ethernet PHY with power.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Mon, 2 May 2016 02:28:12 +0000 (10:28 +0800)]
sunxi: power: axp818: Add support for switch SW
The AXP818 has a switchable output, SW. This is commonly used for
controlling power to the LCD backlight.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Mon, 2 May 2016 02:28:11 +0000 (10:28 +0800)]
power: axp818: Fix typo for fldo2 Kconfig description
Description said eldo2 instead of fldo2, a copy-paste error.
Fixes:
38491d9c6515 ("power: axp818: Add support for FLDOs")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Mon, 2 May 2016 02:28:10 +0000 (10:28 +0800)]
power: axp221: Remove switch case to simplify axp_set_eldo
The ELDO enable bits and registers are contiguous for axp221. Instead
of a switch case testing against the index, just use the index to shift
the bit or register offset.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Mon, 2 May 2016 02:28:09 +0000 (10:28 +0800)]
sunxi: Disable VIDEO for SoCs without display support
The newer chips use a newer display pipeline, which is not supported.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Mon, 2 May 2016 02:28:08 +0000 (10:28 +0800)]
sunxi: Add default MMC0 card detect pin for A83T, H3 and A64 SoCs
A83T, H3, and A64 have a dedicated pin for card detect on the PF
pingroup. This is used in all designs. Set it as the default.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Mon, 2 May 2016 02:28:07 +0000 (10:28 +0800)]
sunxi: Sort SoC variants by family (sunXi) first, chip name second
In most other places, we sort SoC descriptions by family (sunXi) first,
then by the chip name (A20).
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Mon, 2 May 2016 02:28:06 +0000 (10:28 +0800)]
sunxi: make SoC variant choice mandatory
The user should always select an SoC variant to support. Not choosing
one doesn't make sense for a bootloader.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Masahiro Yamada [Tue, 24 May 2016 12:14:03 +0000 (21:14 +0900)]
ARM: uniphier: add EHCI nodes for PH1-LD11
Make the USB feature really available.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 24 May 2016 12:14:02 +0000 (21:14 +0900)]
clk: uniphier: add Media I/O clock driver support for PH1-LD11
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 24 May 2016 12:14:01 +0000 (21:14 +0900)]
ARM: uniphier: add PH1-LD11 SoC support
This is a low-cost ARMv8 SoC from Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 24 May 2016 12:14:00 +0000 (21:14 +0900)]
ARM: uniphier: rename UMC register macros of PH1-LD20
Correct some register names.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 24 May 2016 12:13:59 +0000 (21:13 +0900)]
ARM: uniphier: rename umc-ld20-regs.h to umc64-regs.h
This header will be shared between PH1-LD11 and PH1-LD20
(and hopefully new ARMv8 SoCs developed in the future),
so umc64-regs.h would be a better fit.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 24 May 2016 12:13:58 +0000 (21:13 +0900)]
ARM: uniphier: clean up boot mode tables
Tidy up alignment of open parentheses.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 24 May 2016 12:13:57 +0000 (21:13 +0900)]
ARM: uniphier: disable cache in SPL of PH1-LD20
The Boot ROM has enabled D-cache and MMU setting DDR memory area
as Normal Memory in its page table. Disable D-cache and MMU
before jumping to U-Boot proper.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Wed, 25 May 2016 11:19:31 +0000 (07:19 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Ying Zhang [Mon, 18 Apr 2016 09:04:16 +0000 (17:04 +0800)]
powerpc:t4240: MAC9 and MAC10 should not be identified as 1G interface in some case
When using rcw protocols to support 10G on MAC9 and MAC10, these MACs
should not be identified as 1G interface, otherwise, one MAC will be
listed as two Ethernet ports. For example, MAC9 will be listed as
FM1@TGEC1 and FM1@DTSEC9.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ying Zhang [Thu, 21 Apr 2016 06:23:46 +0000 (14:23 +0800)]
powerpc:t4240rdb: Disable the non-existent ethernet ports on T4240RDB
Disable the non-existent ethernet ports on T4240RDB:FM1_DTSEC5,
FM1_DTSEC6, FM2_DTSEC5 and FM2_DTSEC6.
Signed-off-by: Ying Zhang <ying.zhang22455@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Tue, 24 May 2016 17:42:03 +0000 (13:42 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Aneesh Bansal [Mon, 18 Apr 2016 17:28:33 +0000 (22:58 +0530)]
powerpc/mpc85xx: set L2PE in L2CSR0 before enabling L2 cache
While enabling L2 cache, the value of L2PE (L2 cache parity/ECC
error checking enable) must not be changed while the L2 cache is
enabled.
So, L2PE must be set before enabling L2 cache.
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Tue, 24 May 2016 15:59:02 +0000 (11:59 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
drivers/net/zynq_gem.c
Dan Murphy [Mon, 2 May 2016 20:46:02 +0000 (15:46 -0500)]
net: phy: dp83867: Add SGMII helper for configuration
The code assumed that if the interface is not RGMII configured
then it must be SGMII configured. This device has the ability
to support most of the MII interfaces. Therefore add the
helper for SGMII and only configure the device if the interface is
configured for SGMII.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Dan Murphy [Mon, 2 May 2016 20:46:01 +0000 (15:46 -0500)]
net: phy: Add phy_interface_is_sgmii to phy.h
Add a helper to phy.h to identify whether the
phy is configured for SGMII all variables.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Dan Murphy [Mon, 2 May 2016 20:46:00 +0000 (15:46 -0500)]
net: phy: Move is_rgmii helper to phy.h
Move the phy_interface_is_rgmii to the phy.h
file for all phy's to be able to use the API.
This now aligns with the Linux kernel based on
commit
e463d88c36d42211aa72ed76d32fb8bf37820ef1
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Dan Murphy [Mon, 2 May 2016 20:45:59 +0000 (15:45 -0500)]
net: phy: ti: Allow the driver to be more configurable
Not all devices use the same internal delay or fifo depth.
Add the ability to set the internal delay for rx or tx and the
fifo depth via the devicetree. If the value is not set in the
devicetree then set the delay to the default.
If devicetree is not used then use the default defines within the
driver.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Dan Murphy [Mon, 2 May 2016 20:45:58 +0000 (15:45 -0500)]
net: phy: dp83867: Add device tree bindings and documentation
Add the device tree bindings and the accompanying documentation
for the TI DP83867 Giga bit ethernet phy driver.
The original document was from:
[commit
2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Dan Murphy [Mon, 2 May 2016 20:45:57 +0000 (15:45 -0500)]
net: zynq_gem: Add the passing of the phy-handle node
Add the ability to pass the phy-handle node offset
to the phy driver. This allows the phy driver
to access the DT subnode's data and parse accordingly.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Dan Murphy [Mon, 2 May 2016 20:45:56 +0000 (15:45 -0500)]
drivers: net: cpsw: Add reading of DT phy-handle node
Add the ability to read the phy-handle node of the
cpsw slave. Upon reading this handle the phy-id
can be stored based on the reg node in the DT.
The phy-handle also needs to be stored and passed
to the phy to access any phy data that is available.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:13 +0000 (15:36 +0530)]
defconfig: dra74_evm: enable eth driver model
Enable eth driver model for dra74_evm as cpsw supports
driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:12 +0000 (15:36 +0530)]
defconfig: am437x_sk_evm: enable eth driver model
Enable eth driver model for am437x_sk_evm as cpsw supports
driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:11 +0000 (15:36 +0530)]
defconfig: am437x_gp_evm: enable eth driver model
Enable eth driver model for am437x_gp_evm as cpsw supports
driver model.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:10 +0000 (15:36 +0530)]
arm: dts: dra7: fix ethernet name with proper device address
Fix typo error for cpsw device name with proper device address
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:09 +0000 (15:36 +0530)]
arm: dts: dra7: add syscon node to cpsw to read mac address
Add syscon node to cpsw device node to read mac address
from efuse.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:08 +0000 (15:36 +0530)]
arm: dts: am4372: add syscon node to cpsw to read mac address
Add syscon node to cpsw device node to read mac address
from efuse.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:07 +0000 (15:36 +0530)]
drivers: net: cpsw: add support for reading mac address from efuse
Different TI platforms has to read with different combination to
get the mac address from efuse. So add support to read mac address
based on machine/device compatibles.
The code is taken from Linux drivers/net/ethernet/ti/cpsw-common.c
done by Tony Lindgren.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:06 +0000 (15:36 +0530)]
drivers: net: cpsw: fix get mdio base and gmii_sel reg from DT
Since dra7x platforms address bus is define as 64 bits to support
LAPE, fdtdec_get_addr() returns a invalid address for mdio based
and gmii_sel register address. Fixing this by using
fdtdec_get_addr_size_auto_noparent() which will derive address
cell and size cell from its parent.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:05 +0000 (15:36 +0530)]
ARM: omap5: add platform specific ethernet phy modes configurations
Add platforms specific phy mode configuration bits to be used
to configure phy mode in control module.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:04 +0000 (15:36 +0530)]
drivers: net: cpsw: fix cpsw dp parse when num slaves as 1
On some boards number of slaves can be 1 when only one port
ethernet is pinned out. So do not break when slave_index and
num slaves check fails, instead continue to parse the next
child.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:03 +0000 (15:36 +0530)]
ti_omap5_common: eth: do not define DM_ETH for spl
Since omap's spl doesn't support DM currently, do not define
DM_ETH for spl build.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Mugunthan V N [Thu, 28 Apr 2016 10:06:02 +0000 (15:36 +0530)]
drivers: core: device: add support to check dt compatible for a device/machine
Provide an api to check whether the given device or machine is
compatible with the given compat string which helps in making
decisions in drivers based on device or machine compatible.
Idea taken from Linux.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Kevin Smith [Thu, 31 Mar 2016 19:33:12 +0000 (19:33 +0000)]
net: phy: Add PHY driver for mv88e61xx switches
The previous mv88e61xx driver was a driver for configuring the
switch, but did not integrate with the PHY/networking system, so
it could not be used as a PHY by U-boot. This is a complete
rework to support this device as a PHY.
Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Kevin Smith [Thu, 31 Mar 2016 19:33:12 +0000 (19:33 +0000)]
net: Remove unused mv88e61xx switch driver
No boards are using this driver. Remove in preparation for a new
driver with integrated PHY support.
Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Tom Rini [Tue, 24 May 2016 12:20:43 +0000 (08:20 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-microblaze
Tom Rini [Tue, 24 May 2016 11:22:55 +0000 (07:22 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-atmel
Michal Simek [Fri, 20 May 2016 12:59:33 +0000 (14:59 +0200)]
ARM: zynq: Simplify zynq configuration
Extending Kconfig for adding new platform is a lot of work
for nothing. Setting SYS_CONFIG_NAME directly in Kconfig and
remove all dependencies on TARGET_ZYNQ_* options including SPL.
As a side-effect it also remove custom init folder for ps7_init_gpl.*
files. Folder is chosen based on device-tree file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 18 May 2016 12:46:28 +0000 (14:46 +0200)]
phy: marvell: Do not reset phy after negotiation
The patch
"net: phy: do not read configuration register on reset"
(sha1:
a058052c358c3ecf5f394ff37def6a45eb26768c)
was causing regression on zynq zc702 board where Marwell 88e1118
phy was resetted after negotiation was setup.
Phy reset is done pretty early in phy_connect_dev() and doens't need to
be called again in phy code.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 18 May 2016 12:37:23 +0000 (14:37 +0200)]
phy: Wire return value from phy_config()
Fix zynq_gem driver to handle error from phy_config correctly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 17 May 2016 12:03:50 +0000 (14:03 +0200)]
image: Add boot_get_fpga() to load fpga with bootm
Add function boot_get_fpga() which find and load bitstream to
programmable logic if fpga entry is present.
Function is supported on Xilinx devices for full and partial bitstreams
in BIN and BIT format.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Remove additional blankline in image.h
Michal Simek [Wed, 18 May 2016 10:46:12 +0000 (12:46 +0200)]
net: phy: Handle phy_startup() error codes properly
Propagate error code from genphy_update_link() to phy startup().
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Michal Simek [Wed, 18 May 2016 10:48:57 +0000 (12:48 +0200)]
phy: Return correct error code when timeout happens
Return -ETIMEDOUT if timeout happens.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Michal Simek [Wed, 18 May 2016 10:37:22 +0000 (12:37 +0200)]
net: xilinx: Handle error value from phy_startup()
Handle error returned by phy_startup() properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Michal Simek [Tue, 17 May 2016 11:58:44 +0000 (13:58 +0200)]
mkimage: Report information about fpga
Add FIT_FPGA_PROP that user can identify an optional
entry for fpga.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Tue, 17 May 2016 12:32:00 +0000 (14:32 +0200)]
fpga: Fix typo in function comment
Trivial patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 17 May 2016 11:33:11 +0000 (13:33 +0200)]
ARM64: zynqmp: Enable CLK framework
ZynqMP is using fixed clocks now that's why enabling it to be available
for drivers.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 20 Nov 2015 12:17:22 +0000 (13:17 +0100)]
ARM64: zynqmp: Add SPL support support
Support RAM and MMC boot mode in SPL also with SPL_FIT images.
In MMC boot mode two boot options are available:
1) Boot flow with ATF(EL3) and full U-Boot(EL2):
aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin
mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000
-d bl31.bin atf.ub
cp spl/boot.bin <sdcard fat partition>
cp atf.ub <sdcard fat partition>
cp u-boot.bin <sdcard fat partition>
2) Boot flow with full U-Boot(EL3):
cp spl/boot.bin <sdcard>
cp u-boot*.img <sdcard>
3) emmc boot mode
dd if=/dev/zero of=sd.img bs=1024 count=1024
parted sd.img mktable msdos
parted sd.img mkpart p fat32 0% 100%
kpartx -a sd.img
mkfs.vfat /dev/mapper/loop0p1
mount /dev/mapper/loop0p1 /mnt/
cp spl/boot.bin /mnt
cp u-boot.img /mnt
cp u-boot.bin /mnt
cp atf.ub /mnt
umount /dev/mapper/loop0p1
kpartx -d sd.img
cp sd.img /tftpboot/
and program it via u-boot
tftpb 10000 sd.img
mmcinfo
mmc write 10000 0 $filesize
mmc rescan
mmc part
ls mmc 0
psu_init() function contains low level SoC setup generated for every HW
design by Xilinx design tools. xil_io.h is only supporting file to fix
all dependencies from tools. The same solution was used on Xilinx Zynq.
The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which
stays at the same location all the time.
Bootrom expects starting address to be at 0xfffc0000 that's why this
address is SPL_TEXT_BASE.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 22 Feb 2016 08:57:27 +0000 (09:57 +0100)]
ARM64: zynqmp: Add missing u-boot,dm-pre-reloc to DTSI
Add missing u-boot,dm-pre-reloc to get IPs initialized.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Alexander Graf [Thu, 12 May 2016 11:44:01 +0000 (13:44 +0200)]
ARM64: zynqmp: Align gic ranges for 64k in device tree
The GIC ranges in the zynqmp device tree are only 4kb aligned. Since
commit
12e14066f we automatically deal with aliases GIC regions though,
so we can map them transparently into guests even on 64kb page size
systems.
This patch makes use of that features and sets GICC and GICV to 64kb
aligned and sized regions.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>