arm64: dts: qcom: sc8280xp: drop bogus clock-controller property

There is no "clock-controller" property:

  sa8295p-adp.dtb: service@2: clock-controller: 'clock-controller' does not match any of the regexes: 'pinctrl-[0-9]+'
    From schema: Documentation/devicetree/bindings/sound/qcom,q6prm.yaml

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230118094224.51704-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sm8250: drop unused clock-frequency from rx-macro

Neither qcom,sm8250-lpass-rx-macro bindings nor the driver use
"clock-frequency" property.

  sm8250-mtp.dtb: rxmacro@3200000: Unevaluated properties are not allowed ('clock-frequency' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230118094224.51704-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7180: set ath10k output power calibration string

Add the string to load RF output power table for pazquel360 project.

Signed-off-by: Yunlong Jia <ecs.beijing2022@gmail.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085212.1.If242b1cd61b2e87e312dd9cf81e20301bae2a5a4@changeid

arm64: dts: qcom: sm6115: Add debug related nodes

Add dtsi nodes related to coresight debug units such
as cti, etm, etr, funnel(s), replicator(s), etc. for
Qualcomm sm6115 SoC.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116164032.551223-1-bhupesh.sharma@linaro.org

arm64: dts: qcom: sm8350-hdk: Enable lt9611uxc dsi-hdmi bridge

The sm8350-hdk ships with the LT9611 UXC DSI/HDMI bridge chip.

In order to toggle the board to enable the HDMI output,
switch #7 & #8 on the rightmost multi-switch package have
to be toggled to On.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117120223.1055225-4-rfoss@kernel.org

arm64: dts: qcom: sm8350-hdk: Enable display & dsi nodes

Enable the display subsystem and the dsi0 output for
the sm8350-hdk board.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117120223.1055225-3-rfoss@kernel.org

arm64: dts: qcom: sm8350: Add display system nodes

Add mdss, mdss_mdp, dsi0, dsi0_phy nodes. With these
nodes the display subsystem is configured to support
one DSI output.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117120223.1055225-2-rfoss@kernel.org

arm64: dts: qcom: sm8550-mtp: Add UFS host controller and PHY node

Enable UFS host controller and PHY node on SM8550 MTP board.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116141000.1831351-2-abel.vesa@linaro.org

arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes

Add UFS host controller and PHY nodes.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116141000.1831351-1-abel.vesa@linaro.org

arm64: dts: qcom: sdm630-nile: Reserve simplefb memory

Reserve the bit of memory that simplefb uses to ensure it can always
probe.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116141451.470158-2-konrad.dybcio@linaro.org

arm64: dts: qcom: sdm630-nile: Don't use underscores in node names

Rename the reserved-memory subnodes such that they don't use
undescores.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116141451.470158-1-konrad.dybcio@linaro.org

arm64: dts: qcom: add data-lanes and link-freuencies into dp_out endpoint

Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-frequencies will be the max link rate
supported by DP.

Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1672163103-31254-2-git-send-email-quic_khsieh@quicinc.com

arm64: dts: qcom: sc7180-trogdor: align DAI children names with DT schema

Bindings expect DAI children to be named "dai-link":

  sc7180-trogdor-coachz-r1.dtb: lpass@62d87000: Unevaluated properties are not allowed ('hdmi@5', 'mi2s@0', 'mi2s@1' were unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221227163158.102737-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sm8350: drop unused dispcc power-domain-names

Display clock controller bindings do not allow power-domain-names:

  sm8350-hdk.dtb: clock-controller@af00000: 'power-domain-names' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221227163158.102737-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: use UFS symbol clocks provided by PHY

Remove manually created symbol clocks and replace them with clocks
provided by PHY.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221123104443.3415267-5-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8350-hdk: enable PCIe devices

Enable PCIe0 and PCIe1 hosts found on SM8350 HDK board.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221118233242.2904088-9-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8350: add PCIe devices

Add PCIe0 and PCIe1 (and corresponding PHY) devices found on SM8350
platform. The PCIe0 is a 1-lane Gen3 host, PCIe1 is a 2-lane Gen3 host.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221118233242.2904088-8-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sc8280xp: Use MMCX for all DP controllers

While MDSS_GDSC is a subdomain of MMCX, Linux does not respect this
relationship and sometimes invokes sync_state on the rpmhpd (MMCX)
before the DisplayPort controller has had a chance to probe.

The result when this happens is that the power is lost to the multimedia
subsystem between the probe of msm_drv and the DisplayPort controller -
which results in an irrecoverable state.

While this is an implementation problem, this aligns the power domain
setting of the one DP instance with that of all the others.

Fixes: 57d6ef683a15 ("arm64: dts: qcom: sc8280xp: Define some of the display blocks")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112135055.3836555-1-quic_bjorande@quicinc.com

arm64: dts: qcom: sc8280xp-crd: allow vreg_l3b to be disabled

The vreg_l3b supply is used by the eDP, UFS and USB1 PHYs which are now
described by the devicetree so that the regulator no longer needs to be
marked always-on.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112074503.12185-1-johan+linaro@kernel.org

arm64: dts: qcom: sm8450: Add TCSR halt register space

Add TCSR register space and refer it from scm node, so that
it can be used by SCM driver.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1673513697-30173-2-git-send-email-quic_mojha@quicinc.com

arm64: dts: qcom: sc8280xp: Vote for CX in USB controllers

Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level,
not doing so results in occasional lockups. This was previously hidden
by the fact that the display stack incorrectly voted for CX (instead of
MMCX).

Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112135117.3836655-1-quic_bjorande@quicinc.com

arm64: dts: qcom: sm8250: drop the virtual ipa-virt device

Drop the virtual ipa-virt device. The interconnects it provided are
going to be represented as <&rpmhcc RPMH_IPA_CLK> clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109002935.244320-13-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8150: drop the virtual ipa-virt device

Drop the virtual ipa-virt device. The interconnects it provided are
going to be represented as <&rpmhcc RPMH_IPA_CLK> clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109002935.244320-12-dmitry.baryshkov@linaro.org

arm64: dts: qcom: pm7250b: Add BAT_ID vadc channel

Add a node describing the ADC5_BAT_ID_100K_PU channel with the
properties taken from downstream kernel.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106-pm7250b-bat_id-v1-2-82ca8f2db741@fairphone.com

arm64: dts: qcom: msm8916: Add DMA for all I2C controllers

i2c-qup allows using DMA to speed up larger transfers. In msm8916.dtsi
the DMA channels are already assigned to the SPI controllers but
missing for I2C. Add them there as well.

This also fixes confusing errors in dmesg for each I2C controller:
  i2c_qup 78b6000.i2c: tx channel not available

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107110958.5762-3-stephan@gerhold.net

arm64: dts: qcom: msm8916: Enable blsp_dma by default

Adding the "dmas" to the I2C controllers prevents probing them if
blsp_dma is disabled (infinite probe deferral). Avoid this by enabling
blsp_dma by default - it's an integral part of the SoC that is almost
always used (even if just for UART).

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107110958.5762-2-stephan@gerhold.net

arm64: dts: qcom: msm8916-gplus-fl8005a: Add flash LED

FL8005A uses Qualcomm GPIO flash LEDs which is compatible with
SGM3140 Flash LED driver. Add it to the device tree.

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107133235.139947-1-linmengbo0689@protonmail.com

arm64: dts: qcom: msm8916-gplus-fl8005a: Add touchscreen

FL8005A uses a Focaltech FT5402 touchscreen that is connected to
blsp_i2c5. Add it to the device tree.

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107133223.139893-1-linmengbo0689@protonmail.com

arm64: dts: qcom: msm8916-gplus-fl8005a: Add initial device tree

GPLUS FL8005A is a tablet using the MSM8916 SoC released in 2015.

Add a device tree for with initial support for:

- GPIO keys
- GPIO LEDs
- pm8916-vibrator
- SDHCI (internal and external storage)
- USB Device Mode
- UART
- WCNSS (WiFi/BT)
- Regulators

Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107133210.139839-1-linmengbo0689@protonmail.com

arm64: dts: qcom: msm8996: mark apcs as clock provider

Now as we added the APCS clock controller support, mark apcs device as
clock provider by adding #clock-cells property.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111191634.2509616-1-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sa8540p-pmics: rename pmic labels

The SA8540P PMICs are named PMM8540. Rename the devicetree source labels
to reflect this.

Reviewed-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111160335.7175-3-johan+linaro@kernel.org

arm64: dts: qcom: sa8540p-pmics: add missing interrupt include

Add the missing interrupt-controller include which is needed by the RTC
node.

Reviewed-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Eric Chanudet <echanude@redhat.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111160335.7175-2-johan+linaro@kernel.org

arm64: dts: qcom: sc8280xp-x13s: enable eDP display

Enable the eDP display on MDSS0 DP3, including backlight control.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111133128.31813-1-johan+linaro@kernel.org

arm64: dts: qcom: sa8295-adp: Enable DP instances

The SA8295P ADP has, among other interfaces, six MiniDP connectors which
are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.

Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers,
DP PHYs and link them all together.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111035906.2975494-4-quic_bjorande@quicinc.com

arm64: dts: qcom: sc8280xp-crd: Enable EDP

The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes
and link it together with the backlight control.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111035906.2975494-3-quic_bjorande@quicinc.com

arm64: dts: qcom: sc8280xp: Define some of the display blocks

Define the display clock controllers, the MDSS instances, the DP phys
and connect these together.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111035906.2975494-2-quic_bjorande@quicinc.com

Revert "dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11"

This reverts commit 92ad27fb925943d62deaaa659931ce85ddec99c8, as this
was applied to the wrong branch and causes merge conflicts.

arm64: dts: qcom: msm8996-oneplus-common: drop vdda-supply from DSI PHY

14nm DSI PHY has the only supply, vcca. Drop the extra vdda-supply.

Fixes: 5a134c940cd3 ("arm64: dts: qcom: msm8996: add support for oneplus3(t)")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109042406.312047-1-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm845-tama: Add volume up and camera GPIO keys

Tama has four GPIO-wired keys: two for camera focus and shutter /
snapshot, and two more for volume up and down.  As per the comment these
used to not work because the necessary pin bias was missing, which is
now set via pinctrl on pm8998_gpios.

The missing bias has also been added to the existing volume down button,
which receives a node name and label cleanup at the same time to be more
consistent with other DTS and the newly added buttons.  Its deprecated
gpio-key,wakeup property has also been replaced with wakeup-source.

Note that volume up is also available through the usual PON RESIN node,
but unlike other platforms only triggers when the power button is held
down at the same time making it unsuitable to serve as KEY_VOLUMEUP.

Fixes: 30a7f99befc6 ("arm64: dts: qcom: Add support for SONY Xperia XZ2 / XZ2C / XZ3 (Tama platform)")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109234133.365644-1-marijn.suijten@somainline.org

arm64: dts: qcom: sdm845: make DP node follow the schema

Drop the #clock-cells (probably a leftover from the times before the DP
PHY split)

Fixes: eaac4e55a6f4 ("arm64: dts: qcom: sdm845: add displayport node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230110042126.702147-1-dmitry.baryshkov@linaro.org

arm64: dts: qcom: msm8998: Use RPM XO

Feed GCC and SDHC_2 with the RPM XO instead of the fixed-clock one.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230110143642.986799-1-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8450: Use GIC-ITS for PCIe0 and PCIe1

Both PCIe0 and PCIe1 controllers are capable of signalling the MSIs
received from endpoint devices to the CPU using GIC-ITS MSI controller.
Add support for it.

Currently, BDF (0:0.0) and BDF (1:0.0) are enabled and with the
msi-map-mask of 0xff00, all the 32 devices under these two busses can
share the same Device ID.

The GIC-ITS MSI implementation provides an advantage over internal MSI
implementation using Locality-specific Peripheral Interrupts (LPI) that
would allow MSIs to be targeted for each CPU core.

It should be noted that the MSIs for BDF (1:0.0) only works with Device
ID of 0x5980 and 0x5a00. Hence, the IDs are swapped.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # Xperia 1 IV (WCN6855)
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102105821.28243-4-manivannan.sadhasivam@linaro.org

arm64: dts: qcom: add missing space before {

Add missingh whitespace between node name/label and opening {.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221230140133.57885-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: msm8998: get rid of test clock

The test clock apparently it's not used by anyone upstream. Remove it.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-17-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8450: correct Soundwire wakeup interrupt name

The bindings expect second Soundwire interrupt to be "wakeup" (Linux
driver takes by index):

  sm8450-hdk.dtb: soundwire-controller@33b0000: interrupt-names:1: 'wakeup' was expected

Fixes: 14341e76dbc7 ("arm64: dts: qcom: sm8450: add Soundwire and LPASS")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221223132121.81130-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: pm8941-rtc add alarm register

A few descriptions including a qcom,pm8941-rtc describe two reg-names
for the "rtc" and "alarm" register banks, but only one offset.
For consistency with reg-names, add the "alarm" register offset.
No functional change is expected from this.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-5-echanude@redhat.com

arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics

Include the dtsi to use a single pmic descriptions.
Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-4-echanude@redhat.com

arm64: dts: qcom: sa8450p-pmics: add rtc node

Add the rtc block on the first pmic to enable the rtc for sa8540p-ride.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-3-echanude@redhat.com

arm64: dts: qcom: rename pm8450a dtsi to sa8540p-pmics

pm8450a.dtsi was introduced for the descriptions of pmics used on
sa8540p based boards. Rename the dtsi to make this relationship
explicit.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-2-echanude@redhat.com

arm64: dts: qcom: sm8350: Drop standalone smem node

SM8350 is one of the last SoCs whose DTSI escaped the smem node
conversion. Use the newer memory-node binding instead of a memory *and*
smem node.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219162618.873117-1-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8450-hdk: add missing PMIC includes

Add includes for PMICs used on the SM8450-HDK. This makes GPIO blocks
and thermal sensors available to the user of the platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-6-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8450-hdk: add pmic files

SM8450 HDK features bunch of PMICs, add the PMICs which we have already
upstream files

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-5-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8450-qrd: add missing PMIC includes

Add includes for PMICs used on the SM8450-HDK. This makes GPIO blocks
and thermal sensors available to the user of the platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-4-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8450-qrd: add pmic files

SM8450 QRD features bunch of PMICs, add the PMICs which we have already
upstream files

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221217003349.546852-3-dmitry.baryshkov@linaro.org

arm64: dts: qcom: replace underscores in node names

Underscores should not be used in node names (dtc with W=2 warns about
them), so replace them with hyphens.  In few places adjust the name to
match other nodes (e.g. xxx-regulator).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221214110448.86268-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie with NVMe

Add DT for sc7280-herobrine-zombie with NVMe

Signed-off-by: Owen Yang <ecs.taipeikernel@gmail.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221214114706.2.I1a0c709f8ec86cc5b38f0fe9f9b26694b1eb69d6@changeid

arm64: dts: qcom: sm8450: Add fallback CCI compatible

Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-5-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8250: Add fallback CCI compatible

Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-4-konrad.dybcio@linaro.org

arm64: dts: qcom: sdm845: Add fallback CCI compatible

Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-3-konrad.dybcio@linaro.org

arm64: dts: qcom: msm8916: Add fallback CCI compatible

Add a fallback CCI compatible, as required by bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213183305.544644-2-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8450-nagara: Disable empty i2c bus

As much as it hurts me, there is no FM radio chips on these devices.
It seems to be present on Japanese models, but these are not available
globally and differ in a few more ways anyway (such as a super high-tech
NFC chip). Since it's the only subdevice of its I2C host bus, disable
said bus to save some power.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213132517.203609-3-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8350-sagami: Disable empty i2c bus

As much as it hurts me, there is no FM radio chips on these devices.
It seems to be present on Japanese models, but these are not available
globally and differ in a few more ways anyway (such as a super high-tech
NFC chip). Since it's the only subdevice of its I2C host bus, disable
said bus to save some power.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213132517.203609-2-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8250-edo: Remove misleading comments

As much as it hurts me, there is no FM radio chips on these devices.
It seems to be present on Japanese models, but these are not available
globally and differ in a few more ways anyway (such as a super high-tech
NFC chip).

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213132517.203609-1-konrad.dybcio@linaro.org

arm64: dts: qcom: sc7180: Set performance state for audio

Set a performance state for audio clks so that the minimally
correct corner voltage is picked when audio is active.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1670932566-22923-1-git-send-email-quic_srivasam@quicinc.com

arm64: dts: qcom: rename AOSS QMP nodes

The Always On Subsystem (AOSS) QMP is not a power domain controller
since commit 135780456218 ("arm64: dts: qcom: sc7180: Use QMP property
to control load state") and few others.  In fact, it was never a power
domain controller but rather control of power state of remote
processors.  This power state control is now handled differently, thus
the AOSS QMP nodes do not have power-domain-cells:

  sc7280-idp.dtb: power-controller@c300000: '#power-domain-cells' is a required property
  From schema: Documentation/devicetree/bindings/power/power-domain.yaml

AOSS QMP is an interface to the actuall AOSS subsystem responsible for
some of power management functions, thus let's call the nodes as
"power-management".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-4-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc8280xp: correct SPMI bus address cells

The SPMI bus uses two address cells and zero size cells (second reg
entry - SPMI_USID - is not the size):

  spmi@c440000: #address-cells:0:0: 2 was expected

Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-3-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7280: correct SPMI bus address cells

The SPMI bus uses two address cells and zero size cells (second reg
entry - SPMI_USID - is not the size):

  spmi@c440000: #address-cells:0:0: 2 was expected

Fixes: 14abf8dfe364 ("arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7180: correct SPMI bus address cells

The SPMI bus uses two address cells and zero size cells (second reg
entry - SPMI_USID - is not the size):

  spmi@c440000: #address-cells:0:0: 2 was expected

Fixes: 0f9dc5f09fbd ("arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213101921.47924-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sa8540p-ride: enable pcie2a node

Add the pcie2a, pcie2a_phy, and respective tlmm nodes that are needed to
get pcie 2a controller enabled on Qdrive3.

This patch enables 4GB 64bit memory space for PCIE_2A to have BAR
allocations of 64bit pref mem needed on this Qdrive3 platform with dual
SoCs for root port and switch NT-EP. Hence this ranges property is
overridden in sa8540p-ride.dts only.

Moved tlmm node at the end as it tends to become rahter long.

Link: https://lore.kernel.org/lkml/Y49k1k8ayI9%2FrK+R@hovoldconsulting.com/
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213095922.11649-1-quic_shazhuss@quicinc.com

arm64: dts: qcom: sdm845: order top-level nodes alphabetically

Order top-level nodes like memory, reserved-memory, opp-table-cpu
alphabetically for easier code maintenance.  No functional change (same
dtx_diff, except phandle changes).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212100232.138519-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7180: order top-level nodes alphabetically

Order top-level nodes like memory, reserved-memory, opp-table-cpu
alphabetically for easier code maintenance.  No functional change (same
dtx_diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221212100232.138519-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sc7280: Fix CPU nodes compatible string

'arm,kryo' is not documented and is not an Arm Ltd thing either as that
is Qualcomm branding. The correct compatible is 'qcom,kryo'.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207211327.2848665-1-robh@kernel.org

arm64: dts: qcom: sm8450-nagara: Configure SLG51000 PMIC

Nagara devices use the Dialog SLG51000 PMIC for powering some camera
sensors. Add the required nodes to support it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229103212.984324-7-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8450-nagara: Enable PMIC RESIN+PON

Enable the power and volume up buttons, connected to PON and RESIN
respectively.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229103212.984324-6-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8450-nagara: Set up camera regulators

Set up gpio-controlled fixed regulators for camera on PDX223 and fix
up the existing ones in common and PDX224 trees.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229103212.984324-5-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8450-nagara: Add GPIO keys

With PMIC GPIOs now available, set up required pin settings and add
gpio-keys.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229103212.984324-4-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8450-nagara: Add GPIO line names for PMIC GPIOs

Sony ever so graciously provides GPIO line names in their downstream
kernel (though sometimes they are not 100% accurate and you can judge
that by simply looking at them and with what drivers they are used).

Add these to the PDX223&224 DTSIs to better document the hardware.

Diff between 223 and 224:
pm8350b
<    "CAM_PWR_LD_EN",
>    "NC",

pm8350c
<   "RGBC_IR_PWR_EN",
>    "NC",

Which is due to different camera power wiring on 223 and lack of a
ToF sensor on 224.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229103212.984324-3-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8450-nagara: Include PMIC DTSIs

Now that SPMI is finally in place, include the DTSIs of PMICs present
on Nagara.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229103212.984324-2-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8450: add spmi node

Add the spmi bus as found in the SM8450 SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[Konrad: 0x0 -> 0, move #cells down, make reg-names a vertical list]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[bjorn: Adjusted unit address]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229103212.984324-1-konrad.dybcio@linaro.org

arm64: dts: qcom: sm8550: add QCrypto nodes

Add the QCE and Crypto BAM DMA nodes.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221115-topic-sm8550-upstream-dts-qce-v1-0-fe750dfa90f6@linaro.org

arm64: dts: qcom: sm8550: add I2C Master Hub nodes

Add the I2C Master Hub wrapper and I2C serial engines nodes.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221115-topic-sm8550-upstream-dts-gpi-qup-v1-0-86a60cf3e57d@linaro.org

arm64: dts: qcom: Add base SM8550 MTP dts

Add dts file for Qualcomm MTP platform which uses SM8550 SoC.

Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106201047.337409-11-abel.vesa@linaro.org

arm64: dts: qcom: Add PMR735d pmic dtsi

Add nodes for PMR735d in separate dtsi file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106201047.337409-10-abel.vesa@linaro.org

arm64: dts: qcom: Add PMK8550 pmic dtsi

Add nodes for PMK8550 in separate dtsi file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106201047.337409-9-abel.vesa@linaro.org

arm64: dts: qcom: Add PM8550vs pmic dtsi

Add nodes for PM8550vs in separate dtsi file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106201047.337409-8-abel.vesa@linaro.org

arm64: dts: qcom: Add PM8550ve pmic dtsi

Add nodes for PM8550ve in separate dtsi file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106201047.337409-7-abel.vesa@linaro.org

arm64: dts: qcom: Add PM8550b pmic dtsi

Add nodes for PM8550b in separate dtsi file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106201047.337409-6-abel.vesa@linaro.org

arm64: dts: qcom: Add PM8550 pmic dtsi

Add nodes for PM8550 in separate dtsi file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106201047.337409-5-abel.vesa@linaro.org

arm64: dts: qcom: Add pm8010 pmic dtsi

Add nodes for pm8010 in separate dtsi file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106201047.337409-4-abel.vesa@linaro.org

arm64: dts: qcom: Add base SM8550 dtsi

Add base dtsi for SM8550 SoC and includes base description of
CPUs, GCC, RPMHCC, UART, interrupt controller, TLMM, reserved
memory, RPMh PD, TCSRCC, ITS, IPCC, AOSS QMP, LLCC, cpufreq,
interconnect, thermal sensor, cpu cooling maps and SMMU nodes
which helps boot to shell with console on boards with this SoC.

Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230106201047.337409-3-abel.vesa@linaro.org

Merge branch '20230104093450.3150578-2-abel.vesa@linaro.org' into arm64-for-6.3

Merge the TCSR clock binding, to gain the Devicetree include file.

dt-bindings: clock: Add SM8550 TCSR CC clocks

Add bindings documentation for clock TCSR driver on SM8550.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104093450.3150578-2-abel.vesa@linaro.org

Merge branch 'icc-sm8550-immutable' of https://git./linux/kernel/git/djakov/icc into arm64-for-6.3

Merge the immutable SM8550 interconnect branch, to gain the include file
from the binding.

arm64: dts: qcom: sm8450: Add compat qcom,sm8450-dsi-ctrl

Add silicon specific compatible qcom,sm8450-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sm8450 against the yaml documentation.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230110055433.734188-3-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sm8150: Add compat qcom,sm8150-dsi-ctrl

Add silicon specific compatible qcom,sm8150-dsi-ctrl to the
mdss-dsi-ctrl block. This allows us to differentiate the specific bindings
for sm8150 against the yaml documentation.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230110055433.734188-2-dmitry.baryshkov@linaro.org

arm64: dts: qcom: sdm845: do not customize SPI0 pin drive/bias

Each board should define pin drive/bias for used busses.  All boards
using SPI0 (db845c and cheza) already do it, so drop the bias/drive
strength from SoC DTSI.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221222151319.122398-4-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm845: align TLMM pin configuration with DT schema

DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221222151319.122398-3-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm845-xiaomi-beryllium: fix audio codec interrupt pin name

The pin config entry should have a string, not number, for the GPIO used
as WCD9340 audio codec interrupt.

Fixes: dd6459a0890a ("arm64: dts: qcom: split beryllium dts into common dtsi and tianma dts")
Reported-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221222151319.122398-2-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: sdm845-db845c: fix audio codec interrupt pin name

The pin config entry should have a string, not number, for the GPIO used
as WCD9340 audio codec interrupt.

Fixes: 89a32a4e769c ("arm64: dts: qcom: db845c: add analog audio support")
Reported-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221222151319.122398-1-krzysztof.kozlowski@linaro.org

arm64: dts: qcom: msm8998-fxtec: fix touchscreen reset GPIO polarity

The reset line is active low for the Goodix touchscreen controller so
let's fix the polarity in the Device Tree node.

Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103-upstream-goodix-reset-v3-8-0975809eb183@theobroma-systems.com